diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
index e54990ce65e8e72f025e511d7a6f1e6db7cbfb0c..c96426ceec25b389e4f36ec15486b721a45b3b09 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
@@ -491,7 +491,6 @@ BEGIN
   -- Every design instantiates an mms_remu instance + MM status & control ports.
   -- So there is full control over the memory mapped registers to set start address of the flash 
   -- and reconfigure from that address.
-  --gen_mms_remu: IF g_sim = FALSE GENERATE
   u_mms_remu: ENTITY remu_lib.mms_remu
   GENERIC MAP ( 
     g_technology       => g_technology
@@ -505,12 +504,10 @@ BEGIN
     remu_mosi          => reg_remu_mosi,
     remu_miso          => reg_remu_miso
   );
-  --END GENERATE;
 
   -----------------------------------------------------------------------------
   -- EPCS
   -----------------------------------------------------------------------------
-  --gen_mms_epcs: IF g_sim = FALSE GENERATE
   u_mms_epcs: ENTITY epcs_lib.mms_epcs
   GENERIC MAP ( 
     g_technology       => g_technology
@@ -536,7 +533,6 @@ BEGIN
     mmdp_data_mosi     => reg_mmdp_data_mosi,
     mmdp_data_miso     => reg_mmdp_data_miso
   );
-  --END GENERATE;
   
   ------------------------------------------------------------------------------
   -- PPS input