diff --git a/libraries/base/dp/src/vhdl/dp_counter.vhd b/libraries/base/dp/src/vhdl/dp_counter.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..e6444eeead88d54e25b0f46176034b188b6b8fe8
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+++ b/libraries/base/dp/src/vhdl/dp_counter.vhd
@@ -0,0 +1,120 @@
+--------------------------------------------------------------------------------
+--
+-- Copyright (C) 2017
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+--------------------------------------------------------------------------------
+
+-- Author:
+-- . Daniel van der Schuur
+-- Purpose:
+-- . Pipeline wrapper around dp_counter_func
+-- Description:
+-- . See dp_counter_func.
+-- . dp_counter_func contains only functional logic (no pipelining).
+-- . This wrapper adds pipelining for the source side outputs (g_pipeline_src_out)
+--   and source side inputs (g_pipeline_snk_in).
+
+LIBRARY IEEE,common_lib;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.numeric_std.ALL;
+USE common_lib.common_pkg.ALL;
+USE work.dp_stream_pkg.ALL;
+
+ENTITY dp_counter IS
+  GENERIC (
+    g_c0_trigger       : BOOLEAN := FALSE;
+    g_c0               : t_natural_arr(0 TO 2) := (0,2,1);
+    g_c1               : t_natural_arr(0 TO 2) := (0,2,1);
+    g_pipeline_src_out : BOOLEAN := TRUE;
+    g_pipeline_src_in  : BOOLEAN := FALSE
+  );
+  PORT (                                                    
+    clk         : IN  STD_LOGIC;
+    rst         : IN  STD_LOGIC;
+
+    snk_in      : IN  t_dp_sosi;
+    snk_out     : OUT t_dp_siso;
+
+    src_out     : OUT t_dp_sosi;
+    src_in      : IN  t_dp_siso;
+
+    c0_trigger     : IN STD_LOGIC := '0';
+   
+    c0          : OUT STD_LOGIC_VECTOR(ceil_log2(g_c0(0)+((g_c0(1)-1-g_c0(0))/g_c0(2))*g_c0(2)+1)-1 DOWNTO 0);
+    c0_min      : OUT STD_LOGIC;
+    c0_max      : OUT STD_LOGIC;
+    c1          : OUT STD_LOGIC_VECTOR(ceil_log2(g_c1(0)+((g_c1(1)-1-g_c1(0))/g_c1(2))*g_c1(2)+1)-1 DOWNTO 0);
+    c1_min      : OUT STD_LOGIC;
+    c1_max      : OUT STD_LOGIC
+  );
+END dp_counter;
+
+
+ARCHITECTURE wrap OF dp_counter IS
+
+  SIGNAL dp_counter_func_snk_in  : t_dp_sosi;
+  SIGNAL dp_counter_func_snk_out : t_dp_siso;
+  SIGNAL dp_counter_func_src_out : t_dp_sosi;
+  SIGNAL dp_counter_func_src_in  : t_dp_siso;
+
+  SIGNAL dp_counter_func_c0      : STD_LOGIC_VECTOR(ceil_log2(g_c0(0)+((g_c0(1)-1-g_c0(0))/g_c0(2))*g_c0(2)+1)-1 DOWNTO 0);
+  SIGNAL dp_counter_func_c0_min  : STD_LOGIC;
+  SIGNAL dp_counter_func_c0_max  : STD_LOGIC;
+
+  SIGNAL dp_counter_func_c1      : STD_LOGIC_VECTOR(ceil_log2(g_c1(0)+((g_c1(1)-1-g_c1(0))/g_c1(2))*g_c1(2)+1)-1 DOWNTO 0);
+  SIGNAL dp_counter_func_c1_min  : STD_LOGIC;
+  SIGNAL dp_counter_func_c1_max  : STD_LOGIC;
+
+BEGIN
+
+  ------------------------------------------------------------------------------
+  -- dp_counter_func
+  ------------------------------------------------------------------------------ 
+  dp_counter_func_snk_in <= stimuli_src_out;
+  snk_out                <= dp_counter_func_snk_out;    
+
+  u_dp_counter_func : ENTITY work.dp_counter_func
+  GENERIC MAP (
+    g_c0 => g_c0,
+    g_c1 => g_c1
+  )
+  PORT MAP (
+    rst       => rst,
+    clk       => clk,
+
+    snk_in    => dp_counter_func_snk_in,
+    snk_out   => dp_counter_func_snk_out,
+
+    src_out   => dp_counter_func_src_out,
+    src_in    => dp_counter_func_src_in,
+
+    c0        => dp_counter_func_c0, 
+    c0_min    => dp_counter_func_c0_min,
+    c0_max    => dp_counter_func_c0_max,
+
+    c1        => dp_counter_func_c1, 
+    c1_min    => dp_counter_func_c1_min,
+    c1_max    => dp_counter_func_c1_max
+  );
+  
+  ------------------------------------------------------------------------------
+  -- dp_pipeline
+  ------------------------------------------------------------------------------ 
+
+  
+END wrap;