From c8af34aba20bae828e325ef564bfe9a6fd97c8f0 Mon Sep 17 00:00:00 2001
From: donker <donker@astron.nl>
Date: Wed, 3 Apr 2024 10:53:00 +0200
Subject: [PATCH] L2SDP-1031, 1e run
---
applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd | 1 -
applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd | 1 -
.../lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd | 1 -
.../src/vhdl/lofar2_unb2b_beamformer_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd | 1 -
.../src/vhdl/lofar2_unb2b_filterbank_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd | 1 -
.../lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd | 1 -
.../src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd | 2 --
.../src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd | 1 -
.../src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd | 1 -
.../src/vhdl/lofar2_unb2c_filterbank_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd | 1 -
.../lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd | 2 --
.../src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd | 1 -
.../src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd | 2 --
.../libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd | 1 -
.../lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd | 1 -
.../src/vhdl/rdma_generator_roce_tester.vhd | 1 -
.../rdma_generator/tb/vhdl/tb_rdma_generator.vhd | 1 -
.../rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd | 1 -
.../tb/vhdl/tb_rdma_packetiser_assemble_header.vhd | 2 --
.../ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd | 1 -
.../hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd | 1 -
.../ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd | 1 -
.../ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd | 1 -
applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd | 1 -
.../unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd | 1 -
.../src/vhdl/node_unb1_bn_terminal_bg.vhd | 1 -
.../unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd | 1 -
.../unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd | 1 -
.../unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd | 1 -
.../tb/vhdl/tb_unb1_fn_terminal_db.vhd | 1 -
.../designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd | 1 -
.../designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd | 1 -
.../mmm_unb1_minimal_qsys_wo_pll.vhd | 1 -
.../qsys_wo_pll_unb1_minimal_pkg.vhd | 2 --
.../unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd | 2 --
.../src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd | 1 -
.../src/vhdl/unb1_terminal_bg_mesh_db.vhd | 1 -
.../tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd | 1 -
.../designs/unb1_test/src/vhdl/mmm_unb1_test.vhd | 1 -
.../designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd | 1 -
boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd | 1 -
.../designs/unb1_test/src/vhdl/unb1_test_pkg.vhd | 2 --
.../designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd | 1 -
.../libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd | 1 -
.../libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd | 1 -
.../src/vhdl/unb1_board_back_uth_terminals_bidir.vhd | 1 -
.../libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd | 1 -
.../libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd | 1 -
.../src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd | 1 -
.../unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd | 1 -
.../libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd | 1 -
.../tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd | 1 -
.../unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd | 1 -
.../unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd | 1 -
.../unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd | 1 -
.../unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd | 1 -
.../unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd | 1 -
.../designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd | 1 -
.../unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd | 1 -
.../designs/unb2_pinning/src/vhdl/unb2_pinning.vhd | 1 -
.../designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd | 1 -
.../designs/unb2_test/src/vhdl/mmm_unb2_test.vhd | 1 -
.../designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd | 1 -
boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd | 1 -
.../libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd | 1 -
.../unb2_board/src/vhdl/unb2_board_clk125_pll.vhd | 1 -
.../unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd | 1 -
.../libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd | 1 -
.../designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd | 1 -
.../unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd | 1 -
.../designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd | 1 -
.../unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd | 1 -
.../designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd | 1 -
.../designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd | 1 -
.../uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd | 1 -
.../libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd | 1 -
.../unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd | 1 -
.../unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd | 1 -
.../libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd | 1 -
.../designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd | 1 -
.../unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/common_network_layers_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/common_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/dp_stream_pkg.vhd | 2 --
.../avs2_eth_coe_10/sim/eth_pkg.vhd | 2 --
.../avs2_eth_coe_10/sim/tech_tse_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/common_network_layers_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/common_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/dp_stream_pkg.vhd | 2 --
.../avs2_eth_coe_10/synth/eth_pkg.vhd | 2 --
.../avs2_eth_coe_10/synth/tech_tse_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/common_network_layers_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/common_pkg.vhd | 1 -
.../avs2_eth_coe_10/sim/dp_stream_pkg.vhd | 2 --
.../avs2_eth_coe_10/sim/eth_pkg.vhd | 2 --
.../avs2_eth_coe_10/sim/tech_tse_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/common_network_layers_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/common_pkg.vhd | 1 -
.../avs2_eth_coe_10/synth/dp_stream_pkg.vhd | 2 --
.../avs2_eth_coe_10/synth/eth_pkg.vhd | 2 --
.../avs2_eth_coe_10/synth/tech_tse_pkg.vhd | 1 -
.../designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd | 1 -
.../designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd | 1 -
.../unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd | 1 -
.../designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd | 1 -
.../designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd | 1 -
.../uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd | 1 -
.../unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd | 1 -
.../unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd | 1 -
.../libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd | 1 -
.../designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd | 1 -
.../unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd | 1 -
.../designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd | 1 -
.../designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd | 1 -
.../uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd | 1 -
.../designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd | 2 --
.../unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd | 1 -
.../unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd | 1 -
.../libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd | 1 -
libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd | 2 --
libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd | 2 --
libraries/base/common/src/vhdl/common_acapture_slv.vhd | 1 -
.../base/common/src/vhdl/common_adder_tree_a_str.vhd | 1 -
libraries/base/common/src/vhdl/common_async_slv.vhd | 1 -
libraries/base/common/src/vhdl/common_blockreg.vhd | 1 -
libraries/base/common/src/vhdl/common_components_pkg.vhd | 1 -
libraries/base/common/src/vhdl/common_ddreg_slv.vhd | 1 -
libraries/base/common/src/vhdl/common_fanout.vhd | 1 -
libraries/base/common/src/vhdl/common_fanout_tree.vhd | 1 -
libraries/base/common/src/vhdl/common_field_pkg.vhd | 2 --
.../base/common/src/vhdl/common_interface_layers_pkg.vhd | 1 -
.../base/common/src/vhdl/common_lfsr_sequences_pkg.vhd | 1 -
libraries/base/common/src/vhdl/common_math_pkg.vhd | 1 -
libraries/base/common/src/vhdl/common_mem_mux.vhd | 1 -
libraries/base/common/src/vhdl/common_mem_pkg.vhd | 2 --
.../base/common/src/vhdl/common_network_layers_pkg.vhd | 2 --
.../common/src/vhdl/common_network_total_header_pkg.vhd | 2 --
libraries/base/common/src/vhdl/common_operation_tree.vhd | 1 -
libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd | 1 -
.../base/common/src/vhdl/common_paged_ram_crw_crw.vhd | 1 -
libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd | 1 -
libraries/base/common/src/vhdl/common_paged_reg.vhd | 1 -
libraries/base/common/src/vhdl/common_pipeline_symbol.vhd | 1 -
libraries/base/common/src/vhdl/common_pkg.vhd | 1 -
libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd | 1 -
libraries/base/common/src/vhdl/common_reinterleave.vhd | 1 -
libraries/base/common/src/vhdl/common_rl_increase.vhd | 1 -
libraries/base/common/src/vhdl/common_shiftram.vhd | 1 -
libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd | 1 -
libraries/base/common/src/vhdl/common_str_pkg.vhd | 1 -
.../base/common/src/vhdl/mms_common_stable_monitor.vhd | 1 -
libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd | 1 -
libraries/base/common/tb/vhdl/tb_common_pkg.vhd | 1 -
libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd | 1 -
libraries/base/common/tb/vhdl/tb_common_switch.vhd | 1 -
libraries/base/common/tb/vhdl/tb_resize.vhd | 1 -
libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd | 1 -
libraries/base/common_mult/src/vhdl/common_mult_add.vhd | 1 -
libraries/base/diag/src/vhdl/diag_pkg.vhd | 2 --
libraries/base/diag/src/vhdl/diag_wg_wideband.vhd | 1 -
libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd | 1 -
libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd | 1 -
libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd | 1 -
libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd | 1 -
libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd | 1 -
libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd | 1 -
libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd | 1 -
.../base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd | 1 -
.../unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd | 1 -
libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd | 1 -
libraries/base/dp/src/vhdl/dp_counter.vhd | 1 -
libraries/base/dp/src/vhdl/dp_counter_func.vhd | 1 -
libraries/base/dp/src/vhdl/dp_deinterleave.vhd | 1 -
libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd | 1 -
libraries/base/dp/src/vhdl/dp_folder.vhd | 1 -
libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd | 1 -
libraries/base/dp/src/vhdl/dp_frame_remove.vhd | 1 -
libraries/base/dp/src/vhdl/dp_frame_repack.vhd | 1 -
libraries/base/dp/src/vhdl/dp_hdr_insert.vhd | 1 -
libraries/base/dp/src/vhdl/dp_latency_fifo.vhd | 1 -
libraries/base/dp/src/vhdl/dp_mux.vhd | 1 -
libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd | 1 -
libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd | 1 -
libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd | 1 -
libraries/base/dp/src/vhdl/dp_packet_merge.vhd | 1 -
libraries/base/dp/src/vhdl/dp_packet_pkg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_pad_insert.vhd | 1 -
libraries/base/dp/src/vhdl/dp_pad_remove.vhd | 1 -
libraries/base/dp/src/vhdl/dp_pipeline.vhd | 1 -
libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd | 1 -
libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd | 1 -
libraries/base/dp/src/vhdl/dp_reinterleave.vhd | 1 -
libraries/base/dp/src/vhdl/dp_repack_data.vhd | 2 --
libraries/base/dp/src/vhdl/dp_shiftram.vhd | 1 -
libraries/base/dp/src/vhdl/dp_shiftreg.vhd | 1 -
libraries/base/dp/src/vhdl/dp_stream_pkg.vhd | 2 --
libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd | 1 -
libraries/base/dp/src/vhdl/dp_sync_recover.vhd | 1 -
libraries/base/dp/src/vhdl/dp_unfolder.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_block_select.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_split.vhd | 1 -
libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd | 1 -
libraries/base/dp/tb/vhdl/dp_phy_link.vhd | 1 -
libraries/base/dp/tb/vhdl/dp_statistics.vhd | 1 -
libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd | 1 -
.../base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd | 1 -
.../base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd | 1 -
libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd | 1 -
libraries/base/mm/src/vhdl/mm_bus.vhd | 1 -
libraries/base/mm/src/vhdl/mm_bus_comb.vhd | 1 -
libraries/base/mm/src/vhdl/mm_master_mux.vhd | 1 -
libraries/base/mm/tb/vhdl/mm_file.vhd | 1 -
libraries/base/mm/tb/vhdl/mm_file_pkg.vhd | 2 --
libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd | 2 --
libraries/base/mm/tb/vhdl/tb_mm_bus.vhd | 1 -
libraries/base/reorder/src/vhdl/reorder_col_wide.vhd | 1 -
.../base/reorder/src/vhdl/reorder_col_wide_select.vhd | 1 -
libraries/base/reorder/src/vhdl/reorder_pkg.vhd | 2 --
libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd | 3 ---
libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd | 4 ----
libraries/base/ring/src/vhdl/ring_pkg.vhd | 2 --
libraries/base/ring/src/vhdl/ring_rx.vhd | 1 -
libraries/base/ring/src/vhdl/ring_tx.vhd | 1 -
libraries/base/ss/src/vhdl/ss_store.vhd | 1 -
libraries/base/ss/src/vhdl/ss_wide.vhd | 1 -
libraries/base/tst/src/vhdl/tst_input.vhd | 1 +
libraries/base/uth/src/vhdl/uth_pkg.vhd | 1 -
libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd | 1 -
libraries/base/util/src/vhdl/util_heater_pkg.vhd | 1 -
.../bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd | 1 -
libraries/dsp/bf/src/vhdl/bf_pkg.vhd | 1 -
.../unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd | 1 -
libraries/dsp/correlator/src/vhdl/corr_adder.vhd | 1 -
libraries/dsp/correlator/src/vhdl/corr_folder.vhd | 1 -
libraries/dsp/correlator/src/vhdl/corr_permutator.vhd | 1 -
libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd | 1 -
libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_pkg.vhd | 2 --
libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_switch.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_unswitch.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd | 1 -
libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd | 1 -
libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd | 1 -
libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd | 1 +
libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd | 1 +
libraries/dsp/filter/src/vhdl/fil_pkg.vhd | 1 -
libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd | 1 -
libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd | 1 -
.../dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd | 1 -
libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd | 1 -
libraries/dsp/si/src/vhdl/si_arr.vhd | 1 -
libraries/dsp/st/src/vhdl/st_calc.vhd | 1 -
libraries/dsp/st/src/vhdl/st_ctrl.vhd | 1 -
libraries/dsp/st/src/vhdl/st_sst.vhd | 1 -
libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd | 1 -
libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd | 1 -
.../wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd | 1 -
.../quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd | 1 -
libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd | 2 --
libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_pll.vhd | 8 --------
libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd | 2 --
libraries/io/aduh/src/vhdl/aduh_power_sum.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_quad.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd | 1 -
libraries/io/aduh/src/vhdl/aduh_verify.vhd | 1 -
libraries/io/aduh/src/vhdl/lvdsh_dd.vhd | 1 -
libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd | 1 -
libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd | 1 -
libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd | 1 -
libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd | 1 -
.../designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd | 1 -
libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd | 2 --
libraries/io/eth/src/vhdl/eth_mm_registers.vhd | 1 -
libraries/io/eth/src/vhdl/eth_pkg.vhd | 2 --
libraries/io/eth/src/vhdl/eth_tester_pkg.vhd | 2 --
libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd | 1 -
libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd | 1 -
libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd | 1 -
libraries/io/i2c/src/vhdl/i2c_commander.vhd | 1 -
libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd | 2 --
libraries/io/i2c/src/vhdl/i2c_pkg.vhd | 1 -
libraries/io/mdio/src/vhdl/mdio_pkg.vhd | 2 --
libraries/io/ppsh/src/vhdl/ppsh_reg.vhd | 1 -
libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd | 1 -
libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd | 1 -
libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd | 1 -
libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd | 1 -
libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd | 1 -
libraries/technology/10gbase_r/sim_10gbase_r.vhd | 1 -
libraries/technology/10gbase_r/tech_10gbase_r.vhd | 1 -
.../technology/10gbase_r/tech_10gbase_r_component_pkg.vhd | 1 -
libraries/technology/clkbuf/tech_clkbuf.vhd | 1 -
libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd | 1 -
libraries/technology/ddr/tech_ddr.vhd | 1 -
libraries/technology/ddr/tech_ddr_arria10.vhd | 1 -
libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd | 1 -
libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd | 1 -
libraries/technology/ddr/tech_ddr_component_pkg.vhd | 1 -
libraries/technology/ddr/tech_ddr_mem_model.vhd | 1 -
.../technology/ddr/tech_ddr_mem_model_component_pkg.vhd | 1 -
libraries/technology/ddr/tech_ddr_pkg.vhd | 1 -
libraries/technology/eth_10g/tech_eth_10g.vhd | 1 -
libraries/technology/eth_10g/tech_eth_10g_clocks.vhd | 1 -
.../technology/eth_10g/tech_eth_10g_component_pkg.vhd | 1 -
libraries/technology/fifo/tech_fifo_component_pkg.vhd | 1 -
libraries/technology/fifo/tech_fifo_dc.vhd | 1 -
libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd | 1 -
libraries/technology/fifo/tech_fifo_sc.vhd | 1 -
libraries/technology/flash/tech_flash_asmi_parallel.vhd | 1 -
libraries/technology/flash/tech_flash_component_pkg.vhd | 2 --
libraries/technology/flash/tech_flash_remote_update.vhd | 1 -
.../technology/fpga_temp_sens/tech_fpga_temp_sens.vhd | 1 -
.../fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd | 1 -
.../fpga_voltage_sens/tech_fpga_voltage_sens.vhd | 1 -
.../tech_fpga_voltage_sens_component_pkg.vhd | 1 -
.../fractional_pll/tech_fractional_pll_clk125.vhd | 1 -
.../fractional_pll/tech_fractional_pll_clk200.vhd | 1 -
.../fractional_pll/tech_fractional_pll_component_pkg.vhd | 1 -
libraries/technology/iobuf/tech_iobuf_component_pkg.vhd | 1 -
libraries/technology/iobuf/tech_iobuf_ddio_in.vhd | 1 -
libraries/technology/iobuf/tech_iobuf_ddio_out.vhd | 1 -
.../ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd | 1 -
.../ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd | 1 -
.../ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd | 1 -
.../ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd | 1 -
.../ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd | 1 -
.../ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd | 1 -
.../ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd | 1 -
.../ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd | 1 -
.../ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd | 1 +
.../ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd | 1 +
.../ip_agi027_1e1v_reset_release_component_pkg.vhd | 1 -
.../technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd | 1 -
.../technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd | 1 -
libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd | 1 -
.../technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd | 1 -
.../technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd | 1 -
.../technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd | 1 -
.../ram/ip_arria10_simple_dual_port_ram_single_clock.vhd | 1 +
.../ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd | 1 -
.../ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd | 1 -
.../jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd | 1 -
.../ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd | 1 -
.../ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd | 1 -
.../ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd | 1 -
.../ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd | 1 +
.../ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd | 1 -
.../ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd | 1 -
.../jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd | 1 -
.../ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd | 1 -
.../ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd | 1 -
.../ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd | 1 -
.../ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd | 1 +
.../ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd | 1 -
.../ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd | 1 -
.../ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd | 1 -
.../ram/ip_arria10_e3sge3_ram_crw_crw.vhd | 1 -
.../ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd | 1 -
...p_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd | 1 +
.../technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd | 1 -
.../transceiver/ip_stratixiv_gxb_reconfig_v101.vhd | 1 -
.../transceiver/ip_stratixiv_gxb_reconfig_v111.vhd | 1 -
.../transceiver/ip_stratixiv_gxb_reconfig_v91.vhd | 1 -
libraries/technology/jesd204b/tech_jesd204b.vhd | 1 -
.../technology/jesd204b/tech_jesd204b_component_pkg.vhd | 1 -
libraries/technology/jesd204b/tech_jesd204b_tx.vhd | 1 -
libraries/technology/jesd204b/tech_jesd204b_v2.vhd | 1 -
libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd | 1 -
libraries/technology/mac_10g/tech_mac_10g.vhd | 1 -
.../technology/mac_10g/tech_mac_10g_component_pkg.vhd | 2 --
libraries/technology/memory/tech_memory_component_pkg.vhd | 1 -
libraries/technology/memory/tech_memory_ram_cr_cw.vhd | 1 -
libraries/technology/memory/tech_memory_ram_crk_cw.vhd | 1 -
libraries/technology/memory/tech_memory_ram_crw_crw.vhd | 1 -
libraries/technology/memory/tech_memory_ram_crwk_crw.vhd | 1 -
libraries/technology/memory/tech_memory_ram_r_w.vhd | 1 -
libraries/technology/memory/tech_memory_ram_rw_rw.vhd | 1 -
libraries/technology/memory/tech_memory_rom_r.vhd | 1 -
libraries/technology/mult/tech_complex_mult.vhd | 1 -
libraries/technology/mult/tech_mult.vhd | 1 -
libraries/technology/mult/tech_mult_add2.vhd | 1 -
libraries/technology/mult/tech_mult_add4.vhd | 1 -
libraries/technology/mult/tech_mult_component_pkg.vhd | 2 --
libraries/technology/mult/tech_mult_pkg.vhd | 1 -
libraries/technology/pll/tech_pll_clk125.vhd | 1 -
libraries/technology/pll/tech_pll_clk200.vhd | 1 -
libraries/technology/pll/tech_pll_clk200_p6.vhd | 1 -
libraries/technology/pll/tech_pll_clk25.vhd | 1 -
libraries/technology/pll/tech_pll_component_pkg.vhd | 1 -
.../transceiver/tech_transceiver_component_pkg.vhd | 1 -
libraries/technology/transceiver/tech_transceiver_gx.vhd | 1 -
.../technology/transceiver/tech_transceiver_rx_rst.vhd | 1 -
.../technology/transceiver/tech_transceiver_tx_rst.vhd | 1 -
libraries/technology/tse/tb_tech_tse_pkg.vhd | 1 -
libraries/technology/tse/tech_tse.vhd | 1 -
libraries/technology/tse/tech_tse_arria10.vhd | 1 -
libraries/technology/tse/tech_tse_arria10_e1sg.vhd | 1 -
libraries/technology/tse/tech_tse_arria10_e2sg.vhd | 1 -
libraries/technology/tse/tech_tse_arria10_e3sge3.vhd | 1 -
libraries/technology/tse/tech_tse_component_pkg.vhd | 1 -
libraries/technology/tse/tech_tse_pkg.vhd | 2 --
libraries/technology/tse/tech_tse_stratixiv.vhd | 1 -
libraries/technology/xaui/tech_xaui.vhd | 1 -
libraries/technology/xaui/tech_xaui_component_pkg.vhd | 2 --
428 files changed, 9 insertions(+), 478 deletions(-)
diff --git a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
index b4069cd55e..51ba8e9fbc 100644
--- a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
+++ b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
@@ -181,5 +181,4 @@ begin
end process;
end generate;
-
end str;
diff --git a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
index 08b73281a2..494ab31004 100644
--- a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
+++ b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
@@ -205,5 +205,4 @@ begin
end process;
end generate;
-
end str;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
index 27c3add615..1be97f7d67 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
@@ -41,7 +41,6 @@ package lofar2_unb2b_adc_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_adc_config;
-
end lofar2_unb2b_adc_pkg;
package body lofar2_unb2b_adc_pkg is
@@ -54,5 +53,4 @@ package body lofar2_unb2b_adc_pkg is
end if;
end;
-
end lofar2_unb2b_adc_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
index cd479c2bdb..3991989fe0 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
@@ -236,5 +236,4 @@ package qsys_lofar2_unb2b_adc_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_lofar2_unb2b_adc;
-
end qsys_lofar2_unb2b_adc_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
index 5fc60b88b1..05d33242fc 100644
--- a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2b_beamformer_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_beamformer_config;
-
end lofar2_unb2b_beamformer_pkg;
package body lofar2_unb2b_beamformer_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2b_beamformer_pkg is
end if;
end;
-
end lofar2_unb2b_beamformer_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
index 1df2a17b41..573315d869 100644
--- a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
@@ -345,5 +345,4 @@ package qsys_lofar2_unb2b_beamformer_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_lofar2_unb2b_beamformer;
-
end qsys_lofar2_unb2b_beamformer_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
index 7b73286048..daae4d046b 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2b_filterbank_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_filterbank_config;
-
end lofar2_unb2b_filterbank_pkg;
package body lofar2_unb2b_filterbank_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2b_filterbank_pkg is
end if;
end;
-
end lofar2_unb2b_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
index 21dc8f5640..487716da83 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
@@ -313,5 +313,4 @@ package qsys_lofar2_unb2b_filterbank_pkg is
pio_jesd_ctrl_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_lofar2_unb2b_filterbank;
-
end qsys_lofar2_unb2b_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
index d922173d66..260ed08587 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
@@ -39,7 +39,6 @@ package lofar2_unb2b_ring_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_ring_config;
-
end lofar2_unb2b_ring_pkg;
package body lofar2_unb2b_ring_pkg is
@@ -50,5 +49,4 @@ package body lofar2_unb2b_ring_pkg is
end if;
end;
-
end lofar2_unb2b_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
index 44c943c0a7..b6e8300e1e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
@@ -241,5 +241,4 @@ package qsys_lofar2_unb2b_ring_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_lofar2_unb2b_ring;
-
end qsys_lofar2_unb2b_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
index c1a5d27c49..6dfd86f794 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
@@ -60,7 +60,6 @@ package lofar2_unb2b_sdp_station_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_sdp_station_config;
-
end lofar2_unb2b_sdp_station_pkg;
package body lofar2_unb2b_sdp_station_pkg is
@@ -81,5 +80,4 @@ package body lofar2_unb2b_sdp_station_pkg is
end if;
end;
-
end lofar2_unb2b_sdp_station_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
index bc7d3e7547..66a6960ef7 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
@@ -433,5 +433,4 @@ begin
reg_ddrctrl_ctrl_state_writedata_export => reg_ddrctrl_ctrl_state_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
index aa9cb7c67c..c6674390a7 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
@@ -207,5 +207,4 @@ package qsys_lofar2_unb2c_ddrctrl_pkg is
rom_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_lofar2_unb2c_ddrctrl;
-
end qsys_lofar2_unb2c_ddrctrl_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
index 617e401bec..947e0392fb 100644
--- a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2c_filterbank_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_filterbank_config;
-
end lofar2_unb2c_filterbank_pkg;
package body lofar2_unb2c_filterbank_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2c_filterbank_pkg is
end if;
end;
-
end lofar2_unb2c_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
index 3193b1a4e8..cb9a4a29b2 100644
--- a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
@@ -282,5 +282,4 @@ package qsys_lofar2_unb2c_filterbank_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_lofar2_unb2c_filterbank;
-
end qsys_lofar2_unb2c_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
index 28a9c8341d..a381cbfe4c 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
@@ -40,7 +40,6 @@ package lofar2_unb2c_ring_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_ring_config;
-
end lofar2_unb2c_ring_pkg;
package body lofar2_unb2c_ring_pkg is
@@ -51,5 +50,4 @@ package body lofar2_unb2c_ring_pkg is
end if;
end;
-
end lofar2_unb2c_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
index 8c35d482f2..fb15dc610d 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
@@ -227,5 +227,4 @@ package qsys_lofar2_unb2c_ring_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_lofar2_unb2c_ring;
-
end qsys_lofar2_unb2c_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
index 1889cff98b..377a049235 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
@@ -59,7 +59,6 @@ package lofar2_unb2c_sdp_station_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_sdp_station_config;
-
end lofar2_unb2c_sdp_station_pkg;
package body lofar2_unb2c_sdp_station_pkg is
@@ -80,5 +79,4 @@ package body lofar2_unb2c_sdp_station_pkg is
end if;
end;
-
end lofar2_unb2c_sdp_station_pkg;
diff --git a/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd b/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
index 02b993e2c3..0b99b119ca 100644
--- a/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
+++ b/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
@@ -54,5 +54,4 @@ begin
out_sosi_arr(I).sop <= in_sosi.sop;
out_sosi_arr(I).eop <= in_sosi.eop;
end generate;
-
end rtl;
diff --git a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
index 999afc3545..6df8f1ff9c 100644
--- a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
+++ b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
@@ -35,7 +35,6 @@ use technology_lib.technology_select_pkg.all;
entity tb_ddrctrl is
generic (
-
g_tech_ddr : t_c_tech_ddr := c_tech_ddr4_8g_1600m; -- type of memory
g_nof_streams : positive := 12; -- number of input streams
g_data_w : natural := 14; -- data with of input data vectors
diff --git a/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd b/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
index 638a8d10df..5960379ab4 100644
--- a/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
+++ b/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
@@ -151,5 +151,4 @@ begin
in_dp_sosi => eth_tester_tx_sosi_arr(0),
in_dp_siso => eth_tester_tx_siso_arr(0)
);
-
end str;
diff --git a/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd b/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
index 8fff1d5c72..a2a3ee4571 100644
--- a/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
+++ b/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
@@ -101,7 +101,6 @@ architecture tb of tb_rdma_generator is
-- Use REAL to avoid NATURAL overflow in bps calculation
-
constant c_bg_nof_bps_first : real := real(c_bg_block_len_first * c_octet_w) * real(c_nof_st_clk_per_s) / real(c_bg_slot_len_first);
constant c_bg_nof_bps_others : real := real(c_bg_block_len_others * c_octet_w) * real(c_nof_st_clk_per_s) / real(c_bg_slot_len_others);
constant c_bg_nof_bps_total : real := c_bg_nof_bps_first + real(g_nof_streams - 1) * c_bg_nof_bps_others;
diff --git a/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd b/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
index 9ef5d771ed..b93df20cd5 100644
--- a/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
+++ b/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
@@ -474,5 +474,4 @@ package body rdma_packetiser_pkg is
return v;
end func_rdma_packetiser_unmap_header;
-
end rdma_packetiser_pkg;
diff --git a/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd b/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
index 480a928a3f..4c5582c7f9 100644
--- a/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
+++ b/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
@@ -151,7 +151,6 @@ begin
wait;
end process;
-
-- check if values in rdma_packetiser_assemble_header match with expected values
p_verify_rdma_header : process
variable v_exp_ip_total_length : natural;
@@ -272,7 +271,6 @@ begin
wait;
end process;
-
u_dut: entity work.rdma_packetiser_assemble_header
generic map (
g_data_w => g_data_w
diff --git a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
index 6dd6746142..76989ef880 100644
--- a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
+++ b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
@@ -58,5 +58,4 @@ package body ring_pkg is
begin
return TO_SVEC(nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(N_rn), TO_UINT(N_rn), lane_dir),hops'length);
end;
-
end ring_pkg;
diff --git a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
index deca506ed8..37f8948dcb 100644
--- a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
+++ b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
@@ -465,5 +465,4 @@ package top_components_pkg is
board_kernel_stream_snk_mm_io_ready : out std_logic
);
end component freeze_wrapper;
-
end top_components_pkg;
diff --git a/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd b/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
index fa7090c8ba..4b86fcefc5 100644
--- a/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
+++ b/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
@@ -302,5 +302,4 @@ package top_components_pkg is
board_kernel_stream_src_ADC_ready : out std_logic
);
end component freeze_wrapper;
-
end top_components_pkg;
diff --git a/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd b/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
index c5d1073de0..ab98d58c90 100644
--- a/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
+++ b/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
@@ -196,5 +196,4 @@ begin
dp_latency_adapter_rx_src_in_arr(stream).ready <= src_in_arr(stream).ready;
dp_latency_adapter_rx_src_in_arr(stream).xon <= '1';
end generate;
-
end str;
diff --git a/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd b/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
index f73837193b..2965433f68 100644
--- a/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
+++ b/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
@@ -255,5 +255,4 @@ gen_opencl : if g_use_opencl generate
snk_out <= in_siso;
in_sosi <= snk_in;
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd b/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
index ced8c5739b..760c8e1699 100644
--- a/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
@@ -49,7 +49,6 @@ package unb1_bn_capture_pkg is
constant c_bn_capture : t_c_bn_capture := (c_unb1_board_mm_clk_freq_50M, -- must match PLL setting in sopc_bn_capture
c_unb1_board_ext_clk_freq_200M,
c_bn_capture_sp);
-
end unb1_bn_capture_pkg;
package body unb1_bn_capture_pkg is
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
index f1ac60af9f..37b934cb29 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
@@ -311,5 +311,4 @@ begin
ram_diag_data_buf_miso => ram_mesh_diag_data_buf_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
index a5254c63ff..46a209419f 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
@@ -551,5 +551,4 @@ begin
BN_BI_2_RX => BN_BI_2_RX
);
end generate;
-
end;
diff --git a/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd b/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
index 34532416bb..eb0fd611a1 100644
--- a/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
@@ -421,5 +421,4 @@ begin
coe_writedata_export_from_the_reg_bsn_monitor => reg_bsn_monitor_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd b/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
index c3b0cd8997..b063ae3b02 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
@@ -398,5 +398,4 @@ begin
FN_BN_3_RX => FN_BN_3_RX
);
end generate;
-
end;
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd b/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
index 25bd96f7d8..edbed874ac 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
@@ -432,5 +432,4 @@ begin
no_backplane: if c_use_back = false generate
bn_in_back_serial_4arr <= bn_out_back_serial_4arr;
end generate;
-
end tb;
diff --git a/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd b/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
index 78bdc17f23..de705bae4d 100644
--- a/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
+++ b/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
@@ -309,5 +309,4 @@ begin
reg_heater_writedata_export => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd b/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
index 6ab5775f35..8772550c28 100644
--- a/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
@@ -144,5 +144,4 @@ package qsys_unb1_heater_pkg is
reg_heater_reset_export : out std_logic -- export
);
end component qsys_unb1_heater;
-
end qsys_unb1_heater_pkg;
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
index 2259919154..8a6a71a031 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
@@ -316,5 +316,4 @@ begin
coe_writedata_export_from_the_reg_wdi => reg_wdi_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
index 142125fe43..89f1e8fc1b 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
@@ -28,7 +28,6 @@ package qsys_wo_pll_unb1_minimal_pkg is
-----------------------------------------------------------------------------
component qsys_wo_pll_unb1_minimal is
-
port (
coe_ram_write_export_from_the_avs_eth_0 : out std_logic; -- export
coe_reg_read_export_from_the_avs_eth_0 : out std_logic; -- export
@@ -131,5 +130,4 @@ package qsys_wo_pll_unb1_minimal_pkg is
coe_read_export_from_the_reg_remu : out std_logic -- export
);
end component qsys_wo_pll_unb1_minimal;
-
end qsys_wo_pll_unb1_minimal_pkg;
diff --git a/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd b/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
index 63e5d9c4da..251f46ef06 100644
--- a/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
@@ -28,7 +28,6 @@ package qsys_unb1_minimal_pkg is
-----------------------------------------------------------------------------
component qsys_unb1_minimal is
-
port (
coe_ram_write_export_from_the_avs_eth_0 : out std_logic; -- export
coe_reg_read_export_from_the_avs_eth_0 : out std_logic; -- export
@@ -186,5 +185,4 @@ package qsys_unb1_minimal_pkg is
pio_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_unb1_minimal_mm_arbiter;
-
end qsys_unb1_minimal_pkg;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
index 4384501026..b79b29e3ae 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
@@ -456,5 +456,4 @@ begin
rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
index ec6f3afdfd..fa8287cfbb 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
@@ -472,5 +472,4 @@ begin
FN_BN_3_RX => FN_BN_3_RX
);
end generate;
-
end;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
index 4069b5616d..2e2c35e874 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
@@ -267,5 +267,4 @@ begin
fn_rx_sl_3arr => fn_in_mesh_serial_3arr
);
end generate;
-
end tb;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
index 7e468fa82d..e5f9c2f655 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
@@ -798,5 +798,4 @@ begin
ram_diag_data_buffer_ddr_MB_II_readdata_export => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
index 3c257fae3c..00ef85355c 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
@@ -355,5 +355,4 @@ package qsys_unb1_test_pkg is
ram_diag_data_buffer_ddr_mb_ii_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_unb1_test;
-
end qsys_unb1_test_pkg;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
index 428faa733e..6046fd2428 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
@@ -974,5 +974,4 @@ gen_mms_io_ddr_diag_MB_II : if c_revision_select.use_ddr_MB_II = 1 generate
reg_rx_seq_miso => reg_diag_rx_seq_ddr_MB_II_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
index a1c4f5a385..49fd7e47e1 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
@@ -74,7 +74,6 @@ package unb1_test_pkg is
-- Function to select the revision configuration.
function func_unb1_test_sel_revision_rec(g_design_name : string) return t_unb1_test_config;
-
end unb1_test_pkg;
package body unb1_test_pkg is
@@ -103,5 +102,4 @@ package body unb1_test_pkg is
end if;
end;
-
end unb1_test_pkg;
diff --git a/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd b/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
index 2a79752d43..a7a6e81f85 100644
--- a/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
+++ b/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
@@ -385,5 +385,4 @@ begin
rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
index a26175ea38..0b1e9672eb 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
@@ -752,5 +752,4 @@ begin
tse_led => eth1g_led
);
end generate;
-
end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
index b3e7726427..9d42134ec7 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
@@ -59,5 +59,4 @@ begin
rx_serial_2arr(2)(I) <= BN_BI_2_RX(I);
rx_serial_2arr(3)(I) <= BN_BI_3_RX(I);
end generate;
-
end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
index 1ee7f13647..af49253db3 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
@@ -129,5 +129,4 @@ begin
rx_mon_dist_sosi_arr => open
);
end generate;
-
end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
index ce43144b74..80448655d7 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
@@ -123,5 +123,4 @@ begin
SI_FN_3_CNTRL(c_unb1_board_ci.tr.cntrl_mdc_id) <= mdio_mdc_arr(3);
end generate;
-
end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
index f16b3b3714..8271179aa1 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
@@ -57,5 +57,4 @@ begin
rx_serial_2arr(2)(I) <= FN_BN_2_RX(I);
rx_serial_2arr(3)(I) <= FN_BN_3_RX(I);
end generate;
-
end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
index a4259a7ade..c6d5717ad3 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
@@ -139,5 +139,4 @@ begin
rx_mon_dist_sosi_arr => rx_mon_dist_sosi_2arr(I)(g_usr_nof_streams - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
index d524e5a623..4200320a8c 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
@@ -157,7 +157,6 @@ package unb1_board_peripherals_pkg is
end record;
constant c_unb1_board_peripherals_mm_reg_default : t_c_unb1_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 3, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1);
-
end unb1_board_peripherals_pkg;
package body unb1_board_peripherals_pkg is
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
index 180b535b22..9a57d436cd 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
@@ -286,7 +286,6 @@ package unb1_board_pkg is
function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_mesh_siso_2arr) return t_unb1_board_mesh_siso_2arr;
function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_back_sosi_2arr) return t_unb1_board_back_sosi_2arr;
function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_back_siso_2arr) return t_unb1_board_back_siso_2arr;
-
end unb1_board_pkg;
package body unb1_board_pkg is
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
index 1eaa6aa807..4040873b96 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
@@ -383,5 +383,4 @@ begin
rx_usr_siso_2arr => bn_rx_usr_siso_3arr(I) -- user siso to phy = siso.ready driver from BN user
);
end generate;
-
end tb;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
index 59579fcd40..4a07492e24 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
@@ -77,5 +77,4 @@ begin
-- | Same scheme applies to all back nodes
-- Receiving UniBoard
end generate;
-
end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
index 6262f52ab7..b272403c6c 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
@@ -67,5 +67,4 @@ begin
-- | Same scheme applies to all back nodes
-- Receiving UniBoard
end generate;
-
end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
index c186f45bb4..57f353c2d8 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
@@ -150,5 +150,4 @@ begin
fn3_tx_siso_2arr(2) <= bn2_rx_siso_2arr(0); -- 3,2 <= 2,0
fn3_tx_siso_2arr(3) <= bn3_rx_siso_2arr(0); -- 3,3 <= 3,0
end generate;
-
end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
index 11019e63c4..f6f9bf5fd7 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
@@ -105,5 +105,4 @@ begin
fn_rx_sl_3arr(3)(2) <= bn_tx_sl_3arr(2)(0); -- 3,2 <= 2,0
fn_rx_sl_3arr(3)(3) <= bn_tx_sl_3arr(3)(0); -- 3,3 <= 3,0
end generate;
-
end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
index 17a37b3c88..1a9791e2c3 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
@@ -150,5 +150,4 @@ begin
fn3_rx_sosi_2arr(2) <= bn2_tx_sosi_2arr(0); -- 3,2 <= 2,0
fn3_rx_sosi_2arr(3) <= bn3_tx_sosi_2arr(0); -- 3,3 <= 3,0
end generate;
-
end beh;
diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
index 2bd1ab97d5..66b85ef0ba 100644
--- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
+++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
@@ -293,5 +293,4 @@ begin
reg_mmdp_ctrl_writedata_export => reg_mmdp_ctrl_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
index 305c225eae..a03b6a76cf 100644
--- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
@@ -151,5 +151,4 @@ package qsys_unb2_minimal_pkg is
reg_unb_pmbus_reset_export : out std_logic -- export
);
end component qsys_unb2_minimal;
-
end qsys_unb2_minimal_pkg;
diff --git a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
index 598bfdf53b..b5486ed93d 100644
--- a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
+++ b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
@@ -28,7 +28,6 @@ use ieee.std_logic_unsigned.all;
entity unb2_pinning is
port (
-
-- GENERAL
CLK : in std_logic; -- External system clock
PPS : in std_logic; -- External system sync
diff --git a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
index b75ee3b644..cc52d34dd9 100644
--- a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
+++ b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
@@ -28,7 +28,6 @@ use ieee.std_logic_unsigned.all;
entity unb2_singlemac is
port (
-
-- GENERAL
CLK : in std_logic; -- External system clock
PPS : in std_logic; -- External system sync
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
index 80d8c6cc72..0d1307487a 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
@@ -823,5 +823,4 @@ begin
ram_diag_data_buffer_ddr_MB_II_readdata_export => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
index 3db6393627..7df05b5c76 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
@@ -377,5 +377,4 @@ package qsys_unb2_test_pkg is
reg_unb_pmbus_reset_export : out std_logic -- export
);
end component qsys_unb2_test;
-
end qsys_unb2_test_pkg;
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
index a4e2c262f8..623466cb77 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
@@ -1235,5 +1235,4 @@ begin
reg_rx_seq_miso => reg_diag_rx_seq_ddr_MB_II_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
index 8a4c6bd89a..dc3443b454 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
@@ -797,5 +797,4 @@ begin
tse_led => eth1g_led
);
end generate;
-
end str;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
index 48fad46da5..d8278cc9bf 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
locked => pll_locked
);
end generate;
-
end arria10;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
index aa42e0627d..11bfcea22d 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2_board_peripherals_pkg is
end record;
constant c_unb2_board_peripherals_mm_reg_default : t_c_unb2_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 3, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 5);
-
end unb2_board_peripherals_pkg;
package body unb2_board_peripherals_pkg is
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
index 20f6933225..798a1c89ad 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
@@ -144,7 +144,6 @@ package unb2_board_pkg is
function func_unb2_board_system_info(VERSION : in std_logic_vector(c_unb2_board_aux.version_w - 1 downto 0);
ID : in std_logic_vector(c_unb2_board_aux.id_w - 1 downto 0)) return t_c_unb2_board_system_info;
-
end unb2_board_pkg;
package body unb2_board_pkg is
diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
index f1ce0394dc..c74ed6780a 100644
--- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
+++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
@@ -308,5 +308,4 @@ begin
reg_heater_writedata_export => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
index b60792517e..c43c3cd0e6 100644
--- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
@@ -158,5 +158,4 @@ package qsys_unb2a_heater_pkg is
reg_heater_reset_export : out std_logic -- export
);
end component qsys_unb2a_heater;
-
end qsys_unb2a_heater_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
index 2a634cb563..c03f2fdcd3 100644
--- a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
+++ b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
@@ -293,5 +293,4 @@ begin
reg_mmdp_ctrl_writedata_export => reg_mmdp_ctrl_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
index 6897ea10bf..e73f994c67 100644
--- a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
@@ -151,5 +151,4 @@ package qsys_unb2a_minimal_pkg is
reg_unb_pmbus_reset_export : out std_logic -- export
);
end component qsys_unb2a_minimal;
-
end qsys_unb2a_minimal_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
index ed36a9a7da..c195237ee3 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
@@ -849,5 +849,4 @@ begin
ram_diag_data_buffer_ddr_MB_II_readdata_export => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
index 95b0f768f1..2fa5172e37 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
@@ -392,5 +392,4 @@ package qsys_unb2a_test_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- rom_system_info_writedata.export
);
end component qsys_unb2a_test;
-
end qsys_unb2a_test_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
index 73f726f8a9..d982da0f3b 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
@@ -1247,5 +1247,4 @@ begin
reg_rx_seq_miso => reg_diag_rx_seq_ddr_MB_II_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
index 2f62140372..69510a62c4 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
@@ -800,5 +800,4 @@ begin
tse_led => eth1g_led
);
end generate;
-
end str;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
index 48fad46da5..d8278cc9bf 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
locked => pll_locked
);
end generate;
-
end arria10;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
index a936b7c0e6..b39965710b 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2_board_peripherals_pkg is
end record;
constant c_unb2_board_peripherals_mm_reg_default : t_c_unb2_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
end unb2_board_peripherals_pkg;
package body unb2_board_peripherals_pkg is
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
index 081135d117..9b45acf5c3 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
@@ -149,7 +149,6 @@ package unb2_board_pkg is
function func_unb2_board_system_info(VERSION : in std_logic_vector(c_unb2_board_aux.version_w - 1 downto 0);
ID : in std_logic_vector(c_unb2_board_aux.id_w - 1 downto 0)) return t_c_unb2_board_system_info;
-
end unb2_board_pkg;
package body unb2_board_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
index ccfa91c513..c261ec0242 100644
--- a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
+++ b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
@@ -310,5 +310,4 @@ begin
reg_heater_writedata_export => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
index b36fb7ceda..90f7ce360d 100644
--- a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
@@ -157,5 +157,4 @@ package qsys_unb2b_heater_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_unb2b_heater;
-
end qsys_unb2b_heater_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
index e879f1b9ed..9c89aec19a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
"0000000000000001", "0000000000000001");
-
end common_network_layers_pkg;
package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
index 84f51e5b77..dacf249e9a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
procedure proc_common_dclk_generate_sclk(constant Pfactor : in positive;
signal dclk : in std_logic;
signal sclk : inout std_logic);
-
end common_pkg;
package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
index 7b6d1a2da0..8f2d68af5f 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
-- Deconcatenate data and complex re,im fields from SOSI into SOSI array
function func_dp_stream_deconcat(snk_in : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr; -- Deconcat SOSI data
function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso; -- Wire SISO_ARR(0) to single SISO
-
end dp_stream_pkg;
package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
begin
return src_out_arr(0);
end;
-
end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
index 1036675757..2a199611aa 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
constant c_eth_ram_addr_w : natural := ceil_log2(c_eth_ram_nof_words);
-
end eth_pkg;
package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
v_reg( 0) := mm_reg.rx_avail; -- [0]
return v_reg;
end func_eth_mm_reg_status;
-
end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
index 177eb750c7..7d2cb43f9b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
crs : std_logic;
col : std_logic;
end record;
-
end tech_tse_pkg;
package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
index e879f1b9ed..9c89aec19a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
"0000000000000001", "0000000000000001");
-
end common_network_layers_pkg;
package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
index 84f51e5b77..dacf249e9a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
procedure proc_common_dclk_generate_sclk(constant Pfactor : in positive;
signal dclk : in std_logic;
signal sclk : inout std_logic);
-
end common_pkg;
package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
index 7b6d1a2da0..8f2d68af5f 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
-- Deconcatenate data and complex re,im fields from SOSI into SOSI array
function func_dp_stream_deconcat(snk_in : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr; -- Deconcat SOSI data
function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso; -- Wire SISO_ARR(0) to single SISO
-
end dp_stream_pkg;
package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
begin
return src_out_arr(0);
end;
-
end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
index 1036675757..2a199611aa 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
constant c_eth_ram_addr_w : natural := ceil_log2(c_eth_ram_nof_words);
-
end eth_pkg;
package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
v_reg( 0) := mm_reg.rx_avail; -- [0]
return v_reg;
end func_eth_mm_reg_status;
-
end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
index 177eb750c7..7d2cb43f9b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
crs : std_logic;
col : std_logic;
end record;
-
end tech_tse_pkg;
package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
index e879f1b9ed..9c89aec19a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
"0000000000000001", "0000000000000001");
-
end common_network_layers_pkg;
package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
index 84f51e5b77..dacf249e9a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
procedure proc_common_dclk_generate_sclk(constant Pfactor : in positive;
signal dclk : in std_logic;
signal sclk : inout std_logic);
-
end common_pkg;
package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
index 7b6d1a2da0..8f2d68af5f 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
-- Deconcatenate data and complex re,im fields from SOSI into SOSI array
function func_dp_stream_deconcat(snk_in : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr; -- Deconcat SOSI data
function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso; -- Wire SISO_ARR(0) to single SISO
-
end dp_stream_pkg;
package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
begin
return src_out_arr(0);
end;
-
end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
index 1036675757..2a199611aa 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
constant c_eth_ram_addr_w : natural := ceil_log2(c_eth_ram_nof_words);
-
end eth_pkg;
package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
v_reg( 0) := mm_reg.rx_avail; -- [0]
return v_reg;
end func_eth_mm_reg_status;
-
end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
index 177eb750c7..7d2cb43f9b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
crs : std_logic;
col : std_logic;
end record;
-
end tech_tse_pkg;
package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
index e879f1b9ed..9c89aec19a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
"0000000000000001", "0000000000000001");
-
end common_network_layers_pkg;
package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
index 84f51e5b77..dacf249e9a 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
procedure proc_common_dclk_generate_sclk(constant Pfactor : in positive;
signal dclk : in std_logic;
signal sclk : inout std_logic);
-
end common_pkg;
package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
index 7b6d1a2da0..8f2d68af5f 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
-- Deconcatenate data and complex re,im fields from SOSI into SOSI array
function func_dp_stream_deconcat(snk_in : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr; -- Deconcat SOSI data
function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso; -- Wire SISO_ARR(0) to single SISO
-
end dp_stream_pkg;
package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
begin
return src_out_arr(0);
end;
-
end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
index 1036675757..2a199611aa 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
constant c_eth_ram_addr_w : natural := ceil_log2(c_eth_ram_nof_words);
-
end eth_pkg;
package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
v_reg( 0) := mm_reg.rx_avail; -- [0]
return v_reg;
end func_eth_mm_reg_status;
-
end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
index 177eb750c7..7d2cb43f9b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
crs : std_logic;
col : std_logic;
end record;
-
end tech_tse_pkg;
package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
index fd4dfd48d2..18798f6741 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
@@ -213,5 +213,4 @@ component qsys_unb2b_jesd is
reg_diag_data_buf_jesd_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_unb2b_jesd;
-
end qsys_unb2b_jesd_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
index 94c4b4e447..b31ff900ee 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
+++ b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
@@ -308,5 +308,4 @@ begin
ram_scrap_readdata_export => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
index 1470cca511..a20dd70542 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
@@ -158,5 +158,4 @@ package qsys_unb2b_minimal_pkg is
reg_unb_pmbus_reset_export : out std_logic -- export
);
end component qsys_unb2b_minimal;
-
end qsys_unb2b_minimal_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
index 40bb71ce7c..7b38390d6c 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
@@ -835,5 +835,4 @@ begin
ram_diag_data_buffer_ddr_MB_II_readdata_export => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
index 87d90d1280..db97fda1c8 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
@@ -384,5 +384,4 @@ package qsys_unb2b_test_pkg is
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- rom_system_info_writedata.export
);
end component qsys_unb2b_test;
-
end qsys_unb2b_test_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
index 5886a9aef1..a179bf532d 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
@@ -1239,5 +1239,4 @@ begin
reg_rx_seq_miso => reg_diag_rx_seq_ddr_MB_II_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
index f2886ef970..98fd010d1d 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
locked => pll_locked
);
end generate;
-
end arria10;
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
index 50a6d2d7a5..38aa96caaa 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2b_board_peripherals_pkg is
end record;
constant c_unb2b_board_peripherals_mm_reg_default : t_c_unb2b_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 13, 1, 2, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
end unb2b_board_peripherals_pkg;
package body unb2b_board_peripherals_pkg is
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
index ecc6fbb01b..6d3b5f7b5a 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
@@ -154,7 +154,6 @@ package unb2b_board_pkg is
function func_unb2b_board_system_info(VERSION : in std_logic_vector(c_unb2b_board_aux.version_w - 1 downto 0);
ID : in std_logic_vector(c_unb2b_board_aux.id_w - 1 downto 0)) return t_c_unb2b_board_system_info;
-
end unb2b_board_pkg;
package body unb2b_board_pkg is
diff --git a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
index c93a01d6ed..4baa73a852 100644
--- a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
+++ b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
@@ -279,5 +279,4 @@ begin
ram_scrap_readdata_export => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
index 0d31242e08..089c40064d 100644
--- a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
@@ -144,5 +144,4 @@ package qsys_unb2c_minimal_pkg is
rom_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_unb2c_minimal;
-
end qsys_unb2c_minimal_pkg;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
index 468e48a1a4..c42d46238a 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
@@ -892,5 +892,4 @@ begin
ram_scrap_readdata_export => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
index ee430f809c..ff0e1f4444 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
@@ -463,5 +463,4 @@ package qsys_unb2c_test_pkg is
rom_system_info_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_unb2c_test;
-
end qsys_unb2c_test_pkg;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
index 7f89b84367..2127db9b73 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
@@ -1456,5 +1456,4 @@ begin
sla_out => reg_heater_miso
);
end generate;
-
end str;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
index a0814c9b53..c7f237d4c5 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
@@ -90,7 +90,6 @@ package unb2c_test_pkg is
-- Function to select the revision configuration.
function func_sel_revision_rec(g_design_name : string) return t_unb2c_test_config;
-
end unb2c_test_pkg;
package body unb2c_test_pkg is
@@ -108,5 +107,4 @@ package body unb2c_test_pkg is
end if;
end;
-
end unb2c_test_pkg;
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
index 1c0b8a5d37..61fbe1ebcf 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
locked => pll_locked
);
end generate;
-
end arria10;
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
index 09f3d31eb0..5e135d3755 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2c_board_peripherals_pkg is
end record;
constant c_unb2c_board_peripherals_mm_reg_default : t_c_unb2c_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 13, 1, 2, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
end unb2c_board_peripherals_pkg;
package body unb2c_board_peripherals_pkg is
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
index 58d1247754..acfadef8c0 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
@@ -133,7 +133,6 @@ package unb2c_board_pkg is
function func_unb2c_board_system_info(VERSION : in std_logic_vector(c_unb2c_board_aux.version_w - 1 downto 0);
ID : in std_logic_vector(c_unb2c_board_aux.id_w - 1 downto 0)) return t_c_unb2c_board_system_info;
-
end unb2c_board_pkg;
package body unb2c_board_pkg is
diff --git a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
index 5ac1714290..59a683faf3 100644
--- a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
@@ -98,7 +98,6 @@ package axi4_lite_pkg is
-- Functions to convert MM to axi4-lite.
function func_axi4_lite_from_mm_copi(mm_copi : t_mem_copi) return t_axi4_lite_copi;
function func_axi4_lite_from_mm_cipo(mm_cipo : t_mem_cipo; bvalid : std_logic) return t_axi4_lite_cipo;
-
end axi4_lite_pkg;
package body axi4_lite_pkg is
@@ -156,5 +155,4 @@ package body axi4_lite_pkg is
v_axi4_cipo.rvalid := mm_cipo.rdval;
return v_axi4_cipo;
end;
-
end axi4_lite_pkg;
diff --git a/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd b/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
index 43a42a80fd..83b3b3e514 100644
--- a/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
@@ -186,7 +186,6 @@ package axi4_stream_pkg is
-- Function to derive DP empty from AXI4 tkeep by counting the 0s in TKEEP.
function func_axi4_stream_tkeep_to_dp_empty(tkeep : std_logic_vector) return std_logic_vector;
-
end axi4_stream_pkg;
package body axi4_stream_pkg is
@@ -764,5 +763,4 @@ package body axi4_stream_pkg is
end loop;
return(TO_UVEC(v_count, c_dp_stream_empty_w));
end func_axi4_stream_tkeep_to_dp_empty;
-
end axi4_stream_pkg;
diff --git a/libraries/base/common/src/vhdl/common_acapture_slv.vhd b/libraries/base/common/src/vhdl/common_acapture_slv.vhd
index 04aa197055..40a88979df 100644
--- a/libraries/base/common/src/vhdl/common_acapture_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_acapture_slv.vhd
@@ -65,5 +65,4 @@ begin
out_cap => out_cap(I)
);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd b/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
index 579de011dc..f99ec9c942 100644
--- a/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
+++ b/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
@@ -151,5 +151,4 @@ begin
out_dat => sum
);
end generate; -- no_tree
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_async_slv.vhd b/libraries/base/common/src/vhdl/common_async_slv.vhd
index 1ff3d1454a..3da78c8bba 100644
--- a/libraries/base/common/src/vhdl/common_async_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_async_slv.vhd
@@ -56,5 +56,4 @@ begin
dout => dout(I)
);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_blockreg.vhd b/libraries/base/common/src/vhdl/common_blockreg.vhd
index dafbf3163e..eaccf1a1e7 100755
--- a/libraries/base/common/src/vhdl/common_blockreg.vhd
+++ b/libraries/base/common/src/vhdl/common_blockreg.vhd
@@ -147,5 +147,4 @@ begin
end process;
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_components_pkg.vhd b/libraries/base/common/src/vhdl/common_components_pkg.vhd
index ba5e04a595..e613b0899d 100644
--- a/libraries/base/common/src/vhdl/common_components_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_components_pkg.vhd
@@ -64,7 +64,6 @@ package common_components_pkg is
out_dat : out std_logic
);
end component;
-
end common_components_pkg;
package body common_components_pkg is
diff --git a/libraries/base/common/src/vhdl/common_ddreg_slv.vhd b/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
index 3b8b40e132..9ceed1f100 100644
--- a/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
@@ -59,5 +59,4 @@ begin
out_dat_lo => out_dat_lo(I)
);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_fanout.vhd b/libraries/base/common/src/vhdl/common_fanout.vhd
index 77143e1487..b9bdb88786 100644
--- a/libraries/base/common/src/vhdl/common_fanout.vhd
+++ b/libraries/base/common/src/vhdl/common_fanout.vhd
@@ -90,5 +90,4 @@ begin
out_dat => out_dat_vec((i + 1) * g_dat_w - 1 downto i * g_dat_w)
);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_fanout_tree.vhd b/libraries/base/common/src/vhdl/common_fanout_tree.vhd
index d0dcc9ba25..14cb1a2804 100644
--- a/libraries/base/common/src/vhdl/common_fanout_tree.vhd
+++ b/libraries/base/common/src/vhdl/common_fanout_tree.vhd
@@ -164,5 +164,4 @@ begin
out_dat_vec => out_dat_vec
);
end generate; -- no_tree
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_field_pkg.vhd b/libraries/base/common/src/vhdl/common_field_pkg.vhd
index c1dc41df9d..91a2c77627 100644
--- a/libraries/base/common/src/vhdl/common_field_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_field_pkg.vhd
@@ -82,7 +82,6 @@ package common_field_pkg is
function field_arr_set_mode(field_arr : t_common_field_arr; mode : string) return t_common_field_arr;
function sel_a_b(sel : boolean; a, b : t_common_field_arr ) return t_common_field_arr;
-
end common_field_pkg;
package body common_field_pkg is
@@ -356,5 +355,4 @@ package body common_field_pkg is
return b;
end if;
end;
-
end common_field_pkg;
diff --git a/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd b/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
index 42890418c2..ddacc8534e 100644
--- a/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
@@ -146,5 +146,4 @@ package body common_interface_layers_pkg is
return ctrl_out;
end;
-
end common_interface_layers_pkg;
diff --git a/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd b/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
index 3f11c037e9..de8d0d4cac 100644
--- a/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
@@ -194,5 +194,4 @@ package body common_lfsr_sequences_pkg is
v_nxt_lfsr(0) := not v_feedback;
return v_nxt_lfsr;
end func_common_random;
-
end common_lfsr_sequences_pkg;
diff --git a/libraries/base/common/src/vhdl/common_math_pkg.vhd b/libraries/base/common/src/vhdl/common_math_pkg.vhd
index 2dfec614b7..39fca484c1 100644
--- a/libraries/base/common/src/vhdl/common_math_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_math_pkg.vhd
@@ -187,5 +187,4 @@ package body common_math_pkg is
end loop;
return v_rand_arr;
end;
-
end common_math_pkg;
diff --git a/libraries/base/common/src/vhdl/common_mem_mux.vhd b/libraries/base/common/src/vhdl/common_mem_mux.vhd
index 17b494471e..f881fcb5bd 100644
--- a/libraries/base/common/src/vhdl/common_mem_mux.vhd
+++ b/libraries/base/common/src/vhdl/common_mem_mux.vhd
@@ -135,5 +135,4 @@ begin
mosi_arr <= (others => mosi); -- broadcast write to all [g_nof_mosi-1:0] MM ports
miso <= miso_arr(0); -- broadcast read only from MM port [0]
end generate;
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_mem_pkg.vhd b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
index 9f035bdfd4..fd2760210c 100644
--- a/libraries/base/common/src/vhdl/common_mem_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
@@ -198,7 +198,6 @@ package common_mem_pkg is
------------------------------------------------------------------------------
function func_mem_swap_endianess(mm : t_mem_miso; sz : natural) return t_mem_miso;
function func_mem_swap_endianess(mm : t_mem_mosi; sz : natural) return t_mem_mosi;
-
end common_mem_pkg;
package body common_mem_pkg is
@@ -371,5 +370,4 @@ package body common_mem_pkg is
v_mm.rd := mm.rd;
return v_mm;
end func_mem_swap_endianess;
-
end common_mem_pkg;
diff --git a/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd b/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
index 904b55d3df..7db2a166a1 100644
--- a/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
@@ -356,7 +356,6 @@ package common_network_layers_pkg is
"0000000000000001", "0000000000000001");
function func_network_ip_header_checksum(field_arr : t_common_field_arr; hdr_fields_slv : std_logic_vector) return std_logic_vector;
-
end common_network_layers_pkg;
package body common_network_layers_pkg is
@@ -383,5 +382,4 @@ package body common_network_layers_pkg is
crc := not(std_logic_vector(sum(c_halfword_w - 1 downto 0) + sum(sum'high downto c_halfword_w)));
return crc;
end func_network_ip_header_checksum;
-
end common_network_layers_pkg;
diff --git a/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd b/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
index 32587a2aff..6574631e36 100644
--- a/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
@@ -277,7 +277,6 @@ package common_network_total_header_pkg is
function func_network_total_header_no_align_response_icmp(icmp_arr : t_network_total_header_64b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_64b_arr;
function func_network_total_header_no_align_response_udp( udp_arr : t_network_total_header_32b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_32b_arr;
function func_network_total_header_no_align_response_udp( udp_arr : t_network_total_header_64b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_64b_arr;
-
end common_network_total_header_pkg;
package body common_network_total_header_pkg is
@@ -1041,5 +1040,4 @@ package body common_network_total_header_pkg is
v_response(5)(15 downto 0) := TO_UVEC(0, 16);
return v_response;
end;
-
end common_network_total_header_pkg;
diff --git a/libraries/base/common/src/vhdl/common_operation_tree.vhd b/libraries/base/common/src/vhdl/common_operation_tree.vhd
index 0ad7a72e6a..b394783d73 100644
--- a/libraries/base/common/src/vhdl/common_operation_tree.vhd
+++ b/libraries/base/common/src/vhdl/common_operation_tree.vhd
@@ -146,5 +146,4 @@ begin
out_dat => result
);
end generate; -- no_tree
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
index 094c7c988b..2aeaff9ba7 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
@@ -313,5 +313,4 @@ begin
buf_wr_adr <= INCR_UVEC(RESIZE_UVEC(wr_adr, c_buf_addr_w), page_ofs_wr);
buf_rd_adr <= INCR_UVEC(RESIZE_UVEC(rd_adr, c_buf_addr_w), page_ofs_rd);
end generate; -- gen_ofs
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
index a8f4d13706..a0aecdf3aa 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
@@ -343,5 +343,4 @@ begin
buf_adr_a <= INCR_UVEC(RESIZE_UVEC(adr_a, c_buf_addr_w), page_ofs_a);
buf_adr_b <= INCR_UVEC(RESIZE_UVEC(adr_b, c_buf_addr_w), page_ofs_b);
end generate; -- gen_ofs
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
index 9a18427a80..4913520afe 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
@@ -336,5 +336,4 @@ begin
buf_adr_a <= INCR_UVEC(RESIZE_UVEC(adr_a, c_buf_addr_w), page_ofs_a);
buf_adr_b <= INCR_UVEC(RESIZE_UVEC(adr_b, c_buf_addr_w), page_ofs_b);
end generate; -- gen_ofs
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_reg.vhd b/libraries/base/common/src/vhdl/common_paged_reg.vhd
index 1e02358fc6..d2ab01b8be 100644
--- a/libraries/base/common/src/vhdl/common_paged_reg.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_reg.vhd
@@ -68,5 +68,4 @@ begin
out_dat => reg_dat(I)
);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd b/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
index 8d883bbf79..51705d2b65 100644
--- a/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
+++ b/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
@@ -113,5 +113,4 @@ begin
-- map arr to output vector
out_data((I + 1) * g_symbol_w - 1 downto I * g_symbol_w) <= out_dat_arr(I);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_pkg.vhd b/libraries/base/common/src/vhdl/common_pkg.vhd
index a45d79b3fc..1906c4c1bf 100644
--- a/libraries/base/common/src/vhdl/common_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_pkg.vhd
@@ -597,7 +597,6 @@ package common_pkg is
procedure proc_common_dclk_generate_sclk(constant Pfactor : in positive;
signal dclk : in std_logic;
signal sclk : inout std_logic);
-
end common_pkg;
package body common_pkg is
diff --git a/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd b/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
index f4e02fa89d..5b498629a8 100644
--- a/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
+++ b/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
@@ -135,5 +135,4 @@ begin
out_new => open
);
end generate; -- gen_common_reg_cross_domain
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_reinterleave.vhd b/libraries/base/common/src/vhdl/common_reinterleave.vhd
index af7766e68e..a9d181a8e4 100644
--- a/libraries/base/common/src/vhdl/common_reinterleave.vhd
+++ b/libraries/base/common/src/vhdl/common_reinterleave.vhd
@@ -235,5 +235,4 @@ begin
out_dat( i * g_dat_w + g_dat_w - 1 downto i * g_dat_w) <= inter_out_dat_arr(i);
out_val(i) <= inter_out_val(i);
end generate;
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_rl_increase.vhd b/libraries/base/common/src/vhdl/common_rl_increase.vhd
index 43f002b9f5..3f50030ae2 100644
--- a/libraries/base/common/src/vhdl/common_rl_increase.vhd
+++ b/libraries/base/common/src/vhdl/common_rl_increase.vhd
@@ -91,5 +91,4 @@ begin
nxt_hold_dat <= snk_in_dat when hold_val = '1' else hold_dat;
src_out_dat <= snk_in_dat when g_hold_dat_en = false else nxt_hold_dat;
end generate;
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_shiftram.vhd b/libraries/base/common/src/vhdl/common_shiftram.vhd
index 7770e46a34..15a2ec987f 100644
--- a/libraries/base/common/src/vhdl/common_shiftram.vhd
+++ b/libraries/base/common/src/vhdl/common_shiftram.vhd
@@ -315,5 +315,4 @@ begin
data_out <= r3.data_out;
data_out_val <= r3.data_out_val;
end generate;
-
end rtl;
diff --git a/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd b/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
index e5a3137af0..9d9575f293 100644
--- a/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
+++ b/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
@@ -93,5 +93,4 @@ begin
-- map arr to output vector
out_data((I + 1) * g_symbol_w - 1 downto I * g_symbol_w) <= out_dat_arr(I);
end generate;
-
end str;
diff --git a/libraries/base/common/src/vhdl/common_str_pkg.vhd b/libraries/base/common/src/vhdl/common_str_pkg.vhd
index b56337e78f..b59ee9c9f1 100644
--- a/libraries/base/common/src/vhdl/common_str_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_str_pkg.vhd
@@ -335,5 +335,4 @@ package body common_str_pkg is
end loop;
return r;
end;
-
end common_str_pkg;
diff --git a/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd b/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
index c1bf30f4e7..6b87b951a5 100644
--- a/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
+++ b/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
@@ -106,5 +106,4 @@ begin
r_stable_ack => st_stable_ack
);
end generate;
-
end str;
diff --git a/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd b/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
index 94e5f10bbf..ef1d1d35ce 100644
--- a/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
@@ -246,5 +246,4 @@ package body tb_common_mem_pkg is
begin
proc_mem_read_ram(c_offset, c_nof_data, mm_clk, mm_mosi, mm_miso, data_arr);
end proc_mem_read_ram;
-
end tb_common_mem_pkg;
diff --git a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
index de11904870..8f5c453e31 100644
--- a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
@@ -1427,5 +1427,4 @@ package body tb_common_pkg is
end loop;
return(v_found_it);
end function func_find_string_in_string;
-
end tb_common_pkg;
diff --git a/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd b/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
index 842665e03e..6756091b74 100644
--- a/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
@@ -196,5 +196,4 @@ begin
gen_rev_out : for i in 0 to g_nof_out - 1 generate
rev_out_dat_arr(i) <= rev_out_dat( i * g_dat_w + g_dat_w - 1 downto i * g_dat_w);
end generate;
-
end rtl;
diff --git a/libraries/base/common/tb/vhdl/tb_common_switch.vhd b/libraries/base/common/tb/vhdl/tb_common_switch.vhd
index 457290cb5c..b886c140d3 100644
--- a/libraries/base/common/tb/vhdl/tb_common_switch.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_switch.vhd
@@ -237,5 +237,4 @@ begin
out_level => out_level(I)
);
end generate;
-
end tb;
diff --git a/libraries/base/common/tb/vhdl/tb_resize.vhd b/libraries/base/common/tb/vhdl/tb_resize.vhd
index 01c5612064..83d3dbac30 100644
--- a/libraries/base/common/tb/vhdl/tb_resize.vhd
+++ b/libraries/base/common/tb/vhdl/tb_resize.vhd
@@ -238,5 +238,4 @@ begin
assert unsigned(resize_num_udat) = unsigned(lowrange_udat) report "Wrong resize_num_udat /= lowrange_udat" severity ERROR;
end if;
end process;
-
end tb;
diff --git a/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd b/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
index ac64038aab..74fa199402 100644
--- a/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
+++ b/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
@@ -60,5 +60,4 @@ begin
u_sum_w_min_1 : entity work.tb_common_adder_tree generic map ("UNSIGNED", 1, I, 8, 8 - 1);
u_sum_w_wider : entity work.tb_common_adder_tree generic map ("UNSIGNED", 1, I, 8, 8 + 8);
end generate;
-
end tb;
diff --git a/libraries/base/common_mult/src/vhdl/common_mult_add.vhd b/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
index 9c70318d26..08a00fb8f2 100644
--- a/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
+++ b/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
@@ -96,5 +96,4 @@ begin
gen_sub : if g_add_sub = "SUB" generate
nxt_result <= resize(prod0, c_sum_w) - prod1;
end generate;
-
end rtl;
diff --git a/libraries/base/diag/src/vhdl/diag_pkg.vhd b/libraries/base/diag/src/vhdl/diag_pkg.vhd
index 8f88945551..bd3278afea 100644
--- a/libraries/base/diag/src/vhdl/diag_pkg.vhd
+++ b/libraries/base/diag/src/vhdl/diag_pkg.vhd
@@ -218,7 +218,6 @@ package diag_pkg is
constant c_diag_seq_tx_reg_en_cntr : natural := 3;
type t_diag_seq_mm_reg_arr is array (integer range <>) of t_diag_seq_mm_reg;
-
end diag_pkg;
package body diag_pkg is
@@ -255,5 +254,4 @@ package body diag_pkg is
TO_UINT(bg_ctrl_slv.mem_high_adrs),
TO_UINT(bg_ctrl_slv.bsn_init));
end;
-
end diag_pkg;
diff --git a/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd b/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
index bb2657dbd8..247f6d3def 100644
--- a/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
+++ b/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
@@ -166,5 +166,4 @@ begin
out_sync => out_sync( g_wideband_factor - I - 1)
);
end generate;
-
end str;
diff --git a/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd b/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
index b0d7b45dc6..4dd262a70c 100644
--- a/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
+++ b/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
@@ -252,5 +252,4 @@ begin
out_dat => mm_mon_ctrl.ampl
);
end generate;
-
end rtl;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd b/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
index 60095ffc8c..c725906b2b 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
@@ -395,5 +395,4 @@ begin
tx_src_in_arr => out_siso_arr
);
end generate;
-
end rtl;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd b/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
index 481104862a..bb14b29fe7 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
@@ -217,5 +217,4 @@ begin
rx_snk_in_arr => in_sosi_arr
);
end generate;
-
end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd b/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
index 6bfbb0dab8..7030307609 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
@@ -219,5 +219,4 @@ begin
rx_snk_in_arr => in_sosi_arr
);
end generate;
-
end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
index 879b31e632..c739f3c3bf 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
@@ -381,5 +381,4 @@ begin
src_out_arr => tx_src_out_arr
);
end generate;
-
end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd b/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
index aa5b1be2c4..e319a43ff9 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
@@ -158,5 +158,4 @@ begin
vector_or(wg_ovr( (I + 1) * g_wideband_factor - 1 downto I * g_wideband_factor )) = '0' else
TO_DP_ERROR(2**7); -- pass ADC or WG overflow info on as an error signal
end generate;
-
end str;
diff --git a/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd b/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
index 7e2bccd258..97180e901d 100644
--- a/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
+++ b/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
@@ -690,5 +690,4 @@ package body tb_diag_pkg is
cw_ampl, cw_phase, cw_dat, cw_noise,
accum_noise_power, measured_noise_power);
end proc_diag_measure_cw_noise_power;
-
end tb_diag_pkg;
diff --git a/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd b/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
index 796aeba35b..8b9d74a9f1 100644
--- a/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
+++ b/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
@@ -143,5 +143,4 @@ package body tb_diagnostics_trnb_pkg is
-- Idle interval
proc_common_wait_some_cycles(mm_clk, c_mm_clk_1us * c_diag_off_interval);
end procedure proc_diagnostics_trnb_run_and_verify;
-
end tb_diagnostics_trnb_pkg;
diff --git a/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd b/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
index 8e84c4b54c..629e09198c 100644
--- a/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
+++ b/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
@@ -401,5 +401,4 @@ begin
coe_writedata_export_from_the_reg_diag_data_buffer => reg_diag_data_buf_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
index e2f93b3baf..f18dffcfad 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
@@ -112,5 +112,4 @@ begin
gen_out_arr : for I in 0 to g_nof_input - 1 generate
out_en_arr(I) <= out_en_arr_reg(I * c_word_w);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
index 36d2d553ae..d7d928eb72 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
@@ -189,5 +189,4 @@ begin
out_new => open
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
index e6310abb8f..3ddac34d3f 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
@@ -276,5 +276,4 @@ begin
out_new => open
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
index 71eab87eda..da53edfb21 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
@@ -314,5 +314,4 @@ begin
out_new => open
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_counter.vhd b/libraries/base/dp/src/vhdl/dp_counter.vhd
index 9748348ee2..fd007ff4d3 100644
--- a/libraries/base/dp/src/vhdl/dp_counter.vhd
+++ b/libraries/base/dp/src/vhdl/dp_counter.vhd
@@ -205,5 +205,4 @@ begin
count_src_out_arr <= dp_counter_func_src_out_arr;
end generate;
-
end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_counter_func.vhd b/libraries/base/dp/src/vhdl/dp_counter_func.vhd
index 89431450dd..9e8f19ea7f 100644
--- a/libraries/base/dp/src/vhdl/dp_counter_func.vhd
+++ b/libraries/base/dp/src/vhdl/dp_counter_func.vhd
@@ -130,5 +130,4 @@ begin
count_src_out_arr(i).valid <= count_en;
count_src_out_arr(i).data <= RESIZE_DP_DATA(count_arr(i));
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_deinterleave.vhd b/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
index e652bad0f3..9c54eddb6a 100644
--- a/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
+++ b/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
@@ -169,5 +169,4 @@ begin
no_align_out : if g_use_sync_bsn = false generate
src_out_arr <= dp_block_gen_src_out_arr;
end generate;
-
end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd b/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
index d5dabeee58..e82a3e5a18 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
@@ -143,5 +143,4 @@ begin
out_val => open
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd b/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
index 4ec10842d1..2864d417d2 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
@@ -94,5 +94,4 @@ begin
rd_fill_32b => rd_fill_32b_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_folder.vhd b/libraries/base/dp/src/vhdl/dp_folder.vhd
index 7b49530966..f39ef96b50 100644
--- a/libraries/base/dp/src/vhdl/dp_folder.vhd
+++ b/libraries/base/dp/src/vhdl/dp_folder.vhd
@@ -247,5 +247,4 @@ begin
gen_wire_out_to_in: if g_nof_folds = 0 generate
dp_block_gen_snk_in_arr <= snk_in_arr;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd b/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
index 8b2e689ec4..7dec1de935 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
@@ -54,5 +54,4 @@ begin
snk_in_busy => snk_in_busy_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_remove.vhd b/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
index 41dbe3e5e8..07c69bae7e 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
@@ -123,5 +123,4 @@ begin
src_out <= snk_in;
snk_out <= src_in;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_repack.vhd b/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
index 7bda823b12..4aab4563da 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
@@ -132,5 +132,4 @@ begin
out_eof => out_eof
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd b/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
index 4de9166883..a02bb3a331 100644
--- a/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
+++ b/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
@@ -113,5 +113,4 @@ begin
src_out <= snk_in;
snk_out <= src_in;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd b/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
index 77c10e03b9..2b56d4a591 100644
--- a/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
+++ b/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
@@ -120,5 +120,4 @@ begin
src_out => src_out
);
end generate;
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_mux.vhd b/libraries/base/dp/src/vhdl/dp_mux.vhd
index 9e15141bf0..6a40ad62d1 100644
--- a/libraries/base/dp/src/vhdl/dp_mux.vhd
+++ b/libraries/base/dp/src/vhdl/dp_mux.vhd
@@ -412,5 +412,4 @@ begin
end process;
end generate;
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
index 64f0ef268b..f21d8df416 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
@@ -39,7 +39,6 @@ entity dp_offload_rx_filter is
g_udp_dst_port_ena : boolean
);
port (
-
dp_rst : in std_logic;
dp_clk : in std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
index f3c4567456..ae1a6d18cd 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
@@ -35,7 +35,6 @@ entity dp_offload_rx_filter_mm is
g_hdr_field_arr : t_common_field_arr
);
port (
-
dp_rst : in std_logic;
dp_clk : in std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
index cbe97b4e0f..de67982318 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
@@ -121,5 +121,4 @@ begin
src_out => dp_sosi_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_packet_merge.vhd b/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
index 2719bd8d00..9aece76e34 100644
--- a/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
@@ -49,7 +49,6 @@
-- . The input packets do not have to have equal length, because they are
-- merged based on counting their eop.
-
library IEEE,common_lib;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
diff --git a/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd b/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
index 76c65b3a90..9cc63a23df 100644
--- a/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
@@ -63,5 +63,4 @@ package body dp_packet_pkg is
ceil_div(c_dp_packet_bsn_w, c_data_w) +
ceil_div(c_dp_packet_error_w, c_data_w);
end;
-
end dp_packet_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd b/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
index cbc94af722..2c64e9af36 100644
--- a/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
@@ -138,5 +138,4 @@ package body dp_packetizing_pkg is
return nxt_crc;
end func_dp_next_crc;
-
end dp_packetizing_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_pad_insert.vhd b/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
index 7a0fe1975a..43c49d06e8 100644
--- a/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
@@ -145,5 +145,4 @@ begin
src_out <= snk_in;
snk_out <= src_in;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pad_remove.vhd b/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
index 134fc740ef..542ce3e0ae 100644
--- a/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
@@ -86,5 +86,4 @@ begin
src_out <= snk_in;
snk_out <= src_in;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline.vhd b/libraries/base/dp/src/vhdl/dp_pipeline.vhd
index 63f860246c..ab6d345b1e 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline.vhd
@@ -106,7 +106,6 @@ begin
src_out => snk_in_arr(I)
);
end generate;
-
end str;
library IEEE, common_lib;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd b/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
index 57e45e045e..609982030d 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
@@ -64,5 +64,4 @@ begin
src_out => src_out_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd b/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
index b4dcc11aac..5f3af0c8ec 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
@@ -149,5 +149,4 @@ begin
src_out => src_out
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_reinterleave.vhd b/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
index d0f65d7299..6d85066f23 100644
--- a/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
+++ b/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
@@ -200,5 +200,4 @@ begin
no_align_out : if g_use_sync_bsn = false generate
src_out_arr <= dp_block_gen_src_out_arr;
end generate;
-
end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_repack_data.vhd b/libraries/base/dp/src/vhdl/dp_repack_data.vhd
index fbc1849f6a..4a675f0fdf 100644
--- a/libraries/base/dp/src/vhdl/dp_repack_data.vhd
+++ b/libraries/base/dp/src/vhdl/dp_repack_data.vhd
@@ -382,7 +382,6 @@ begin
snk_out.ready <= r_snk_out.ready when nxt_r.hold_out.valid = '0' else src_in.ready; -- if there is pending output then the src_in ready determines the flow control
snk_out.xon <= src_in.xon; -- just pass on the xon/off frame flow control
end generate;
-
end rtl;
library IEEE, common_lib, dp_lib;
@@ -622,7 +621,6 @@ begin
snk_out.ready <= r_snk_out.ready when nxt_r.hold_out.valid = '0' else src_in.ready; -- if there is pending output then the src_in ready determines the flow control
snk_out.xon <= src_in.xon; -- just pass on the xon/off frame flow control
end generate;
-
end rtl;
library IEEE, common_lib, dp_lib;
diff --git a/libraries/base/dp/src/vhdl/dp_shiftram.vhd b/libraries/base/dp/src/vhdl/dp_shiftram.vhd
index f63fd0c4d9..c15eb6a6d3 100644
--- a/libraries/base/dp/src/vhdl/dp_shiftram.vhd
+++ b/libraries/base/dp/src/vhdl/dp_shiftram.vhd
@@ -145,5 +145,4 @@ begin
end process;
end generate;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/dp_shiftreg.vhd b/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
index 0a6c63afa8..33f98e86b2 100644
--- a/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
@@ -188,5 +188,4 @@ begin
src_out => src_out
);
end generate;
-
end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd b/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
index 5f121726fe..634513a77a 100644
--- a/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
@@ -407,7 +407,6 @@ package dp_stream_pkg is
-- Return TRUE when the sosi.data of both streams matches (and is valid)
function func_dp_data_match(snk_in_a, snk_in_b: t_dp_sosi; data_w: natural) return boolean;
function func_dp_data_match(snk_in_a, snk_in_b, snk_in_c: t_dp_sosi; data_w: natural) return boolean;
-
end dp_stream_pkg;
package body dp_stream_pkg is
@@ -1561,5 +1560,4 @@ package body dp_stream_pkg is
begin
return func_dp_data_match(snk_in_a, snk_in_b, data_w) and func_dp_data_match(snk_in_b, snk_in_c, data_w);
end;
-
end dp_stream_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd b/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
index d5d54d2a23..9865efd132 100644
--- a/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
@@ -46,7 +46,6 @@ entity dp_sync_insert_v2 is
g_nof_blk_per_sync_min : natural := 19530
);
port (
-
-- Clocks and reset
mm_rst : in std_logic;
mm_clk : in std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
index 60fee25c8b..b7ddc348e9 100644
--- a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
@@ -49,7 +49,6 @@ entity dp_sync_recover is
g_nof_data_per_block : positive := 1
);
port (
-
-- Clocks and reset
dp_rst : in std_logic;
dp_clk : in std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_unfolder.vhd b/libraries/base/dp/src/vhdl/dp_unfolder.vhd
index 3df7cc4c18..495eaea09c 100644
--- a/libraries/base/dp/src/vhdl/dp_unfolder.vhd
+++ b/libraries/base/dp/src/vhdl/dp_unfolder.vhd
@@ -260,5 +260,4 @@ begin
gen_wire_out_to_in: if g_nof_unfolds = 0 generate
dp_block_gen_snk_in_arr <= snk_in_arr;
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd b/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
index 336f7e5565..8c91b3bfd2 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
@@ -113,5 +113,4 @@ begin
src_out => src_out_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
index 645f43333f..dc4ec575cf 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
@@ -158,5 +158,4 @@ begin
mon_bsn_first_cycle_cnt => mon_bsn_first_cycle_cnt_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
index 5ba8560094..3ae1fff085 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
@@ -155,5 +155,4 @@ begin
mon_latency => mon_latency_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd b/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
index 5191eef130..1df22e7234 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
@@ -115,5 +115,4 @@ begin
src_out => src_out_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_split.vhd b/libraries/base/dp/src/vhdl/mms_dp_split.vhd
index ee7ade081f..be0cdf397d 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_split.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_split.vhd
@@ -117,5 +117,4 @@ begin
src_out_arr => src_out_2arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd b/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
index ac9ddc3c2c..feea9a66a5 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
@@ -153,5 +153,4 @@ begin
force_xoff => force_xoff_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/base/dp/tb/vhdl/dp_phy_link.vhd b/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
index bf481437ec..459e4addc1 100644
--- a/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
@@ -59,5 +59,4 @@ begin
no_valid : if g_valid_support = false generate
out_val <= '1';
end generate;
-
end beh;
diff --git a/libraries/base/dp/tb/vhdl/dp_statistics.vhd b/libraries/base/dp/tb/vhdl/dp_statistics.vhd
index 90c09b5f24..bdbbbc7a7f 100644
--- a/libraries/base/dp/tb/vhdl/dp_statistics.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_statistics.vhd
@@ -53,7 +53,6 @@ entity dp_statistics is
g_dp_word_w : natural := 32 -- Used to calculate data rate
);
port (
-
dp_clk : in std_logic := '0';
dp_rst : in std_logic;
diff --git a/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd b/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
index fe65542bf2..523b7c211d 100644
--- a/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
@@ -82,5 +82,4 @@ begin
src_out => src_out
);
end generate;
-
end str;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd b/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
index f9ff61dc0c..2eef1c0aab 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
@@ -240,5 +240,4 @@ architecture tb of tb_dp_counter_func is
gen_tb_count_arr : for i in 0 to g_nof_counters - 1 generate
tb_count_arr(I) <= TO_UINT(dp_counter_func_count_src_out_arr(I).data(c_max_count_w - 1 downto 0)) when dp_counter_func_count_en = '1';
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd b/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
index 033d1fe079..b27402df79 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
@@ -143,5 +143,4 @@ begin
out_im_arr(I) <= src_out_arr(I).im(g_dat_w / 2 - 1 downto 0);
out_val_arr(I) <= src_out_arr(I).valid;
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd b/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
index 58dfd08b6b..8e32f03f95 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
@@ -288,5 +288,4 @@ begin
gen_exact : if g_use_ctrl = true generate
proc_dp_verify_value(e_equal, narrow_clk, verify_done, expected_exact, prev_out_data); -- for framed data we know exactly what to expect
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd b/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
index 481331ffe8..599f8d615b 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
@@ -228,5 +228,4 @@ begin
-- Verify output packet block size
proc_dp_verify_block_size(exp_size, dp_clk, out_sosi_arr(I).valid, out_sosi_arr(I).sop, out_sosi_arr(I).eop, cnt_size_arr(I));
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
index 3ec6d17329..4a405507f7 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
@@ -364,5 +364,4 @@ begin
src_out_arr => src_out_arr
);
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
index 4b9c1555db..4925844ae7 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
@@ -340,5 +340,4 @@ begin
src_out_arr => src_out_arr
);
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
index 17f4264509..f055d4eeee 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
@@ -283,5 +283,4 @@ begin
out_sosi_arr => out_sosi_arr
);
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
index 5c3eb33571..119ee1426e 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
@@ -317,5 +317,4 @@ begin
out_sosi_arr => out_sosi_arr
);
end generate;
-
end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
index 23ff128bc4..0286def814 100644
--- a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
@@ -76,5 +76,4 @@ begin
u_fraction_half : entity work.tb_dp_bsn_sync_scheduler generic map (c_nof_input_sync, 17, 10, 3, 45, P); -- 45/10 = 4.5 block/out_sync
u_fraction_0 : entity work.tb_dp_bsn_sync_scheduler generic map (c_nof_input_sync, 17, 10, 3, 50, P); -- 50/10 = 5 block/out_sync
end generate;
-
end tb;
diff --git a/libraries/base/mm/src/vhdl/mm_bus.vhd b/libraries/base/mm/src/vhdl/mm_bus.vhd
index 6c6bf43ccb..56f57a9577 100644
--- a/libraries/base/mm/src/vhdl/mm_bus.vhd
+++ b/libraries/base/mm/src/vhdl/mm_bus.vhd
@@ -175,5 +175,4 @@ begin
out_miso => slave_miso_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/mm/src/vhdl/mm_bus_comb.vhd b/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
index eb27973b62..61d220fd40 100644
--- a/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
+++ b/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
@@ -207,5 +207,4 @@ begin
end process;
end generate;
-
end rtl;
diff --git a/libraries/base/mm/src/vhdl/mm_master_mux.vhd b/libraries/base/mm/src/vhdl/mm_master_mux.vhd
index 0eb66110d9..cba9cf14c0 100644
--- a/libraries/base/mm/src/vhdl/mm_master_mux.vhd
+++ b/libraries/base/mm/src/vhdl/mm_master_mux.vhd
@@ -137,5 +137,4 @@ begin
end process;
end generate;
-
end rtl;
diff --git a/libraries/base/mm/tb/vhdl/mm_file.vhd b/libraries/base/mm/tb/vhdl/mm_file.vhd
index f04fb7d4b0..4e28d63f12 100644
--- a/libraries/base/mm/tb/vhdl/mm_file.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file.vhd
@@ -172,5 +172,4 @@ begin
end process;
end generate;
end generate;
-
end str;
diff --git a/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd b/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
index c742fee221..e2277654a5 100644
--- a/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
@@ -245,7 +245,6 @@ package mm_file_pkg is
mm_master_in : in t_mem_miso
);
end component;
-
end mm_file_pkg;
package body mm_file_pkg is
@@ -745,5 +744,4 @@ package body mm_file_pkg is
begin
return c_mmf_local_dir_path & mmf_prefix(s0, i0) & mmf_prefix(s1, i1) & mmf_prefix(s2, i2) & mmf_prefix(s3, i3) & mmf_prefix(s4, i4);
end;
-
end mm_file_pkg;
diff --git a/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd b/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
index ded649d443..c01105ca9d 100644
--- a/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
@@ -44,7 +44,6 @@ package mm_file_unb_pkg is
function mmf_unb_file_prefix( unb, node: natural) return string; -- unb 0,1,..., node = 0:7, with 0:3 for FN and 4:7 for BN
function mmf_unb_file_prefix(tb, unb, node: natural) return string; -- idem, with extra index tb = 0,1,... for use with multi testbench
function mmf_unb_file_prefix(tb, subrack, unb, node: natural) return string; -- idem, with extra index subrack = 0,1,... to support same local unb range per subrack
-
end mm_file_unb_pkg;
package body mm_file_unb_pkg is
@@ -91,5 +90,4 @@ package body mm_file_unb_pkg is
begin
return mmf_slave_prefix(c_mmf_unb_file_path, "TB", tb, "SUBRACK", subrack, "UNB", unb, c_node_type, c_node_nr);
end;
-
end mm_file_unb_pkg;
diff --git a/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd b/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
index 7c4046568a..76a0c79b24 100644
--- a/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
+++ b/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
@@ -241,5 +241,4 @@ begin
rd_val => ram_miso_arr(I).rdval
);
end generate;
-
end tb;
diff --git a/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd b/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
index ce8a2c0bad..4fe0aee1d4 100644
--- a/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
@@ -120,5 +120,4 @@ begin
output_siso => output_siso_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd b/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
index 41916d90e0..6b5fb64fed 100644
--- a/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
@@ -94,5 +94,4 @@ begin
output_sosi => output_sosi_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/reorder/src/vhdl/reorder_pkg.vhd b/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
index f0cb42898d..ef7a16c082 100644
--- a/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
@@ -169,7 +169,6 @@ package reorder_pkg is
function func_reorder_identity(nof_ch_per_packet : natural;
identity : t_reorder_identity)
return t_reorder_identity;
-
end reorder_pkg;
package body reorder_pkg is
@@ -416,5 +415,4 @@ package body reorder_pkg is
end if;
return v;
end;
-
end reorder_pkg;
diff --git a/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd b/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
index a51252e77b..e6995c2396 100644
--- a/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
+++ b/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
@@ -46,9 +46,7 @@ entity reorder_pkg_test is
);
end reorder_pkg_test;
-
architecture tb of reorder_pkg_test is
-
constant c_clk_period : time := 10 ns;
constant c_nof_data : natural := g_nof_blocks_per_packet * g_nof_data_per_block;
@@ -120,5 +118,4 @@ begin
assert out_address_lu = out_address report "Wrong transpose_lu address" severity error;
end if;
end process;
-
end tb;
diff --git a/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd b/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
index e8aeb6583d..4309e4e94a 100644
--- a/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
+++ b/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
@@ -33,13 +33,10 @@
library IEEE;
use IEEE.std_logic_1164.all;
-
entity reorder_pkg_test_test is
end reorder_pkg_test_test;
-
architecture tb of reorder_pkg_test_test is
-
signal tb_end : std_logic := '0'; -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
begin
@@ -49,5 +46,4 @@ begin
u_4_488_1 : entity work.reorder_pkg_test generic map (4, 488, 1);
u_4_488_2 : entity work.reorder_pkg_test generic map (4, 488, 2);
-
end tb;
diff --git a/libraries/base/ring/src/vhdl/ring_pkg.vhd b/libraries/base/ring/src/vhdl/ring_pkg.vhd
index 58bb4193dd..50b55d733a 100644
--- a/libraries/base/ring/src/vhdl/ring_pkg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_pkg.vhd
@@ -94,7 +94,6 @@ package ring_pkg is
function func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : natural) return natural;
function func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn : std_logic_vector; lane_dir : natural) return std_logic_vector; -- return vector length is same as hops vector length
-
end package ring_pkg;
package body ring_pkg is
@@ -125,5 +124,4 @@ package body ring_pkg is
begin
return TO_UVEC(func_ring_nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(this_rn), TO_UINT(N_rn), lane_dir),hops'length);
end;
-
end ring_pkg;
diff --git a/libraries/base/ring/src/vhdl/ring_rx.vhd b/libraries/base/ring/src/vhdl/ring_rx.vhd
index 4201821a26..e021b1de1f 100644
--- a/libraries/base/ring/src/vhdl/ring_rx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_rx.vhd
@@ -246,5 +246,4 @@ begin
gen_no_dp_layer : if not g_use_dp_layer generate
from_lane_sosi <= offload_rx_sosi;
end generate;
-
end str;
diff --git a/libraries/base/ring/src/vhdl/ring_tx.vhd b/libraries/base/ring/src/vhdl/ring_tx.vhd
index 059e6fb0a3..62b21f1b56 100644
--- a/libraries/base/ring/src/vhdl/ring_tx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_tx.vhd
@@ -238,5 +238,4 @@ begin
ref_sync => ref_sync
);
end generate;
-
end str;
diff --git a/libraries/base/ss/src/vhdl/ss_store.vhd b/libraries/base/ss/src/vhdl/ss_store.vhd
index b0acf7da04..a620261450 100644
--- a/libraries/base/ss/src/vhdl/ss_store.vhd
+++ b/libraries/base/ss/src/vhdl/ss_store.vhd
@@ -120,5 +120,4 @@ begin
gen_non_complex : if not(g_use_complex) generate
nxt_store_mosi.wrdata <= RESIZE_MEM_DATA(input_sosi.data(c_nof_complex * g_dsp_data_w - 1 downto 0)) when input_sosi.valid = '1' else i_store_mosi.wrdata;
end generate;
-
end rtl;
diff --git a/libraries/base/ss/src/vhdl/ss_wide.vhd b/libraries/base/ss/src/vhdl/ss_wide.vhd
index 37bb7363cc..c71b8e4236 100644
--- a/libraries/base/ss/src/vhdl/ss_wide.vhd
+++ b/libraries/base/ss/src/vhdl/ss_wide.vhd
@@ -124,5 +124,4 @@ begin
output_siso => output_siso_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/base/tst/src/vhdl/tst_input.vhd b/libraries/base/tst/src/vhdl/tst_input.vhd
index fbfbf67229..d6b841c7a9 100644
--- a/libraries/base/tst/src/vhdl/tst_input.vhd
+++ b/libraries/base/tst/src/vhdl/tst_input.vhd
@@ -295,4 +295,5 @@ begin
nxt_lno <= cycle_lno;
nxt_rep <= cycle_rep;
end process;
+
end beh;
diff --git a/libraries/base/uth/src/vhdl/uth_pkg.vhd b/libraries/base/uth/src/vhdl/uth_pkg.vhd
index fc4b0c498b..e839153d7c 100644
--- a/libraries/base/uth/src/vhdl/uth_pkg.vhd
+++ b/libraries/base/uth/src/vhdl/uth_pkg.vhd
@@ -111,5 +111,4 @@ package body uth_pkg is
end case;
return nxt_crc;
end func_uth_next_crc;
-
end uth_pkg;
diff --git a/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd b/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
index 4db9301b8b..38ef97b62b 100644
--- a/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
+++ b/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
@@ -210,5 +210,4 @@ begin
mon_dist_sosi_arr => rx_mon_dist_sosi_arr
);
end generate;
-
end str;
diff --git a/libraries/base/util/src/vhdl/util_heater_pkg.vhd b/libraries/base/util/src/vhdl/util_heater_pkg.vhd
index dae51ab7ab..0799200b00 100644
--- a/libraries/base/util/src/vhdl/util_heater_pkg.vhd
+++ b/libraries/base/util/src/vhdl/util_heater_pkg.vhd
@@ -50,7 +50,6 @@ package util_heater_pkg is
end record;
constant c_util_heater_reg_mm_bus : t_util_heater_reg_mm_bus := ((others => '0'), (others => '0'), (others => '0'), '0', '0');
-
end util_heater_pkg;
package body util_heater_pkg is
diff --git a/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd b/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
index bcf58a4808..e2d078685d 100644
--- a/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
+++ b/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
@@ -232,5 +232,4 @@ begin
tx_siso_arr => bf_out_offload_tx_siso_arr(g_bf.nof_bf_units - 1 downto 0)
);
end generate;
-
end str;
diff --git a/libraries/dsp/bf/src/vhdl/bf_pkg.vhd b/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
index 380a12f18f..a004935967 100644
--- a/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
+++ b/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
@@ -50,7 +50,6 @@ package bf_pkg is
--CONSTANT c_bf : t_c_bf := (64, 16, 24, 256, 4, 16, 16, 1, 16, -5, 8, 56, 2); -- bst_gain_w= 1 for 16b and out_gain_w=-5 for 8b as in Fig 10 of RP1377 v0.41
constant c_bf : t_c_bf := (64, 16, 24, 256, 4, 16, 16, 0, 16, -6, 18, 56, 2); -- preserve 1 more LSbits for the bst_dat and out_dat outputs
-
end bf_pkg;
package body bf_pkg is
diff --git a/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd b/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
index 89a874799d..5015fe23b9 100644
--- a/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
+++ b/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
@@ -339,5 +339,4 @@ begin
altpll_1_locked_conduit_export => open
);
end generate;
-
end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_adder.vhd b/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
index dd81519562..48a6f930b1 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
@@ -120,5 +120,4 @@ begin
src_out_arr(i).re <= RESIZE_DP_DSP_DATA(common_complex_add_sub_src_out_arr(i).re(g_data_w - 1 downto 0));
src_out_arr(i).im <= RESIZE_DP_DSP_DATA(common_complex_add_sub_src_out_arr(i).im(g_data_w - 1 downto 0));
end generate;
-
end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_folder.vhd b/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
index 99c1a7805c..73e96d5dfa 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
@@ -146,5 +146,4 @@ begin
gen_wire_out_to_in: if g_nof_folds = 0 generate
src_out_arr <= snk_in_arr;
end generate;
-
end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd b/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
index 376b3babdd..95d0b4c2fc 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
@@ -188,5 +188,4 @@ begin
no_output_register: if g_register_output = false generate
src_out_2arr_2 <= permu_out_2arr_2;
end generate;
-
end rtl;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd b/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
index fe370e1429..08e85e2dd6 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
@@ -148,5 +148,4 @@ package body corr_permutor_pkg is
return v_result;
end corr_permute;
-
end corr_permutor_pkg;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd b/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
index dc3d2e83c1..c4d2a4d49e 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
@@ -150,5 +150,4 @@ begin
gen_wire_out_to_in: if g_nof_unfolds = 0 generate
src_out_arr <= snk_in_arr;
end generate;
-
end str;
diff --git a/libraries/dsp/fft/src/vhdl/fft_pkg.vhd b/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
index 8dda8835b5..5b836e50f3 100644
--- a/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
@@ -88,7 +88,6 @@ package fft_pkg is
-- FFT shift swaps right and left half of bin axis to shift zero-frequency component to center of spectrum
function fft_shift(bin : std_logic_vector) return std_logic_vector;
function fft_shift(bin, w : natural) return natural;
-
end package fft_pkg;
package body fft_pkg is
@@ -164,5 +163,4 @@ package body fft_pkg is
begin
return TO_UINT(fft_shift(TO_UVEC(bin, w)));
end;
-
end fft_pkg;
diff --git a/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd b/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
index 2bf2ac6eed..a97f138a87 100644
--- a/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
@@ -348,5 +348,4 @@ begin
out_dat <= out_dat_i; -- c_dat_w
out_val <= out_val_i;
end generate;
-
end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd b/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
index 720653a425..1e307f5042 100644
--- a/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
@@ -321,5 +321,4 @@ begin
out_re_arr(I) <= resize_fft_svec(out_dat_arr(I)( c_out_w - 1 downto 0));
out_im_arr(I) <= resize_fft_svec(out_dat_arr(I)(c_nof_complex * c_out_w - 1 downto c_out_w));
end generate;
-
end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_switch.vhd b/libraries/dsp/fft/src/vhdl/fft_switch.vhd
index e1732d2a81..638d5b0ce7 100644
--- a/libraries/dsp/fft/src/vhdl/fft_switch.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_switch.vhd
@@ -167,5 +167,4 @@ begin
out_bit2 => lfsr_bit2
);
end generate;
-
end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd b/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
index 9d1ad5ef00..8d5530419c 100644
--- a/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
@@ -159,5 +159,4 @@ begin
out_bit2 => lfsr_bit2
);
end generate;
-
end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd b/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
index 3134ef587f..98418ce041 100644
--- a/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
@@ -223,5 +223,4 @@ begin
gen_output : for I in 0 to g_fft.wb_factor - 1 generate
out_sosi_arr(I) <= fft_out_sosi_arr(I);
end generate;
-
end str;
diff --git a/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd b/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
index de528f689e..b6932b3394 100644
--- a/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
@@ -285,5 +285,4 @@ begin
gen_output : for I in g_nof_ffts * g_fft.wb_factor - 1 downto 0 generate
out_sosi_arr(I) <= r.out_sosi_arr(I);
end generate;
-
end rtl;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
index b566285a29..b72b7933e8 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
@@ -602,5 +602,4 @@ package body tb_fft_pkg is
-- END LOOP;
-- proc_common_close_file(v_file_status, v_in_file); -- Close the file
-- END proc_prepare_input_data;
-
end tb_fft_pkg;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
index 7720437603..cca6da7cdb 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
@@ -251,4 +251,5 @@ begin
I := 0;
end if;
end process p_tester;
+
end tb;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
index a38cdfba65..1be6cbca3a 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
@@ -207,4 +207,5 @@ begin
I := 0;
end if;
end process p_tester;
+
end tb;
diff --git a/libraries/dsp/filter/src/vhdl/fil_pkg.vhd b/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
index 0526a3ce5e..cbb6102ac2 100644
--- a/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
@@ -64,7 +64,6 @@ package fil_pkg is
-- . Calculated with applications/lofar2/model/run_pfir_coef.m using application = 'lofar_subband'
-- . Not used in RTL, only used in test benches to verify expected subband levels
constant c_fil_lofar1_fir_filter_dc_gain : real := 0.994817;
-
end package fil_pkg;
package body fil_pkg is
diff --git a/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd b/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
index b77dcee842..6ff4e8743b 100644
--- a/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
@@ -56,7 +56,6 @@ entity fil_ppf_ctrl is
end fil_ppf_ctrl;
architecture rtl of fil_ppf_ctrl is
-
type t_in_dat_delay is array (g_fil_ppf_pipeline.mem_delay downto 0) of std_logic_vector(g_fil_ppf.in_dat_w * g_fil_ppf.nof_streams - 1 downto 0);
constant c_addr_w : natural := ceil_log2(g_fil_ppf.nof_bands * (2**g_fil_ppf.nof_chan));
diff --git a/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd b/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
index 57baa9b3d8..74cc79c07f 100644
--- a/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
@@ -244,5 +244,4 @@ begin
result => out_dat((I + 1) * g_fil_ppf.out_dat_w - 1 downto I * g_fil_ppf.out_dat_w)
);
end generate;
-
end rtl;
diff --git a/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd b/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
index 9a49efb0b7..3e20398fe0 100644
--- a/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
+++ b/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
@@ -56,5 +56,4 @@ begin
sim_phi : entity work.tb_fringe_stop_unit generic map (I, 8, 10, 31, 17, 4, 9, false);
sim_minus_phi : entity work.tb_fringe_stop_unit generic map (I, 8, 10, 31, 17, 4, 9, true);
end generate;
-
end tb;
diff --git a/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd b/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
index a210873207..e01f3c861a 100644
--- a/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
+++ b/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
@@ -39,7 +39,6 @@ package rTwoSDFPkg is
end record;
constant c_fft_pipeline : t_fft_pipeline := (1, 1, 4, 1, 1, 0, 0);
-
end package rTwoSDFPkg;
package body rTwoSDFPkg is
diff --git a/libraries/dsp/si/src/vhdl/si_arr.vhd b/libraries/dsp/si/src/vhdl/si_arr.vhd
index 2ef041cda1..8ce8138016 100755
--- a/libraries/dsp/si/src/vhdl/si_arr.vhd
+++ b/libraries/dsp/si/src/vhdl/si_arr.vhd
@@ -101,5 +101,4 @@ begin
rst => dp_rst
);
end generate;
-
end str;
diff --git a/libraries/dsp/st/src/vhdl/st_calc.vhd b/libraries/dsp/st/src/vhdl/st_calc.vhd
index 5e895907bd..0dbe354319 100644
--- a/libraries/dsp/st/src/vhdl/st_calc.vhd
+++ b/libraries/dsp/st/src/vhdl/st_calc.vhd
@@ -297,5 +297,4 @@ begin
out_im <= rd_im; -- c_dly_out = 0
end generate;
-
end str;
diff --git a/libraries/dsp/st/src/vhdl/st_ctrl.vhd b/libraries/dsp/st/src/vhdl/st_ctrl.vhd
index ee08d4e8f4..9824c127b1 100644
--- a/libraries/dsp/st/src/vhdl/st_ctrl.vhd
+++ b/libraries/dsp/st/src/vhdl/st_ctrl.vhd
@@ -190,5 +190,4 @@ begin
end if;
end if;
end process;
-
end rtl;
diff --git a/libraries/dsp/st/src/vhdl/st_sst.vhd b/libraries/dsp/st/src/vhdl/st_sst.vhd
index 2991c1ab0b..74bf89bc24 100644
--- a/libraries/dsp/st/src/vhdl/st_sst.vhd
+++ b/libraries/dsp/st/src/vhdl/st_sst.vhd
@@ -330,5 +330,4 @@ begin
rd_val_b => open
);
end generate;
-
end str;
diff --git a/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd b/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
index 5001ac90f8..abb02c4086 100644
--- a/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
@@ -228,5 +228,4 @@ begin
reg_st_sst_miso => reg_st_sst_miso_arr(I)
);
end generate;
-
end tb;
diff --git a/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd b/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
index 4d3b6d5645..6a91f8dd35 100644
--- a/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
@@ -48,5 +48,4 @@ package body tb_st_pkg is
end loop;
return v_exp_xsq;
end;
-
end tb_st_pkg;
diff --git a/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd b/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
index 5c274001c1..a7f5782281 100644
--- a/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
+++ b/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
@@ -151,5 +151,4 @@ begin
);
out_quant_sosi_arr <= wpfb_unit_out_quant_sosi_arr;
-
end str;
diff --git a/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd b/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
index a21feab0f6..5420638fb8 100644
--- a/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
+++ b/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
@@ -151,5 +151,4 @@ begin
);
out_quant_sosi_arr <= wpfb_unit_out_quant_sosi_arr;
-
end str;
diff --git a/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd b/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
index 0d717d9f4d..179e250bff 100644
--- a/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
+++ b/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
@@ -264,7 +264,6 @@ package wpfb_pkg is
-- Estimate maximum number of blocks of latency between WPFB input and output
function func_wpfb_maximum_sop_latency(wpfb : t_wpfb) return natural;
function func_wpfb_set_nof_block_per_sync(wpfb : t_wpfb; nof_block_per_sync : natural) return t_wpfb;
-
end package wpfb_pkg;
package body wpfb_pkg is
@@ -350,5 +349,4 @@ package body wpfb_pkg is
v_wpfb.nof_blk_per_sync := nof_block_per_sync;
return v_wpfb;
end func_wpfb_set_nof_block_per_sync;
-
end wpfb_pkg;
diff --git a/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd b/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
index 01bd165fc4..280d1c9621 100644
--- a/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
@@ -52,7 +52,6 @@ package aduh_dd_pkg is
end record;
constant c_aduh_dd_ai : t_c_aduh_dd_ai := (4, 2, 2, 8, 2, 2, true, false, c_aduh_delays);
-
end aduh_dd_pkg;
package body aduh_dd_pkg is
diff --git a/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd b/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
index 03ac392efc..23e4366d9d 100644
--- a/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
@@ -142,5 +142,4 @@ begin
nxt_sum <= truncate_or_resize_svec(acc_sum, g_sum_truncate, g_sum_w) when in_sync_p = '1' else i_sum;
nxt_sum_sync <= in_sync_p;
end generate;
-
end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd b/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
index d0e218257d..7ba686af12 100644
--- a/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
@@ -188,5 +188,4 @@ begin
out_new => open -- when '1' then the out_dat was updated with in_dat due to in_new
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_pll.vhd b/libraries/io/aduh/src/vhdl/aduh_pll.vhd
index 4f0723adec..36ef83efb9 100644
--- a/libraries/io/aduh/src/vhdl/aduh_pll.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_pll.vhd
@@ -294,14 +294,11 @@ begin
-- so e.g. for port A: src_out[0][31:0]=[A0,A1,A2,A3] whereby A0 is the first sample in time, A1 the next, etc.
-- If the OVR_AC bit is used then the OR of the dp_deser_factor=4 overflow bits is passed on via src_out[0][32]
-- and via src_out[1][32]
-
porth_val <= rcvdh_val;
-
gen_dp_1_1_1 : if g_ai.nof_adu = 1 and g_ai.nof_clocks = 1 and g_ai.nof_ovr = 1 generate
porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ) <= rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ); -- bit OVR_CD
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
-- port [0:1]=[A,B] is not used
dp_ovr(2) <= dp_ovr(3); -- bit OVR_C = OVR_CD
dp_ovr(3) <= vector_or(porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w)); -- bit OVR_D = OVR_CD
@@ -321,7 +318,6 @@ begin
gen_dp_1_1_0 : if g_ai.nof_adu = 1 and g_ai.nof_clocks = 1 and g_ai.nof_ovr = 0 generate
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
-- port [0:1]=[A,B] is not used
dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w); -- port C
dp_dat(3) <= porth_dat(0)(1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w); -- port D
@@ -343,7 +339,6 @@ begin
porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ) <= rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ); -- bit OVR_CD
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
dp_ovr(0) <= dp_ovr(1); -- bit OVR_A = OVR_AB
dp_ovr(1) <= vector_or(porth_dat(0)(g_ai.dp_deser_factor + 4 * c_dp_dat_w downto 4 * c_dp_dat_w + 1)); -- bit OVR_B = OVR_AB
dp_ovr(2) <= dp_ovr(3); -- bit OVR_C = OVR_CD
@@ -372,7 +367,6 @@ begin
porth_dat(0)( 3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port B
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
dp_dat(0) <= porth_dat(0)(4 * c_dp_dat_w - 1 downto 3 * c_dp_dat_w); -- port A
dp_dat(1) <= porth_dat(0)(3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w); -- port B
dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w); -- port C
@@ -399,7 +393,6 @@ begin
porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ) <= rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w ); -- bit OVR_CD
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
dp_ovr(0) <= dp_ovr(1); -- bit OVR_A = OVR_AB
dp_ovr(1) <= vector_or(porth_dat(1)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w)); -- bit OVR_B = OVR_AB
dp_ovr(2) <= dp_ovr(3); -- bit OVR_C = OVR_CD
@@ -428,7 +421,6 @@ begin
porth_dat(1)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(1)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port B
porth_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port C
porth_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ) <= transpose(rcvdh_dat(0)( 1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w ), g_ai.dp_deser_factor, g_ai.port_w); -- port D
-
dp_dat(0) <= porth_dat(1)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w); -- port A
dp_dat(1) <= porth_dat(1)(1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w); -- port B
dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w); -- port C
diff --git a/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd b/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
index f9d4ff3206..a157506da6 100644
--- a/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
@@ -50,7 +50,6 @@ package aduh_pll_pkg is
function func_aduh_pll_adu_dat_w(ai : t_c_aduh_pll_ai) return natural; -- LVDS data width per ADU: two ADCs with one optional overflow bit
function func_aduh_pll_lvds_dat_w(ai : t_c_aduh_pll_ai) return natural; -- LVDS data width per ADUH: one or two ADUs
function func_aduh_pll_lvdsh_dat_w(ai : t_c_aduh_pll_ai) return natural; -- LVDS data width per LVDSH: dependent on whether one or two LVDS reference clocks are used
-
end aduh_pll_pkg;
package body aduh_pll_pkg is
@@ -81,5 +80,4 @@ package body aduh_pll_pkg is
-- 2 2 --> one LVDSH for ADU on AB and for ADU on CD --> 1 LVDSH
return func_aduh_pll_lvds_dat_w(ai) / ai.nof_clocks;
end;
-
end aduh_pll_pkg;
diff --git a/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd b/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
index 4b0f5a0cee..49ad5d9918 100644
--- a/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
@@ -144,5 +144,4 @@ begin
symbol_arr(I) <= in_data((g_nof_symbols_per_data - I) * g_symbol_w - 1 downto (g_nof_symbols_per_data - I - 1) * g_symbol_w);
prod_arr(I) <= prod_data((g_nof_symbols_per_data - I) * c_prod_w - 1 downto (g_nof_symbols_per_data - I - 1) * c_prod_w);
end generate;
-
end str;
diff --git a/libraries/io/aduh/src/vhdl/aduh_quad.vhd b/libraries/io/aduh/src/vhdl/aduh_quad.vhd
index 1d93bfab80..94fc94d36f 100644
--- a/libraries/io/aduh/src/vhdl/aduh_quad.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_quad.vhd
@@ -157,5 +157,4 @@ begin
verify_res_ack => aduh_verify_res_ack(I)
);
end generate;
-
end str;
diff --git a/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd b/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
index f048db7912..5c06807728 100644
--- a/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
@@ -530,5 +530,4 @@ begin
out_pulse => st_aduh_d_verify_res_ack
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_verify.vhd b/libraries/io/aduh/src/vhdl/aduh_verify.vhd
index b198cf47ac..25ca9ba1ab 100644
--- a/libraries/io/aduh/src/vhdl/aduh_verify.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_verify.vhd
@@ -239,5 +239,4 @@ begin
verify_res_ack => verify_res_ack
);
end generate;
-
end rtl;
diff --git a/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd b/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
index 5fe812727c..affcd5689e 100644
--- a/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
+++ b/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
@@ -375,5 +375,4 @@ begin
gen_big_endian : if g_rx_big_endian = true generate
rx_dat <= hton(rx_fifo_rd_dat, g_in_dat_w, g_rx_factor * g_dd_factor); -- rewire
end generate;
-
end str;
diff --git a/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd b/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
index e3407f76de..149fa420c6 100644
--- a/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
+++ b/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
@@ -118,5 +118,4 @@ begin
in_sosi => in_sosi_arr(I)
);
end generate;
-
end str;
diff --git a/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd b/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
index 628f882bf3..8240c5af17 100644
--- a/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
+++ b/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
@@ -305,5 +305,4 @@ begin
end process;
end generate; -- gen_verify
-
end tb;
diff --git a/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd b/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
index b7b98bd5c2..2f8b213d23 100644
--- a/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
+++ b/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
@@ -134,5 +134,4 @@ begin
-- Ensure previous dvr_done goes low after new dvr_en
dvr_done <= new_dvr_done and not dvr_en_busy;
end generate;
-
end str;
diff --git a/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd b/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
index 183bf84ac0..be4c5fab24 100644
--- a/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
+++ b/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
@@ -269,7 +269,6 @@ package ddr3_pkg is
mem_odt : in std_logic_vector(1 downto 0) := (others => 'X') -- mem_odt
);
end component alt_mem_if_ddr3_mem_model_top_ddr3_mem_if_dm_pins_en_mem_if_dqsn_en;
-
end ddr3_pkg;
package body ddr3_pkg is
diff --git a/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd b/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
index 0e1f4a2734..3761a8c141 100644
--- a/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
+++ b/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
@@ -687,5 +687,4 @@ begin
rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
);
end generate;
-
end str;
diff --git a/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd b/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
index 1e9df7d5db..be9b1b7615 100644
--- a/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
+++ b/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
@@ -64,7 +64,6 @@ entity eth_ip_offload_tx is
end eth_ip_offload_tx;
architecture str of eth_ip_offload_tx is
-
signal dp_offload_tx_src_out_arr : t_dp_sosi_arr(g_nof_streams - 1 downto 0) := (others => c_dp_sosi_rst);
signal dp_offload_tx_src_in_arr : t_dp_siso_arr(g_nof_streams - 1 downto 0) := (others => c_dp_siso_rdy);
signal dp_offload_tx_hdr_fields_out_arr : t_slv_1024_arr(g_nof_streams - 1 downto 0);
@@ -116,5 +115,4 @@ begin
hdr_fields_slv_in => dp_offload_tx_hdr_fields_out_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/io/eth/src/vhdl/eth_mm_registers.vhd b/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
index f2011b0274..555241b91c 100644
--- a/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
+++ b/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
@@ -298,5 +298,4 @@ begin
out_dat => mm_vec_status
);
end generate;
-
end str;
diff --git a/libraries/io/eth/src/vhdl/eth_pkg.vhd b/libraries/io/eth/src/vhdl/eth_pkg.vhd
index d7f2fe2b9b..85d18c2f60 100644
--- a/libraries/io/eth/src/vhdl/eth_pkg.vhd
+++ b/libraries/io/eth/src/vhdl/eth_pkg.vhd
@@ -217,7 +217,6 @@ package eth_pkg is
constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
constant c_eth_ram_addr_w : natural := ceil_log2(c_eth_ram_nof_words);
-
end eth_pkg;
package body eth_pkg is
@@ -348,5 +347,4 @@ package body eth_pkg is
v_reg( 0) := mm_reg.rx_avail; -- [0]
return v_reg;
end func_eth_mm_reg_status;
-
end eth_pkg;
diff --git a/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd b/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
index 7d83b02996..749cf886f7 100644
--- a/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
+++ b/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
@@ -135,7 +135,6 @@ package eth_tester_pkg is
-- Map packet header fields to t_eth_tester_header record
function func_eth_tester_map_header(hdr_fields_raw : std_logic_vector) return t_eth_tester_header;
-
end eth_tester_pkg;
package body eth_tester_pkg is
@@ -223,5 +222,4 @@ package body eth_tester_pkg is
v.app.dp_bsn := hdr_fields_raw(field_hi(c_eth_tester_hdr_field_arr, "dp_bsn") downto field_lo(c_eth_tester_hdr_field_arr, "dp_bsn"));
return v;
end func_eth_tester_map_header;
-
end eth_tester_pkg;
diff --git a/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd b/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
index b5075a71f6..9b07520970 100644
--- a/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
@@ -59,5 +59,4 @@ package body tb_eth_tester_pkg is
begin
return c_network_eth_preamble_len + func_eth_tester_eth_packet_length(block_len) + c_word_sz;
end func_eth_tester_eth_packet_on_link_length;
-
end tb_eth_tester_pkg;
diff --git a/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd b/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
index 2829040000..5bdd53e948 100644
--- a/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
+++ b/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
@@ -286,5 +286,4 @@ package body eth1g_mem_pkg is
wait until rising_edge(mm_clk);
end proc_tech_tse_setup;
-
end eth1g_mem_pkg;
diff --git a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
index 35261ba170..008ab87c72 100644
--- a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
+++ b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
@@ -193,5 +193,4 @@ begin
end process;
end generate;
-
end str;
diff --git a/libraries/io/i2c/src/vhdl/i2c_commander.vhd b/libraries/io/i2c/src/vhdl/i2c_commander.vhd
index 97c57a07b7..640b885207 100644
--- a/libraries/io/i2c/src/vhdl/i2c_commander.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_commander.vhd
@@ -327,5 +327,4 @@ begin
rd_val_b => open
);
end generate;
-
end str;
diff --git a/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd b/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
index 4048565c32..881589df78 100644
--- a/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
@@ -82,7 +82,6 @@ package i2c_commander_pkg is
c_i2c_cmdr_expected_x, c_i2c_cmdr_expected_x);
constant c_i2c_cmdr_mem_block_sz : natural := 1024; -- assign t_c_mem.nof_dat in blocks of 1024 = 1 M9K
-
end i2c_commander_pkg;
package body i2c_commander_pkg is
@@ -125,5 +124,4 @@ package body i2c_commander_pkg is
return b;
end if;
end;
-
end i2c_commander_pkg;
diff --git a/libraries/io/i2c/src/vhdl/i2c_pkg.vhd b/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
index 12105da3ca..3fcc5c1916 100644
--- a/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
@@ -65,7 +65,6 @@ package i2c_pkg is
-- Select functions
function func_i2c_sel_a_b(sel : boolean; a, b : t_c_i2c_mm) return t_c_i2c_mm;
function func_i2c_sel_a_b(sel : boolean; a, b : t_c_i2c_phy) return t_c_i2c_phy;
-
end i2c_pkg;
package body i2c_pkg is
diff --git a/libraries/io/mdio/src/vhdl/mdio_pkg.vhd b/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
index a684ac0bb7..b7c28a5b63 100644
--- a/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
+++ b/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
@@ -82,7 +82,6 @@ package mdio_pkg is
function mdio_hdr_adr(prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
function mdio_hdr_wr (prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
function mdio_hdr_rd (prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
-
end mdio_pkg;
package body mdio_pkg is
@@ -103,5 +102,4 @@ package body mdio_pkg is
begin
return c_mdio_phy_hdr_st & c_mdio_phy_hdr_op_rd & prtad & devad & c_mdio_phy_hdr_ta;
end;
-
end mdio_pkg;
diff --git a/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd b/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
index b7d28c1879..eae7012141 100644
--- a/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
+++ b/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
@@ -273,5 +273,4 @@ begin
out_new => open
);
end generate; -- gen_cross
-
end rtl;
diff --git a/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd b/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
index 85c4d7da12..239d898990 100644
--- a/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
+++ b/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
@@ -440,5 +440,4 @@ begin
out_sosi => src_out_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd b/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
index 080b2833fc..b10ba73826 100644
--- a/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
+++ b/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
@@ -349,5 +349,4 @@ begin
in_sosi_arr => demux_in_sosi_arr
);
end generate;
-
end str;
diff --git a/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd b/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
index 62aa54ca01..2691e8f518 100644
--- a/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
+++ b/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
@@ -170,5 +170,4 @@ begin
dout => rx_align_en(i)
);
end generate;
-
end rtl;
diff --git a/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd b/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
index a2423241e2..276fd46103 100644
--- a/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
+++ b/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
@@ -289,5 +289,4 @@ begin
end process;
end generate;
-
end wrap;
diff --git a/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd b/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
index b93a840b06..ad8c84b89a 100644
--- a/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
+++ b/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
@@ -236,5 +236,4 @@ begin
mdio_mdat_oen_arr => mdio_mdat_oen_arr
);
end generate;
-
end str;
diff --git a/libraries/technology/10gbase_r/sim_10gbase_r.vhd b/libraries/technology/10gbase_r/sim_10gbase_r.vhd
index 2c3e4959cf..84c43232ae 100644
--- a/libraries/technology/10gbase_r/sim_10gbase_r.vhd
+++ b/libraries/technology/10gbase_r/sim_10gbase_r.vhd
@@ -134,5 +134,4 @@ begin
rx_serial_in => rx_serial_arr(i)
);
end generate;
-
end str;
diff --git a/libraries/technology/10gbase_r/tech_10gbase_r.vhd b/libraries/technology/10gbase_r/tech_10gbase_r.vhd
index f2bfdc6e44..f8929cd9eb 100644
--- a/libraries/technology/10gbase_r/tech_10gbase_r.vhd
+++ b/libraries/technology/10gbase_r/tech_10gbase_r.vhd
@@ -121,5 +121,4 @@ begin
xgmii_tx_ready_arr, xgmii_rx_ready_arr, xgmii_tx_dc_arr, xgmii_rx_dc_arr,
tx_serial_arr, rx_serial_arr);
end generate;
-
end str;
diff --git a/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd b/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
index 1f561f3d1e..89032626f7 100644
--- a/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
+++ b/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
@@ -1712,5 +1712,4 @@ package tech_10gbase_r_component_pkg is
tx_ready : out std_logic_vector(47 downto 0) -- tx_ready.tx_ready
);
end component;
-
end tech_10gbase_r_component_pkg;
diff --git a/libraries/technology/clkbuf/tech_clkbuf.vhd b/libraries/technology/clkbuf/tech_clkbuf.vhd
index ccb8eb551d..57be1f2d96 100644
--- a/libraries/technology/clkbuf/tech_clkbuf.vhd
+++ b/libraries/technology/clkbuf/tech_clkbuf.vhd
@@ -91,5 +91,4 @@ begin
outclk => outclk -- outclk
);
end generate;
-
end architecture;
diff --git a/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd b/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
index 11debb90e4..f3dfb61dc9 100644
--- a/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
+++ b/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
@@ -68,5 +68,4 @@ package tech_clkbuf_component_pkg is
outclk : out std_logic -- altclkctrl_output.outclk
);
end component;
-
end tech_clkbuf_component_pkg;
diff --git a/libraries/technology/ddr/tech_ddr.vhd b/libraries/technology/ddr/tech_ddr.vhd
index e15ba40ef6..eec83d58d2 100644
--- a/libraries/technology/ddr/tech_ddr.vhd
+++ b/libraries/technology/ddr/tech_ddr.vhd
@@ -144,5 +144,4 @@ begin
ctlr_miso => ctlr_miso
);
end generate;
-
end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10.vhd b/libraries/technology/ddr/tech_ddr_arria10.vhd
index 0bf13a950e..3d80a2d33a 100644
--- a/libraries/technology/ddr/tech_ddr_arria10.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10.vhd
@@ -194,5 +194,4 @@ begin
ctlr_miso.cal_ok <= local_cal_success;
ctlr_miso.cal_fail <= local_cal_fail;
end generate;
-
end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd b/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
index ab1bb6058e..4882ce292b 100644
--- a/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
@@ -299,5 +299,4 @@ begin
ctlr_miso.cal_ok <= local_cal_success;
ctlr_miso.cal_fail <= local_cal_fail;
end generate;
-
end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd b/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
index c7dd3c97dc..c8c331966b 100644
--- a/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
@@ -247,5 +247,4 @@ begin
ctlr_miso.cal_ok <= local_cal_success;
ctlr_miso.cal_fail <= local_cal_fail;
end generate;
-
end str;
diff --git a/libraries/technology/ddr/tech_ddr_component_pkg.vhd b/libraries/technology/ddr/tech_ddr_component_pkg.vhd
index 7679e60118..060408ceab 100644
--- a/libraries/technology/ddr/tech_ddr_component_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_component_pkg.vhd
@@ -789,7 +789,6 @@ package tech_ddr_component_pkg is
local_cal_fail : out std_logic -- .local_cal_fail
);
end component;
-
end tech_ddr_component_pkg;
package body tech_ddr_component_pkg is
diff --git a/libraries/technology/ddr/tech_ddr_mem_model.vhd b/libraries/technology/ddr/tech_ddr_mem_model.vhd
index dcdb187b78..a5e380e62d 100644
--- a/libraries/technology/ddr/tech_ddr_mem_model.vhd
+++ b/libraries/technology/ddr/tech_ddr_mem_model.vhd
@@ -130,5 +130,4 @@ begin
mem_dbi_n => mem4_io.dbi_n(g_tech_ddr.dbi_w - 1 downto 0) -- .mem_dbi_n
);
end generate;
-
end str;
diff --git a/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd b/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
index 1b8b5d4acd..fc24a54604 100644
--- a/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
@@ -106,7 +106,6 @@ package tech_ddr_mem_model_component_pkg is
mem_dbi_n : inout std_logic_vector(8 downto 0) := (others => '0') -- .mem_dbi_n
);
end component ed_sim_altera_emif_mem_model_141_z3tvrmq;
-
end tech_ddr_mem_model_component_pkg;
package body tech_ddr_mem_model_component_pkg is
diff --git a/libraries/technology/ddr/tech_ddr_pkg.vhd b/libraries/technology/ddr/tech_ddr_pkg.vhd
index 8dd9f402e4..0fe623e8c3 100644
--- a/libraries/technology/ddr/tech_ddr_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_pkg.vhd
@@ -199,7 +199,6 @@ package tech_ddr_pkg is
constant c_tech_ddr4_phy_in_x : t_tech_ddr4_phy_in := ('X', 'X');
constant c_tech_ddr3_phy_ou_x : t_tech_ddr3_phy_ou := ((others => 'X'), (others => 'X'), (others => 'X'), 'X', 'X', 'X', 'X', (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'));
constant c_tech_ddr4_phy_ou_x : t_tech_ddr4_phy_ou := ((others => 'X'), (others => 'X'), (others => 'X'), 'X', 'X', 'X', (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'));
-
end tech_ddr_pkg;
package body tech_ddr_pkg is
diff --git a/libraries/technology/eth_10g/tech_eth_10g.vhd b/libraries/technology/eth_10g/tech_eth_10g.vhd
index fa7502cef3..2500c10034 100644
--- a/libraries/technology/eth_10g/tech_eth_10g.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g.vhd
@@ -352,5 +352,4 @@ begin
serial_rx_arr => serial_rx_arr
);
end generate;
-
end str;
diff --git a/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd b/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
index 0ccadb8a9b..8ec34d5ec1 100644
--- a/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
@@ -89,5 +89,4 @@ begin
eth_rx_clk_arr <= (others => tr_ref_clk_156);
eth_rx_rst_arr <= (others => tr_ref_rst_156);
end generate;
-
end str;
diff --git a/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd b/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
index 072c427e9c..2f49dba588 100644
--- a/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
@@ -265,7 +265,6 @@ package tech_eth_10g_component_pkg is
serial_rx_arr : in std_logic_vector(g_nof_channels - 1 downto 0)
);
end component;
-
end tech_eth_10g_component_pkg;
package body tech_eth_10g_component_pkg is
diff --git a/libraries/technology/fifo/tech_fifo_component_pkg.vhd b/libraries/technology/fifo/tech_fifo_component_pkg.vhd
index f51dcd474a..ef4f312e77 100644
--- a/libraries/technology/fifo/tech_fifo_component_pkg.vhd
+++ b/libraries/technology/fifo/tech_fifo_component_pkg.vhd
@@ -479,5 +479,4 @@ package tech_fifo_component_pkg is
wrusedw : out std_logic_vector(tech_ceil_log2(g_nof_words) - 1 downto 0)
);
end component;
-
end tech_fifo_component_pkg;
diff --git a/libraries/technology/fifo/tech_fifo_dc.vhd b/libraries/technology/fifo/tech_fifo_dc.vhd
index 3e0b47b77a..3b6464c795 100644
--- a/libraries/technology/fifo/tech_fifo_dc.vhd
+++ b/libraries/technology/fifo/tech_fifo_dc.vhd
@@ -101,5 +101,4 @@ begin
generic map (g_use_eab, g_dat_w, g_nof_words)
port map (aclr, data, rdclk, rdreq, wrclk, wrreq, q, rdempty, rdusedw, wrfull, wrusedw);
end generate;
-
end architecture;
diff --git a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
index 4c1650dbbb..29c9db6617 100644
--- a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
+++ b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
@@ -101,5 +101,4 @@ begin
generic map (g_nof_words, g_wrdat_w, g_rddat_w)
port map (aclr, data, rdclk, rdreq, wrclk, wrreq, q, rdempty, rdusedw, wrfull, wrusedw);
end generate;
-
end architecture;
diff --git a/libraries/technology/fifo/tech_fifo_sc.vhd b/libraries/technology/fifo/tech_fifo_sc.vhd
index 6897036255..cce89b8e33 100644
--- a/libraries/technology/fifo/tech_fifo_sc.vhd
+++ b/libraries/technology/fifo/tech_fifo_sc.vhd
@@ -99,5 +99,4 @@ begin
generic map (g_use_eab, g_dat_w, g_nof_words)
port map (aclr, clock, data, rdreq, wrreq, empty, full, q, usedw);
end generate;
-
end architecture;
diff --git a/libraries/technology/flash/tech_flash_asmi_parallel.vhd b/libraries/technology/flash/tech_flash_asmi_parallel.vhd
index 536e905748..d75d30b6be 100644
--- a/libraries/technology/flash/tech_flash_asmi_parallel.vhd
+++ b/libraries/technology/flash/tech_flash_asmi_parallel.vhd
@@ -91,5 +91,4 @@ begin
u0 : ip_arria10_e2sg_asmi_parallel
port map (addr, clkin, datain, rden, read, sector_erase, shift_bytes, wren, write, busy, data_valid, dataout, illegal_erase, illegal_write, reset, sce, en4b_addr);
end generate;
-
end architecture;
diff --git a/libraries/technology/flash/tech_flash_component_pkg.vhd b/libraries/technology/flash/tech_flash_component_pkg.vhd
index 2ae3ba18db..976aba0dbc 100644
--- a/libraries/technology/flash/tech_flash_component_pkg.vhd
+++ b/libraries/technology/flash/tech_flash_component_pkg.vhd
@@ -236,7 +236,6 @@ package tech_flash_component_pkg is
function tech_flash_addr_w( technology: in integer ) return integer;
function tech_flash_data_w( technology: in integer ) return integer;
-
end tech_flash_component_pkg;
package body tech_flash_component_pkg is
@@ -266,5 +265,4 @@ package body tech_flash_component_pkg is
return 32;
end if;
end;
-
end tech_flash_component_pkg;
diff --git a/libraries/technology/flash/tech_flash_remote_update.vhd b/libraries/technology/flash/tech_flash_remote_update.vhd
index cb34558976..cae20c4de1 100644
--- a/libraries/technology/flash/tech_flash_remote_update.vhd
+++ b/libraries/technology/flash/tech_flash_remote_update.vhd
@@ -81,5 +81,4 @@ begin
u0 : ip_arria10_e2sg_remote_update
port map (clock, data_in, param, read_param, reconfig, reset, reset_timer, write_param, busy, data_out);
end generate;
-
end architecture;
diff --git a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
index e74880e3f0..f29468a377 100644
--- a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
+++ b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
@@ -85,5 +85,4 @@ begin
eoc => eoc -- eoc.eoc
);
end generate;
-
end architecture;
diff --git a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
index a0e8f9dc4b..c05de28fae 100644
--- a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
+++ b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
@@ -60,5 +60,4 @@ package tech_fpga_temp_sens_component_pkg is
tempout : out std_logic_vector(9 downto 0) -- tempout.tempout
);
end component;
-
end tech_fpga_temp_sens_component_pkg;
diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
index c7c5df214a..35fbeb242e 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
@@ -129,5 +129,4 @@ begin
sample_store_irq_irq => sample_store_irq_irq
);
end generate;
-
end architecture;
diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
index 4ee6ff807f..d3b428431b 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
@@ -96,5 +96,4 @@ package tech_fpga_voltage_sens_component_pkg is
sample_store_irq_irq : out std_logic
);
end component;
-
end tech_fpga_voltage_sens_component_pkg;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
index 6e10478041..15af634a1e 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
@@ -103,5 +103,4 @@ begin
pll_refclk0 => inclk0 -- pll_refclk0.clk
);
end generate;
-
end architecture;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
index b19d46e414..4cdd2c061c 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
@@ -98,5 +98,4 @@ begin
pll_refclk0 => inclk0 -- pll_refclk0.clk
);
end generate;
-
end architecture;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
index 1509727610..f1149a7db0 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
@@ -148,5 +148,4 @@ package tech_fractional_pll_component_pkg is
pll_refclk0 : in std_logic := '0' -- pll_refclk0.clk
);
end component;
-
end tech_fractional_pll_component_pkg;
diff --git a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
index f27b9fa335..1bf902e943 100644
--- a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
@@ -220,5 +220,4 @@ package tech_iobuf_component_pkg is
out_dat : out std_logic_vector(g_width - 1 downto 0)
);
end component;
-
end tech_iobuf_component_pkg;
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
index 94052b7b22..982ca32177 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
@@ -87,5 +87,4 @@ begin
generic map (g_width)
port map (in_dat, in_clk, in_clk_en, rst, out_dat_hi, out_dat_lo);
end generate;
-
end architecture;
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
index 865cda78c2..7c592e557d 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
@@ -87,5 +87,4 @@ begin
generic map (g_width)
port map (rst, in_clk, in_clk_en, in_dat_hi, in_dat_lo, out_dat);
end generate;
-
end architecture;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
index c4015c6c14..c74e652290 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
@@ -65,5 +65,4 @@ begin
dataout_l => out_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
index 4ed587d771..3f805a6bb8 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
@@ -65,5 +65,4 @@ begin
datain_l => in_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd b/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
index 52d7642037..c76bbb7ab3 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
@@ -35,7 +35,6 @@
-- Reference:
-- Copied from ip_arria10_e2sg/ddio/sim/ip_arria10_e2sg_ddio_out_1.vhd
-
library IEEE;
use IEEE.std_logic_1164.all;
diff --git a/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd b/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
index 1a5687f712..a5b8596f25 100644
--- a/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
+++ b/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
@@ -118,5 +118,4 @@ begin
-- out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
-- RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
end generate;
-
end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
index b4abedfa52..404edfb6b6 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
@@ -159,5 +159,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
index 26b844c14b..73342ddfb0 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
@@ -139,5 +139,4 @@ begin
wren_a => wren,
q_b => q
);
-
end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
index 7bc85bf4a1..2024e3de75 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
@@ -155,5 +155,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
index bcbe6a9e1b..b0110c61d5 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
@@ -193,5 +193,4 @@ begin
q_a <= out_a when g_rd_latency = 1 else reg_a;
q_b <= out_b when g_rd_latency = 1 else reg_b;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
index b39f324843..568dfc1930 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
@@ -71,4 +71,5 @@ begin
q <= ram(raddr);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
index 495fb1624c..3c19ef88b7 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
@@ -81,4 +81,5 @@ begin
q_b <= ram(addr_b);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd b/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
index 3e33a817c1..916dc7624e 100644
--- a/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
+++ b/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
@@ -51,7 +51,6 @@ package ip_agi027_1e1v_reset_release_component_pkg is
ninit_done : out std_logic -- reset
);
end component ip_agi027_1e1v_reset_release_ri;
-
end ip_agi027_1e1v_reset_release_component_pkg;
package body ip_agi027_1e1v_reset_release_component_pkg is
diff --git a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
index 7f7d4131f3..49ddbaeb14 100644
--- a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
+++ b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
dataout_l => out_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
index 6b0f88ced4..9b69ab584d 100644
--- a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
+++ b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
datain_l => in_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd b/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
index 51fe57d1d2..c5bb0035b5 100644
--- a/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
+++ b/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
@@ -68,5 +68,4 @@ begin
-- out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
-- RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
index 4b51cd15a0..aae0526f13 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
index 2b65b1aa03..0623c7ea71 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
q_a <= out_a when g_rd_latency = 1 else reg_a;
q_b <= out_b when g_rd_latency = 1 else reg_b;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
index 0880d2e81b..b661c825c2 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
index 206e76f7b0..54c278c219 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
q <= ram(raddr);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
index dcccc9b1c8..86d1e2d797 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
dataout_l => out_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
index 5d100fa091..766cb7f599 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
datain_l => in_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
index 34caad0fcf..cd5e892a75 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
@@ -85,7 +85,6 @@ package ip_arria10_e1sg_jesd204b_component_pkg is
txphy_clk : out std_logic_vector(0 downto 0) -- export
);
end component ip_arria10_e1sg_jesd204b_tx;
-
end ip_arria10_e1sg_jesd204b_component_pkg;
package body ip_arria10_e1sg_jesd204b_component_pkg is
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
index 604b4da043..a39c8c4058 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
index 3335b480bb..00a9c179e4 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
q_a <= out_a when g_rd_latency = 1 else reg_a;
q_b <= out_b when g_rd_latency = 1 else reg_b;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
index 6cf10c4b34..b1f010f12a 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
index dba8bb6afd..cd90cf167e 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
q <= ram(raddr);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
index e5221f4af8..0ff20b83ee 100644
--- a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
dataout_l => out_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
index 6fcc0779f8..c90d0e29a9 100644
--- a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
datain_l => in_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd b/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
index 7cff7179c5..eea584ea32 100644
--- a/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
+++ b/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
@@ -85,7 +85,6 @@ package ip_arria10_e2sg_jesd204b_component_pkg is
txphy_clk : out std_logic_vector(0 downto 0) -- export
);
end component ip_arria10_e2sg_jesd204b_tx;
-
end ip_arria10_e2sg_jesd204b_component_pkg;
package body ip_arria10_e2sg_jesd204b_component_pkg is
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
index 97ef59ff32..1c729b5a1f 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
@@ -154,5 +154,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
index 5502afa475..8d7ed900e9 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
@@ -184,5 +184,4 @@ begin
q_a <= out_a when g_rd_latency = 1 else reg_a;
q_b <= out_b when g_rd_latency = 1 else reg_b;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
index 1f3461d27e..5f5c45d246 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
index 6e789dafdc..558506ca8d 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
q <= ram(raddr);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
index f28811cdb5..ae02492772 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
dataout_l => out_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
index 867d32d4f7..ee9e08858b 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
datain_l => in_dat_lo(I downto I)
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
index a368487576..0ef9b7ea3f 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
index 4b5fe63107..9ee98ecdf2 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
q_a <= out_a when g_rd_latency = 1 else reg_a;
q_b <= out_b when g_rd_latency = 1 else reg_b;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
index 7df895809e..c428676d10 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
q <= out_q when g_rd_latency = 1 else reg_q;
end generate;
-
end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
index 237904b7e1..d21f7ee0a7 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
q <= ram(raddr);
end if;
end process;
+
end rtl;
diff --git a/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd b/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
index 973b6aa1e3..75b9bf1ecb 100644
--- a/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
+++ b/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
@@ -62,5 +62,4 @@ begin
-- out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
-- RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
end generate;
-
end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
index 5f8e3b1467..b8f52dc191 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
@@ -70,5 +70,4 @@ begin
reconfig_togxb => reconfig_togxb
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
index 29a174453d..a02b968a89 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
@@ -60,5 +60,4 @@ begin
reconfig_togxb => reconfig_togxb
);
end generate;
-
end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
index e89b3a2ad5..62f27835ef 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
@@ -79,5 +79,4 @@ begin
reconfig_togxb => reconfig_togxb
);
end generate;
-
end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b.vhd b/libraries/technology/jesd204b/tech_jesd204b.vhd
index 391c8cae96..bdb9a2cdb5 100644
--- a/libraries/technology/jesd204b/tech_jesd204b.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b.vhd
@@ -159,5 +159,4 @@ begin
serial_rx_arr => serial_rx_arr
);
end generate;
-
end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
index 9cbe9ea812..3f6456a0a1 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
@@ -299,7 +299,6 @@ package tech_jesd204b_component_pkg is
txphy_clk : out std_logic_vector(0 downto 0) -- export
);
end component;
-
end tech_jesd204b_component_pkg;
package body tech_jesd204b_component_pkg is
diff --git a/libraries/technology/jesd204b/tech_jesd204b_tx.vhd b/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
index 49102c5745..e3f634e00f 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
@@ -203,5 +203,4 @@ begin
txphy_clk => txphy_clk
);
end generate;
-
end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b_v2.vhd b/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
index f11c2502b5..256043492d 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
@@ -158,5 +158,4 @@ begin
serial_rx_arr => serial_rx_arr
);
end generate;
-
end str;
diff --git a/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd b/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
index 9ce4e04586..40274bb238 100644
--- a/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
+++ b/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
@@ -456,5 +456,4 @@ package body tb_tech_mac_10g_pkg is
-- No verify on CRC32 word
end if;
end proc_tech_mac_10g_rx_packet;
-
end tb_tech_mac_10g_pkg;
diff --git a/libraries/technology/mac_10g/tech_mac_10g.vhd b/libraries/technology/mac_10g/tech_mac_10g.vhd
index a7c3f4dd4d..735d9dda09 100644
--- a/libraries/technology/mac_10g/tech_mac_10g.vhd
+++ b/libraries/technology/mac_10g/tech_mac_10g.vhd
@@ -288,5 +288,4 @@ begin
rx_mac_src_in_rl1 <= rx_src_in;
rx_src_out <= rx_mac_src_out_rl1;
end generate;
-
end str;
diff --git a/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd b/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
index ecb02ffc50..00625da3d2 100644
--- a/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
+++ b/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
@@ -288,7 +288,6 @@ package tech_mac_10g_component_pkg is
unidirectional_remote_fault_dis : out std_logic -- .remote_fault_dis
);
end component;
-
end tech_mac_10g_component_pkg;
package body tech_mac_10g_component_pkg is
@@ -306,5 +305,4 @@ package body tech_mac_10g_component_pkg is
return v_csr_addr_w;
end func_tech_mac_10g_csr_addr_w;
-
end tech_mac_10g_component_pkg;
diff --git a/libraries/technology/memory/tech_memory_component_pkg.vhd b/libraries/technology/memory/tech_memory_component_pkg.vhd
index a27bee7d75..2d76554f22 100644
--- a/libraries/technology/memory/tech_memory_component_pkg.vhd
+++ b/libraries/technology/memory/tech_memory_component_pkg.vhd
@@ -657,5 +657,4 @@ package tech_memory_component_pkg is
q : out std_logic_vector(g_dat_w - 1 downto 0)
);
end component;
-
end tech_memory_component_pkg;
diff --git a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
index cfa113d9d2..fa937daef0 100644
--- a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
@@ -102,5 +102,4 @@ begin
generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
port map (data, rdaddress, rdclock, wraddress, wrclock, wren, q);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_crk_cw.vhd b/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
index 619b49a2f7..770b511aa8 100644
--- a/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
@@ -111,5 +111,4 @@ begin
generic map (g_wr_adr_w, g_wr_dat_w, g_wr_nof_words, g_rd_adr_w, g_rd_dat_w, g_rd_nof_words, g_rd_latency, g_init_file)
port map (data, wraddress, wrclock, wren, rdaddress, rdclock, q);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
index a9dcdd53ce..0acf8beaac 100644
--- a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
@@ -115,6 +115,5 @@ begin
generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
port map (address_a, address_b, clock_b, data_a, data_b, wren_a, wren_b, q_a, q_b);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
index 718288e798..36060d38cc 100644
--- a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
@@ -112,5 +112,4 @@ begin
generic map (false, g_adr_b_w, g_dat_b_w, g_nof_words_b, g_rd_latency, g_init_file)
port map (address_a, address_b, clock_b, data_a, data_b, wren_a, wren_b, q_a, q_b);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_r_w.vhd b/libraries/technology/memory/tech_memory_ram_r_w.vhd
index 5ded93400f..72cf69ff37 100644
--- a/libraries/technology/memory/tech_memory_ram_r_w.vhd
+++ b/libraries/technology/memory/tech_memory_ram_r_w.vhd
@@ -92,5 +92,4 @@ begin
generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
port map (clock, data, rdaddress, wraddress, wren, q);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_rw_rw.vhd b/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
index 9302e21221..c1d1e8e796 100644
--- a/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
@@ -116,5 +116,4 @@ begin
generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
port map (address_a, address_b, clock, data_a, data_b, wren_a, wren_b, q_a, q_b);
end generate;
-
end architecture;
diff --git a/libraries/technology/memory/tech_memory_rom_r.vhd b/libraries/technology/memory/tech_memory_rom_r.vhd
index 5abfbe9594..7dd91ff5d7 100644
--- a/libraries/technology/memory/tech_memory_rom_r.vhd
+++ b/libraries/technology/memory/tech_memory_rom_r.vhd
@@ -128,5 +128,4 @@ begin
q => q
);
end generate;
-
end architecture;
diff --git a/libraries/technology/mult/tech_complex_mult.vhd b/libraries/technology/mult/tech_complex_mult.vhd
index a8f3d9d98e..8908b47849 100644
--- a/libraries/technology/mult/tech_complex_mult.vhd
+++ b/libraries/technology/mult/tech_complex_mult.vhd
@@ -459,5 +459,4 @@ begin
result_im => result_im
);
end generate;
-
end str;
diff --git a/libraries/technology/mult/tech_mult.vhd b/libraries/technology/mult/tech_mult.vhd
index 59e430028a..b013e9df5c 100644
--- a/libraries/technology/mult/tech_mult.vhd
+++ b/libraries/technology/mult/tech_mult.vhd
@@ -197,5 +197,4 @@ begin
out_p((I + 1) * g_out_p_w - 1 downto I * g_out_p_w) <= RESIZE_SVEC(prod((I + 1) * c_prod_w - 1 downto I * c_prod_w), g_out_p_w) when g_representation = "SIGNED" else
RESIZE_UVEC(prod((I + 1) * c_prod_w - 1 downto I * c_prod_w), g_out_p_w);
end generate;
-
end str;
diff --git a/libraries/technology/mult/tech_mult_add2.vhd b/libraries/technology/mult/tech_mult_add2.vhd
index 765e0f494f..51c2738c5e 100644
--- a/libraries/technology/mult/tech_mult_add2.vhd
+++ b/libraries/technology/mult/tech_mult_add2.vhd
@@ -156,5 +156,4 @@ begin
res => res
);
end generate;
-
end str;
diff --git a/libraries/technology/mult/tech_mult_add4.vhd b/libraries/technology/mult/tech_mult_add4.vhd
index ca992cf6d8..d3dd726e42 100644
--- a/libraries/technology/mult/tech_mult_add4.vhd
+++ b/libraries/technology/mult/tech_mult_add4.vhd
@@ -193,5 +193,4 @@ begin
res => res
);
end generate;
-
end str;
diff --git a/libraries/technology/mult/tech_mult_component_pkg.vhd b/libraries/technology/mult/tech_mult_component_pkg.vhd
index 954b181948..3443005628 100644
--- a/libraries/technology/mult/tech_mult_component_pkg.vhd
+++ b/libraries/technology/mult/tech_mult_component_pkg.vhd
@@ -548,7 +548,6 @@ package tech_mult_component_pkg is
);
end component;
-
component ip_agi027_1e1v_complex_mult_rtl is
generic (
g_in_a_w : positive := 18;
@@ -624,5 +623,4 @@ package tech_mult_component_pkg is
result_imag : out std_logic_vector(53 downto 0) -- .result_imag
);
end component;
-
end tech_mult_component_pkg;
diff --git a/libraries/technology/mult/tech_mult_pkg.vhd b/libraries/technology/mult/tech_mult_pkg.vhd
index a26f14d800..40e55aa845 100644
--- a/libraries/technology/mult/tech_mult_pkg.vhd
+++ b/libraries/technology/mult/tech_mult_pkg.vhd
@@ -39,5 +39,4 @@ package tech_mult_pkg is
constant c_tech_mult_arria10_ip : t_c_tech_mult_variant := (" IP", true);
constant c_tech_mult_agi027_1e1v_rtl : t_c_tech_mult_variant := ("RTL", false);
constant c_tech_mult_agi027_1e1v_ip : t_c_tech_mult_variant := (" IP", true);
-
end tech_mult_pkg;
diff --git a/libraries/technology/pll/tech_pll_clk125.vhd b/libraries/technology/pll/tech_pll_clk125.vhd
index 674c4fdd68..ec71302260 100644
--- a/libraries/technology/pll/tech_pll_clk125.vhd
+++ b/libraries/technology/pll/tech_pll_clk125.vhd
@@ -99,5 +99,4 @@ begin
locked => locked
);
end generate;
-
end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk200.vhd b/libraries/technology/pll/tech_pll_clk200.vhd
index 015ec5d606..2eb0bee13e 100644
--- a/libraries/technology/pll/tech_pll_clk200.vhd
+++ b/libraries/technology/pll/tech_pll_clk200.vhd
@@ -104,5 +104,4 @@ begin
locked => locked
);
end generate;
-
end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk200_p6.vhd b/libraries/technology/pll/tech_pll_clk200_p6.vhd
index cecd550a40..80ef6903fb 100644
--- a/libraries/technology/pll/tech_pll_clk200_p6.vhd
+++ b/libraries/technology/pll/tech_pll_clk200_p6.vhd
@@ -81,5 +81,4 @@ begin
g_clk1_phase_shift, g_clk2_phase_shift, g_clk3_phase_shift, g_clk4_phase_shift, g_clk5_phase_shift, g_clk6_phase_shift)
port map (areset, inclk0, c0, c1, c2, c3, c4, c5, c6, locked);
end generate;
-
end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk25.vhd b/libraries/technology/pll/tech_pll_clk25.vhd
index 1bc410bbd6..a7c6687aeb 100644
--- a/libraries/technology/pll/tech_pll_clk25.vhd
+++ b/libraries/technology/pll/tech_pll_clk25.vhd
@@ -115,5 +115,4 @@ begin
locked => locked
);
end generate;
-
end architecture;
diff --git a/libraries/technology/pll/tech_pll_component_pkg.vhd b/libraries/technology/pll/tech_pll_component_pkg.vhd
index 7cbbb3c3b4..a34264fedc 100644
--- a/libraries/technology/pll/tech_pll_component_pkg.vhd
+++ b/libraries/technology/pll/tech_pll_component_pkg.vhd
@@ -333,5 +333,4 @@ package tech_pll_component_pkg is
locked : out std_logic
);
end component;
-
end tech_pll_component_pkg;
diff --git a/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd b/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
index 3508161b1c..c87200816b 100644
--- a/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
@@ -208,5 +208,4 @@ package tech_transceiver_component_pkg is
------------------------------------------------------------------------------
-- ip_arria10
------------------------------------------------------------------------------
-
end tech_transceiver_component_pkg;
diff --git a/libraries/technology/transceiver/tech_transceiver_gx.vhd b/libraries/technology/transceiver/tech_transceiver_gx.vhd
index 88b4ca2fd7..9311758923 100644
--- a/libraries/technology/transceiver/tech_transceiver_gx.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_gx.vhd
@@ -72,5 +72,4 @@ begin
generic map (g_data_w, g_nof_gx, g_mbps, g_sim, g_tx, g_rx)
port map (cal_rec_clk, tr_clk, rx_clk, rx_rst, rx_sosi_arr, rx_siso_arr, tx_clk, tx_rst, tx_sosi_arr, tx_siso_arr, rx_datain, tx_dataout, tx_state, tx_align_en, rx_state, rx_align_en);
end generate;
-
end str;
diff --git a/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd b/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
index ae67ed7816..0e65b86849 100644
--- a/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
@@ -147,5 +147,4 @@ begin
dout => trc_rx_freq_locked(i)
);
end generate;
-
end rtl;
diff --git a/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd b/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
index 73c37e36cb..943635833c 100644
--- a/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
@@ -131,5 +131,4 @@ begin
dout => trc_tx_pll_locked(i)
);
end generate;
-
end rtl;
diff --git a/libraries/technology/tse/tb_tech_tse_pkg.vhd b/libraries/technology/tse/tb_tech_tse_pkg.vhd
index 910d8e34cd..8b6cefa92a 100644
--- a/libraries/technology/tse/tb_tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tb_tech_tse_pkg.vhd
@@ -483,5 +483,4 @@ package body tb_tech_tse_pkg is
end if;
-- No verify on CRC32 word
end proc_tech_tse_rx_packet;
-
end tb_tech_tse_pkg;
diff --git a/libraries/technology/tse/tech_tse.vhd b/libraries/technology/tse/tech_tse.vhd
index a845de8a8e..62ca2e3c6d 100644
--- a/libraries/technology/tse/tech_tse.vhd
+++ b/libraries/technology/tse/tech_tse.vhd
@@ -198,5 +198,4 @@ begin
eth_txp, eth_rxp,
tse_led);
end generate;
-
end architecture;
diff --git a/libraries/technology/tse/tech_tse_arria10.vhd b/libraries/technology/tse/tech_tse_arria10.vhd
index 31c266d5de..f9f2e050fa 100644
--- a/libraries/technology/tse/tech_tse_arria10.vhd
+++ b/libraries/technology/tse/tech_tse_arria10.vhd
@@ -245,5 +245,4 @@ begin
rx_is_lockedtodata => open -- : out std_logic_vector(0 downto 0) -- rx_is_lockedtodata.rx_is_lockedtodata
);
end generate;
-
end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e1sg.vhd b/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
index 0444f9b47b..dd959d7599 100644
--- a/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
@@ -245,5 +245,4 @@ begin
rx_is_lockedtodata => open -- : out std_logic_vector(0 downto 0) -- rx_is_lockedtodata.rx_is_lockedtodata
);
end generate;
-
end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e2sg.vhd b/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
index 1148791554..6987798c36 100644
--- a/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
@@ -245,5 +245,4 @@ begin
rx_is_lockedtodata => open -- : out std_logic_vector(0 downto 0) -- rx_is_lockedtodata.rx_is_lockedtodata
);
end generate;
-
end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd b/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
index acc32ee589..5c8a586e8d 100644
--- a/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
@@ -245,5 +245,4 @@ begin
rx_is_lockedtodata => open -- : out std_logic_vector(0 downto 0) -- rx_is_lockedtodata.rx_is_lockedtodata
);
end generate;
-
end str;
diff --git a/libraries/technology/tse/tech_tse_component_pkg.vhd b/libraries/technology/tse/tech_tse_component_pkg.vhd
index 7a2360d23e..253f31679b 100644
--- a/libraries/technology/tse/tech_tse_component_pkg.vhd
+++ b/libraries/technology/tse/tech_tse_component_pkg.vhd
@@ -606,5 +606,4 @@ package tech_tse_component_pkg is
tx_serial_clk : in std_logic_vector(0 downto 0) := (others => '0') -- tx_serial_clk.clk
);
end component;
-
end tech_tse_component_pkg;
diff --git a/libraries/technology/tse/tech_tse_pkg.vhd b/libraries/technology/tse/tech_tse_pkg.vhd
index a38b153de7..a12f1e6a3a 100644
--- a/libraries/technology/tse/tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tech_tse_pkg.vhd
@@ -82,7 +82,6 @@ package tech_tse_pkg is
end record;
function func_tech_tse_map_pcs_addr(pcs_addr : natural) return natural;
-
end tech_tse_pkg;
package body tech_tse_pkg is
@@ -90,5 +89,4 @@ function func_tech_tse_map_pcs_addr(pcs_addr : natural) return natural is
begin
return pcs_addr * 2 + c_tech_tse_byte_addr_pcs_offset;
end func_tech_tse_map_pcs_addr;
-
end tech_tse_pkg;
diff --git a/libraries/technology/tse/tech_tse_stratixiv.vhd b/libraries/technology/tse/tech_tse_stratixiv.vhd
index f94abe46c8..74c60d529d 100644
--- a/libraries/technology/tse/tech_tse_stratixiv.vhd
+++ b/libraries/technology/tse/tech_tse_stratixiv.vhd
@@ -256,5 +256,4 @@ begin
reconfig_togxb => reconfig_togxb
);
end generate;
-
end str;
diff --git a/libraries/technology/xaui/tech_xaui.vhd b/libraries/technology/xaui/tech_xaui.vhd
index 037de428a0..19f3db32c2 100644
--- a/libraries/technology/xaui/tech_xaui.vhd
+++ b/libraries/technology/xaui/tech_xaui.vhd
@@ -90,5 +90,4 @@ begin
xgmii_tx_dc_arr, xgmii_rx_dc_arr,
xaui_tx_arr, xaui_rx_arr);
end generate;
-
end str;
diff --git a/libraries/technology/xaui/tech_xaui_component_pkg.vhd b/libraries/technology/xaui/tech_xaui_component_pkg.vhd
index c41813e964..97381f2a97 100644
--- a/libraries/technology/xaui/tech_xaui_component_pkg.vhd
+++ b/libraries/technology/xaui/tech_xaui_component_pkg.vhd
@@ -232,7 +232,6 @@ package tech_xaui_component_pkg is
reconfig_togxb : out std_logic_vector(g_togxb_bus_w - 1 downto 0)
);
end component;
-
end tech_xaui_component_pkg;
package body tech_xaui_component_pkg is
@@ -244,5 +243,4 @@ package body tech_xaui_component_pkg is
end case;
end;
-
end tech_xaui_component_pkg;
--
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