diff --git a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
index b4069cd55e894f35425bc864e9ccead2124b2f93..51ba8e9fbc7dbcb809306889733e6cdfdfa998fc 100644
--- a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
+++ b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage(str).vhd
@@ -181,5 +181,4 @@ begin
     end process;
 
   end generate;
-
 end str;
diff --git a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
index 08b73281a27042197d8ee89d6f075cf2c1679cfd..494ab310049f9493d4fc92620461d35c8b37a2b5 100644
--- a/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
+++ b/applications/lofar1/RSP/pft2/src/vhdl/pft_stage.vhd
@@ -205,5 +205,4 @@ begin
     end process;
 
   end generate;
-
 end str;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
index 27c3add61508aed51f55a6e905fd5bd8f45c96ba..1be97f7d677f3d389b43eae68243e47a6128bff2 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
@@ -41,7 +41,6 @@ package lofar2_unb2b_adc_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_adc_config;
-
 end lofar2_unb2b_adc_pkg;
 
 package body lofar2_unb2b_adc_pkg is
@@ -54,5 +53,4 @@ package body lofar2_unb2b_adc_pkg is
     end if;
 
   end;
-
 end lofar2_unb2b_adc_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
index cd479c2bdbe001e2bd25df14c936a10be5cffdda..3991989fe076ec259f661560dc4785162fac5510 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
@@ -236,5 +236,4 @@ package qsys_lofar2_unb2b_adc_pkg is
             rom_system_info_writedata_export          : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_lofar2_unb2b_adc;
-
 end qsys_lofar2_unb2b_adc_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
index 5fc60b88b1e6f6c4e1072a7becc7aedb2b2dbd71..05d33242fc6e60bc6ee25e5ab30a9596891fbdcf 100644
--- a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/lofar2_unb2b_beamformer_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2b_beamformer_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_beamformer_config;
-
 end lofar2_unb2b_beamformer_pkg;
 
 package body lofar2_unb2b_beamformer_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2b_beamformer_pkg is
     end if;
 
   end;
-
 end lofar2_unb2b_beamformer_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
index 1df2a17b4164dfe45e634bc1c67f6ca4b3a2b35b..573315d8697a76534c4d5417d42d809c81130fd7 100644
--- a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd
@@ -345,5 +345,4 @@ package qsys_lofar2_unb2b_beamformer_pkg is
             rom_system_info_writedata_export        : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_lofar2_unb2b_beamformer;
-
 end qsys_lofar2_unb2b_beamformer_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
index 7b732860482965946a9be4fd98a18552c43ea78b..daae4d046b8e246425e5057de8092442b1e87d76 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2b_filterbank_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_filterbank_config;
-
 end lofar2_unb2b_filterbank_pkg;
 
 package body lofar2_unb2b_filterbank_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2b_filterbank_pkg is
     end if;
 
   end;
-
 end lofar2_unb2b_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
index 21dc8f5640f021b9394624c55618ecaf3286de3a..487716da8374cd052b7107d1a50b5ae77c48bdf3 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd
@@ -313,5 +313,4 @@ package qsys_lofar2_unb2b_filterbank_pkg is
             pio_jesd_ctrl_readdata_export           : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_lofar2_unb2b_filterbank;
-
 end qsys_lofar2_unb2b_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
index d922173d669de38fbd3b051ba1e456e904460dfc..260ed085872fd2f8ad03700ca61bae6c1ee21e31 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/lofar2_unb2b_ring_pkg.vhd
@@ -39,7 +39,6 @@ package lofar2_unb2b_ring_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_ring_config;
-
 end lofar2_unb2b_ring_pkg;
 
 package body lofar2_unb2b_ring_pkg is
@@ -50,5 +49,4 @@ package body lofar2_unb2b_ring_pkg is
     end if;
 
   end;
-
 end lofar2_unb2b_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
index 44c943c0a76371ac71bff7354db5faa72e782bba..b6e8300e1eecb4fa502041fac559445bbf551e1b 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/src/vhdl/qsys_lofar2_unb2b_ring_pkg.vhd
@@ -241,5 +241,4 @@ package qsys_lofar2_unb2b_ring_pkg is
             rom_system_info_writedata_export                   : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_lofar2_unb2b_ring;
-
 end qsys_lofar2_unb2b_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
index c1a5d27c495480ac69a2d355fceff589833f5e91..6dfd86f7941b007abc09e4c27a2417f92e6b4d93 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd
@@ -60,7 +60,6 @@ package lofar2_unb2b_sdp_station_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2b_sdp_station_config;
-
 end lofar2_unb2b_sdp_station_pkg;
 
 package body lofar2_unb2b_sdp_station_pkg is
@@ -81,5 +80,4 @@ package body lofar2_unb2b_sdp_station_pkg is
     end if;
 
   end;
-
 end lofar2_unb2b_sdp_station_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
index bc7d3e754784cf6a70dbd23d2c0ec3c2f91c8c01..66a6960ef720c99edf47facde69303f4958c1c1a 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/mmm_lofar2_unb2c_ddrctrl.vhd
@@ -433,5 +433,4 @@ begin
       reg_ddrctrl_ctrl_state_writedata_export   => reg_ddrctrl_ctrl_state_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
index aa9cb7c67cda243aa068f6502e8a4471b38a6cee..c6674390a790752c7348e21755aeb47c870f3f13 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ddrctrl/src/vhdl/qsys_lofar2_unb2c_ddrctrl_pkg.vhd
@@ -207,5 +207,4 @@ package qsys_lofar2_unb2c_ddrctrl_pkg is
             rom_system_info_readdata_export        : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_lofar2_unb2c_ddrctrl;
-
 end qsys_lofar2_unb2c_ddrctrl_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
index 617e401becaadd6ae2136b036964cb07dc2348f4..947e0392fba15d8763d549a8833e85458eb12003 100644
--- a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/lofar2_unb2c_filterbank_pkg.vhd
@@ -43,7 +43,6 @@ package lofar2_unb2c_filterbank_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_filterbank_config;
-
 end lofar2_unb2c_filterbank_pkg;
 
 package body lofar2_unb2c_filterbank_pkg is
@@ -55,5 +54,4 @@ package body lofar2_unb2c_filterbank_pkg is
     end if;
 
   end;
-
 end lofar2_unb2c_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
index 3193b1a4e866e50ee1b08de077a7ac83b789782d..cb9a4a29b2d97452fb856b75dc1fa697de924237 100644
--- a/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_filterbank/src/vhdl/qsys_lofar2_unb2c_filterbank_pkg.vhd
@@ -282,5 +282,4 @@ package qsys_lofar2_unb2c_filterbank_pkg is
             rom_system_info_writedata_export        : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_lofar2_unb2c_filterbank;
-
 end qsys_lofar2_unb2c_filterbank_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
index 28a9c8341d315412c0150b7a8905bc1fb0f4c6c7..a381cbfe4c7ec11c3ae4189a0e8413abd080c9b3 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/lofar2_unb2c_ring_pkg.vhd
@@ -40,7 +40,6 @@ package lofar2_unb2c_ring_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_ring_config;
-
 end lofar2_unb2c_ring_pkg;
 
 package body lofar2_unb2c_ring_pkg is
@@ -51,5 +50,4 @@ package body lofar2_unb2c_ring_pkg is
     end if;
 
   end;
-
 end lofar2_unb2c_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
index 8c35d482f28c694e83468ddaca51cb3918516597..fb15dc610da8847c8147a335804566b3e640ab0b 100644
--- a/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_ring/src/vhdl/qsys_lofar2_unb2c_ring_pkg.vhd
@@ -227,5 +227,4 @@ package qsys_lofar2_unb2c_ring_pkg is
             rom_system_info_writedata_export                   : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_lofar2_unb2c_ring;
-
 end qsys_lofar2_unb2c_ring_pkg;
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
index 1889cff98b72ed273ea7984d1d331a46cb153d8c..377a049235ba5a15037742ec694342ccd1b6fef1 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd
@@ -59,7 +59,6 @@ package lofar2_unb2c_sdp_station_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_lofar2_unb2c_sdp_station_config;
-
 end lofar2_unb2c_sdp_station_pkg;
 
 package body lofar2_unb2c_sdp_station_pkg is
@@ -80,5 +79,4 @@ package body lofar2_unb2c_sdp_station_pkg is
     end if;
 
   end;
-
 end lofar2_unb2c_sdp_station_pkg;
diff --git a/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd b/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
index 02b993e2c33a9cd801ae8ba2302f805422317263..0b99b119ca0d4eea416a1affe95537d6e47f7ea5 100644
--- a/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
+++ b/applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_output_repack.vhd
@@ -54,5 +54,4 @@ begin
     out_sosi_arr(I).sop                                 <= in_sosi.sop;
     out_sosi_arr(I).eop                                 <= in_sosi.eop;
   end generate;
-
 end rtl;
diff --git a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
index 999afc3545127e74126d91f3c72c52bc67538ed6..6df8f1ff9c7307c70478742b2c557e8ac9ab3da8 100644
--- a/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
+++ b/applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl.vhd
@@ -35,7 +35,6 @@ use technology_lib.technology_select_pkg.all;
 
 entity tb_ddrctrl is
   generic (
-
     g_tech_ddr                : t_c_tech_ddr                                            := c_tech_ddr4_8g_1600m;  -- type of memory
     g_nof_streams             : positive                                                := 12;  -- number of input streams
     g_data_w                  : natural                                                 := 14;  -- data with of input data vectors
diff --git a/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd b/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
index 638a8d10df007b71d3bc7c68d9aaba7fc0334d2d..5960379ab49c9e30e0ab46b4247420ffe81cdb50 100644
--- a/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
+++ b/applications/rdma_demo/libraries/rdma_generator/src/vhdl/rdma_generator_roce_tester.vhd
@@ -151,5 +151,4 @@ begin
     in_dp_sosi  => eth_tester_tx_sosi_arr(0),
     in_dp_siso  => eth_tester_tx_siso_arr(0)
   );
-
 end str;
diff --git a/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd b/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
index 8fff1d5c72cf3d4b6b4affd8509aabec72ffd2fc..a2a3ee4571a4c87c2b2950b6af496bc3dc954d5b 100644
--- a/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
+++ b/applications/rdma_demo/libraries/rdma_generator/tb/vhdl/tb_rdma_generator.vhd
@@ -101,7 +101,6 @@ architecture tb of tb_rdma_generator is
 
   -- Use REAL to avoid NATURAL overflow in bps calculation
 
-
   constant c_bg_nof_bps_first      : real := real(c_bg_block_len_first * c_octet_w) * real(c_nof_st_clk_per_s) / real(c_bg_slot_len_first);
   constant c_bg_nof_bps_others     : real := real(c_bg_block_len_others * c_octet_w) * real(c_nof_st_clk_per_s) / real(c_bg_slot_len_others);
   constant c_bg_nof_bps_total      : real := c_bg_nof_bps_first + real(g_nof_streams - 1) * c_bg_nof_bps_others;
diff --git a/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd b/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
index 9ef5d771ed75137ef8ee911891e7d68e768fd8c1..b93df20cd5b8b6253f38d5d3c0c7c67a0fdd06e4 100644
--- a/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
+++ b/applications/rdma_demo/libraries/rdma_packetiser/src/vhdl/rdma_packetiser_pkg.vhd
@@ -474,5 +474,4 @@ package body rdma_packetiser_pkg is
 
     return v;
   end func_rdma_packetiser_unmap_header;
-
 end rdma_packetiser_pkg;
diff --git a/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd b/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
index 480a928a3fcb52df8dce3e90bf519bc040b759b4..4c5582c7f96ac01e96f62944840c1bcf5b1b790a 100644
--- a/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
+++ b/applications/rdma_demo/libraries/rdma_packetiser/tb/vhdl/tb_rdma_packetiser_assemble_header.vhd
@@ -151,7 +151,6 @@ begin
     wait;
   end process;
 
-
   -- check if values in rdma_packetiser_assemble_header match with expected values
   p_verify_rdma_header : process
     variable v_exp_ip_total_length      : natural;
@@ -272,7 +271,6 @@ begin
     wait;
   end process;
 
-
   u_dut: entity work.rdma_packetiser_assemble_header
     generic map (
       g_data_w => g_data_w
diff --git a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
index 6dd67461421825c623cf4ea6fe6d758361b640e0..76989ef8807129187a6a2f6fde13837526a4bae7 100644
--- a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
+++ b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/ring_pkg.vhd
@@ -58,5 +58,4 @@ package body ring_pkg is
   begin
     return TO_SVEC(nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(N_rn), TO_UINT(N_rn), lane_dir),hops'length);
   end;
-
 end ring_pkg;
diff --git a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
index deca506ed84e4395f8ee499a9cfd70dd56c8925f..37f8948dcb4492eb620a6f395e01c8165fbed90a 100644
--- a/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
+++ b/applications/ta2/bsp/hardware/lofar2_unb2b_ring_bsp/top_components_pkg.vhd
@@ -465,5 +465,4 @@ package top_components_pkg is
       board_kernel_stream_snk_mm_io_ready  : out std_logic
    );
   end component freeze_wrapper;
-
 end top_components_pkg;
diff --git a/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd b/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
index fa7090c8ba2cab2ffc8a579323e373cdef3c2eb5..4b86fcefc565588a74c11e09beff348119691ea7 100644
--- a/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
+++ b/applications/ta2/bsp/hardware/ta2_unb2b_bsp/top_components_pkg.vhd
@@ -302,5 +302,4 @@ package top_components_pkg is
       board_kernel_stream_src_ADC_ready  : out std_logic
    );
   end component freeze_wrapper;
-
 end top_components_pkg;
diff --git a/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd b/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
index c5d1073de0edb6f9d4e164f6c0f7834f51b5a02d..ab98d58c90aa39d3eaff6005f69a88695eab5a20 100644
--- a/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
+++ b/applications/ta2/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
@@ -196,5 +196,4 @@ begin
     dp_latency_adapter_rx_src_in_arr(stream).ready <= src_in_arr(stream).ready;
     dp_latency_adapter_rx_src_in_arr(stream).xon <= '1';
   end generate;
-
 end str;
diff --git a/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd b/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
index f73837193b44a6a43ee128f28d0b03de0a8b2ff2..2965433f68374e425aa4e5a4d6a0b903eef28dec 100644
--- a/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
+++ b/applications/ta2/ip/ta2_unb2b_mm_io/ta2_unb2b_mm_io.vhd
@@ -255,5 +255,4 @@ gen_opencl : if g_use_opencl generate
   snk_out <= in_siso;
   in_sosi <= snk_in;
 end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd b/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
index ced8c5739b7c1d50b097614e358faaf035293607..760c8e1699cc0a8ee75671708d9ae2ed67da434b 100644
--- a/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
@@ -49,7 +49,6 @@ package unb1_bn_capture_pkg is
   constant c_bn_capture : t_c_bn_capture := (c_unb1_board_mm_clk_freq_50M,  -- must match PLL setting in sopc_bn_capture
                                              c_unb1_board_ext_clk_freq_200M,
                                              c_bn_capture_sp);
-
 end unb1_bn_capture_pkg;
 
 package body unb1_bn_capture_pkg is
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
index f1ac60af9ffc42bc825a84959c8143f0e40f447b..37b934cb298df6021e26d6abce8b297f68d38298 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/node_unb1_bn_terminal_bg.vhd
@@ -311,5 +311,4 @@ begin
       ram_diag_data_buf_miso => ram_mesh_diag_data_buf_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
index a5254c63ff944c2e7aa6b0f5e8f60ce9605a1a86..46a209419f0d1f32a1e77a4322297a09223331b7 100644
--- a/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
+++ b/boards/uniboard1/designs/unb1_bn_terminal_bg/src/vhdl/unb1_bn_terminal_bg.vhd
@@ -551,5 +551,4 @@ begin
       BN_BI_2_RX     => BN_BI_2_RX
     );
   end generate;
-
 end;
diff --git a/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd b/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
index 34532416bb3622692dba4d69c0881e639d640e6c..eb0fd611a1a15cab664503461a780de80d6de873 100644
--- a/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
+++ b/boards/uniboard1/designs/unb1_ddr3_reorder/src/vhdl/mmm_unb1_ddr3_reorder.vhd
@@ -421,5 +421,4 @@ begin
       coe_writedata_export_from_the_reg_bsn_monitor      => reg_bsn_monitor_mosi.wrdata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd b/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
index c3b0cd899761a0826b370b36ba22671b8825cdff..b063ae3b02530ab8c0c82a41023efaf0c367b189 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/src/vhdl/unb1_fn_terminal_db.vhd
@@ -398,5 +398,4 @@ begin
       FN_BN_3_RX     => FN_BN_3_RX
     );
   end generate;
-
 end;
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd b/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
index 25bd96f7d89711519fc854a42162f667075a8031..edbed874ac7aa88315e7515b976a4818e33ff3a1 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/tb/vhdl/tb_unb1_fn_terminal_db.vhd
@@ -432,5 +432,4 @@ begin
   no_backplane: if c_use_back = false generate
     bn_in_back_serial_4arr <= bn_out_back_serial_4arr;
   end generate;
-
 end tb;
diff --git a/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd b/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
index 78bdc17f233b68281ae52a27903f3657d6d7e08d..de705bae4dda3d9bceaacb937b719e6f023a6bff 100644
--- a/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
+++ b/boards/uniboard1/designs/unb1_heater/src/vhdl/mmm_unb1_heater.vhd
@@ -309,5 +309,4 @@ begin
       reg_heater_writedata_export                   => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd b/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
index 6ab5775f35323f6cb09dd41e5a6b51e08d93a79a..8772550c28f8a6518bf049ce0298c4147f85dfc0 100644
--- a/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_heater/src/vhdl/qsys_unb1_heater_pkg.vhd
@@ -144,5 +144,4 @@ package qsys_unb1_heater_pkg is
             reg_heater_reset_export                       : out std_logic  -- export
         );
     end component qsys_unb1_heater;
-
 end qsys_unb1_heater_pkg;
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
index 225991915478557e0526f302a2ea6e41550bec83..8a6a71a0317cee5e0fac9154faf0bbec6a3aea0b 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/mmm_unb1_minimal_qsys_wo_pll.vhd
@@ -316,5 +316,4 @@ begin
       coe_writedata_export_from_the_reg_wdi         => reg_wdi_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
index 142125fe43a2877ae7f01bfc3caab67d082ade0a..89f1e8fc1b8f29211375fdc66d8b849b8ab58efc 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys_wo_pll/qsys_wo_pll_unb1_minimal_pkg.vhd
@@ -28,7 +28,6 @@ package qsys_wo_pll_unb1_minimal_pkg is
     -----------------------------------------------------------------------------
 
     component qsys_wo_pll_unb1_minimal is
-
         port (
             coe_ram_write_export_from_the_avs_eth_0       : out std_logic;  -- export
             coe_reg_read_export_from_the_avs_eth_0        : out std_logic;  -- export
@@ -131,5 +130,4 @@ package qsys_wo_pll_unb1_minimal_pkg is
             coe_read_export_from_the_reg_remu             : out std_logic  -- export
         );
     end component qsys_wo_pll_unb1_minimal;
-
 end qsys_wo_pll_unb1_minimal_pkg;
diff --git a/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd b/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
index 63e5d9c4da7458d9ab0c6208a30252181f8406be..251f46ef069759460767967c08dfe2a039621bb5 100644
--- a/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/src/vhdl/qsys_unb1_minimal_pkg.vhd
@@ -28,7 +28,6 @@ package qsys_unb1_minimal_pkg is
     -----------------------------------------------------------------------------
 
     component qsys_unb1_minimal is
-
         port (
             coe_ram_write_export_from_the_avs_eth_0       : out std_logic;  -- export
             coe_reg_read_export_from_the_avs_eth_0        : out std_logic;  -- export
@@ -186,5 +185,4 @@ package qsys_unb1_minimal_pkg is
             pio_system_info_readdata_export             : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_unb1_minimal_mm_arbiter;
-
 end qsys_unb1_minimal_pkg;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
index 438450102620f3443679561df9df3d0682264f75..b79b29e3aec3e6d757c7e7bd1325e989d70c8a84 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/mmm_unb1_terminal_bg_mesh_db.vhd
@@ -456,5 +456,4 @@ begin
       rom_system_info_writedata_export        => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
index ec6f3afdfdca813569388e2c23ac27861bc3f7d1..fa8287cfbbc1513ceafa411dd8bafa63ab98f299 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/src/vhdl/unb1_terminal_bg_mesh_db.vhd
@@ -472,5 +472,4 @@ begin
       FN_BN_3_RX     => FN_BN_3_RX
     );
   end generate;
-
 end;
diff --git a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
index 4069b5616d5cc8fc41c9b8f6975c3b1cf71290bd..2e2c35e874ae9be72e667c3f207f5f92c828e708 100644
--- a/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
+++ b/boards/uniboard1/designs/unb1_terminal_bg_mesh_db/tb/vhdl/tb_unb1_terminal_bg_mesh_db.vhd
@@ -267,5 +267,4 @@ begin
       fn_rx_sl_3arr  => fn_in_mesh_serial_3arr
     );
   end generate;
-
 end tb;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
index 7e468fa82dd68c100cdca0d5f9bdb6d5d6a42c56..e5f9c2f65503ee8e6f28195aeadd974e627f6820 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
@@ -798,5 +798,4 @@ begin
       ram_diag_data_buffer_ddr_MB_II_readdata_export   => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
index 3c257fae3c3952152f5c7f2c4966ff5fd449cf8c..00ef85355c05a4ac4a71896a257759d44bd395b9 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/qsys_unb1_test_pkg.vhd
@@ -355,5 +355,4 @@ package qsys_unb1_test_pkg is
             ram_diag_data_buffer_ddr_mb_ii_readdata_export   : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_unb1_test;
-
 end qsys_unb1_test_pkg;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
index 428faa733ef9d0cd312c91c357cf64025323e96e..6046fd24285e7717eeec37ccb39f8cf8defbf308 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
@@ -974,5 +974,4 @@ gen_mms_io_ddr_diag_MB_II : if c_revision_select.use_ddr_MB_II = 1 generate
       reg_rx_seq_miso     => reg_diag_rx_seq_ddr_MB_II_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
index a1c4f5a3856ce1a8df548e1190e7af7fcedeb604..49fd7e47e15e4f2fbe5ba8ebeff71038e2b4c392 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test_pkg.vhd
@@ -74,7 +74,6 @@ package unb1_test_pkg is
 
   -- Function to select the revision configuration.
   function func_unb1_test_sel_revision_rec(g_design_name : string) return t_unb1_test_config;
-
 end unb1_test_pkg;
 
 package body unb1_test_pkg is
@@ -103,5 +102,4 @@ package body unb1_test_pkg is
     end if;
 
   end;
-
 end unb1_test_pkg;
diff --git a/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd b/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
index 2a79752d439f79bbff34789cd312d69bab8def26..a7a6e81f85abd7e81405a8646c87747f01a25dae 100644
--- a/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
+++ b/boards/uniboard1/designs/unb1_tr_10GbE/src/vhdl/mmm_unb1_tr_10GbE.vhd
@@ -385,5 +385,4 @@ begin
       rom_system_info_writedata_export            => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
index a26175ea386e55baf9e1192f275b4efe3d48cabb..0b1e9672ebd95aec59ef5f19d343f0df65dd690a 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/ctrl_unb1_board.vhd
@@ -752,5 +752,4 @@ begin
       tse_led           => eth1g_led
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
index b3e77264270a51387859a01866e22ff72c27713a..9d42134ec7ae8c7ebf4ea604cab78386b046098a 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_io.vhd
@@ -59,5 +59,4 @@ begin
     rx_serial_2arr(2)(I) <= BN_BI_2_RX(I);
     rx_serial_2arr(3)(I) <= BN_BI_3_RX(I);
   end generate;
-
 end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
index 1ee7f136478cfb001d46ccc8237c79f1ebe933a4..af49253db3f017681b7d50cde8d2328a5fd75563 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_back_uth_terminals_bidir.vhd
@@ -129,5 +129,4 @@ begin
       rx_mon_dist_sosi_arr  => open
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
index ce43144b74c4f5a0287591ac3fbecbad66a1bca6..80448655d7a8c02654031e9cb97b9a95194abafd 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_front_io.vhd
@@ -123,5 +123,4 @@ begin
 
     SI_FN_3_CNTRL(c_unb1_board_ci.tr.cntrl_mdc_id) <= mdio_mdc_arr(3);
   end generate;
-
 end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
index f16b3b3714b61fd33155b0e9e20b47225c1a6799..8271179aa15dd7684df3657bb707fc92fdd9a51c 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_io.vhd
@@ -57,5 +57,4 @@ begin
     rx_serial_2arr(2)(I) <= FN_BN_2_RX(I);
     rx_serial_2arr(3)(I) <= FN_BN_3_RX(I);
   end generate;
-
 end;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
index a4259a7adea7c7e99a672f4afb6a6cf2127f1b6b..c6d5717ad3455434343e609ca63529bf6ece8204 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_mesh_uth_terminals_bidir.vhd
@@ -139,5 +139,4 @@ begin
       rx_mon_dist_sosi_arr  => rx_mon_dist_sosi_2arr(I)(g_usr_nof_streams - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
index d524e5a62326d474ef631bf8ea9bd9333f760fe2..4200320a8c4e955b9976ab3c7baacc6cbdca7237 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_peripherals_pkg.vhd
@@ -157,7 +157,6 @@ package unb1_board_peripherals_pkg is
   end record;
 
   constant c_unb1_board_peripherals_mm_reg_default    : t_c_unb1_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 3, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1);
-
 end unb1_board_peripherals_pkg;
 
 package body unb1_board_peripherals_pkg is
diff --git a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
index 180b535b22becf962ec54fbf906e62071c0757a8..9a57d436cdcaef78e1db633f259ee27e9dab4fcb 100644
--- a/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
+++ b/boards/uniboard1/libraries/unb1_board/src/vhdl/unb1_board_pkg.vhd
@@ -286,7 +286,6 @@ package unb1_board_pkg is
   function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_mesh_siso_2arr) return t_unb1_board_mesh_siso_2arr;
   function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_back_sosi_2arr) return t_unb1_board_back_sosi_2arr;
   function func_unb1_board_transpose_2arr(in_2arr : t_unb1_board_back_siso_2arr) return t_unb1_board_back_siso_2arr;
-
 end unb1_board_pkg;
 
 package body unb1_board_pkg is
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
index 1eaa6aa8070c062fe3b18135e3703eea919e7181..4040873b96a3fcec0b639c0dce2b3d4167fa7fe2 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/tb_unb1_board_mesh_reorder_bidir.vhd
@@ -383,5 +383,4 @@ begin
       rx_usr_siso_2arr => bn_rx_usr_siso_3arr(I)  -- user siso to phy = siso.ready driver from BN user
     );
   end generate;
-
 end tb;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
index 59579fcd400bcbb69b4f32f9db8e55211e2480ef..4a07492e249925537e27fa508e67fb20f33d8466 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sl.vhd
@@ -77,5 +77,4 @@ begin
     --                        |   Same scheme applies to all back nodes
     --                        Receiving UniBoard
   end generate;
-
 end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
index 6262f52ab7711cb61a488128ea3ad22a12e0dfe7..b272403c6c270391923e026daec48921955af9ea 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_back_model_sosi.vhd
@@ -67,5 +67,4 @@ begin
     --                      |   Same scheme applies to all back nodes
     --                      Receiving UniBoard
   end generate;
-
 end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
index c186f45bb476e7f843cdff7ffbc25496406a61b1..57f353c2d839f38a9e8ef5b7509722d2a3fdbcc4 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_siso.vhd
@@ -150,5 +150,4 @@ begin
     fn3_tx_siso_2arr(2) <= bn2_rx_siso_2arr(0);  -- 3,2 <= 2,0
     fn3_tx_siso_2arr(3) <= bn3_rx_siso_2arr(0);  -- 3,3 <= 3,0
   end generate;
-
 end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
index 11019e63c4c6db0e5fa6280786b6ca49c7c64b18..f6f9bf5fd76ee842118825d4c001146884d9b136 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sl.vhd
@@ -105,5 +105,4 @@ begin
     fn_rx_sl_3arr(3)(2) <= bn_tx_sl_3arr(2)(0);  -- 3,2 <= 2,0
     fn_rx_sl_3arr(3)(3) <= bn_tx_sl_3arr(3)(0);  -- 3,3 <= 3,0
   end generate;
-
 end beh;
diff --git a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
index 17a37b3c881936f1a33457affc22e200b3e28df2..1a9791e2c369a93b17c91ef39172d72cce5b07c3 100644
--- a/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
+++ b/boards/uniboard1/libraries/unb1_board/tb/vhdl/unb1_board_mesh_model_sosi.vhd
@@ -150,5 +150,4 @@ begin
     fn3_rx_sosi_2arr(2) <= bn2_tx_sosi_2arr(0);  -- 3,2 <= 2,0
     fn3_rx_sosi_2arr(3) <= bn3_tx_sosi_2arr(0);  -- 3,3 <= 3,0
   end generate;
-
 end beh;
diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
index 2bd1ab97d597736b53b76506cb5b59a2d9c06e35..66b85ef0ba49815af0bb5474adbcfb099192a961 100644
--- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
+++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/mmm_unb2_minimal.vhd
@@ -293,5 +293,4 @@ begin
       reg_mmdp_ctrl_writedata_export            => reg_mmdp_ctrl_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
index 305c225eae2455dcf6574d3992aa4340e2dfd4fe..a03b6a76cf081e38c61acfd98d29cbd8fa579788 100644
--- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/qsys_unb2_minimal_pkg.vhd
@@ -151,5 +151,4 @@ package qsys_unb2_minimal_pkg is
             reg_unb_pmbus_reset_export         : out std_logic  -- export
         );
     end component qsys_unb2_minimal;
-
 end qsys_unb2_minimal_pkg;
diff --git a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
index 598bfdf53b57e2d42ec99b8a0ba8fcb26a8c4f36..b5486ed93d8ebcc7d4a76c854004e2a890e1a6d1 100644
--- a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
+++ b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
@@ -28,7 +28,6 @@ use ieee.std_logic_unsigned.all;
 
 entity unb2_pinning is
   port (
-
     -- GENERAL
     CLK                    : in    std_logic;  -- External system clock
     PPS                    : in    std_logic;  -- External system sync
diff --git a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
index b75ee3b644282236ab8033310c593bbf3400f058..cc52d34dd9e189c584d8c5780da88d259d8f9352 100644
--- a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
+++ b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
@@ -28,7 +28,6 @@ use ieee.std_logic_unsigned.all;
 
 entity unb2_singlemac is
   port (
-
     -- GENERAL
     CLK                    : in    std_logic;  -- External system clock
     PPS                    : in    std_logic;  -- External system sync
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
index 80d8c6cc7218c08a1158b925b290cbc22c037177..0d1307487a4c2462548021e907a4f0140d09842d 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
@@ -823,5 +823,4 @@ begin
       ram_diag_data_buffer_ddr_MB_II_readdata_export  => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
index 3db6393627fe5aafe9588fa02a19d351423c55a7..7df05b5c76a53b1edf1b31e1aa3d010279fb18d6 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
@@ -377,5 +377,4 @@ package qsys_unb2_test_pkg is
             reg_unb_pmbus_reset_export                      : out std_logic  -- export
         );
     end component qsys_unb2_test;
-
 end qsys_unb2_test_pkg;
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
index a4e2c262f85c563935ad879102395a2f2b226797..623466cb77376317cf2608cce70b318a3b948b02 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
@@ -1235,5 +1235,4 @@ begin
       reg_rx_seq_miso   => reg_diag_rx_seq_ddr_MB_II_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
index 8a4c6bd89ad9db59424e1cbddfbcb0bf8b468f41..dc3443b454b2e776ef9d19d1eb2c662241d810ce 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
@@ -797,5 +797,4 @@ begin
       tse_led           => eth1g_led
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
index 48fad46da5c7c879188216a074787a6333284c9b..d8278cc9bfd16a2357904228b262b20004557d69 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
       locked  => pll_locked
     );
   end generate;
-
 end arria10;
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
index aa42e0627dc1bfdf127e7b0e0fec5afdf9881fc2..11bfcea22dad49df628a295214dfa7b7f033ffd1 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2_board_peripherals_pkg is
   end record;
 
   constant c_unb2_board_peripherals_mm_reg_default    : t_c_unb2_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 3, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 5);
-
 end unb2_board_peripherals_pkg;
 
 package body unb2_board_peripherals_pkg is
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
index 20f69332252ac3a14fc387c19ee4aae9ffb0b673..798a1c89ad2162341345978a919ec14b5ad29220 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd
@@ -144,7 +144,6 @@ package unb2_board_pkg is
 
   function func_unb2_board_system_info(VERSION : in std_logic_vector(c_unb2_board_aux.version_w - 1 downto 0);
                                        ID      : in std_logic_vector(c_unb2_board_aux.id_w - 1 downto 0)) return t_c_unb2_board_system_info;
-
 end unb2_board_pkg;
 
 package body unb2_board_pkg is
diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
index f1ce0394dc61a6390274e086ee406a1851c0acb0..c74ed6780ab870869ae6592f6625b161083073bc 100644
--- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
+++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
@@ -308,5 +308,4 @@ begin
       reg_heater_writedata_export               => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
index b60792517e855717caef9e115180635f2a54d2bf..c43c3cd0e6c3c81222870334d2c6a274bfc50f5e 100644
--- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/qsys_unb2a_heater_pkg.vhd
@@ -158,5 +158,4 @@ package qsys_unb2a_heater_pkg is
             reg_heater_reset_export                : out std_logic  -- export
         );
     end component qsys_unb2a_heater;
-
 end qsys_unb2a_heater_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
index 2a634cb5632302f7c4fca1240baf02519ad780cc..c03f2fdcd3c17390ca563517674acdb8558f4699 100644
--- a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
+++ b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd
@@ -293,5 +293,4 @@ begin
       reg_mmdp_ctrl_writedata_export            => reg_mmdp_ctrl_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
index 6897ea10bfdf03e5d40e7f2c1d7a4d618ada9160..e73f994c67e8ee4cd9562b120bcda00a61616d2b 100644
--- a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/qsys_unb2a_minimal_pkg.vhd
@@ -151,5 +151,4 @@ package qsys_unb2a_minimal_pkg is
             reg_unb_pmbus_reset_export         : out std_logic  -- export
         );
     end component qsys_unb2a_minimal;
-
 end qsys_unb2a_minimal_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
index ed36a9a7daa389bf1e542ab32f11add8c4e54457..c195237ee34ac2df932fd235d08ca3c1169a9bbd 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd
@@ -849,5 +849,4 @@ begin
       ram_diag_data_buffer_ddr_MB_II_readdata_export  => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
index 95b0f768f13711445f2f07be22ec2378f3ea7144..2fa5172e37285fee3f3c1bbf104383bc6d5648b1 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/qsys_unb2a_test_pkg.vhd
@@ -392,5 +392,4 @@ package qsys_unb2a_test_pkg is
             rom_system_info_writedata_export                          : out std_logic_vector(31 downto 0)  -- rom_system_info_writedata.export
         );
     end component qsys_unb2a_test;
-
 end qsys_unb2a_test_pkg;
diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
index 73f726f8a9557e0bf3dd2f5c30c5fe6ba386ea37..d982da0f3b9d70e1a262c3f8e47910c1ec3cc41a 100644
--- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
+++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/unb2a_test.vhd
@@ -1247,5 +1247,4 @@ begin
       reg_rx_seq_miso   => reg_diag_rx_seq_ddr_MB_II_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
index 2f62140372553a4993ae19a4fad7e85e5493390d..69510a62c4d13b3d2f1c7d1a038c9ab6f4307484 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/ctrl_unb2_board.vhd
@@ -800,5 +800,4 @@ begin
       tse_led           => eth1g_led
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
index 48fad46da5c7c879188216a074787a6333284c9b..d8278cc9bfd16a2357904228b262b20004557d69 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
       locked  => pll_locked
     );
   end generate;
-
 end arria10;
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
index a936b7c0e6942cd9da490062dece4fb4710ee815..b39965710bc259c8f4281c18dbff5445e56bd542 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2_board_peripherals_pkg is
   end record;
 
   constant c_unb2_board_peripherals_mm_reg_default    : t_c_unb2_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 10, 1, 1, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
 end unb2_board_peripherals_pkg;
 
 package body unb2_board_peripherals_pkg is
diff --git a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
index 081135d117cace5d448362750f4499d99563a5d8..9b45acf5c3efd5b51de16e3275871cabc05d6913 100644
--- a/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
+++ b/boards/uniboard2a/libraries/unb2a_board/src/vhdl/unb2_board_pkg.vhd
@@ -149,7 +149,6 @@ package unb2_board_pkg is
 
   function func_unb2_board_system_info(VERSION : in std_logic_vector(c_unb2_board_aux.version_w - 1 downto 0);
                                        ID      : in std_logic_vector(c_unb2_board_aux.id_w - 1 downto 0)) return t_c_unb2_board_system_info;
-
 end unb2_board_pkg;
 
 package body unb2_board_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
index ccfa91c51360b894621e7c726d976f3ca44be5c8..c261ec024247a34fb6c051ab34badc1d306eeff0 100644
--- a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
+++ b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/mmm_unb2b_heater.vhd
@@ -310,5 +310,4 @@ begin
       reg_heater_writedata_export               => reg_heater_mosi.wrdata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
index b36fb7ceda0540405cad0b725787029d599db6c2..90f7ce360d6067b1264046fc0b1b87dc8edc3c79 100644
--- a/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_heater/src/vhdl/qsys_unb2b_heater_pkg.vhd
@@ -157,5 +157,4 @@ package qsys_unb2b_heater_pkg is
             rom_system_info_writedata_export       : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_unb2b_heater;
-
 end qsys_unb2b_heater_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
index e879f1b9edecdcf0c9866d6359c01c0b6a645338..9c89aec19a5ef45681cdb44578961a2690823af6 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
 
   constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
                                                                 "0000000000000001", "0000000000000001");
-
 end common_network_layers_pkg;
 
 package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
index 84f51e5b776a1136bc4ea5de7fe237e8538cd404..dacf249e9ae17f882d7d5452d0a0301e47349381 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
   procedure proc_common_dclk_generate_sclk(constant Pfactor : in    positive;
                                            signal   dclk    : in    std_logic;
                                            signal   sclk    : inout std_logic);
-
 end common_pkg;
 
 package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
index 7b6d1a2da0ec2558d87aa708358be0b79c70944d..8f2d68af5f3513e754041f40f639df76bf835bbe 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
   -- Deconcatenate data and complex re,im fields from SOSI into SOSI array
   function func_dp_stream_deconcat(snk_in      : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr;  -- Deconcat SOSI data
   function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso;  -- Wire SISO_ARR(0) to single SISO
-
 end dp_stream_pkg;
 
 package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
   begin
     return src_out_arr(0);
   end;
-
 end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
index 103667575791b885ea6d707accd5dc6c04bcb535..2a199611aadb5711a6052920509706dd9cc93ab5 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
   constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
   constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
   constant c_eth_ram_addr_w    : natural := ceil_log2(c_eth_ram_nof_words);
-
 end eth_pkg;
 
 package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
     v_reg(                                                                     0) := mm_reg.rx_avail;  -- [0]
     return v_reg;
   end func_eth_mm_reg_status;
-
 end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
index 177eb750c7386763043b7282d1bfb4b3a3fc6636..7d2cb43f9b6315800f8cba1dc32b4748b7a5511b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
     crs      : std_logic;
     col      : std_logic;
   end record;
-
 end tech_tse_pkg;
 
 package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
index e879f1b9edecdcf0c9866d6359c01c0b6a645338..9c89aec19a5ef45681cdb44578961a2690823af6 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
 
   constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
                                                                 "0000000000000001", "0000000000000001");
-
 end common_network_layers_pkg;
 
 package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
index 84f51e5b776a1136bc4ea5de7fe237e8538cd404..dacf249e9ae17f882d7d5452d0a0301e47349381 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
   procedure proc_common_dclk_generate_sclk(constant Pfactor : in    positive;
                                            signal   dclk    : in    std_logic;
                                            signal   sclk    : inout std_logic);
-
 end common_pkg;
 
 package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
index 7b6d1a2da0ec2558d87aa708358be0b79c70944d..8f2d68af5f3513e754041f40f639df76bf835bbe 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
   -- Deconcatenate data and complex re,im fields from SOSI into SOSI array
   function func_dp_stream_deconcat(snk_in      : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr;  -- Deconcat SOSI data
   function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso;  -- Wire SISO_ARR(0) to single SISO
-
 end dp_stream_pkg;
 
 package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
   begin
     return src_out_arr(0);
   end;
-
 end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
index 103667575791b885ea6d707accd5dc6c04bcb535..2a199611aadb5711a6052920509706dd9cc93ab5 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
   constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
   constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
   constant c_eth_ram_addr_w    : natural := ceil_log2(c_eth_ram_nof_words);
-
 end eth_pkg;
 
 package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
     v_reg(                                                                     0) := mm_reg.rx_avail;  -- [0]
     return v_reg;
   end func_eth_mm_reg_status;
-
 end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
index 177eb750c7386763043b7282d1bfb4b3a3fc6636..7d2cb43f9b6315800f8cba1dc32b4748b7a5511b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
     crs      : std_logic;
     col      : std_logic;
   end record;
-
 end tech_tse_pkg;
 
 package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
index e879f1b9edecdcf0c9866d6359c01c0b6a645338..9c89aec19a5ef45681cdb44578961a2690823af6 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
 
   constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
                                                                 "0000000000000001", "0000000000000001");
-
 end common_network_layers_pkg;
 
 package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
index 84f51e5b776a1136bc4ea5de7fe237e8538cd404..dacf249e9ae17f882d7d5452d0a0301e47349381 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
   procedure proc_common_dclk_generate_sclk(constant Pfactor : in    positive;
                                            signal   dclk    : in    std_logic;
                                            signal   sclk    : inout std_logic);
-
 end common_pkg;
 
 package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
index 7b6d1a2da0ec2558d87aa708358be0b79c70944d..8f2d68af5f3513e754041f40f639df76bf835bbe 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
   -- Deconcatenate data and complex re,im fields from SOSI into SOSI array
   function func_dp_stream_deconcat(snk_in      : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr;  -- Deconcat SOSI data
   function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso;  -- Wire SISO_ARR(0) to single SISO
-
 end dp_stream_pkg;
 
 package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
   begin
     return src_out_arr(0);
   end;
-
 end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
index 103667575791b885ea6d707accd5dc6c04bcb535..2a199611aadb5711a6052920509706dd9cc93ab5 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
   constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
   constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
   constant c_eth_ram_addr_w    : natural := ceil_log2(c_eth_ram_nof_words);
-
 end eth_pkg;
 
 package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
     v_reg(                                                                     0) := mm_reg.rx_avail;  -- [0]
     return v_reg;
   end func_eth_mm_reg_status;
-
 end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
index 177eb750c7386763043b7282d1bfb4b3a3fc6636..7d2cb43f9b6315800f8cba1dc32b4748b7a5511b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/sim/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
     crs      : std_logic;
     col      : std_logic;
   end record;
-
 end tech_tse_pkg;
 
 package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
index e879f1b9edecdcf0c9866d6359c01c0b6a645338..9c89aec19a5ef45681cdb44578961a2690823af6 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_network_layers_pkg.vhd
@@ -349,7 +349,6 @@ package common_network_layers_pkg is
 
   constant c_network_udp_header_ones : t_network_udp_header := ("0000000000000001", "0000000000000001",
                                                                 "0000000000000001", "0000000000000001");
-
 end common_network_layers_pkg;
 
 package body common_network_layers_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
index 84f51e5b776a1136bc4ea5de7fe237e8538cd404..dacf249e9ae17f882d7d5452d0a0301e47349381 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/common_pkg.vhd
@@ -455,7 +455,6 @@ package common_pkg is
   procedure proc_common_dclk_generate_sclk(constant Pfactor : in    positive;
                                            signal   dclk    : in    std_logic;
                                            signal   sclk    : inout std_logic);
-
 end common_pkg;
 
 package body common_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
index 7b6d1a2da0ec2558d87aa708358be0b79c70944d..8f2d68af5f3513e754041f40f639df76bf835bbe 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/dp_stream_pkg.vhd
@@ -391,7 +391,6 @@ package dp_stream_pkg is
   -- Deconcatenate data and complex re,im fields from SOSI into SOSI array
   function func_dp_stream_deconcat(snk_in      : t_dp_sosi; nof_streams, data_w : natural) return t_dp_sosi_arr;  -- Deconcat SOSI data
   function func_dp_stream_deconcat(src_out_arr : t_dp_siso_arr) return t_dp_siso;  -- Wire SISO_ARR(0) to single SISO
-
 end dp_stream_pkg;
 
 package body dp_stream_pkg is
@@ -1471,5 +1470,4 @@ package body dp_stream_pkg is
   begin
     return src_out_arr(0);
   end;
-
 end dp_stream_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
index 103667575791b885ea6d707accd5dc6c04bcb535..2a199611aadb5711a6052920509706dd9cc93ab5 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/eth_pkg.vhd
@@ -213,7 +213,6 @@ package eth_pkg is
   constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
   constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
   constant c_eth_ram_addr_w    : natural := ceil_log2(c_eth_ram_nof_words);
-
 end eth_pkg;
 
 package body eth_pkg is
@@ -344,5 +343,4 @@ package body eth_pkg is
     v_reg(                                                                     0) := mm_reg.rx_avail;  -- [0]
     return v_reg;
   end func_eth_mm_reg_status;
-
 end eth_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
index 177eb750c7386763043b7282d1bfb4b3a3fc6636..7d2cb43f9b6315800f8cba1dc32b4748b7a5511b 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/quartus/ip/qsys_unb2b_minimal/qsys_unb2b_minimal_avs_eth_0/avs2_eth_coe_10/synth/tech_tse_pkg.vhd
@@ -80,7 +80,6 @@ package tech_tse_pkg is
     crs      : std_logic;
     col      : std_logic;
   end record;
-
 end tech_tse_pkg;
 
 package body tech_tse_pkg is
diff --git a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
index fd4dfd48d297596d0790d66898ca7b23f920e06f..18798f67410fda2d3f80e05845ff6fd5b3543d00 100644
--- a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/qsys_unb2b_jesd_pkg.vhd
@@ -213,5 +213,4 @@ component qsys_unb2b_jesd is
             reg_diag_data_buf_jesd_writedata_export                      : out std_logic_vector(31 downto 0)  -- export
         );
     end component qsys_unb2b_jesd;
-
 end qsys_unb2b_jesd_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
index 94c4b4e44734dbcd37a02a86632e8a6eeedde24e..b31ff900ee03839e4791f5535b6bc6067f4059ee 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
+++ b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/mmm_unb2b_minimal.vhd
@@ -308,5 +308,4 @@ begin
       ram_scrap_readdata_export                 => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
index 1470cca51163e20c03fea684792e0fc3269da00f..a20dd7054294c9dc3da5159cdb5e53966161e892 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/qsys_unb2b_minimal_pkg.vhd
@@ -158,5 +158,4 @@ package qsys_unb2b_minimal_pkg is
             reg_unb_pmbus_reset_export         : out std_logic  -- export
         );
     end component qsys_unb2b_minimal;
-
 end qsys_unb2b_minimal_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
index 40bb71ce7c74c29ed7d99ca88af5e1a65a334375..7b38390d6c017bdb270e744864d6a4b9d6defa03 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/mmm_unb2b_test.vhd
@@ -835,5 +835,4 @@ begin
       ram_diag_data_buffer_ddr_MB_II_readdata_export  => ram_diag_data_buf_ddr_MB_II_miso.rddata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
index 87d90d128065ed496f60333ad851e9bd571c54a4..db97fda1c8f43cbc973cc5f3c05f5d10a8664170 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/qsys_unb2b_test_pkg.vhd
@@ -384,5 +384,4 @@ package qsys_unb2b_test_pkg is
             rom_system_info_writedata_export                          : out std_logic_vector(31 downto 0)  -- rom_system_info_writedata.export
         );
     end component qsys_unb2b_test;
-
 end qsys_unb2b_test_pkg;
diff --git a/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd b/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
index 5886a9aef1f2cdadbdeb47b185fea035593d6c63..a179bf532dd19b1576a27913b1a9c45d30e7d257 100644
--- a/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
+++ b/boards/uniboard2b/designs/unb2b_test/src/vhdl/unb2b_test.vhd
@@ -1239,5 +1239,4 @@ begin
       reg_rx_seq_miso   => reg_diag_rx_seq_ddr_MB_II_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
index f2886ef970e244fdfc973e7c87111c79e50f3c7c..98fd010d1d44951c12a0a30d78e7438c809b911d 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
       locked  => pll_locked
     );
   end generate;
-
 end arria10;
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
index 50a6d2d7a593b54b932f9ed9bdfcec53db98972a..38aa96caaa18d90ad9dd222af076fe536673fafd 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2b_board_peripherals_pkg is
   end record;
 
   constant c_unb2b_board_peripherals_mm_reg_default    : t_c_unb2b_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 13, 1, 2, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
 end unb2b_board_peripherals_pkg;
 
 package body unb2b_board_peripherals_pkg is
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
index ecc6fbb01be98b27604e6e0aa49c84cb2d09a4fc..6d3b5f7b5afe7e77a1f507c4db6400a88a5ffa63 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_pkg.vhd
@@ -154,7 +154,6 @@ package unb2b_board_pkg is
 
   function func_unb2b_board_system_info(VERSION : in std_logic_vector(c_unb2b_board_aux.version_w - 1 downto 0);
                                        ID      : in std_logic_vector(c_unb2b_board_aux.id_w - 1 downto 0)) return t_c_unb2b_board_system_info;
-
 end unb2b_board_pkg;
 
 package body unb2b_board_pkg is
diff --git a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
index c93a01d6edde99eae874b1c13b9b5e3a6202a0e3..4baa73a85242b0619b1128cc6a30bb0f3c81421f 100644
--- a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
+++ b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/mmm_unb2c_minimal.vhd
@@ -279,5 +279,4 @@ begin
       ram_scrap_readdata_export                 => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
       );
   end generate;
-
 end str;
diff --git a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
index 0d31242e088c49a836b4f27adaa586763bfc9338..089c40064d379fec419d972a316d6d73566509cb 100644
--- a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/qsys_unb2c_minimal_pkg.vhd
@@ -144,5 +144,4 @@ package qsys_unb2c_minimal_pkg is
             rom_system_info_readdata_export        : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_unb2c_minimal;
-
 end qsys_unb2c_minimal_pkg;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
index 468e48a1a4c0f2ce6ab7076a9494994d7bf54ba8..c42d46238a51097a2d45793968e5cbd2180c1448 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/mmm_unb2c_test.vhd
@@ -892,5 +892,4 @@ begin
       ram_scrap_readdata_export                 => ram_scrap_miso.rddata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
index ee430f809c65a58a0eec86b38732fef2f3d243ea..ff0e1f444450d8d60ef2be5257d1ba290c81e162 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd
@@ -463,5 +463,4 @@ package qsys_unb2c_test_pkg is
             rom_system_info_readdata_export                  : in  std_logic_vector(31 downto 0) := (others => 'X')  -- export
         );
     end component qsys_unb2c_test;
-
 end qsys_unb2c_test_pkg;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
index 7f89b84367a86f6a00aa7bc63949714275561b36..2127db9b7344e254dcedb98dc3779bec30f49696 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
@@ -1456,5 +1456,4 @@ begin
       sla_out => reg_heater_miso
     );
   end generate;
-
 end str;
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
index a0814c9b53c318f61cdb27137a458fd1108f8eba..c7f237d4c5ffbb1aefd7369b4a9bf3b43e7c55e3 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test_pkg.vhd
@@ -90,7 +90,6 @@ package unb2c_test_pkg is
 
   -- Function to select the revision configuration.
   function func_sel_revision_rec(g_design_name : string) return t_unb2c_test_config;
-
 end unb2c_test_pkg;
 
 package body unb2c_test_pkg is
@@ -108,5 +107,4 @@ package body unb2c_test_pkg is
     end if;
 
   end;
-
 end unb2c_test_pkg;
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
index 1c0b8a5d378373cd491677a316c707a5d54e7020..61fbe1ebcffdccf1854086542003d44b568ac410 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_clk125_pll.vhd
@@ -101,5 +101,4 @@ begin
       locked  => pll_locked
     );
   end generate;
-
 end arria10;
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
index 09f3d31eb03c9dea2187fe903fad302efc866c1b..5e135d3755c6cac7e16438c82788d04461d52208 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_peripherals_pkg.vhd
@@ -164,7 +164,6 @@ package unb2c_board_peripherals_pkg is
   end record;
 
   constant c_unb2c_board_peripherals_mm_reg_default    : t_c_unb2c_board_peripherals_mm_reg := (true, 10, 4, 10, 5, 13, 1, 2, 6, 1, 1, 1, 1, 1, 3, 3, 3, 16, 4, 6, 2, 2, 1, 4, 3, 6, 13, 12, 2, 32, 8, 2, 8, 10, 16, 1024, 14, 5, 3, 11, 2, 3, 5, 16, 11, 3, 1, 3, 4, 6);
-
 end unb2c_board_peripherals_pkg;
 
 package body unb2c_board_peripherals_pkg is
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
index 58d12477543d49583818dbc0ecda26a5527523f9..acfadef8c08acf7c588c1caed36bdf543b937de6 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_pkg.vhd
@@ -133,7 +133,6 @@ package unb2c_board_pkg is
 
   function func_unb2c_board_system_info(VERSION : in std_logic_vector(c_unb2c_board_aux.version_w - 1 downto 0);
                                         ID      : in std_logic_vector(c_unb2c_board_aux.id_w - 1 downto 0)) return t_c_unb2c_board_system_info;
-
 end unb2c_board_pkg;
 
 package body unb2c_board_pkg is
diff --git a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
index 5ac1714290e644596277486858106640dece0453..59a683faf3ae837a4168f7ff6b66623c602d8531 100644
--- a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
@@ -98,7 +98,6 @@ package axi4_lite_pkg is
   -- Functions to convert MM to axi4-lite.
   function func_axi4_lite_from_mm_copi(mm_copi : t_mem_copi) return t_axi4_lite_copi;
   function func_axi4_lite_from_mm_cipo(mm_cipo : t_mem_cipo; bvalid : std_logic) return t_axi4_lite_cipo;
-
 end axi4_lite_pkg;
 
 package body axi4_lite_pkg is
@@ -156,5 +155,4 @@ package body axi4_lite_pkg is
     v_axi4_cipo.rvalid  := mm_cipo.rdval;
     return v_axi4_cipo;
   end;
-
 end axi4_lite_pkg;
diff --git a/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd b/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
index 43a42a80fdbb0942ad69bf4f8f2ad64c91f79c5b..83b3b3e5148b9e957d5dcca0828424ff00ef2cc7 100644
--- a/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_stream_pkg.vhd
@@ -186,7 +186,6 @@ package axi4_stream_pkg is
 
   -- Function to derive DP empty from AXI4 tkeep by counting the 0s in TKEEP.
   function func_axi4_stream_tkeep_to_dp_empty(tkeep : std_logic_vector) return std_logic_vector;
-
 end axi4_stream_pkg;
 
 package body axi4_stream_pkg is
@@ -764,5 +763,4 @@ package body axi4_stream_pkg is
     end loop;
     return(TO_UVEC(v_count, c_dp_stream_empty_w));
   end func_axi4_stream_tkeep_to_dp_empty;
-
 end axi4_stream_pkg;
diff --git a/libraries/base/common/src/vhdl/common_acapture_slv.vhd b/libraries/base/common/src/vhdl/common_acapture_slv.vhd
index 04aa1970550e15f5ae0aececbf10ef805c9ac595..40a88979dfa697e1e1ad65d8ef8d10104c20c260 100644
--- a/libraries/base/common/src/vhdl/common_acapture_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_acapture_slv.vhd
@@ -65,5 +65,4 @@ begin
       out_cap => out_cap(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd b/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
index 579de011dc92e04ab491bea1fa48c23370b155f9..f99ec9c9427266eae979b2991bf0f29ebb7cf0a9 100644
--- a/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
+++ b/libraries/base/common/src/vhdl/common_adder_tree_a_str.vhd
@@ -151,5 +151,4 @@ begin
       out_dat => sum
     );
   end generate;  -- no_tree
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_async_slv.vhd b/libraries/base/common/src/vhdl/common_async_slv.vhd
index 1ff3d1454aa4e77e1fa5d8d5ecb3baf01b0638a1..3da78c8bba793c231a7797d33bdebf96b1ac8ab6 100644
--- a/libraries/base/common/src/vhdl/common_async_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_async_slv.vhd
@@ -56,5 +56,4 @@ begin
       dout => dout(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_blockreg.vhd b/libraries/base/common/src/vhdl/common_blockreg.vhd
index dafbf3163e97e2d30a30e1a304fe6e60c2980d23..eaccf1a1e797b041fa0e755e5a8c386e292fbf66 100755
--- a/libraries/base/common/src/vhdl/common_blockreg.vhd
+++ b/libraries/base/common/src/vhdl/common_blockreg.vhd
@@ -147,5 +147,4 @@ begin
     end process;
 
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_components_pkg.vhd b/libraries/base/common/src/vhdl/common_components_pkg.vhd
index ba5e04a595382f2f4586cf619f49c9088b596572..e613b0899dd7a4e18bb0ee2cda336adeda9f1d67 100644
--- a/libraries/base/common/src/vhdl/common_components_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_components_pkg.vhd
@@ -64,7 +64,6 @@ package common_components_pkg is
       out_dat : out std_logic
     );
   end component;
-
 end common_components_pkg;
 
 package body common_components_pkg is
diff --git a/libraries/base/common/src/vhdl/common_ddreg_slv.vhd b/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
index 3b8b40e132784aac1480b8d0e0fd7aa23629f713..9ceed1f10015c8b16729c165f4ab2f144522ed9a 100644
--- a/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
+++ b/libraries/base/common/src/vhdl/common_ddreg_slv.vhd
@@ -59,5 +59,4 @@ begin
       out_dat_lo  => out_dat_lo(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_fanout.vhd b/libraries/base/common/src/vhdl/common_fanout.vhd
index 77143e1487c43d7c0147c90824b0c54df06afb42..b9bdb88786134b2d1afc6f6a6e834957679096c4 100644
--- a/libraries/base/common/src/vhdl/common_fanout.vhd
+++ b/libraries/base/common/src/vhdl/common_fanout.vhd
@@ -90,5 +90,4 @@ begin
       out_dat => out_dat_vec((i + 1) * g_dat_w - 1 downto i * g_dat_w)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_fanout_tree.vhd b/libraries/base/common/src/vhdl/common_fanout_tree.vhd
index d0dcc9ba25c5e0b9d486220db465275b95f96fe4..14cb1a2804a485ffec9ccb6521a147e5365f6391 100644
--- a/libraries/base/common/src/vhdl/common_fanout_tree.vhd
+++ b/libraries/base/common/src/vhdl/common_fanout_tree.vhd
@@ -164,5 +164,4 @@ begin
       out_dat_vec => out_dat_vec
     );
   end generate;  -- no_tree
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_field_pkg.vhd b/libraries/base/common/src/vhdl/common_field_pkg.vhd
index c1dc41df9d0075b0789351a327ff1d5d41badc3b..91a2c77627e7cdde66c2e7c3808ab633156aadc7 100644
--- a/libraries/base/common/src/vhdl/common_field_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_field_pkg.vhd
@@ -82,7 +82,6 @@ package common_field_pkg is
   function field_arr_set_mode(field_arr : t_common_field_arr; mode : string) return t_common_field_arr;
 
   function sel_a_b(sel : boolean; a, b : t_common_field_arr ) return t_common_field_arr;
-
 end common_field_pkg;
 
 package body common_field_pkg is
@@ -356,5 +355,4 @@ package body common_field_pkg is
       return b;
     end if;
   end;
-
 end common_field_pkg;
diff --git a/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd b/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
index 42890418c20ba63f325edd89b045fcd291aed20f..ddacc8534ef9260a9f7212741983705d4cfb53a8 100644
--- a/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
@@ -146,5 +146,4 @@ package body common_interface_layers_pkg is
 
     return ctrl_out;
   end;
-
 end common_interface_layers_pkg;
diff --git a/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd b/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
index 3f11c037e9a5958791241439b19654ea710b8fff..de8d0d4caca0b3b9d2dd5e3f1786b1eda623cd8f 100644
--- a/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_lfsr_sequences_pkg.vhd
@@ -194,5 +194,4 @@ package body common_lfsr_sequences_pkg is
     v_nxt_lfsr(0) := not v_feedback;
     return v_nxt_lfsr;
   end func_common_random;
-
 end common_lfsr_sequences_pkg;
diff --git a/libraries/base/common/src/vhdl/common_math_pkg.vhd b/libraries/base/common/src/vhdl/common_math_pkg.vhd
index 2dfec614b7bf5b0c4097f7f3de7a92e5be8ff8a0..39fca484c1c5ec1f97c3aabdbb9377a7b3b8ca8d 100644
--- a/libraries/base/common/src/vhdl/common_math_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_math_pkg.vhd
@@ -187,5 +187,4 @@ package body common_math_pkg is
     end loop;
     return v_rand_arr;
   end;
-
 end common_math_pkg;
diff --git a/libraries/base/common/src/vhdl/common_mem_mux.vhd b/libraries/base/common/src/vhdl/common_mem_mux.vhd
index 17b494471e212fc87aba6ec98cc93e3f892d930f..f881fcb5bdf00c00fa0bc7ea08416c456b8e7233 100644
--- a/libraries/base/common/src/vhdl/common_mem_mux.vhd
+++ b/libraries/base/common/src/vhdl/common_mem_mux.vhd
@@ -135,5 +135,4 @@ begin
     mosi_arr <= (others => mosi);  -- broadcast write to all [g_nof_mosi-1:0] MM ports
     miso     <= miso_arr(0);  -- broadcast read only from MM port [0]
   end generate;
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_mem_pkg.vhd b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
index 9f035bdfd442ab3c23d9086666076bdfbb92b927..fd2760210c91468c57b6bb77870be68fdce0f2e0 100644
--- a/libraries/base/common/src/vhdl/common_mem_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
@@ -198,7 +198,6 @@ package common_mem_pkg is
   ------------------------------------------------------------------------------
   function func_mem_swap_endianess(mm : t_mem_miso; sz : natural) return t_mem_miso;
   function func_mem_swap_endianess(mm : t_mem_mosi; sz : natural) return t_mem_mosi;
-
 end common_mem_pkg;
 
 package body common_mem_pkg is
@@ -371,5 +370,4 @@ package body common_mem_pkg is
     v_mm.rd      := mm.rd;
     return v_mm;
   end func_mem_swap_endianess;
-
 end common_mem_pkg;
diff --git a/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd b/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
index 904b55d3dfea5b58117775a3e898fc8e8f8bc44d..7db2a166a1bbc853ade1419db7c840be37fd196f 100644
--- a/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_network_layers_pkg.vhd
@@ -356,7 +356,6 @@ package common_network_layers_pkg is
                                                                 "0000000000000001", "0000000000000001");
 
   function func_network_ip_header_checksum(field_arr : t_common_field_arr; hdr_fields_slv : std_logic_vector) return std_logic_vector;
-
 end common_network_layers_pkg;
 
 package body common_network_layers_pkg is
@@ -383,5 +382,4 @@ package body common_network_layers_pkg is
     crc := not(std_logic_vector(sum(c_halfword_w - 1 downto 0) + sum(sum'high downto c_halfword_w)));
     return crc;
   end func_network_ip_header_checksum;
-
 end common_network_layers_pkg;
diff --git a/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd b/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
index 32587a2affb491938595856dac431fd419cf9822..6574631e3626db125a2b2f802075f348152c1c72 100644
--- a/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_network_total_header_pkg.vhd
@@ -277,7 +277,6 @@ package common_network_total_header_pkg is
   function func_network_total_header_no_align_response_icmp(icmp_arr : t_network_total_header_64b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_64b_arr;
   function func_network_total_header_no_align_response_udp( udp_arr  : t_network_total_header_32b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_32b_arr;
   function func_network_total_header_no_align_response_udp( udp_arr  : t_network_total_header_64b_arr; mac_addr : std_logic_vector(c_network_eth_mac_addr_w - 1 downto 0)) return t_network_total_header_64b_arr;
-
 end common_network_total_header_pkg;
 
 package body common_network_total_header_pkg is
@@ -1041,5 +1040,4 @@ package body common_network_total_header_pkg is
     v_response(5)(15 downto  0) := TO_UVEC(0, 16);
     return v_response;
   end;
-
 end common_network_total_header_pkg;
diff --git a/libraries/base/common/src/vhdl/common_operation_tree.vhd b/libraries/base/common/src/vhdl/common_operation_tree.vhd
index 0ad7a72e6a505ae3d16858522dab7aae34254de7..b394783d73064fbc4a9be40f6da42dfb839f9cfb 100644
--- a/libraries/base/common/src/vhdl/common_operation_tree.vhd
+++ b/libraries/base/common/src/vhdl/common_operation_tree.vhd
@@ -146,5 +146,4 @@ begin
       out_dat => result
     );
   end generate;  -- no_tree
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
index 094c7c988bbd3d8caef01f0c2e655b4ec962b72f..2aeaff9ba702cb85849ef3ec185d52b755c18743 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_cr_cw.vhd
@@ -313,5 +313,4 @@ begin
     buf_wr_adr <= INCR_UVEC(RESIZE_UVEC(wr_adr, c_buf_addr_w), page_ofs_wr);
     buf_rd_adr <= INCR_UVEC(RESIZE_UVEC(rd_adr, c_buf_addr_w), page_ofs_rd);
   end generate;  -- gen_ofs
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
index a8f4d13706a31577e34c2816de7b5581c775d75e..a0aecdf3aa39731f513b53bf2002443d84f8da00 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd
@@ -343,5 +343,4 @@ begin
     buf_adr_a <= INCR_UVEC(RESIZE_UVEC(adr_a, c_buf_addr_w), page_ofs_a);
     buf_adr_b <= INCR_UVEC(RESIZE_UVEC(adr_b, c_buf_addr_w), page_ofs_b);
   end generate;  -- gen_ofs
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
index 9a18427a808ded6f8026c59d3937f63d628ff755..4913520afe9babb698df1685c16ab1c54480b8cf 100644
--- a/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_ram_rw_rw.vhd
@@ -336,5 +336,4 @@ begin
     buf_adr_a <= INCR_UVEC(RESIZE_UVEC(adr_a, c_buf_addr_w), page_ofs_a);
     buf_adr_b <= INCR_UVEC(RESIZE_UVEC(adr_b, c_buf_addr_w), page_ofs_b);
   end generate;  -- gen_ofs
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_paged_reg.vhd b/libraries/base/common/src/vhdl/common_paged_reg.vhd
index 1e02358fc6f748f42a4df1a020cf466479a27893..d2ab01b8be99816c6bd9b736a7fbd675d4118a01 100644
--- a/libraries/base/common/src/vhdl/common_paged_reg.vhd
+++ b/libraries/base/common/src/vhdl/common_paged_reg.vhd
@@ -68,5 +68,4 @@ begin
       out_dat => reg_dat(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd b/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
index 8d883bbf79825eb22ceaac144aab055bc737e26a..51705d2b65dc7b56a71aeb43fc3393eaf64b21a0 100644
--- a/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
+++ b/libraries/base/common/src/vhdl/common_pipeline_symbol.vhd
@@ -113,5 +113,4 @@ begin
     -- map arr to output vector
     out_data((I + 1) * g_symbol_w - 1 downto I * g_symbol_w) <= out_dat_arr(I);
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_pkg.vhd b/libraries/base/common/src/vhdl/common_pkg.vhd
index a45d79b3fcda4eef738e120a12c44c3c6ebc5c48..1906c4c1bf12a05a695f6214e30d9a05b8298f4a 100644
--- a/libraries/base/common/src/vhdl/common_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_pkg.vhd
@@ -597,7 +597,6 @@ package common_pkg is
   procedure proc_common_dclk_generate_sclk(constant Pfactor : in    positive;
                                            signal   dclk    : in    std_logic;
                                            signal   sclk    : inout std_logic);
-
 end common_pkg;
 
 package body common_pkg is
diff --git a/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd b/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
index f4e02fa89d7abea93b3391c150b08aa2e35abee7..5b498629a87de8440da173f1bbd97bada9f3cec7 100644
--- a/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
+++ b/libraries/base/common/src/vhdl/common_pulse_delay_reg.vhd
@@ -135,5 +135,4 @@ begin
       out_new     => open
     );
   end generate;  -- gen_common_reg_cross_domain
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_reinterleave.vhd b/libraries/base/common/src/vhdl/common_reinterleave.vhd
index af7766e68e562ad2f6d8ce40eeb6e64249340bce..a9d181a8e4bf2f4931596327747a39e2a656019f 100644
--- a/libraries/base/common/src/vhdl/common_reinterleave.vhd
+++ b/libraries/base/common/src/vhdl/common_reinterleave.vhd
@@ -235,5 +235,4 @@ begin
     out_dat( i * g_dat_w + g_dat_w - 1 downto i * g_dat_w) <= inter_out_dat_arr(i);
     out_val(i)                                      <= inter_out_val(i);
   end generate;
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_rl_increase.vhd b/libraries/base/common/src/vhdl/common_rl_increase.vhd
index 43f002b9f52d79aa5edfe7446f93a04c2d66ad3c..3f50030ae233a6bdbab71685f499022f1c6933bf 100644
--- a/libraries/base/common/src/vhdl/common_rl_increase.vhd
+++ b/libraries/base/common/src/vhdl/common_rl_increase.vhd
@@ -91,5 +91,4 @@ begin
     nxt_hold_dat <= snk_in_dat when hold_val = '1' else hold_dat;
     src_out_dat  <= snk_in_dat when g_hold_dat_en = false else nxt_hold_dat;
   end generate;
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_shiftram.vhd b/libraries/base/common/src/vhdl/common_shiftram.vhd
index 7770e46a34b7345415fa6f016d77b1f4964f214a..15a2ec987f1c40a6c607986990e148c9e16b588d 100644
--- a/libraries/base/common/src/vhdl/common_shiftram.vhd
+++ b/libraries/base/common/src/vhdl/common_shiftram.vhd
@@ -315,5 +315,4 @@ begin
     data_out       <= r3.data_out;
     data_out_val   <= r3.data_out_val;
   end generate;
-
 end rtl;
diff --git a/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd b/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
index e5a3137af0c6d1c0e6042f3dca9df27e67ddeefd..9d9575f293673a7587510fa34f555fbdfd06bc50 100644
--- a/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
+++ b/libraries/base/common/src/vhdl/common_shiftreg_symbol.vhd
@@ -93,5 +93,4 @@ begin
     -- map arr to output vector
     out_data((I + 1) * g_symbol_w - 1 downto I * g_symbol_w) <= out_dat_arr(I);
   end generate;
-
 end str;
diff --git a/libraries/base/common/src/vhdl/common_str_pkg.vhd b/libraries/base/common/src/vhdl/common_str_pkg.vhd
index b56337e78f3b30c3c87bcf1a2ebc97076aceb26c..b59ee9c9f14dce90532a2423fc9af6442c7ce181 100644
--- a/libraries/base/common/src/vhdl/common_str_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_str_pkg.vhd
@@ -335,5 +335,4 @@ package body common_str_pkg is
     end loop;
     return r;
   end;
-
 end common_str_pkg;
diff --git a/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd b/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
index c1bf30f4e766887b13fc92adceb1eca0088d0ebe..6b87b951a57d13942adbed0b12ea8b86c2692221 100644
--- a/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
+++ b/libraries/base/common/src/vhdl/mms_common_stable_monitor.vhd
@@ -106,5 +106,4 @@ begin
       r_stable_ack => st_stable_ack
     );
   end generate;
-
 end str;
diff --git a/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd b/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
index 94e5f10bbfb7a530bd28415974f67c6a6872c6fe..ef1d1d35ce28fd6b62576dd683c50fd14a138c81 100644
--- a/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_mem_pkg.vhd
@@ -246,5 +246,4 @@ package body tb_common_mem_pkg is
   begin
     proc_mem_read_ram(c_offset, c_nof_data, mm_clk, mm_mosi, mm_miso, data_arr);
   end proc_mem_read_ram;
-
 end tb_common_mem_pkg;
diff --git a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
index de11904870898ab5668afb9fe86fa7601b1e149f..8f5c453e31302a2dcb4b18a94dd786044c980c81 100644
--- a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
@@ -1427,5 +1427,4 @@ package body tb_common_pkg is
     end loop;
     return(v_found_it);
   end function func_find_string_in_string;
-
 end tb_common_pkg;
diff --git a/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd b/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
index 842665e03eaef6b8cf5ee40cc701ac970ca4d0ff..6756091b74036d98dd9ca990cc91ef5f6fc23334 100644
--- a/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_reinterleave.vhd
@@ -196,5 +196,4 @@ begin
   gen_rev_out : for i in 0 to g_nof_out - 1 generate
     rev_out_dat_arr(i) <= rev_out_dat( i * g_dat_w + g_dat_w - 1 downto i * g_dat_w);
   end generate;
-
 end rtl;
diff --git a/libraries/base/common/tb/vhdl/tb_common_switch.vhd b/libraries/base/common/tb/vhdl/tb_common_switch.vhd
index 457290cb5c787750f4466b1c972a8bd425fbcab8..b886c140d3c3ab207d673fca077f4f840a99c9f8 100644
--- a/libraries/base/common/tb/vhdl/tb_common_switch.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_switch.vhd
@@ -237,5 +237,4 @@ begin
       out_level   => out_level(I)
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/common/tb/vhdl/tb_resize.vhd b/libraries/base/common/tb/vhdl/tb_resize.vhd
index 01c561206458156c024ae06aeb2b78d6676ef6ae..83d3dbac30cb39798eb0bd98f5a0b849a50cd610 100644
--- a/libraries/base/common/tb/vhdl/tb_resize.vhd
+++ b/libraries/base/common/tb/vhdl/tb_resize.vhd
@@ -238,5 +238,4 @@ begin
       assert unsigned(resize_num_udat) = unsigned(lowrange_udat) report "Wrong resize_num_udat /= lowrange_udat" severity ERROR;
     end if;
   end process;
-
 end tb;
diff --git a/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd b/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
index ac64038aab845870f1cbe72e10dc762f5daca025..74fa19940257deeffc998d5ee9c834f488ebb514 100644
--- a/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
+++ b/libraries/base/common/tb/vhdl/tb_tb_common_adder_tree.vhd
@@ -60,5 +60,4 @@ begin
     u_sum_w_min_1  : entity work.tb_common_adder_tree generic map ("UNSIGNED", 1, I, 8, 8 - 1);
     u_sum_w_wider  : entity work.tb_common_adder_tree generic map ("UNSIGNED", 1, I, 8, 8 + 8);
   end generate;
-
 end tb;
diff --git a/libraries/base/common_mult/src/vhdl/common_mult_add.vhd b/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
index 9c70318d26846e4a5ced66e809acd9d64cf61149..08a00fb8f2dc970cd5cff62f8c6d796b73f4e220 100644
--- a/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
+++ b/libraries/base/common_mult/src/vhdl/common_mult_add.vhd
@@ -96,5 +96,4 @@ begin
   gen_sub : if g_add_sub = "SUB" generate
     nxt_result <= resize(prod0, c_sum_w) - prod1;
   end generate;
-
 end rtl;
diff --git a/libraries/base/diag/src/vhdl/diag_pkg.vhd b/libraries/base/diag/src/vhdl/diag_pkg.vhd
index 8f88945551725e4a93ed9d88fd2714e027a73f0e..bd3278afea5b92ce79b73619ee18367090a2a300 100644
--- a/libraries/base/diag/src/vhdl/diag_pkg.vhd
+++ b/libraries/base/diag/src/vhdl/diag_pkg.vhd
@@ -218,7 +218,6 @@ package diag_pkg is
   constant c_diag_seq_tx_reg_en_cntr    : natural := 3;
 
   type t_diag_seq_mm_reg_arr is array (integer range <>) of t_diag_seq_mm_reg;
-
 end diag_pkg;
 
 package body diag_pkg is
@@ -255,5 +254,4 @@ package body diag_pkg is
             TO_UINT(bg_ctrl_slv.mem_high_adrs),
             TO_UINT(bg_ctrl_slv.bsn_init));
   end;
-
 end diag_pkg;
diff --git a/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd b/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
index bb2657dbd84c20cf1fc44d553717566f55a69238..247f6d3def4fd6b4cc711a21c6dc69835bcf1dc4 100644
--- a/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
+++ b/libraries/base/diag/src/vhdl/diag_wg_wideband.vhd
@@ -166,5 +166,4 @@ begin
       out_sync       => out_sync(                                           g_wideband_factor - I - 1)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd b/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
index b0d7b45dc644122ff823691236470fd37bf97c8e..4dd262a70c8ab56d0478fddf8654b2bf585a7536 100644
--- a/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
+++ b/libraries/base/diag/src/vhdl/diag_wg_wideband_reg.vhd
@@ -252,5 +252,4 @@ begin
       out_dat     => mm_mon_ctrl.ampl
     );
   end generate;
-
 end rtl;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd b/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
index 60095ffc8cd08aad6673de21d5b4b13f759ecbe8..c725906b2be67174c1387f2eab2cb641c08c6fbc 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_block_gen.vhd
@@ -395,5 +395,4 @@ begin
       tx_src_in_arr   => out_siso_arr
     );
   end generate;
-
 end rtl;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd b/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
index 481104862a93ecb6f5472cdc59622b9bff0f40c0..bb14b29fe70a0035f2878cdbf4ff358294fdb367 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_data_buffer.vhd
@@ -217,5 +217,4 @@ begin
       rx_snk_in_arr  => in_sosi_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd b/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
index 6bfbb0dab81cfb0eead674bfed767537174eca87..70303076096dde6136d49fb670a3390b9030d1f1 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_data_buffer_dev.vhd
@@ -219,5 +219,4 @@ begin
       rx_snk_in_arr  => in_sosi_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
index 879b31e63223a9fea3b2d43bb5e8465c5d81e3be..c739f3c3bf2e810de3812083afc56e3f0d6b2771 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
@@ -381,5 +381,4 @@ begin
       src_out_arr  => tx_src_out_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd b/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
index aa5b1be2c4a74ae4c5562355099407b9ae6428c3..e319a43ff9e87b59ac24b6da6178e6a250a0e5f3 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_wg_wideband_arr.vhd
@@ -158,5 +158,4 @@ begin
                                   vector_or(wg_ovr( (I + 1) * g_wideband_factor             - 1 downto I * g_wideband_factor            )) = '0' else
                             TO_DP_ERROR(2**7);  -- pass ADC or WG overflow info on as an error signal
   end generate;
-
 end str;
diff --git a/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd b/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
index 7e2bccd25837d6336000f2f54d2946ec59638424..97180e901d6338573c270681387f076222ddbe17 100644
--- a/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
+++ b/libraries/base/diag/tb/vhdl/tb_diag_pkg.vhd
@@ -690,5 +690,4 @@ package body tb_diag_pkg is
                                      cw_ampl, cw_phase, cw_dat, cw_noise,
                                      accum_noise_power, measured_noise_power);
   end proc_diag_measure_cw_noise_power;
-
 end tb_diag_pkg;
diff --git a/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd b/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
index 796aeba35b4cfc5f86b12b1aa6ac3f6a783a4873..8b9d74a9f1a9ca8bf43247ee7593c4efac34faa9 100644
--- a/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
+++ b/libraries/base/diagnostics/tb/vhdl/tb_diagnostics_trnb_pkg.vhd
@@ -143,5 +143,4 @@ package body tb_diagnostics_trnb_pkg is
     -- Idle interval
     proc_common_wait_some_cycles(mm_clk, c_mm_clk_1us * c_diag_off_interval);
   end procedure proc_diagnostics_trnb_run_and_verify;
-
 end tb_diagnostics_trnb_pkg;
diff --git a/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd b/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
index 8e84c4b54cefa76aca3a7e8fbfb249f343f8a738..629e09198caeb8c86dabc1a9d4a4a57911c7b73f 100644
--- a/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
+++ b/libraries/base/dp/designs/unb1_dp_offload/src/vhdl/mmm_unb1_dp_offload.vhd
@@ -401,5 +401,4 @@ begin
       coe_writedata_export_from_the_reg_diag_data_buffer      => reg_diag_data_buf_mosi.wrdata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
index e2f93b3baf63e0f68a8f584f62748b3f2ab159ec..f18dffcfad48b66bff2a55cbdc5ace0fb87af0a2 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_align_reg.vhd
@@ -112,5 +112,4 @@ begin
   gen_out_arr : for I in 0 to g_nof_input - 1 generate
     out_en_arr(I) <= out_en_arr_reg(I * c_word_w);
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
index 36d2d553ae37566374c310a39e4f1f0c651429fa..d7d928eb726427abf18229ac5609816d58ff5aa4 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_scheduler_reg.vhd
@@ -189,5 +189,4 @@ begin
       out_new     => open
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
index e6310abb8fd4fe3e288e0643536d7321e766a073..3ddac34d3f00131f4640c28c9a3d579c75fa9a6f 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg.vhd
@@ -276,5 +276,4 @@ begin
       out_new     => open
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
index 71eab87eda14396b01034520b7417afaf2385af0..da53edfb21395cc8269893d4b1c0de05a16b23d4 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
@@ -314,5 +314,4 @@ begin
       out_new     => open
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_counter.vhd b/libraries/base/dp/src/vhdl/dp_counter.vhd
index 9748348ee2a86f2031e137f3ef2834fb75fdf7eb..fd007ff4d311a18b5acbea3091bc3851cd46f99d 100644
--- a/libraries/base/dp/src/vhdl/dp_counter.vhd
+++ b/libraries/base/dp/src/vhdl/dp_counter.vhd
@@ -205,5 +205,4 @@ begin
 
     count_src_out_arr <= dp_counter_func_src_out_arr;
   end generate;
-
 end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_counter_func.vhd b/libraries/base/dp/src/vhdl/dp_counter_func.vhd
index 89431450ddc9d374bc5029dfa76a666ae1b79374..9e8f19ea7fb299de539224144807e109e256790a 100644
--- a/libraries/base/dp/src/vhdl/dp_counter_func.vhd
+++ b/libraries/base/dp/src/vhdl/dp_counter_func.vhd
@@ -130,5 +130,4 @@ begin
     count_src_out_arr(i).valid <= count_en;
     count_src_out_arr(i).data <= RESIZE_DP_DATA(count_arr(i));
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_deinterleave.vhd b/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
index e652bad0f33602eaf96897dd7ae3742d9a380e17..9c54eddb6a363cf469a0edb78f312d3235749a9b 100644
--- a/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
+++ b/libraries/base/dp/src/vhdl/dp_deinterleave.vhd
@@ -169,5 +169,4 @@ begin
   no_align_out : if g_use_sync_bsn = false generate
     src_out_arr <= dp_block_gen_src_out_arr;
   end generate;
-
 end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd b/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
index d5dabeee58c1845758e978fef65d98da8efc2b78..e82a3e5a180030d6d90e32d2c0d8152891e5a8bc 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_fill_reg.vhd
@@ -143,5 +143,4 @@ begin
       out_val   => open
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd b/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
index 4ec10842d177934e3c4ed29051f3fb59d074c03a..2864d417d218ecf9fe0e87a1a82b0a26d1c7ecd8 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_monitor_arr.vhd
@@ -94,5 +94,4 @@ begin
       rd_fill_32b  => rd_fill_32b_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_folder.vhd b/libraries/base/dp/src/vhdl/dp_folder.vhd
index 7b49530966b8140e84a36a88e751ae7407d0283f..f39ef96b50195ac98ee3a9374781527d8663d543 100644
--- a/libraries/base/dp/src/vhdl/dp_folder.vhd
+++ b/libraries/base/dp/src/vhdl/dp_folder.vhd
@@ -247,5 +247,4 @@ begin
   gen_wire_out_to_in: if g_nof_folds = 0 generate
     dp_block_gen_snk_in_arr <= snk_in_arr;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd b/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
index 8b2e689ec4b6465c2b48bc0507f420d92bca15e4..7dec1de9358f1868a6d7427897090df78df8ed6b 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_busy_arr.vhd
@@ -54,5 +54,4 @@ begin
       snk_in_busy => snk_in_busy_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_remove.vhd b/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
index 41dbe3e5e8d7d9a21f5067063ecf6e4b986e1e5b..07c69bae7ecdfceb6fd4e808a1db822ea0a29e94 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_remove.vhd
@@ -123,5 +123,4 @@ begin
     src_out <= snk_in;
     snk_out <= src_in;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_frame_repack.vhd b/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
index 7bda823b126ca1c283b9e3f0855b50426fbcf909..4aab4563dadf030151ecdff3e1096011a24545f8 100644
--- a/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
+++ b/libraries/base/dp/src/vhdl/dp_frame_repack.vhd
@@ -132,5 +132,4 @@ begin
       out_eof        => out_eof
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd b/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
index 4de916688351f6f59cc3429bbab94ce4432705dd..a02bb3a331b3da04711232b1eaf1e19755dce683 100644
--- a/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
+++ b/libraries/base/dp/src/vhdl/dp_hdr_insert.vhd
@@ -113,5 +113,4 @@ begin
     src_out <= snk_in;
     snk_out <= src_in;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd b/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
index 77c10e03b932bb464eae94ee8ad2a69cc47d5968..2b56d4a59114902572c36b1b8aa557cdb86f4eb7 100644
--- a/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
+++ b/libraries/base/dp/src/vhdl/dp_latency_fifo.vhd
@@ -120,5 +120,4 @@ begin
       src_out      => src_out
     );
   end generate;
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_mux.vhd b/libraries/base/dp/src/vhdl/dp_mux.vhd
index 9e15141bf0d0e2ed1434f088636abf7a57a8c1ce..6a40ad62d17cd46f0bdf21138f4e42683428a66d 100644
--- a/libraries/base/dp/src/vhdl/dp_mux.vhd
+++ b/libraries/base/dp/src/vhdl/dp_mux.vhd
@@ -412,5 +412,4 @@ begin
     end process;
 
   end generate;
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
index 64f0ef268b00f6fc96f91956c86b2be42b49c891..f21d8df41643b97d8deef8172178d16cedaabb13 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_filter.vhd
@@ -39,7 +39,6 @@ entity dp_offload_rx_filter is
     g_udp_dst_port_ena    : boolean
   );
   port (
-
     dp_rst            : in  std_logic;
     dp_clk            : in  std_logic;
 
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
index f3c4567456ed12046d06e6140eaad19abb70019c..ae1a6d18cd781bb503be493c49162fe0af613bcc 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_filter_mm.vhd
@@ -35,7 +35,6 @@ entity dp_offload_rx_filter_mm is
     g_hdr_field_arr       : t_common_field_arr
   );
   port (
-
     dp_rst            : in  std_logic;
     dp_clk            : in  std_logic;
 
diff --git a/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd b/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
index cbe97b4e0fe8285b53674c2a8d6ce65844a04c4c..de679823184d5ed25b087267167a81c94b219f71 100644
--- a/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
+++ b/libraries/base/dp/src/vhdl/dp_offload_rx_legacy.vhd
@@ -121,5 +121,4 @@ begin
       src_out   => dp_sosi_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_packet_merge.vhd b/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
index 2719bd8d00b80b75538d8847563b05ed71cfddaf..9aece76e341e24dbe289499c3b71d48b5243fd6c 100644
--- a/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packet_merge.vhd
@@ -49,7 +49,6 @@
 -- . The input packets do not have to have equal length, because they are
 --   merged based on counting their eop.
 
-
 library IEEE,common_lib;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;
diff --git a/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd b/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
index 76c65b3a90f6e54de9e7edd5d6a88f58d74c8f24..9cc63a23dff47fdbd427afce6130e306c562af27 100644
--- a/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packet_pkg.vhd
@@ -63,5 +63,4 @@ package body dp_packet_pkg is
            ceil_div(c_dp_packet_bsn_w, c_data_w) +
            ceil_div(c_dp_packet_error_w, c_data_w);
   end;
-
 end dp_packet_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd b/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
index cbc94af7224cb6c9b209aee2dfd9ec18a17a88c9..2c64e9af365815eb697055ff2584e28cab76db8b 100644
--- a/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_packetizing_pkg.vhd
@@ -138,5 +138,4 @@ package body dp_packetizing_pkg is
 
     return nxt_crc;
   end func_dp_next_crc;
-
 end dp_packetizing_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_pad_insert.vhd b/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
index 7a0fe1975a1eb11518ad87dcc0650ae48120c3cc..43c49d06e8c9f90b1fa0e6fe203d6c316bb2beb7 100644
--- a/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pad_insert.vhd
@@ -145,5 +145,4 @@ begin
     src_out <= snk_in;
     snk_out <= src_in;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pad_remove.vhd b/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
index 134fc740effe0bb5ddbd1251b300d03b4ed8e30b..542ce3e0ae24095c073fab26c6452f704c27e3da 100644
--- a/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pad_remove.vhd
@@ -86,5 +86,4 @@ begin
     src_out <= snk_in;
     snk_out <= src_in;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline.vhd b/libraries/base/dp/src/vhdl/dp_pipeline.vhd
index 63f860246cf717d911bbb9282398d93d9ca88a97..ab6d345b1e744d54c8c491ae55c11332f86cbaa3 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline.vhd
@@ -106,7 +106,6 @@ begin
       src_out      => snk_in_arr(I)
     );
   end generate;
-
 end str;
 
 library IEEE, common_lib;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd b/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
index 57e45e045e4a8c287749f8c4c494ea63e4bda484..609982030dba434238b1adb3856bc41344ed6dde 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline_arr.vhd
@@ -64,5 +64,4 @@ begin
       src_out      => src_out_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd b/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
index b4dcc11aac1b11163a0422c6ac6a81bfc92136ac..5f3af0c8ecf9768a0563af4e207a28fb63099e0c 100644
--- a/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
+++ b/libraries/base/dp/src/vhdl/dp_pipeline_ready.vhd
@@ -149,5 +149,4 @@ begin
       src_out      => src_out
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_reinterleave.vhd b/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
index d0f65d7299734d6a4c435283a0e453714cb7a57e..6d85066f23931ab92e7285e9c0340133e377705e 100644
--- a/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
+++ b/libraries/base/dp/src/vhdl/dp_reinterleave.vhd
@@ -200,5 +200,4 @@ begin
   no_align_out : if g_use_sync_bsn = false generate
     src_out_arr <= dp_block_gen_src_out_arr;
   end generate;
-
 end wrap;
diff --git a/libraries/base/dp/src/vhdl/dp_repack_data.vhd b/libraries/base/dp/src/vhdl/dp_repack_data.vhd
index fbc1849f6a79eb003fcbabc5ed3a4a8e6db5a95a..4a675f0fdf3ecb7e2ffe4328cba70532e17f3e6c 100644
--- a/libraries/base/dp/src/vhdl/dp_repack_data.vhd
+++ b/libraries/base/dp/src/vhdl/dp_repack_data.vhd
@@ -382,7 +382,6 @@ begin
     snk_out.ready <= r_snk_out.ready when nxt_r.hold_out.valid = '0' else src_in.ready;  -- if there is pending output then the src_in ready determines the flow control
     snk_out.xon   <= src_in.xon;  -- just pass on the xon/off frame flow control
   end generate;
-
 end rtl;
 
 library IEEE, common_lib, dp_lib;
@@ -622,7 +621,6 @@ begin
     snk_out.ready <= r_snk_out.ready when nxt_r.hold_out.valid = '0' else src_in.ready;  -- if there is pending output then the src_in ready determines the flow control
     snk_out.xon   <= src_in.xon;  -- just pass on the xon/off frame flow control
   end generate;
-
 end rtl;
 
 library IEEE, common_lib, dp_lib;
diff --git a/libraries/base/dp/src/vhdl/dp_shiftram.vhd b/libraries/base/dp/src/vhdl/dp_shiftram.vhd
index f63fd0c4d9a8830d8340939a3e4f26ada9a05ab9..c15eb6a6d3bb820f1eac618f364e85b65ae7ddb4 100644
--- a/libraries/base/dp/src/vhdl/dp_shiftram.vhd
+++ b/libraries/base/dp/src/vhdl/dp_shiftram.vhd
@@ -145,5 +145,4 @@ begin
       end process;
     end generate;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/dp_shiftreg.vhd b/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
index 0a6c63afa81d0216065f4c21d79df4095509133b..33f98e86b27b3e2d92013e8693116850bf8c1110 100644
--- a/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_shiftreg.vhd
@@ -188,5 +188,4 @@ begin
       src_out     => src_out
     );
   end generate;
-
 end rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd b/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
index 5f121726fe81f2f5338d6368fd25567015649795..634513a77a3de3058c89e5191a6e9d6c43f87a1e 100644
--- a/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_stream_pkg.vhd
@@ -407,7 +407,6 @@ package dp_stream_pkg is
   -- Return TRUE when the sosi.data of both streams matches (and is valid)
   function func_dp_data_match(snk_in_a, snk_in_b: t_dp_sosi; data_w: natural) return boolean;
   function func_dp_data_match(snk_in_a, snk_in_b, snk_in_c: t_dp_sosi; data_w: natural) return boolean;
-
 end dp_stream_pkg;
 
 package body dp_stream_pkg is
@@ -1561,5 +1560,4 @@ package body dp_stream_pkg is
   begin
     return func_dp_data_match(snk_in_a, snk_in_b, data_w) and func_dp_data_match(snk_in_b, snk_in_c, data_w);
   end;
-
 end dp_stream_pkg;
diff --git a/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd b/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
index d5d54d2a23d6e683fe8936711552399d3e5bec2f..9865efd13247d3ca19a5aae5a829f65f8d0a605f 100644
--- a/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_insert_v2.vhd
@@ -46,7 +46,6 @@ entity dp_sync_insert_v2 is
     g_nof_blk_per_sync_min : natural := 19530
   );
   port (
-
     -- Clocks and reset
     mm_rst     : in  std_logic;
     mm_clk     : in  std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
index 60fee25c8b2c1db2cef921d309acde526dcd4587..b7ddc348e921085d02d4f1dc3ab38c291620d422 100644
--- a/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
+++ b/libraries/base/dp/src/vhdl/dp_sync_recover.vhd
@@ -49,7 +49,6 @@ entity dp_sync_recover is
     g_nof_data_per_block : positive := 1
   );
   port (
-
     -- Clocks and reset
     dp_rst      : in  std_logic;
     dp_clk      : in  std_logic;
diff --git a/libraries/base/dp/src/vhdl/dp_unfolder.vhd b/libraries/base/dp/src/vhdl/dp_unfolder.vhd
index 3df7cc4c185dbc765a534f033d12a27592ae1ab5..495eaea09c5ce913356353289c6fddeb7a2ea6b1 100644
--- a/libraries/base/dp/src/vhdl/dp_unfolder.vhd
+++ b/libraries/base/dp/src/vhdl/dp_unfolder.vhd
@@ -260,5 +260,4 @@ begin
   gen_wire_out_to_in: if g_nof_unfolds = 0 generate
     dp_block_gen_snk_in_arr <= snk_in_arr;
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd b/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
index 336f7e55650bcfe35676e4a5d72bfc1b5140ce16..8c91b3bfd2bf860a039b3c6ee35c630d15e9957a 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_block_select.vhd
@@ -113,5 +113,4 @@ begin
       src_out      => src_out_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
index 645f43333ff9b7cb54ce3df380b8ba1a0f318484..dc4ec575cfe14022ddf253f356d6619555f325a3 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor.vhd
@@ -158,5 +158,4 @@ begin
       mon_bsn_first_cycle_cnt => mon_bsn_first_cycle_cnt_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
index 5ba8560094d70960cc11046750eb30bdc7120eeb..3ae1fff0856e24cdadbe866de1a79e3622d4c93f 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_bsn_monitor_v2.vhd
@@ -155,5 +155,4 @@ begin
       mon_latency             => mon_latency_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd b/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
index 5191eef130c0cbf7c8b564763723026555d413da..1df22e72349db1abc555c37a041456bb85c09e7d 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_packet_merge.vhd
@@ -115,5 +115,4 @@ begin
       src_out     => src_out_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_split.vhd b/libraries/base/dp/src/vhdl/mms_dp_split.vhd
index ee7ade081fde5e7f57217c5313a7238ff945c635..be0cdf397d71f81a9b3d597ef5181bca1460566e 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_split.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_split.vhd
@@ -117,5 +117,4 @@ begin
       src_out_arr => src_out_2arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd b/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
index ac9ddc3c2c61bc2adb2aeb61bafddccc6059a8b6..feea9a66a5761299739944eb778379c1750cf69e 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_xonoff.vhd
@@ -153,5 +153,4 @@ begin
       force_xoff => force_xoff_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/tb/vhdl/dp_phy_link.vhd b/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
index bf481437ec77e990024c18bfb14bcf12a04f5b5c..459e4addc19104ec5b4b0d4c0daebfa5b21de056 100644
--- a/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_phy_link.vhd
@@ -59,5 +59,4 @@ begin
   no_valid : if g_valid_support = false generate
     out_val <= '1';
   end generate;
-
 end beh;
diff --git a/libraries/base/dp/tb/vhdl/dp_statistics.vhd b/libraries/base/dp/tb/vhdl/dp_statistics.vhd
index 90c09b5f2448bf0e3d3462be865e6cb8b8766fa3..bdbbbc7a7fb1f9a95a11ecc997042dd0d3dc84ff 100644
--- a/libraries/base/dp/tb/vhdl/dp_statistics.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_statistics.vhd
@@ -53,7 +53,6 @@ entity dp_statistics is
     g_dp_word_w                : natural := 32  -- Used to calculate data rate
    );
   port (
-
     dp_clk : in  std_logic := '0';
     dp_rst : in  std_logic;
 
diff --git a/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd b/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
index fe65542bf2fbd85107eb3668b1d835aa1055b805..523b7c211d0b39cb9ca138903a176081a30f63fc 100644
--- a/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
+++ b/libraries/base/dp/tb/vhdl/dp_stream_rec_play.vhd
@@ -82,5 +82,4 @@ begin
       src_out => src_out
     );
   end generate;
-
 end str;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd b/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
index f9ff61dc0cde12b083755783d457d3e0a4726a7e..2eef1c0aabe5bb7ea7e2ad9b9d67f3b47e3c2a36 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_counter_func.vhd
@@ -240,5 +240,4 @@ architecture tb of tb_dp_counter_func is
   gen_tb_count_arr : for i in 0 to g_nof_counters - 1 generate
     tb_count_arr(I) <= TO_UINT(dp_counter_func_count_src_out_arr(I).data(c_max_count_w - 1 downto 0)) when dp_counter_func_count_en = '1';
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd b/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
index 033d1fe07974c6468c04f7896a1148591d17e9c2..b27402df79cf395121125082275afd24dd4e11e3 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_deinterleave.vhd
@@ -143,5 +143,4 @@ begin
     out_im_arr(I)  <= src_out_arr(I).im(g_dat_w / 2 - 1 downto 0);
     out_val_arr(I) <= src_out_arr(I).valid;
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd b/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
index 58dfd08b6b86182b08636a4040a432cc9bccb9f0..8e32f03f95313b0b8fce82847a51d9009710a1d4 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_fifo_dc_mixed_widths.vhd
@@ -288,5 +288,4 @@ begin
   gen_exact : if g_use_ctrl = true generate
     proc_dp_verify_value(e_equal, narrow_clk, verify_done, expected_exact, prev_out_data);  -- for framed data we know exactly what to expect
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd b/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
index 481331ffe8aed6340372dc1eac8501f63bfa0beb..599f8d615b78d2a5d4b346a2b87efdc104da62d4 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_sync_insert_v2.vhd
@@ -228,5 +228,4 @@ begin
     -- Verify output packet block size
     proc_dp_verify_block_size(exp_size, dp_clk, out_sosi_arr(I).valid, out_sosi_arr(I).sop, out_sosi_arr(I).eop, cnt_size_arr(I));
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
index 3ec6d1732919742453554344f93c588e96728474..4a405507f7423da6e7d5ec5ea603a57fee2b5b79 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_parallel_arr.vhd
@@ -364,5 +364,4 @@ begin
       src_out_arr         => src_out_arr
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
index 4b9c1555db8bd952e4309078712723405c2ee357..4925844ae72ee8cf7cfb293d4b3cfa23a75f67ff 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_force_data_serial_arr.vhd
@@ -340,5 +340,4 @@ begin
       src_out_arr         => src_out_arr
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
index 17f42645099e64f6308b8cf4ada29af437ac11ac..f055d4eeee5dcf110c4cc607051b23e5ce335a25 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_arr.vhd
@@ -283,5 +283,4 @@ begin
       out_sosi_arr      => out_sosi_arr
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
index 5c3eb335710ae69024aace5541034dd4cbbeed2a..119ee1426ea535263404a86d235725efd4d0d0be 100644
--- a/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_mms_dp_gain_serial_arr.vhd
@@ -317,5 +317,4 @@ begin
       out_sosi_arr            => out_sosi_arr
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
index 23ff128bc48cb46e2d63ba907fd44af18251c189..0286def814a2b20fa7304a8ed0d61846ce0e7398 100644
--- a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_sync_scheduler.vhd
@@ -76,5 +76,4 @@ begin
     u_fraction_half               : entity work.tb_dp_bsn_sync_scheduler generic map (c_nof_input_sync, 17, 10, 3,  45, P);  -- 45/10 =  4.5  block/out_sync
     u_fraction_0                  : entity work.tb_dp_bsn_sync_scheduler generic map (c_nof_input_sync, 17, 10, 3,  50, P);  -- 50/10 =  5    block/out_sync
   end generate;
-
 end tb;
diff --git a/libraries/base/mm/src/vhdl/mm_bus.vhd b/libraries/base/mm/src/vhdl/mm_bus.vhd
index 6c6bf43ccbc803bc2bad7dfdaac0f246898cf1a0..56f57a95771ebd2d552bd7a8edb62ef871255af2 100644
--- a/libraries/base/mm/src/vhdl/mm_bus.vhd
+++ b/libraries/base/mm/src/vhdl/mm_bus.vhd
@@ -175,5 +175,4 @@ begin
       out_miso      => slave_miso_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/mm/src/vhdl/mm_bus_comb.vhd b/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
index eb27973b62cefe53239d23991a0fbcc59b29c92f..61d220fd4009691ce4373ccfdda079f9ed5996e9 100644
--- a/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
+++ b/libraries/base/mm/src/vhdl/mm_bus_comb.vhd
@@ -207,5 +207,4 @@ begin
     end process;
 
   end generate;
-
 end rtl;
diff --git a/libraries/base/mm/src/vhdl/mm_master_mux.vhd b/libraries/base/mm/src/vhdl/mm_master_mux.vhd
index 0eb66110d923d0a6903c1a12df28762a26adc1db..cba9cf14c07782c4f00a4cc3ffcaa5183316e088 100644
--- a/libraries/base/mm/src/vhdl/mm_master_mux.vhd
+++ b/libraries/base/mm/src/vhdl/mm_master_mux.vhd
@@ -137,5 +137,4 @@ begin
     end process;
 
   end generate;
-
 end rtl;
diff --git a/libraries/base/mm/tb/vhdl/mm_file.vhd b/libraries/base/mm/tb/vhdl/mm_file.vhd
index f04fb7d4b0b12414ad989f9ff6eaf97d7f09a669..4e28d63f12fba3a119ab16e684618ef2d4630f7b 100644
--- a/libraries/base/mm/tb/vhdl/mm_file.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file.vhd
@@ -172,5 +172,4 @@ begin
       end process;
     end generate;
   end generate;
-
 end str;
diff --git a/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd b/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
index c742fee2212f2208e92002aa56db6337d3f19d5f..e2277654a56b36222f58c746562666aa0d455599 100644
--- a/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file_pkg.vhd
@@ -245,7 +245,6 @@ package mm_file_pkg is
     mm_master_in  : in  t_mem_miso
   );
   end component;
-
 end mm_file_pkg;
 
 package body mm_file_pkg is
@@ -745,5 +744,4 @@ package body mm_file_pkg is
   begin
     return c_mmf_local_dir_path & mmf_prefix(s0, i0) & mmf_prefix(s1, i1) & mmf_prefix(s2, i2) & mmf_prefix(s3, i3) & mmf_prefix(s4, i4);
   end;
-
 end mm_file_pkg;
diff --git a/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd b/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
index ded649d443f664fa0b687b2155861a762fb658a5..c01105ca9d37a15ff3c2ddb34caacb586b7e5f9c 100644
--- a/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
+++ b/libraries/base/mm/tb/vhdl/mm_file_unb_pkg.vhd
@@ -44,7 +44,6 @@ package mm_file_unb_pkg is
   function mmf_unb_file_prefix(             unb, node: natural) return string;  -- unb 0,1,..., node = 0:7, with 0:3 for FN and 4:7 for BN
   function mmf_unb_file_prefix(tb,          unb, node: natural) return string;  -- idem, with extra index tb = 0,1,... for use with multi testbench
   function mmf_unb_file_prefix(tb, subrack, unb, node: natural) return string;  -- idem, with extra index subrack =  0,1,... to support same local unb range per subrack
-
 end mm_file_unb_pkg;
 
 package body mm_file_unb_pkg is
@@ -91,5 +90,4 @@ package body mm_file_unb_pkg is
   begin
     return mmf_slave_prefix(c_mmf_unb_file_path, "TB", tb, "SUBRACK", subrack, "UNB", unb, c_node_type, c_node_nr);
   end;
-
 end mm_file_unb_pkg;
diff --git a/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd b/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
index 7c4046568a12ac401061a6446db41fb82def5e45..76a0c79b24b00218c54329fd4bb0051ddd279af0 100644
--- a/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
+++ b/libraries/base/mm/tb/vhdl/tb_mm_bus.vhd
@@ -241,5 +241,4 @@ begin
       rd_val    => ram_miso_arr(I).rdval
     );
   end generate;
-
 end tb;
diff --git a/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd b/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
index ce8a2c0bad5a07f1e71dca14bfe1e825c4aa0558..4fe0aee1d428d8f81648011b861ffc1772806c53 100644
--- a/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_col_wide.vhd
@@ -120,5 +120,4 @@ begin
       output_siso    => output_siso_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd b/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
index 41916d90e0a366dc27f7eeb1e10aee86d6d85974..6b5fb64feda3ba766bc9e2f3003022ebeb5034dd 100644
--- a/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_col_wide_select.vhd
@@ -94,5 +94,4 @@ begin
       output_sosi    => output_sosi_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/reorder/src/vhdl/reorder_pkg.vhd b/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
index f0cb42898d035654193a9ca67e049645b14b190a..ef7a16c082c50884216910e4584b13abed97440f 100644
--- a/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
+++ b/libraries/base/reorder/src/vhdl/reorder_pkg.vhd
@@ -169,7 +169,6 @@ package reorder_pkg is
   function func_reorder_identity(nof_ch_per_packet : natural;
                                  identity          : t_reorder_identity)
                                  return t_reorder_identity;
-
 end reorder_pkg;
 
 package body reorder_pkg is
@@ -416,5 +415,4 @@ package body reorder_pkg is
     end if;
     return v;
   end;
-
 end reorder_pkg;
diff --git a/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd b/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
index a51252e77b80678d1466155eadf409a303bd5755..e6995c23966db9bb7d35ce942cb3de4b876d33a2 100644
--- a/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
+++ b/libraries/base/reorder/tb/vhdl/reorder_pkg_test.vhd
@@ -46,9 +46,7 @@ entity reorder_pkg_test is
   );
 end reorder_pkg_test;
 
-
 architecture tb of reorder_pkg_test is
-
   constant c_clk_period   : time := 10 ns;
   constant c_nof_data     : natural := g_nof_blocks_per_packet * g_nof_data_per_block;
 
@@ -120,5 +118,4 @@ begin
       assert out_address_lu = out_address report "Wrong transpose_lu address" severity error;
     end if;
   end process;
-
 end tb;
diff --git a/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd b/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
index e8aeb6583dcaa90dcc28494017ed232d43aae2f7..4309e4e94a5a4e9cf80f52a623023fe99333fcbd 100644
--- a/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
+++ b/libraries/base/reorder/tb/vhdl/reorder_pkg_test_test.vhd
@@ -33,13 +33,10 @@
 library IEEE;
 use IEEE.std_logic_1164.all;
 
-
 entity reorder_pkg_test_test is
 end reorder_pkg_test_test;
 
-
 architecture tb of reorder_pkg_test_test is
-
   signal tb_end : std_logic := '0';  -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
 
 begin
@@ -49,5 +46,4 @@ begin
 
   u_4_488_1  : entity work.reorder_pkg_test generic map (4, 488, 1);
   u_4_488_2  : entity work.reorder_pkg_test generic map (4, 488, 2);
-
 end tb;
diff --git a/libraries/base/ring/src/vhdl/ring_pkg.vhd b/libraries/base/ring/src/vhdl/ring_pkg.vhd
index 58bb4193ddcc01c9f29e774916019a5318fe426e..50b55d733a54efb9ea36c3c4616e2cd958e70549 100644
--- a/libraries/base/ring/src/vhdl/ring_pkg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_pkg.vhd
@@ -94,7 +94,6 @@ package ring_pkg is
 
   function func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn, lane_dir : natural) return natural;
   function func_ring_nof_hops_to_source_rn(hops, this_rn, N_rn : std_logic_vector; lane_dir : natural) return std_logic_vector;  -- return vector length is same as hops vector length
-
  end package ring_pkg;
 
 package body ring_pkg is
@@ -125,5 +124,4 @@ package body ring_pkg is
   begin
     return TO_UVEC(func_ring_nof_hops_to_source_rn(TO_UINT(hops), TO_UINT(this_rn), TO_UINT(N_rn), lane_dir),hops'length);
   end;
-
 end ring_pkg;
diff --git a/libraries/base/ring/src/vhdl/ring_rx.vhd b/libraries/base/ring/src/vhdl/ring_rx.vhd
index 4201821a26331d7a1bb9be8db1e45a9c2cd0f6bd..e021b1de1feaf8fb5b1f4493aa87cc6a2b938032 100644
--- a/libraries/base/ring/src/vhdl/ring_rx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_rx.vhd
@@ -246,5 +246,4 @@ begin
   gen_no_dp_layer : if not g_use_dp_layer generate
     from_lane_sosi <= offload_rx_sosi;
   end generate;
-
 end str;
diff --git a/libraries/base/ring/src/vhdl/ring_tx.vhd b/libraries/base/ring/src/vhdl/ring_tx.vhd
index 059e6fb0a3cb105549c0b655dcf479ac79468073..62b21f1b560c1970492d5853370fb8a030bf69a8 100644
--- a/libraries/base/ring/src/vhdl/ring_tx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_tx.vhd
@@ -238,5 +238,4 @@ begin
       ref_sync    => ref_sync
     );
   end generate;
-
 end str;
diff --git a/libraries/base/ss/src/vhdl/ss_store.vhd b/libraries/base/ss/src/vhdl/ss_store.vhd
index b0acf7da04934d4c22104817ab993caeea891c3c..a6202614501f8888213f02a7bf8a526e2cf76af3 100644
--- a/libraries/base/ss/src/vhdl/ss_store.vhd
+++ b/libraries/base/ss/src/vhdl/ss_store.vhd
@@ -120,5 +120,4 @@ begin
   gen_non_complex : if not(g_use_complex) generate
     nxt_store_mosi.wrdata  <= RESIZE_MEM_DATA(input_sosi.data(c_nof_complex * g_dsp_data_w - 1 downto 0)) when input_sosi.valid = '1' else i_store_mosi.wrdata;
   end generate;
-
 end rtl;
diff --git a/libraries/base/ss/src/vhdl/ss_wide.vhd b/libraries/base/ss/src/vhdl/ss_wide.vhd
index 37bb7363ccc4da379d7723f6daf5e13167ad545e..c71b8e4236f7d2ea4f47ae25ccc4531bdc06e939 100644
--- a/libraries/base/ss/src/vhdl/ss_wide.vhd
+++ b/libraries/base/ss/src/vhdl/ss_wide.vhd
@@ -124,5 +124,4 @@ begin
       output_siso    => output_siso_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/base/tst/src/vhdl/tst_input.vhd b/libraries/base/tst/src/vhdl/tst_input.vhd
index fbfbf672293e49e9381930590c64268c1acea033..d6b841c7a998a8a2b7c13b23444cfcffcba8ce7a 100644
--- a/libraries/base/tst/src/vhdl/tst_input.vhd
+++ b/libraries/base/tst/src/vhdl/tst_input.vhd
@@ -295,4 +295,5 @@ begin
     nxt_lno   <= cycle_lno;
     nxt_rep   <= cycle_rep;
   end process;
+
 end beh;
diff --git a/libraries/base/uth/src/vhdl/uth_pkg.vhd b/libraries/base/uth/src/vhdl/uth_pkg.vhd
index fc4b0c498bee6fe6b7bba517c60bef2cc5f3f67a..e839153d7c8aef529a102d43bb19bd6968035024 100644
--- a/libraries/base/uth/src/vhdl/uth_pkg.vhd
+++ b/libraries/base/uth/src/vhdl/uth_pkg.vhd
@@ -111,5 +111,4 @@ package body uth_pkg is
     end case;
     return nxt_crc;
   end func_uth_next_crc;
-
 end uth_pkg;
diff --git a/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd b/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
index 4db9301b8b012b64f2b7b03d1a4b2f5957c6129b..38ef97b62b6cb1d2518dcbed898cfbf0b8fb2aa4 100644
--- a/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
+++ b/libraries/base/uth/src/vhdl/uth_terminal_bidir.vhd
@@ -210,5 +210,4 @@ begin
         mon_dist_sosi_arr => rx_mon_dist_sosi_arr
       );
     end generate;
-
 end str;
diff --git a/libraries/base/util/src/vhdl/util_heater_pkg.vhd b/libraries/base/util/src/vhdl/util_heater_pkg.vhd
index dae51ab7abef1797fe8b00786cb70a2ebefde26d..0799200b006070741e469ed960d516f2e54fe19c 100644
--- a/libraries/base/util/src/vhdl/util_heater_pkg.vhd
+++ b/libraries/base/util/src/vhdl/util_heater_pkg.vhd
@@ -50,7 +50,6 @@ package util_heater_pkg is
   end record;
 
   constant c_util_heater_reg_mm_bus : t_util_heater_reg_mm_bus := ((others => '0'), (others => '0'), (others => '0'), '0', '0');
-
 end util_heater_pkg;
 
 package body util_heater_pkg is
diff --git a/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd b/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
index bcf58a48080b76b2f7eba62a8b04cae942a81b74..e2d078685da3cc52cf44afbb20fbb2c0bd935aca 100644
--- a/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
+++ b/libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
@@ -232,5 +232,4 @@ begin
       tx_siso_arr           => bf_out_offload_tx_siso_arr(g_bf.nof_bf_units - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/libraries/dsp/bf/src/vhdl/bf_pkg.vhd b/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
index 380a12f18f61a46bb3ebbef6896d457156ac45b8..a0049359674da5a46b9b6a05c6df2cd513ac1d8a 100644
--- a/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
+++ b/libraries/dsp/bf/src/vhdl/bf_pkg.vhd
@@ -50,7 +50,6 @@ package bf_pkg is
 
   --CONSTANT c_bf : t_c_bf := (64, 16, 24, 256, 4, 16, 16,  1, 16, -5, 8, 56, 2);  -- bst_gain_w= 1 for 16b and out_gain_w=-5 for 8b as in Fig 10 of RP1377 v0.41
   constant c_bf : t_c_bf := (64, 16, 24, 256, 4, 16, 16,  0, 16, -6, 18, 56, 2);  -- preserve 1 more LSbits for the bst_dat and out_dat outputs
-
 end bf_pkg;
 
 package body bf_pkg is
diff --git a/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd b/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
index 89a874799daa5ae35f72af8ba2667e81e4095ce3..5015fe23b91afd69512a9b42e64edff18eb9c92b 100644
--- a/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
+++ b/libraries/dsp/correlator/designs/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
@@ -339,5 +339,4 @@ begin
       altpll_1_locked_conduit_export       => open
       );
   end generate;
-
 end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_adder.vhd b/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
index dd8151956247eb37a106a90777e65bdfb6ba1dd3..48a6f930b1c483d89b495b483b6eee45b5a6c5fa 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_adder.vhd
@@ -120,5 +120,4 @@ begin
     src_out_arr(i).re <= RESIZE_DP_DSP_DATA(common_complex_add_sub_src_out_arr(i).re(g_data_w - 1 downto 0));
     src_out_arr(i).im <= RESIZE_DP_DSP_DATA(common_complex_add_sub_src_out_arr(i).im(g_data_w - 1 downto 0));
   end generate;
-
 end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_folder.vhd b/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
index 99c1a7805c76892e654bf4ac0e501eeedfe24f61..73e96d5dfacf3a8d00a9e3a7a52528487a1e2d24 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_folder.vhd
@@ -146,5 +146,4 @@ begin
   gen_wire_out_to_in: if g_nof_folds = 0 generate
     src_out_arr <= snk_in_arr;
   end generate;
-
 end str;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd b/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
index 376b3babdd50144d0a7d13a230519ad9d3097ba6..95d0b4c2fc9476b4b10212569ac59c8e0fb2f341 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_permutator.vhd
@@ -188,5 +188,4 @@ begin
   no_output_register: if g_register_output = false generate
     src_out_2arr_2 <= permu_out_2arr_2;
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd b/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
index fe370e1429b7e61865a068a26a64c2f5785a2339..08e85e2dd6a891f00ef6169e7a1386f5ff798fc8 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_permutor_pkg.vhd
@@ -148,5 +148,4 @@ package body corr_permutor_pkg is
 
     return v_result;
   end corr_permute;
-
 end corr_permutor_pkg;
diff --git a/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd b/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
index dc3d2e83c14ef0c67fa2ebeb1d622f123cac2ef2..c4d2a4d49e73de1533a5dd83cfdec4931f49c38b 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_unfolder.vhd
@@ -150,5 +150,4 @@ begin
   gen_wire_out_to_in: if g_nof_unfolds = 0 generate
     src_out_arr <= snk_in_arr;
   end generate;
-
 end str;
diff --git a/libraries/dsp/fft/src/vhdl/fft_pkg.vhd b/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
index 8dda8835b58237f265dff80a12a8cf12112d7bbb..5b836e50f3db7d69d028617e791588b39a1a1e55 100644
--- a/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_pkg.vhd
@@ -88,7 +88,6 @@ package fft_pkg is
   -- FFT shift swaps right and left half of bin axis to shift zero-frequency component to center of spectrum
   function fft_shift(bin : std_logic_vector) return std_logic_vector;
   function fft_shift(bin, w : natural) return natural;
-
 end package fft_pkg;
 
 package body fft_pkg is
@@ -164,5 +163,4 @@ package body fft_pkg is
   begin
     return TO_UINT(fft_shift(TO_UVEC(bin, w)));
   end;
-
 end fft_pkg;
diff --git a/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd b/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
index 2bf2ac6eed13a88a0b68343cbd2732f7024be09e..a97f138a8728aad06fec24c60647ffb1e7788a57 100644
--- a/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_reorder_sepa_pipe.vhd
@@ -348,5 +348,4 @@ begin
     out_dat <= out_dat_i;  -- c_dat_w
     out_val <= out_val_i;
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd b/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
index 720653a425aff14402dee71b8f337d2ef8815154..1e307f5042f63b00754929323546971e9fc34237 100644
--- a/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_sepa_wide.vhd
@@ -321,5 +321,4 @@ begin
     out_re_arr(I) <= resize_fft_svec(out_dat_arr(I)(              c_out_w - 1 downto       0));
     out_im_arr(I) <= resize_fft_svec(out_dat_arr(I)(c_nof_complex * c_out_w - 1 downto c_out_w));
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_switch.vhd b/libraries/dsp/fft/src/vhdl/fft_switch.vhd
index e1732d2a8153084a92c65a57f58d3f86ec81144f..638d5b0ce70caa75eb23aaaaeb72c69e6fb60404 100644
--- a/libraries/dsp/fft/src/vhdl/fft_switch.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_switch.vhd
@@ -167,5 +167,4 @@ begin
       out_bit2 => lfsr_bit2
     );
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd b/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
index 9d1ad5ef00b3fb3a60bbcb5e7c313c45f63b13fa..8d5530419c1fae9de6a2965c1a3a4e124f471865 100644
--- a/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_unswitch.vhd
@@ -159,5 +159,4 @@ begin
       out_bit2 => lfsr_bit2
     );
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd b/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
index 3134ef587f4b2d7013c81bf27b70bc34e5b13344..98418ce041aaf99c26a3d860a28f24b7ecadb25a 100644
--- a/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_wide_unit.vhd
@@ -223,5 +223,4 @@ begin
   gen_output : for I in 0 to g_fft.wb_factor - 1 generate
     out_sosi_arr(I) <= fft_out_sosi_arr(I);
   end generate;
-
 end str;
diff --git a/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd b/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
index de528f689e40a6be6dae7c3cb339612a6ce39182..b6932b339421322cb62512d534f0f27211180962 100644
--- a/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
+++ b/libraries/dsp/fft/src/vhdl/fft_wide_unit_control.vhd
@@ -285,5 +285,4 @@ begin
   gen_output : for I in g_nof_ffts * g_fft.wb_factor - 1 downto 0 generate
     out_sosi_arr(I) <= r.out_sosi_arr(I);
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
index b566285a2932ee150bab7812781ad122b7aa8ee1..b72b7933e8381dbadabd3af3bb971795798e2b7d 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_pkg.vhd
@@ -602,5 +602,4 @@ package body tb_fft_pkg is
 --    END LOOP;
 --    proc_common_close_file(v_file_status, v_in_file);                               -- Close the file
 --  END proc_prepare_input_data;
-
 end tb_fft_pkg;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
index 77204376033fcbdc6d96ffc57de7246e51f1c2c7..cca6da7cdb0f854a6633f6e629478d3c4903fa0a 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_reorder_sepa_pipe.vhd
@@ -251,4 +251,5 @@ begin
       I := 0;
     end if;
   end process p_tester;
+
 end tb;
diff --git a/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd b/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
index a38cdfba6556c8596a39677d85fe580010c95cf2..1be6cbca3ac5ec4e20040d52a6aa4e11422a22af 100644
--- a/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
+++ b/libraries/dsp/fft/tb/vhdl/tb_fft_sepa.vhd
@@ -207,4 +207,5 @@ begin
       I := 0;
     end if;
   end process p_tester;
+
 end tb;
diff --git a/libraries/dsp/filter/src/vhdl/fil_pkg.vhd b/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
index 0526a3ce5ecbaa98eec8d26bc75235c70956880a..cbb6102ac27907f702203847704ccb74231d5cda 100644
--- a/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_pkg.vhd
@@ -64,7 +64,6 @@ package fil_pkg is
   -- . Calculated with applications/lofar2/model/run_pfir_coef.m using application = 'lofar_subband'
   -- . Not used in RTL, only used in test benches to verify expected subband levels
   constant c_fil_lofar1_fir_filter_dc_gain : real := 0.994817;
-
 end package fil_pkg;
 
 package body fil_pkg is
diff --git a/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd b/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
index b77dcee842f9d7d1b8b0c4e95ab2215fccf8ea44..6ff4e8743bf7dc0355d80080804bef2ae08505a1 100644
--- a/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_ppf_ctrl.vhd
@@ -56,7 +56,6 @@ entity fil_ppf_ctrl is
 end fil_ppf_ctrl;
 
 architecture rtl of fil_ppf_ctrl is
-
   type     t_in_dat_delay is array (g_fil_ppf_pipeline.mem_delay downto 0) of std_logic_vector(g_fil_ppf.in_dat_w * g_fil_ppf.nof_streams - 1 downto 0);
 
   constant c_addr_w             : natural := ceil_log2(g_fil_ppf.nof_bands * (2**g_fil_ppf.nof_chan));
diff --git a/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd b/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
index 57baa9b3d81173fd21aed4064e85f68dd5160027..74cc79c07f33c331252d9cb38f60bf5294b420b1 100644
--- a/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
+++ b/libraries/dsp/filter/src/vhdl/fil_ppf_single.vhd
@@ -244,5 +244,4 @@ begin
       result    => out_dat((I + 1) * g_fil_ppf.out_dat_w - 1 downto I * g_fil_ppf.out_dat_w)
     );
   end generate;
-
 end rtl;
diff --git a/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd b/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
index 9a49efb0b76468711202bece508568c89eb56185..3e20398fe049daf1500cac7ce6ac7c4183ec3826 100644
--- a/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
+++ b/libraries/dsp/fringe_stop/tb/vhdl/tb_tb_fringe_stop_unit.vhd
@@ -56,5 +56,4 @@ begin
     sim_phi       : entity work.tb_fringe_stop_unit generic map (I, 8, 10, 31, 17, 4, 9, false);
     sim_minus_phi : entity work.tb_fringe_stop_unit generic map (I, 8, 10, 31, 17, 4, 9, true);
   end generate;
-
 end tb;
diff --git a/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd b/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
index a21087320728da102867c6656a7802ad1222e838..e01f3c861a5fdf144ae0b3af72de6e06aa662fba 100644
--- a/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
+++ b/libraries/dsp/rTwoSDF/src/vhdl/rTwoSDFPkg.vhd
@@ -39,7 +39,6 @@ package rTwoSDFPkg is
   end record;
 
   constant c_fft_pipeline   : t_fft_pipeline := (1, 1, 4, 1, 1, 0, 0);
-
 end package rTwoSDFPkg;
 
 package body rTwoSDFPkg is
diff --git a/libraries/dsp/si/src/vhdl/si_arr.vhd b/libraries/dsp/si/src/vhdl/si_arr.vhd
index 2ef041cda1e33cd0e84d0fa2f09a5fb4a8d76f9d..8ce81380162a41e5c63293825887be9811b8b2b6 100755
--- a/libraries/dsp/si/src/vhdl/si_arr.vhd
+++ b/libraries/dsp/si/src/vhdl/si_arr.vhd
@@ -101,5 +101,4 @@ begin
       rst       => dp_rst
     );
   end generate;
-
 end str;
diff --git a/libraries/dsp/st/src/vhdl/st_calc.vhd b/libraries/dsp/st/src/vhdl/st_calc.vhd
index 5e895907bdf2e33662392f70e0bf21c92c8547e2..0dbe35431973bf2a2560e1328e13a3a4ec731abe 100644
--- a/libraries/dsp/st/src/vhdl/st_calc.vhd
+++ b/libraries/dsp/st/src/vhdl/st_calc.vhd
@@ -297,5 +297,4 @@ begin
 
     out_im <= rd_im;  -- c_dly_out = 0
   end generate;
-
 end str;
diff --git a/libraries/dsp/st/src/vhdl/st_ctrl.vhd b/libraries/dsp/st/src/vhdl/st_ctrl.vhd
index ee08d4e8f413fb83a8e23d598407b965c3956775..9824c127b13a3f93082cb71672f5d71400dcac58 100644
--- a/libraries/dsp/st/src/vhdl/st_ctrl.vhd
+++ b/libraries/dsp/st/src/vhdl/st_ctrl.vhd
@@ -190,5 +190,4 @@ begin
       end if;
     end if;
   end process;
-
 end rtl;
diff --git a/libraries/dsp/st/src/vhdl/st_sst.vhd b/libraries/dsp/st/src/vhdl/st_sst.vhd
index 2991c1ab0b5c5e460986f440dbd3fb07d560c1cf..74bf89bc244d8ea8d31c27e42060d84b2adf2432 100644
--- a/libraries/dsp/st/src/vhdl/st_sst.vhd
+++ b/libraries/dsp/st/src/vhdl/st_sst.vhd
@@ -330,5 +330,4 @@ begin
       rd_val_b  => open
     );
   end generate;
-
 end str;
diff --git a/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd b/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
index 5001ac90f810382249f2e755040a27e3a4e2a9bb..abb02c4086b76076418c732724801d8eec71d2fa 100644
--- a/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_mmf_st_sst.vhd
@@ -228,5 +228,4 @@ begin
       reg_st_sst_miso  => reg_st_sst_miso_arr(I)
     );
   end generate;
-
 end tb;
diff --git a/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd b/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
index 4d3b6d56458cbd20174a53044481d718b597ba5e..6a91f8dd3507a1c1538a4c8a6269f99a4b76277e 100644
--- a/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_st_pkg.vhd
@@ -48,5 +48,4 @@ package body tb_st_pkg is
     end loop;
     return v_exp_xsq;
   end;
-
 end tb_st_pkg;
diff --git a/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd b/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
index 5c274001c1e8a881ca99be1ac6db46f3d619e1b6..a7f57822818c35f15b6646ee119fcfd0edbccddb 100644
--- a/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
+++ b/libraries/dsp/wpfb/quartus_iwave/alma/iwave_synthesis_wpfb_alma.vhd
@@ -151,5 +151,4 @@ begin
   );
 
   out_quant_sosi_arr <= wpfb_unit_out_quant_sosi_arr;
-
 end str;
diff --git a/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd b/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
index a21feab0f6edf3d3fcb9cdfe4d5ff382f6aab701..5420638fb8d01171a58c82dbe74eaa3967e2cbc5 100644
--- a/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
+++ b/libraries/dsp/wpfb/quartus_iwave/lofar2/iwave_synthesis_wpfb_lofar2.vhd
@@ -151,5 +151,4 @@ begin
   );
 
   out_quant_sosi_arr <= wpfb_unit_out_quant_sosi_arr;
-
 end str;
diff --git a/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd b/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
index 0d717d9f4d2487538b533a52ee31fb12acf38d42..179e250bff7e296bd18915ebaa85bd349b761d09 100644
--- a/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
+++ b/libraries/dsp/wpfb/src/vhdl/wpfb_pkg.vhd
@@ -264,7 +264,6 @@ package wpfb_pkg is
   -- Estimate maximum number of blocks of latency between WPFB input and output
   function func_wpfb_maximum_sop_latency(wpfb : t_wpfb) return natural;
   function func_wpfb_set_nof_block_per_sync(wpfb : t_wpfb; nof_block_per_sync : natural) return t_wpfb;
-
 end package wpfb_pkg;
 
 package body wpfb_pkg is
@@ -350,5 +349,4 @@ package body wpfb_pkg is
     v_wpfb.nof_blk_per_sync := nof_block_per_sync;
     return v_wpfb;
   end func_wpfb_set_nof_block_per_sync;
-
 end wpfb_pkg;
diff --git a/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd b/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
index 01bd165fc42f86d0ca4107318b86081748bbcc07..280d1c96215896ea462240179a3911d91d8e8cd5 100644
--- a/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_dd_pkg.vhd
@@ -52,7 +52,6 @@ package aduh_dd_pkg is
   end record;
 
   constant c_aduh_dd_ai  : t_c_aduh_dd_ai := (4, 2, 2, 8, 2, 2, true, false, c_aduh_delays);
-
 end aduh_dd_pkg;
 
 package body aduh_dd_pkg is
diff --git a/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd b/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
index 03ac392efcb7d236aaee0e361d844f15f240e463..23e4366d9dd0ae043f83ceb9639b098bba36a19e 100644
--- a/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_mean_sum.vhd
@@ -142,5 +142,4 @@ begin
     nxt_sum      <= truncate_or_resize_svec(acc_sum, g_sum_truncate, g_sum_w) when in_sync_p = '1' else i_sum;
     nxt_sum_sync <= in_sync_p;
   end generate;
-
 end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd b/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
index d0e218257dd80fee4abca99ce38c1a43bb2195c4..7ba686af12845613fb5eeacc34be8e9a02afecc1 100644
--- a/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_monitor_reg.vhd
@@ -188,5 +188,4 @@ begin
       out_new     => open  -- when '1' then the out_dat was updated with in_dat due to in_new
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_pll.vhd b/libraries/io/aduh/src/vhdl/aduh_pll.vhd
index 4f0723adec991243a41e39e50a72eab5781958e2..36ef83efb991faec0ae50fa7103bdcac1c571df8 100644
--- a/libraries/io/aduh/src/vhdl/aduh_pll.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_pll.vhd
@@ -294,14 +294,11 @@ begin
   --     so e.g. for port A: src_out[0][31:0]=[A0,A1,A2,A3] whereby A0 is the first sample in time, A1 the next, etc.
   --     If the OVR_AC bit is used then the OR of the dp_deser_factor=4 overflow bits is passed on via src_out[0][32]
   --     and via src_out[1][32]
-
   porth_val <= rcvdh_val;
-
   gen_dp_1_1_1 : if g_ai.nof_adu = 1 and g_ai.nof_clocks = 1 and g_ai.nof_ovr = 1 generate
     porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  ) <=           rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  );  -- bit  OVR_CD
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     -- port [0:1]=[A,B] is not used
     dp_ovr(2) <= dp_ovr(3);  -- bit  OVR_C = OVR_CD
     dp_ovr(3) <= vector_or(porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w));  -- bit  OVR_D = OVR_CD
@@ -321,7 +318,6 @@ begin
   gen_dp_1_1_0 : if g_ai.nof_adu = 1 and g_ai.nof_clocks = 1 and g_ai.nof_ovr = 0 generate
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     -- port [0:1]=[A,B] is not used
     dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w);  -- port C
     dp_dat(3) <= porth_dat(0)(1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w);  -- port D
@@ -343,7 +339,6 @@ begin
     porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  ) <=           rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  );  -- bit  OVR_CD
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     dp_ovr(0) <= dp_ovr(1);  -- bit  OVR_A = OVR_AB
     dp_ovr(1) <= vector_or(porth_dat(0)(g_ai.dp_deser_factor + 4 * c_dp_dat_w   downto 4 * c_dp_dat_w + 1));  -- bit  OVR_B = OVR_AB
     dp_ovr(2) <= dp_ovr(3);  -- bit  OVR_C = OVR_CD
@@ -372,7 +367,6 @@ begin
     porth_dat(0)(                       3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port B
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     dp_dat(0) <= porth_dat(0)(4 * c_dp_dat_w - 1 downto 3 * c_dp_dat_w);  -- port A
     dp_dat(1) <= porth_dat(0)(3 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w);  -- port B
     dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w);  -- port C
@@ -399,7 +393,6 @@ begin
     porth_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  ) <=           rcvdh_dat(0)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w  );  -- bit  OVR_CD
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     dp_ovr(0) <= dp_ovr(1);  -- bit  OVR_A = OVR_AB
     dp_ovr(1) <= vector_or(porth_dat(1)(g_ai.dp_deser_factor + 2 * c_dp_dat_w - 1 downto 2 * c_dp_dat_w));  -- bit  OVR_B = OVR_AB
     dp_ovr(2) <= dp_ovr(3);  -- bit  OVR_C = OVR_CD
@@ -428,7 +421,6 @@ begin
     porth_dat(1)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(1)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port B
     porth_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port C
     porth_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ) <= transpose(rcvdh_dat(0)(                       1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w  ), g_ai.dp_deser_factor, g_ai.port_w);  -- port D
-
     dp_dat(0) <= porth_dat(1)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w);  -- port A
     dp_dat(1) <= porth_dat(1)(1 * c_dp_dat_w - 1 downto 0 * c_dp_dat_w);  -- port B
     dp_dat(2) <= porth_dat(0)(2 * c_dp_dat_w - 1 downto 1 * c_dp_dat_w);  -- port C
diff --git a/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd b/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
index f9d4ff32066f5729f9f1a190d0752808ba6e74c5..a157506da6e82f4a277c3a880e5da418a60920cf 100644
--- a/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_pll_pkg.vhd
@@ -50,7 +50,6 @@ package aduh_pll_pkg is
   function func_aduh_pll_adu_dat_w(ai : t_c_aduh_pll_ai) return natural;  -- LVDS data width per ADU: two ADCs with one optional overflow bit
   function func_aduh_pll_lvds_dat_w(ai : t_c_aduh_pll_ai) return natural;  -- LVDS data width per ADUH: one or two ADUs
   function func_aduh_pll_lvdsh_dat_w(ai : t_c_aduh_pll_ai) return natural;  -- LVDS data width per LVDSH: dependent on whether one or two LVDS reference clocks are used
-
 end aduh_pll_pkg;
 
 package body aduh_pll_pkg is
@@ -81,5 +80,4 @@ package body aduh_pll_pkg is
     --   2           2        --> one LVDSH for ADU on AB and           for ADU on CD --> 1 LVDSH
     return func_aduh_pll_lvds_dat_w(ai) / ai.nof_clocks;
   end;
-
 end aduh_pll_pkg;
diff --git a/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd b/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
index 4b0f5a0cee1ef4dcc4e32542f67af25f1b781430..49ad5d9918027071c50e49cdc92ea1277b198af9 100644
--- a/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_power_sum.vhd
@@ -144,5 +144,4 @@ begin
     symbol_arr(I) <= in_data((g_nof_symbols_per_data - I) * g_symbol_w - 1 downto (g_nof_symbols_per_data - I - 1) * g_symbol_w);
     prod_arr(I) <= prod_data((g_nof_symbols_per_data - I) * c_prod_w - 1   downto (g_nof_symbols_per_data - I - 1) * c_prod_w);
   end generate;
-
 end str;
diff --git a/libraries/io/aduh/src/vhdl/aduh_quad.vhd b/libraries/io/aduh/src/vhdl/aduh_quad.vhd
index 1d93bfab80e3d775c5f7414f737925cfa03da25d..94fc94d36f7dcb195f8318f2b05eef0cfb272809 100644
--- a/libraries/io/aduh/src/vhdl/aduh_quad.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_quad.vhd
@@ -157,5 +157,4 @@ begin
       verify_res_ack => aduh_verify_res_ack(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd b/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
index f048db7912d07bc2d7a453e609826a997f82b1f1..5c06807728fadc2750f927853dbbf0729cf29d56 100644
--- a/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_quad_reg.vhd
@@ -530,5 +530,4 @@ begin
       out_pulse => st_aduh_d_verify_res_ack
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/io/aduh/src/vhdl/aduh_verify.vhd b/libraries/io/aduh/src/vhdl/aduh_verify.vhd
index b198cf47acfbe6a96e80d3d7cb69166baee1b0db..25ca9ba1abdb6761eb360be63bac5fc08033e95f 100644
--- a/libraries/io/aduh/src/vhdl/aduh_verify.vhd
+++ b/libraries/io/aduh/src/vhdl/aduh_verify.vhd
@@ -239,5 +239,4 @@ begin
       verify_res_ack => verify_res_ack
     );
   end generate;
-
 end rtl;
diff --git a/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd b/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
index 5fe812727c8326a2a0463d2438331509d4bd6e66..affcd5689e2b3acfac3cbe1d4a00d2b60ed11291 100644
--- a/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
+++ b/libraries/io/aduh/src/vhdl/lvdsh_dd.vhd
@@ -375,5 +375,4 @@ begin
   gen_big_endian : if g_rx_big_endian = true generate
     rx_dat <= hton(rx_fifo_rd_dat, g_in_dat_w, g_rx_factor * g_dd_factor);  -- rewire
   end generate;
-
 end str;
diff --git a/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd b/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
index e3407f76de1905261e1e7ba7c5529cf9cdceb7ec..149fa420c64220bbb6d7754a78e827ef03aebde2 100644
--- a/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
+++ b/libraries/io/aduh/src/vhdl/mms_aduh_monitor_arr.vhd
@@ -118,5 +118,4 @@ begin
       in_sosi                => in_sosi_arr(I)
     );
   end generate;
-
 end str;
diff --git a/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd b/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
index 628f882bf3b38ba3b2398bd61efadc839893a14b..8240c5af17876f8474596415b5ea77a282e629aa 100644
--- a/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
+++ b/libraries/io/aduh/tb/vhdl/tb_aduh_dd.vhd
@@ -305,5 +305,4 @@ begin
     end process;
 
   end generate;  -- gen_verify
-
 end tb;
diff --git a/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd b/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
index b7b98bd5c279e5162a91e80218b2e0bb2f344c61..2f8b213d2331e6f78898f9abd5ec4d5711ead2f7 100644
--- a/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
+++ b/libraries/io/ddr/src/vhdl/io_ddr_cross_domain.vhd
@@ -134,5 +134,4 @@ begin
     -- Ensure previous dvr_done goes low after new dvr_en
     dvr_done <= new_dvr_done and not dvr_en_busy;
   end generate;
-
 end str;
diff --git a/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd b/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
index 183bf84ac08b85d99a027e28330dfa2d9b5e737a..be4c5fab247f04b8a5da019aa869e77a8c1ab09a 100644
--- a/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
+++ b/libraries/io/ddr3/src/vhdl/ddr3_pkg.vhd
@@ -269,7 +269,6 @@ package ddr3_pkg is
     mem_odt     : in    std_logic_vector(1 downto 0)  := (others => 'X')  -- mem_odt
   );
   end component alt_mem_if_ddr3_mem_model_top_ddr3_mem_if_dm_pins_en_mem_if_dqsn_en;
-
 end ddr3_pkg;
 
 package body ddr3_pkg is
diff --git a/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd b/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
index 0e1f4a27346a68a5b3529e6909f6b7425a1c4db6..3761a8c1419e30702c1b1fd748d3e12ef37c4f17 100644
--- a/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
+++ b/libraries/io/eth/designs/unb1_eth_10g/src/vhdl/mmm_unb1_eth_10g.vhd
@@ -687,5 +687,4 @@ begin
       rom_system_info_writedata_export                     => rom_unb_system_info_mosi.wrdata(c_word_w - 1 downto 0)
     );
   end generate;
-
 end str;
diff --git a/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd b/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
index 1e9df7d5dbbef043478a4d03bd5fb3b71486fb3b..be9b1b761533fbfdae7475a47d8a261fcd137c6f 100644
--- a/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
+++ b/libraries/io/eth/src/vhdl/eth_ip_offload_tx.vhd
@@ -64,7 +64,6 @@ entity eth_ip_offload_tx is
 end eth_ip_offload_tx;
 
 architecture str of eth_ip_offload_tx is
-
   signal dp_offload_tx_src_out_arr        : t_dp_sosi_arr(g_nof_streams - 1 downto 0) := (others => c_dp_sosi_rst);
   signal dp_offload_tx_src_in_arr         : t_dp_siso_arr(g_nof_streams - 1 downto 0) := (others => c_dp_siso_rdy);
   signal dp_offload_tx_hdr_fields_out_arr : t_slv_1024_arr(g_nof_streams - 1 downto 0);
@@ -116,5 +115,4 @@ begin
       hdr_fields_slv_in => dp_offload_tx_hdr_fields_out_arr(i)
     );
   end generate;
-
  end str;
diff --git a/libraries/io/eth/src/vhdl/eth_mm_registers.vhd b/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
index f2011b02744ca3320d56d07def554b374d3a27f8..555241b91c905996dc5c1b80825861dc08ec98f2 100644
--- a/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
+++ b/libraries/io/eth/src/vhdl/eth_mm_registers.vhd
@@ -298,5 +298,4 @@ begin
       out_dat     => mm_vec_status
     );
   end generate;
-
 end str;
diff --git a/libraries/io/eth/src/vhdl/eth_pkg.vhd b/libraries/io/eth/src/vhdl/eth_pkg.vhd
index d7f2fe2b9b4777d8538e73b6f443a7b0605c8b50..85d18c2f6057779cea5d2b6538a25e9729adb70b 100644
--- a/libraries/io/eth/src/vhdl/eth_pkg.vhd
+++ b/libraries/io/eth/src/vhdl/eth_pkg.vhd
@@ -217,7 +217,6 @@ package eth_pkg is
   constant c_eth_ram_tx_offset : natural := c_eth_frame_nof_words;
   constant c_eth_ram_nof_words : natural := c_eth_frame_nof_words * 2;
   constant c_eth_ram_addr_w    : natural := ceil_log2(c_eth_ram_nof_words);
-
 end eth_pkg;
 
 package body eth_pkg is
@@ -348,5 +347,4 @@ package body eth_pkg is
     v_reg(                                                                     0) := mm_reg.rx_avail;  -- [0]
     return v_reg;
   end func_eth_mm_reg_status;
-
 end eth_pkg;
diff --git a/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd b/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
index 7d83b02996112591506ca1ff75bae7de8236604e..749cf886f73ff49d521a04e62e321240eb0059bd 100644
--- a/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
+++ b/libraries/io/eth/src/vhdl/eth_tester_pkg.vhd
@@ -135,7 +135,6 @@ package eth_tester_pkg is
 
   -- Map packet header fields to t_eth_tester_header record
   function func_eth_tester_map_header(hdr_fields_raw : std_logic_vector) return t_eth_tester_header;
-
 end eth_tester_pkg;
 
 package body eth_tester_pkg is
@@ -223,5 +222,4 @@ package body eth_tester_pkg is
     v.app.dp_bsn         :=    hdr_fields_raw(field_hi(c_eth_tester_hdr_field_arr, "dp_bsn")      downto field_lo(c_eth_tester_hdr_field_arr, "dp_bsn"));
     return v;
   end func_eth_tester_map_header;
-
 end eth_tester_pkg;
diff --git a/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd b/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
index b5075a71f6009c929843d7f520d8e3e41f1d0abf..9b07520970517252c6c79af9dbe5cd9bb31db25c 100644
--- a/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_eth_tester_pkg.vhd
@@ -59,5 +59,4 @@ package body tb_eth_tester_pkg is
   begin
     return c_network_eth_preamble_len + func_eth_tester_eth_packet_length(block_len) + c_word_sz;
   end func_eth_tester_eth_packet_on_link_length;
-
 end tb_eth_tester_pkg;
diff --git a/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd b/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
index 2829040000ac3f5f9a1f81185e1f8140da71b1d8..5bdd53e948e4d040e65f3d70a14b9c96bc6bd851 100644
--- a/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
+++ b/libraries/io/eth1g/src/vhdl/eth1g_mem_pkg.vhd
@@ -286,5 +286,4 @@ package body eth1g_mem_pkg is
 
     wait until rising_edge(mm_clk);
   end proc_tech_tse_setup;
-
 end eth1g_mem_pkg;
diff --git a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
index 35261ba170dfffbae5967509bb1e84a9ad4b004c..008ab87c72ab37d9ac480f1211e722d771e04c68 100644
--- a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
+++ b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
@@ -193,5 +193,4 @@ begin
     end process;
 
   end generate;
-
 end str;
diff --git a/libraries/io/i2c/src/vhdl/i2c_commander.vhd b/libraries/io/i2c/src/vhdl/i2c_commander.vhd
index 97c57a07b7176f32df7811d3e331de2fd6dff832..640b8852079701a7619d72de0a2309037c4cf250 100644
--- a/libraries/io/i2c/src/vhdl/i2c_commander.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_commander.vhd
@@ -327,5 +327,4 @@ begin
       rd_val_b    => open
     );
   end generate;
-
 end str;
diff --git a/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd b/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
index 4048565c321bfbd061cd4e7aa1a76fe0ac0a1058..881589df782646c06ef8977c99d566e6e97d1641 100644
--- a/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_commander_pkg.vhd
@@ -82,7 +82,6 @@ package i2c_commander_pkg is
                                                                                  c_i2c_cmdr_expected_x, c_i2c_cmdr_expected_x);
 
   constant c_i2c_cmdr_mem_block_sz                  : natural := 1024;  -- assign t_c_mem.nof_dat in blocks of 1024 = 1 M9K
-
 end i2c_commander_pkg;
 
 package body i2c_commander_pkg is
@@ -125,5 +124,4 @@ package body i2c_commander_pkg is
       return b;
     end if;
   end;
-
 end i2c_commander_pkg;
diff --git a/libraries/io/i2c/src/vhdl/i2c_pkg.vhd b/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
index 12105da3ca31d4726f95e80d4e38b700b81bd2ea..3fcc5c1916f0122adf6de52f826c6180bbdb62e6 100644
--- a/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
+++ b/libraries/io/i2c/src/vhdl/i2c_pkg.vhd
@@ -65,7 +65,6 @@ package i2c_pkg is
   -- Select functions
   function func_i2c_sel_a_b(sel : boolean; a, b : t_c_i2c_mm)  return t_c_i2c_mm;
   function func_i2c_sel_a_b(sel : boolean; a, b : t_c_i2c_phy) return t_c_i2c_phy;
-
 end i2c_pkg;
 
 package body i2c_pkg is
diff --git a/libraries/io/mdio/src/vhdl/mdio_pkg.vhd b/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
index a684ac0bb7adce068edd1c8b81d954b1fc308f97..b7c28a5b6325a5b54542d66ef5ae89c507db159b 100644
--- a/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
+++ b/libraries/io/mdio/src/vhdl/mdio_pkg.vhd
@@ -82,7 +82,6 @@ package mdio_pkg is
   function mdio_hdr_adr(prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
   function mdio_hdr_wr (prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
   function mdio_hdr_rd (prtad: std_logic_vector(c_mdio_phy_hdr_prtad_len - 1 downto 0); devad: std_logic_vector(c_mdio_phy_hdr_devad_len - 1 downto 0) ) return std_logic_vector;
-
 end mdio_pkg;
 
 package body mdio_pkg is
@@ -103,5 +102,4 @@ package body mdio_pkg is
   begin
     return c_mdio_phy_hdr_st & c_mdio_phy_hdr_op_rd & prtad & devad & c_mdio_phy_hdr_ta;
   end;
-
 end mdio_pkg;
diff --git a/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd b/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
index b7d28c187909e180a4cd529b2ad5486d3d16389d..eae7012141ef24dccf8a9dc32463ce8b5c4b2145 100644
--- a/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
+++ b/libraries/io/ppsh/src/vhdl/ppsh_reg.vhd
@@ -273,5 +273,4 @@ begin
       out_new     => open
     );
   end generate;  -- gen_cross
-
 end rtl;
diff --git a/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd b/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
index 85c4d7da1208fa90f8b00c5271a66f1b4bd6054a..239d898990220c5899e0eebf5e454569e68a87e0 100644
--- a/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
+++ b/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
@@ -440,5 +440,4 @@ begin
       out_sosi => src_out_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd b/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
index 080b2833fc184981953ff0dd67fafe0751ad2331..b10ba7382644452a32078a673b437c5847bf72bc 100644
--- a/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
+++ b/libraries/io/tr_nonbonded/src/vhdl/mms_tr_nonbonded.vhd
@@ -349,5 +349,4 @@ begin
       in_sosi_arr       => demux_in_sosi_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd b/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
index 62aa54ca01956ace978f341f0ebf9d4a24e6c864..2691e8f518cc79505af9c260dc2acf816d8ba9f5 100644
--- a/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
+++ b/libraries/io/tr_nonbonded/src/vhdl/tr_nonbonded_reg.vhd
@@ -170,5 +170,4 @@ begin
       dout => rx_align_en(i)
     );
   end generate;
-
 end rtl;
diff --git a/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd b/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
index a2423241e25de40ef94f81bf2aebc7ade5021cb6..276fd461037a270c382554b4ca111fc85f01f0af 100644
--- a/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
+++ b/libraries/io/tr_xaui/src/vhdl/mms_tr_xaui.vhd
@@ -289,5 +289,4 @@ begin
     end process;
 
   end generate;
-
 end wrap;
diff --git a/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd b/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
index b93a840b0650b4fabb4d6344b09ba86f568ee5b6..ad8c84b89a038fc96a3d0e1d6489d22f50db3914 100644
--- a/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
+++ b/libraries/io/tr_xaui/src/vhdl/tr_xaui.vhd
@@ -236,5 +236,4 @@ begin
       mdio_mdat_oen_arr => mdio_mdat_oen_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/10gbase_r/sim_10gbase_r.vhd b/libraries/technology/10gbase_r/sim_10gbase_r.vhd
index 2c3e4959cf2e0cdf4860e3b5d384005d80a1e5b9..84c43232aefa7ea25b3af4a512dc2d1d589e5711 100644
--- a/libraries/technology/10gbase_r/sim_10gbase_r.vhd
+++ b/libraries/technology/10gbase_r/sim_10gbase_r.vhd
@@ -134,5 +134,4 @@ begin
       rx_serial_in       => rx_serial_arr(i)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/10gbase_r/tech_10gbase_r.vhd b/libraries/technology/10gbase_r/tech_10gbase_r.vhd
index f2bfdc6e44ad7c9b00f26661875840ce34eee2d6..f8929cd9eb67c52a2731583bbd04e26bd0bd8227 100644
--- a/libraries/technology/10gbase_r/tech_10gbase_r.vhd
+++ b/libraries/technology/10gbase_r/tech_10gbase_r.vhd
@@ -121,5 +121,4 @@ begin
               xgmii_tx_ready_arr, xgmii_rx_ready_arr, xgmii_tx_dc_arr, xgmii_rx_dc_arr,
               tx_serial_arr, rx_serial_arr);
   end generate;
-
 end str;
diff --git a/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd b/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
index 1f561f3d1e9c5ee8c0271e6239210f5167d354b9..89032626f723dea142bb50c7cbbda2e805ca6fce 100644
--- a/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
+++ b/libraries/technology/10gbase_r/tech_10gbase_r_component_pkg.vhd
@@ -1712,5 +1712,4 @@ package tech_10gbase_r_component_pkg is
     tx_ready           : out std_logic_vector(47 downto 0)  -- tx_ready.tx_ready
   );
   end component;
-
 end tech_10gbase_r_component_pkg;
diff --git a/libraries/technology/clkbuf/tech_clkbuf.vhd b/libraries/technology/clkbuf/tech_clkbuf.vhd
index ccb8eb551dc32f6bac7d4f5cac5e8c6d4fb6a6c4..57be1f2d9688db6e99aa4fa7cb033a7ab80cb080 100644
--- a/libraries/technology/clkbuf/tech_clkbuf.vhd
+++ b/libraries/technology/clkbuf/tech_clkbuf.vhd
@@ -91,5 +91,4 @@ begin
       outclk => outclk  -- outclk
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd b/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
index 11debb90e497181403d8842d5c1f5978c4337665..f3dfb61dc977ed106236f091418d560970f731b4 100644
--- a/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
+++ b/libraries/technology/clkbuf/tech_clkbuf_component_pkg.vhd
@@ -68,5 +68,4 @@ package tech_clkbuf_component_pkg is
     outclk : out std_logic  -- altclkctrl_output.outclk
   );
   end component;
-
 end tech_clkbuf_component_pkg;
diff --git a/libraries/technology/ddr/tech_ddr.vhd b/libraries/technology/ddr/tech_ddr.vhd
index e15ba40ef64495f7c64b282e72a75875e96aea95..eec83d58d229b005097f1e04d4b6879e7b7b750f 100644
--- a/libraries/technology/ddr/tech_ddr.vhd
+++ b/libraries/technology/ddr/tech_ddr.vhd
@@ -144,5 +144,4 @@ begin
       ctlr_miso         => ctlr_miso
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10.vhd b/libraries/technology/ddr/tech_ddr_arria10.vhd
index 0bf13a950e7a03dd6332747af1d46a9a58d0580c..3d80a2d33ab5c02a91c358b7d5500fca9c620dd4 100644
--- a/libraries/technology/ddr/tech_ddr_arria10.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10.vhd
@@ -194,5 +194,4 @@ begin
     ctlr_miso.cal_ok   <= local_cal_success;
     ctlr_miso.cal_fail <= local_cal_fail;
   end generate;
-
 end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd b/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
index ab1bb6058ef7ddbfa90f8021c2947b5a8cdbc81e..4882ce292b5a89b3937f3efe64be4cfe02056a16 100644
--- a/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10_e1sg.vhd
@@ -299,5 +299,4 @@ begin
     ctlr_miso.cal_ok   <= local_cal_success;
     ctlr_miso.cal_fail <= local_cal_fail;
   end generate;
-
 end str;
diff --git a/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd b/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
index c7dd3c97dc1b666a02f87466c5419cf782b4140f..c8c331966b6b0fd7582b4de5be7748a506ad8b5c 100644
--- a/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
+++ b/libraries/technology/ddr/tech_ddr_arria10_e3sge3.vhd
@@ -247,5 +247,4 @@ begin
     ctlr_miso.cal_ok   <= local_cal_success;
     ctlr_miso.cal_fail <= local_cal_fail;
   end generate;
-
 end str;
diff --git a/libraries/technology/ddr/tech_ddr_component_pkg.vhd b/libraries/technology/ddr/tech_ddr_component_pkg.vhd
index 7679e60118739a6d1c9e42dcd86015e36b7e713a..060408ceab448d1dd5287028c661f9770c4054f2 100644
--- a/libraries/technology/ddr/tech_ddr_component_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_component_pkg.vhd
@@ -789,7 +789,6 @@ package tech_ddr_component_pkg is
     local_cal_fail      : out   std_logic  -- .local_cal_fail
   );
   end component;
-
 end tech_ddr_component_pkg;
 
 package body tech_ddr_component_pkg is
diff --git a/libraries/technology/ddr/tech_ddr_mem_model.vhd b/libraries/technology/ddr/tech_ddr_mem_model.vhd
index dcdb187b78702ac100ebc6c233ac2b8e71ddddea..a5e380e62d879688acc0133915c7bf28ef53db88 100644
--- a/libraries/technology/ddr/tech_ddr_mem_model.vhd
+++ b/libraries/technology/ddr/tech_ddr_mem_model.vhd
@@ -130,5 +130,4 @@ begin
       mem_dbi_n    => mem4_io.dbi_n(g_tech_ddr.dbi_w - 1 downto 0)  -- .mem_dbi_n
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd b/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
index 1b8b5d4acd9ebdf55904d81982342dfd33174d32..fc24a54604611122f01c888594f13820ec7569c9 100644
--- a/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_mem_model_component_pkg.vhd
@@ -106,7 +106,6 @@ package tech_ddr_mem_model_component_pkg is
     mem_dbi_n   : inout std_logic_vector(8 downto 0)  := (others => '0')  -- .mem_dbi_n
   );
   end component ed_sim_altera_emif_mem_model_141_z3tvrmq;
-
 end tech_ddr_mem_model_component_pkg;
 
 package body tech_ddr_mem_model_component_pkg is
diff --git a/libraries/technology/ddr/tech_ddr_pkg.vhd b/libraries/technology/ddr/tech_ddr_pkg.vhd
index 8dd9f402e491b7f46abe85d2ab5bbd657fd64677..0fe623e8c3d2707d72a609251024b21b5086d09c 100644
--- a/libraries/technology/ddr/tech_ddr_pkg.vhd
+++ b/libraries/technology/ddr/tech_ddr_pkg.vhd
@@ -199,7 +199,6 @@ package tech_ddr_pkg is
   constant c_tech_ddr4_phy_in_x     : t_tech_ddr4_phy_in := ('X', 'X');
   constant c_tech_ddr3_phy_ou_x     : t_tech_ddr3_phy_ou := ((others => 'X'), (others => 'X'), (others => 'X'), 'X', 'X', 'X', 'X', (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'));
   constant c_tech_ddr4_phy_ou_x     : t_tech_ddr4_phy_ou := ((others => 'X'), (others => 'X'), (others => 'X'), 'X', 'X', 'X', (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'), (others => 'X'));
-
 end tech_ddr_pkg;
 
 package body tech_ddr_pkg is
diff --git a/libraries/technology/eth_10g/tech_eth_10g.vhd b/libraries/technology/eth_10g/tech_eth_10g.vhd
index fa7502cef39091424edc574eb00964e5bb9a20d0..2500c1003465e985e2b412ab1d1d8c9a38a9dfa0 100644
--- a/libraries/technology/eth_10g/tech_eth_10g.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g.vhd
@@ -352,5 +352,4 @@ begin
       serial_rx_arr    => serial_rx_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd b/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
index 0ccadb8a9b19a1b39a6393eee4b73d708e1bbe21..8ec34d5ec1d3a250e4c1b9f5234f81da6bcb508e 100644
--- a/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g_clocks.vhd
@@ -89,5 +89,4 @@ begin
     eth_rx_clk_arr  <= (others => tr_ref_clk_156);
     eth_rx_rst_arr  <= (others => tr_ref_rst_156);
   end generate;
-
 end str;
diff --git a/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd b/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
index 072c427e9cf4ec454f820899105722cf5889ecdc..2f49dba588e440b94803de2e5aadf60c914119d5 100644
--- a/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g_component_pkg.vhd
@@ -265,7 +265,6 @@ package tech_eth_10g_component_pkg is
     serial_rx_arr    : in  std_logic_vector(g_nof_channels - 1 downto 0)
   );
   end component;
-
 end tech_eth_10g_component_pkg;
 
 package body tech_eth_10g_component_pkg is
diff --git a/libraries/technology/fifo/tech_fifo_component_pkg.vhd b/libraries/technology/fifo/tech_fifo_component_pkg.vhd
index f51dcd474a13cb71d838d9eaa9fe8646b85817c4..ef4f312e7734df6f4949b86c64f8795ebe5031b6 100644
--- a/libraries/technology/fifo/tech_fifo_component_pkg.vhd
+++ b/libraries/technology/fifo/tech_fifo_component_pkg.vhd
@@ -479,5 +479,4 @@ package tech_fifo_component_pkg is
     wrusedw : out std_logic_vector(tech_ceil_log2(g_nof_words) - 1 downto 0)
   );
   end component;
-
 end tech_fifo_component_pkg;
diff --git a/libraries/technology/fifo/tech_fifo_dc.vhd b/libraries/technology/fifo/tech_fifo_dc.vhd
index 3e0b47b77a6b9fa231dddc36204c7ae09d551a6c..3b6464c795442905fb05c8a51755108c278b88bf 100644
--- a/libraries/technology/fifo/tech_fifo_dc.vhd
+++ b/libraries/technology/fifo/tech_fifo_dc.vhd
@@ -101,5 +101,4 @@ begin
     generic map (g_use_eab, g_dat_w, g_nof_words)
     port map (aclr, data, rdclk, rdreq, wrclk, wrreq, q, rdempty, rdusedw, wrfull, wrusedw);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
index 4c1650dbbb4f8e55a0307ea31d500ba19103c020..29c9db6617f10f45aa6e5bf8984ae5f500ab7665 100644
--- a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
+++ b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd
@@ -101,5 +101,4 @@ begin
     generic map (g_nof_words, g_wrdat_w, g_rddat_w)
     port map (aclr, data, rdclk, rdreq, wrclk, wrreq, q, rdempty, rdusedw, wrfull, wrusedw);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fifo/tech_fifo_sc.vhd b/libraries/technology/fifo/tech_fifo_sc.vhd
index 68970362557b4ef7af0dbf98accaf00915c8bef7..cce89b8e33e4bc88d41839e6d4612432508f0cd8 100644
--- a/libraries/technology/fifo/tech_fifo_sc.vhd
+++ b/libraries/technology/fifo/tech_fifo_sc.vhd
@@ -99,5 +99,4 @@ begin
     generic map (g_use_eab, g_dat_w, g_nof_words)
     port map (aclr, clock, data, rdreq, wrreq, empty, full, q, usedw);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/flash/tech_flash_asmi_parallel.vhd b/libraries/technology/flash/tech_flash_asmi_parallel.vhd
index 536e905748ee3a8ac8173529ba3da7ddb303e307..d75d30b6be1be0543650779514cc416761ecf0ec 100644
--- a/libraries/technology/flash/tech_flash_asmi_parallel.vhd
+++ b/libraries/technology/flash/tech_flash_asmi_parallel.vhd
@@ -91,5 +91,4 @@ begin
     u0 : ip_arria10_e2sg_asmi_parallel
     port map (addr, clkin, datain, rden, read, sector_erase, shift_bytes, wren, write, busy, data_valid, dataout, illegal_erase, illegal_write, reset, sce, en4b_addr);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/flash/tech_flash_component_pkg.vhd b/libraries/technology/flash/tech_flash_component_pkg.vhd
index 2ae3ba18dbba83644989aa88f27adfe249e88579..976aba0dbc9015de1eadbd950f924fd92bc0de79 100644
--- a/libraries/technology/flash/tech_flash_component_pkg.vhd
+++ b/libraries/technology/flash/tech_flash_component_pkg.vhd
@@ -236,7 +236,6 @@ package tech_flash_component_pkg is
 
   function tech_flash_addr_w( technology: in integer ) return integer;
   function tech_flash_data_w( technology: in integer ) return integer;
-
 end tech_flash_component_pkg;
 
 package body tech_flash_component_pkg is
@@ -266,5 +265,4 @@ package body tech_flash_component_pkg is
         return 32;
     end if;
   end;
-
 end tech_flash_component_pkg;
diff --git a/libraries/technology/flash/tech_flash_remote_update.vhd b/libraries/technology/flash/tech_flash_remote_update.vhd
index cb345589769a77d1665d534a8bec5ff17114c686..cae20c4de1fab608b2e3fca8e67950d3a545a0c0 100644
--- a/libraries/technology/flash/tech_flash_remote_update.vhd
+++ b/libraries/technology/flash/tech_flash_remote_update.vhd
@@ -81,5 +81,4 @@ begin
     u0 : ip_arria10_e2sg_remote_update
     port map (clock, data_in, param, read_param, reconfig, reset, reset_timer, write_param, busy, data_out);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
index e74880e3f006feba5d1749241d132a1c3e74a4ff..f29468a3771277ec7c0c043294dea8ff612a9786 100644
--- a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
+++ b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd
@@ -85,5 +85,4 @@ begin
             eoc     => eoc  -- eoc.eoc
         );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
index a0e8f9dc4bf4ea9e066b7cfcc3537fbd8ecae78e..c05de28fae22d211edd5c61e0d6527321fcbecfe 100644
--- a/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
+++ b/libraries/technology/fpga_temp_sens/tech_fpga_temp_sens_component_pkg.vhd
@@ -60,5 +60,4 @@ package tech_fpga_temp_sens_component_pkg is
           tempout : out std_logic_vector(9 downto 0)  -- tempout.tempout
       );
   end component;
-
 end tech_fpga_temp_sens_component_pkg;
diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
index c7c5df214a4dcd570ca7887ba7af404795ec42ad..35fbeb242e84035d557259839a9626a4da3459f3 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd
@@ -129,5 +129,4 @@ begin
         sample_store_irq_irq       => sample_store_irq_irq
       );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
index 4ee6ff807f152ddeadc6e945a6ae318edbbe7097..d3b428431b45a334699650977c86c095c29a9b18 100644
--- a/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
+++ b/libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens_component_pkg.vhd
@@ -96,5 +96,4 @@ package tech_fpga_voltage_sens_component_pkg is
           sample_store_irq_irq         : out std_logic
       );
   end component;
-
 end tech_fpga_voltage_sens_component_pkg;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
index 6e10478041a1781e75b4c2f1fd6213ed7fe67424..15af634a1ec279fc728c05444edab5fcbe8d46fa 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_clk125.vhd
@@ -103,5 +103,4 @@ begin
           pll_refclk0   => inclk0  -- pll_refclk0.clk
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
index b19d46e4140ebde17e20c684a41716c5cad80948..4cdd2c061c9f191c0b4061f28320e5d56c588234 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_clk200.vhd
@@ -98,5 +98,4 @@ begin
           pll_refclk0   => inclk0  -- pll_refclk0.clk
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd b/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
index 15097276103c9e7b4003b2bc2111875d6f194cac..f1149a7db0e5857e5014c0c01ee5581360b08799 100644
--- a/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
+++ b/libraries/technology/fractional_pll/tech_fractional_pll_component_pkg.vhd
@@ -148,5 +148,4 @@ package tech_fractional_pll_component_pkg is
     pll_refclk0   : in  std_logic := '0'  -- pll_refclk0.clk
   );
   end component;
-
 end tech_fractional_pll_component_pkg;
diff --git a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
index f27b9fa33506139d398babc99cef3b9ce0076813..1bf902e9432aa75a7d8c9565451a40854fe2d179 100644
--- a/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_component_pkg.vhd
@@ -220,5 +220,4 @@ package tech_iobuf_component_pkg is
     out_dat    : out  std_logic_vector(g_width - 1 downto 0)
   );
   end component;
-
 end tech_iobuf_component_pkg;
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
index 94052b7b226db82f1a6f5418b1c69b496846b08e..982ca32177683c1fa66f0ae0328135509abb5ad0 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd
@@ -87,5 +87,4 @@ begin
     generic map (g_width)
     port map (in_dat, in_clk, in_clk_en, rst, out_dat_hi, out_dat_lo);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
index 865cda78c265fbad3f937ae82876ae9e2f229dea..7c592e557d86ab4649d6e321773354286a50af3b 100644
--- a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
+++ b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd
@@ -87,5 +87,4 @@ begin
     generic map (g_width)
     port map (rst, in_clk, in_clk_en, in_dat_hi, in_dat_lo, out_dat);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
index c4015c6c14c35aa9a8b6435615b5eacbf8ea88cb..c74e6522906153d2bb24d4c3e830a244757059a5 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_in.vhd
@@ -65,5 +65,4 @@ begin
       dataout_l => out_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
index 4ed587d7715758536cf3567a5770428b542b7582..3f805a6bb87b6ed5e13260e93b10ddad987f02d7 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/ip_agi027_1e1v_ddio_out.vhd
@@ -65,5 +65,4 @@ begin
       datain_l => in_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd b/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
index 52d764203772293624f4b68dce77d159b51570c6..c76bbb7ab3787e23656da23ecbdeb24f8647142e 100644
--- a/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ddio/sim/ip_agi027_1e1v_ddio_out_1.vhd
@@ -35,7 +35,6 @@
 -- Reference:
 --   Copied from ip_arria10_e2sg/ddio/sim/ip_arria10_e2sg_ddio_out_1.vhd
 
-
 library IEEE;
 use IEEE.std_logic_1164.all;
 
diff --git a/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd b/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
index 1a5687f71221a488b7c0c95db11d8a36b1b436c3..a5b8596f25c7f6835a428c744400607a7594207c 100644
--- a/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
+++ b/libraries/technology/ip_agi027_1e1v/mult/ip_agi027_1e1v_mult.vhd
@@ -118,5 +118,4 @@ begin
 --    out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
 --                                                   RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
index b4abedfa5274fa911470e669661bb39219261809..404edfb6b6116ec1dcbd77506d8eb7b6cde79ab4 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_cr_cw.vhd
@@ -159,5 +159,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
index 26b844c14b6072c68520858aa80a928dd1e2ba19..73342ddfb067fa1c28546648e18830ae816cc824 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_crk_cw.vhd
@@ -139,5 +139,4 @@ begin
       wren_a => wren,
       q_b => q
   );
-
 end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
index 7bc85bf4a18bdf9305a2cd3412c189d14573a93e..2024e3de75dc0f37867f94bac49f7b8c2ed8b692 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_r_w.vhd
@@ -155,5 +155,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
index bcbe6a9e1b5cba80c4399731d4bfb872245f4f3a..b0110c61d5104cb44c21b6d587e5e8f90be9c23f 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_ram_rw_rw.vhd
@@ -193,5 +193,4 @@ begin
     q_a <= out_a when g_rd_latency = 1 else reg_a;
     q_b <= out_b when g_rd_latency = 1 else reg_b;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
index b39f324843e4c35be2e44d61f92ddd729485596f..568dfc1930fc822648bd5e68f5131e86295843b0 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_simple_dual_port_ram_single_clock.vhd
@@ -71,4 +71,5 @@ begin
     q <= ram(raddr);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
index 495fb1624c07ebdbb8d992350a81b8542661e322..3c19ef88b75f83d076c853a6357cd622cef599ad 100644
--- a/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_agi027_1e1v/ram/ip_agi027_1e1v_true_dual_port_ram_single_clock.vhd
@@ -81,4 +81,5 @@ begin
     q_b <= ram(addr_b);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd b/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
index 3e33a817c1405b34d4f359f75abf433fda02eced..916dc7624e51ad8edf4d99930afd9fc1d208fd6c 100644
--- a/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
+++ b/libraries/technology/ip_agi027_1e1v/reset_release/ip_agi027_1e1v_reset_release_component_pkg.vhd
@@ -51,7 +51,6 @@ package ip_agi027_1e1v_reset_release_component_pkg is
       ninit_done  : out std_logic   -- reset
     );
   end component ip_agi027_1e1v_reset_release_ri;
-
 end ip_agi027_1e1v_reset_release_component_pkg;
 
 package body ip_agi027_1e1v_reset_release_component_pkg is
diff --git a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
index 7f7d4131f30810e479145aed1676b67f10987f72..49ddbaeb14e0297a44ceea3ba4481df8e56349f0 100644
--- a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
+++ b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
       dataout_l => out_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
index 6b0f88ced42c69b1fe45b016ebcc85730ac237f1..9b69ab584d0e6268f729cba018ef2a33472161b4 100644
--- a/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
+++ b/libraries/technology/ip_arria10/ddio/ip_arria10_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
       datain_l => in_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd b/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
index 51fe57d1d22f8ee5d49ce21bd958de4068ffffcf..c5bb0035b51deb2781c1a9cf6a278fc1fc68fda6 100644
--- a/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
+++ b/libraries/technology/ip_arria10/mult/ip_arria10_mult.vhd
@@ -68,5 +68,4 @@ begin
 --    out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
 --                                                   RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
index 4b51cd15a06847f7c216cc4588813715153dd7f4..aae0526f13f787afb9babe2c17e25e9d337cb6dc 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
index 2b65b1aa03ad78063c79c7caac67c07e644cd29f..0623c7ea719da02b8ad46211abf4dd719016b1c1 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
     q_a <= out_a when g_rd_latency = 1 else reg_a;
     q_b <= out_b when g_rd_latency = 1 else reg_b;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
index 0880d2e81bb6bf8a208c46adf00d3cd7c222fab5..b661c825c211adc3a6fbeb6e0acd0322d3e1f720 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
index 206e76f7b0ee7f1aeed0b974688519c8090c2a21..54c278c219fe7f2918490b6eb83769091b02d3af 100644
--- a/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10/ram/ip_arria10_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
     q <= ram(raddr);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
index dcccc9b1c8b2e9b990741414a491ff0cacdf2be9..86d1e2d7975bed9cace8351a96cafaa49e809312 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
       dataout_l => out_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
index 5d100fa091dc2e36c91b349f0b7fc3572882febb..766cb7f5991604f9b0b97a0ccc568cb57c1bc5ef 100644
--- a/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ddio/ip_arria10_e1sg_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
       datain_l => in_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
index 34caad0fcfcdf69e98583acd436695420caaca11..cd5e892a754187cb63b137c7f5abfa425047b3da 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_component_pkg.vhd
@@ -85,7 +85,6 @@ package ip_arria10_e1sg_jesd204b_component_pkg is
       txphy_clk                  : out std_logic_vector(0 downto 0)  -- export
     );
     end component ip_arria10_e1sg_jesd204b_tx;
-
 end ip_arria10_e1sg_jesd204b_component_pkg;
 
 package body ip_arria10_e1sg_jesd204b_component_pkg is
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
index 604b4da043e9b3dc2ff0ee6a7e54bc19fbb53a16..a39c8c405821731d0a6dd87e192d4ec1fa0654dc 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
index 3335b480bba324a51cde55b65c2248a71afe36b9..00a9c179e45f483ea22fda58c47e9bc8b0bddfb6 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
     q_a <= out_a when g_rd_latency = 1 else reg_a;
     q_b <= out_b when g_rd_latency = 1 else reg_b;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
index 6cf10c4b343c813eda054b30486357a231fe740c..b1f010f12a5baedfc93b99a3bd5d84a1c78be0bb 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
index dba8bb6afd3284259464514303daa65516b3dc09..cd90cf167ecfd05fd7c016cb13e823224a92fbb3 100644
--- a/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e1sg/ram/ip_arria10_e1sg_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
     q <= ram(raddr);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
index e5221f4af8d1f1a4de5c5f9dd520ad10a5b50ebf..0ff20b83eecd4a0aff35497b7507729f7151babe 100644
--- a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
       dataout_l => out_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
index 6fcc0779f8b6de6735a491fd3990500c4f82ca38..c90d0e29a9f2f1744fef4a4f72ce1a09aed5c329 100644
--- a/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ddio/ip_arria10_e2sg_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
       datain_l => in_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd b/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
index 7cff7179c570eee9a3373af297e7003d5bc394e6..eea584ea3262e718c67466ac5900f4b5258a4b57 100644
--- a/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
+++ b/libraries/technology/ip_arria10_e2sg/jesd204b/ip_arria10_e2sg_jesd204b_component_pkg.vhd
@@ -85,7 +85,6 @@ package ip_arria10_e2sg_jesd204b_component_pkg is
       txphy_clk                  : out std_logic_vector(0 downto 0)  -- export
     );
     end component ip_arria10_e2sg_jesd204b_tx;
-
 end ip_arria10_e2sg_jesd204b_component_pkg;
 
 package body ip_arria10_e2sg_jesd204b_component_pkg is
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
index 97ef59ff32d6bb06cbe140797d6c6a00ab97af80..1c729b5a1f4060966849382b00d02b720af59b56 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_cr_cw.vhd
@@ -154,5 +154,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
index 5502afa475a153460709d9dfa1e94450eef141d1..8d7ed900e98f173f80954de6046be9ae344a97d9 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_crw_crw.vhd
@@ -184,5 +184,4 @@ begin
     q_a <= out_a when g_rd_latency = 1 else reg_a;
     q_b <= out_b when g_rd_latency = 1 else reg_b;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
index 1f3461d27e7cba48f93cdf56f82b1f979a01b8ca..5f5c45d24662e7ff4c1bd56bfb1a48fc0c09ae9f 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
index 6e789dafdc078d91f84cd714ae2a693aa8bd76b2..558506ca8d9496f26bfb98f7afc36b075c439607 100644
--- a/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e2sg/ram/ip_arria10_e2sg_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
     q <= ram(raddr);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
index f28811cdb53a00b52c1056293cc42397e45e42ea..ae0249277244605515197f17c1f376fe57da222d 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_in.vhd
@@ -59,5 +59,4 @@ begin
       dataout_l => out_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
index 867d32d4f7268ac8cd433f0d1ce0e9a2d0682ded..ee9e08858bdaeb2005155d5a41a44f28c8d050ba 100644
--- a/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ddio/ip_arria10_e3sge3_ddio_out.vhd
@@ -59,5 +59,4 @@ begin
       datain_l => in_dat_lo(I downto I)
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
index a3684875767a374adc20889cefc77a92b7058c6c..0ef9b7ea3f860484a791e598c7442dc1e238c412 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_cr_cw.vhd
@@ -152,5 +152,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
index 4b5fe63107fdb859fb3cc22f4191d6659cebf02a..9ee98ecdf241a67f168207f87657eb44171776c8 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_crw_crw.vhd
@@ -182,5 +182,4 @@ begin
     q_a <= out_a when g_rd_latency = 1 else reg_a;
     q_b <= out_b when g_rd_latency = 1 else reg_b;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
index 7df895809eb9e800570223916242b0d0dbfbc65c..c428676d104cc8217d5ff2a71aab292950f5e664 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_ram_r_w.vhd
@@ -147,5 +147,4 @@ begin
 
     q <= out_q when g_rd_latency = 1 else reg_q;
   end generate;
-
 end SYN;
diff --git a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
index 237904b7e18740cb2154dd70e6a0b31b58da1598..d21f7ee0a70ef312b4d13e600b500bce39b1bcf7 100644
--- a/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
+++ b/libraries/technology/ip_arria10_e3sge3/ram/ip_arria10_e3sge3_simple_dual_port_ram_single_clock.vhd
@@ -65,4 +65,5 @@ begin
     q <= ram(raddr);
   end if;
   end process;
+
 end rtl;
diff --git a/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd b/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
index 973b6aa1e3c2213a331bf6a582e8958b03047d8e..75b9bf1ecbe91b551fec8285cbb1bc5169e1eea0 100644
--- a/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
+++ b/libraries/technology/ip_stratixiv/mult/ip_stratixiv_mult.vhd
@@ -62,5 +62,4 @@ begin
 --    out_p((I+1)*g_out_p_w-1 DOWNTO I*g_out_p_w) <= RESIZE_SVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w) WHEN g_representation="SIGNED" ELSE
 --                                                   RESIZE_UVEC(prod((I+1)*c_prod_w-1 DOWNTO I*c_prod_w), g_out_p_w);
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
index 5f8e3b1467a997570365527a7998450c5d970131..b8f52dc19151fcab7bc8da86e47ab46008ecd291 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v101.vhd
@@ -70,5 +70,4 @@ begin
       reconfig_togxb      => reconfig_togxb
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
index 29a174453d2f6ab0e850d17e4ff0e13d5f8caf3b..a02b968a894d3bacd54c644a0dc779b724895d69 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v111.vhd
@@ -60,5 +60,4 @@ begin
       reconfig_togxb      => reconfig_togxb
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
index e89b3a2ad5a6c7045a2e45566120df2a1b1d36b8..62f27835ef3131e9ed6577290094c861649c9bb2 100644
--- a/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
+++ b/libraries/technology/ip_stratixiv/transceiver/ip_stratixiv_gxb_reconfig_v91.vhd
@@ -79,5 +79,4 @@ begin
       reconfig_togxb      => reconfig_togxb
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b.vhd b/libraries/technology/jesd204b/tech_jesd204b.vhd
index 391c8cae96844576fb80c13ca83e902e985bbf06..bdb9a2cdb5dbfd82017f430a5a3274d7360b58b6 100644
--- a/libraries/technology/jesd204b/tech_jesd204b.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b.vhd
@@ -159,5 +159,4 @@ begin
       serial_rx_arr        => serial_rx_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
index 9cbe9ea812051084e3cd645424d707cb9accdeb9..3f6456a0a130193558f15532d54f7f521d8397f6 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
@@ -299,7 +299,6 @@ package tech_jesd204b_component_pkg is
     txphy_clk                  : out std_logic_vector(0 downto 0)  -- export
   );
   end component;
-
 end tech_jesd204b_component_pkg;
 
 package body tech_jesd204b_component_pkg is
diff --git a/libraries/technology/jesd204b/tech_jesd204b_tx.vhd b/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
index 49102c574510dc19a240ba94dece777249f3069d..e3f634e00f4b7c69b149c126ebdd084897f877cc 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_tx.vhd
@@ -203,5 +203,4 @@ begin
       txphy_clk                  => txphy_clk
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/jesd204b/tech_jesd204b_v2.vhd b/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
index f11c2502b5177fcce911f64b9df3c339aa48a27c..256043492dbb6b7d513ada4a58331794b69d6ffb 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_v2.vhd
@@ -158,5 +158,4 @@ begin
       serial_rx_arr        => serial_rx_arr
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd b/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
index 9ce4e0458687c4de0ad2b485f51e8880b110bb32..40274bb238b70dcb1431a9c02b10c3a87450c854 100644
--- a/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
+++ b/libraries/technology/mac_10g/tb_tech_mac_10g_pkg.vhd
@@ -456,5 +456,4 @@ package body tb_tech_mac_10g_pkg is
       -- No verify on CRC32 word
     end if;
   end proc_tech_mac_10g_rx_packet;
-
 end tb_tech_mac_10g_pkg;
diff --git a/libraries/technology/mac_10g/tech_mac_10g.vhd b/libraries/technology/mac_10g/tech_mac_10g.vhd
index a7c3f4dd4d43dc03336152a0f9d9d814e75824ee..735d9dda0945bea3a3a701c2dcde26d2ccee168c 100644
--- a/libraries/technology/mac_10g/tech_mac_10g.vhd
+++ b/libraries/technology/mac_10g/tech_mac_10g.vhd
@@ -288,5 +288,4 @@ begin
     rx_mac_src_in_rl1 <= rx_src_in;
     rx_src_out        <= rx_mac_src_out_rl1;
   end generate;
-
 end str;
diff --git a/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd b/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
index ecb02ffc505fe2a9b837aa83e3f21d5bbde2c538..00625da3d290496825fe8e1db26a863b83236768 100644
--- a/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
+++ b/libraries/technology/mac_10g/tech_mac_10g_component_pkg.vhd
@@ -288,7 +288,6 @@ package tech_mac_10g_component_pkg is
     unidirectional_remote_fault_dis : out std_logic  -- .remote_fault_dis
   );
   end component;
-
 end tech_mac_10g_component_pkg;
 
 package body tech_mac_10g_component_pkg is
@@ -306,5 +305,4 @@ package body tech_mac_10g_component_pkg is
 
     return v_csr_addr_w;
   end func_tech_mac_10g_csr_addr_w;
-
 end tech_mac_10g_component_pkg;
diff --git a/libraries/technology/memory/tech_memory_component_pkg.vhd b/libraries/technology/memory/tech_memory_component_pkg.vhd
index a27bee7d75e6a9223717498124dd2061e05edf56..2d76554f22bfaa9c6c6499cdd6983506b2bca0c8 100644
--- a/libraries/technology/memory/tech_memory_component_pkg.vhd
+++ b/libraries/technology/memory/tech_memory_component_pkg.vhd
@@ -657,5 +657,4 @@ package tech_memory_component_pkg is
     q           : out std_logic_vector(g_dat_w - 1 downto 0)
   );
   end component;
-
 end tech_memory_component_pkg;
diff --git a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
index cfa113d9d22103cc5a143af2c4b4c08101d87a1a..fa937daef0ecc1f3586106647c8510044ef4435d 100644
--- a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd
@@ -102,5 +102,4 @@ begin
     generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
     port map (data, rdaddress, rdclock, wraddress, wrclock, wren, q);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_crk_cw.vhd b/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
index 619b49a2f75898ef240426c052703a74f6f41e58..770b511aa86417deb752270f640bd7ca9c248f60 100644
--- a/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crk_cw.vhd
@@ -111,5 +111,4 @@ begin
     generic map (g_wr_adr_w, g_wr_dat_w, g_wr_nof_words, g_rd_adr_w, g_rd_dat_w, g_rd_nof_words, g_rd_latency, g_init_file)
     port map (data, wraddress, wrclock, wren, rdaddress, rdclock, q);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
index a9dcdd53ce00180de5cccb6c9e59482a5ef44096..0acf8beaac701cb44d7202f441c67c599b21d2d9 100644
--- a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd
@@ -115,6 +115,5 @@ begin
     generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
     port map (address_a, address_b, clock_b, data_a, data_b, wren_a, wren_b, q_a, q_b);
   end generate;
-
 end architecture;
 
diff --git a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
index 718288e79827ef318900358575f8b1f97b1dd8d0..36060d38cc53819ecec50e1dc0a7a9e293d98dac 100644
--- a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd
@@ -112,5 +112,4 @@ begin
     generic map (false, g_adr_b_w, g_dat_b_w, g_nof_words_b, g_rd_latency, g_init_file)
     port map (address_a, address_b, clock_b, data_a, data_b, wren_a, wren_b, q_a, q_b);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_r_w.vhd b/libraries/technology/memory/tech_memory_ram_r_w.vhd
index 5ded93400f33156e31fcf34701acb35636486bc5..72cf69ff376367dec70517d80f8a24f7291f97ba 100644
--- a/libraries/technology/memory/tech_memory_ram_r_w.vhd
+++ b/libraries/technology/memory/tech_memory_ram_r_w.vhd
@@ -92,5 +92,4 @@ begin
     generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
     port map (clock, data, rdaddress, wraddress, wren, q);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/memory/tech_memory_ram_rw_rw.vhd b/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
index 9302e2122108ea50258d8b4b4994cc4b27de8bfd..c1d1e8e796e0485b946c6f2ed0950eefa60f6736 100644
--- a/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
+++ b/libraries/technology/memory/tech_memory_ram_rw_rw.vhd
@@ -116,5 +116,4 @@ begin
     generic map (false, g_adr_w, g_dat_w, g_nof_words, g_rd_latency, g_init_file)
     port map (address_a, address_b, clock, data_a, data_b, wren_a, wren_b, q_a, q_b);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/memory/tech_memory_rom_r.vhd b/libraries/technology/memory/tech_memory_rom_r.vhd
index 5abfbe95948e0bb42ada835f9c9f16023868b153..7dd91ff5d7c9cb305f56061d09daf25ba415a54b 100644
--- a/libraries/technology/memory/tech_memory_rom_r.vhd
+++ b/libraries/technology/memory/tech_memory_rom_r.vhd
@@ -128,5 +128,4 @@ begin
       q           => q
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/mult/tech_complex_mult.vhd b/libraries/technology/mult/tech_complex_mult.vhd
index a8f3d9d98e6c612be4854c74855893dfeb1e3f46..8908b47849c5a4df906a8545cf2a16c9cc7f474a 100644
--- a/libraries/technology/mult/tech_complex_mult.vhd
+++ b/libraries/technology/mult/tech_complex_mult.vhd
@@ -459,5 +459,4 @@ begin
       result_im  => result_im
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/mult/tech_mult.vhd b/libraries/technology/mult/tech_mult.vhd
index 59e430028ad1571ee2388930c01a86c87934d922..b013e9df5c29958eef2f11493007883887b8dade 100644
--- a/libraries/technology/mult/tech_mult.vhd
+++ b/libraries/technology/mult/tech_mult.vhd
@@ -197,5 +197,4 @@ begin
     out_p((I + 1) * g_out_p_w - 1 downto I * g_out_p_w) <= RESIZE_SVEC(prod((I + 1) * c_prod_w - 1 downto I * c_prod_w), g_out_p_w) when g_representation = "SIGNED" else
                                                   RESIZE_UVEC(prod((I + 1) * c_prod_w - 1 downto I * c_prod_w), g_out_p_w);
   end generate;
-
 end str;
diff --git a/libraries/technology/mult/tech_mult_add2.vhd b/libraries/technology/mult/tech_mult_add2.vhd
index 765e0f494fdbd361aad38a2274b2c80db0c57c0d..51c2738c5e3167f81f167c48778b47870074528f 100644
--- a/libraries/technology/mult/tech_mult_add2.vhd
+++ b/libraries/technology/mult/tech_mult_add2.vhd
@@ -156,5 +156,4 @@ begin
       res   => res
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/mult/tech_mult_add4.vhd b/libraries/technology/mult/tech_mult_add4.vhd
index ca992cf6d816b70c375b4dd8a80805668517a958..d3dd726e4262014b8e1d577c7d3c6b0d7e2408d2 100644
--- a/libraries/technology/mult/tech_mult_add4.vhd
+++ b/libraries/technology/mult/tech_mult_add4.vhd
@@ -193,5 +193,4 @@ begin
       res   => res
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/mult/tech_mult_component_pkg.vhd b/libraries/technology/mult/tech_mult_component_pkg.vhd
index 954b1819489cb384b92255dc224b91173db372eb..3443005628b0b88ed8dfa0b281501f5bb8c0a5d6 100644
--- a/libraries/technology/mult/tech_mult_component_pkg.vhd
+++ b/libraries/technology/mult/tech_mult_component_pkg.vhd
@@ -548,7 +548,6 @@ package tech_mult_component_pkg is
   );
   end component;
 
-
   component ip_agi027_1e1v_complex_mult_rtl is
   generic (
     g_in_a_w           : positive := 18;
@@ -624,5 +623,4 @@ package tech_mult_component_pkg is
     result_imag : out std_logic_vector(53 downto 0)  -- .result_imag
   );
   end component;
-
 end tech_mult_component_pkg;
diff --git a/libraries/technology/mult/tech_mult_pkg.vhd b/libraries/technology/mult/tech_mult_pkg.vhd
index a26f14d8009b5ac7187c41ea89b47dff173f6467..40e55aa845663d61afa678c386961b18e41edb3a 100644
--- a/libraries/technology/mult/tech_mult_pkg.vhd
+++ b/libraries/technology/mult/tech_mult_pkg.vhd
@@ -39,5 +39,4 @@ package tech_mult_pkg is
   constant c_tech_mult_arria10_ip                     : t_c_tech_mult_variant := (" IP",  true);
   constant c_tech_mult_agi027_1e1v_rtl                : t_c_tech_mult_variant := ("RTL",  false);
   constant c_tech_mult_agi027_1e1v_ip                 : t_c_tech_mult_variant := (" IP",  true);
-
 end tech_mult_pkg;
diff --git a/libraries/technology/pll/tech_pll_clk125.vhd b/libraries/technology/pll/tech_pll_clk125.vhd
index 674c4fdd68de58f68a167591b7cffd1aea9db052..ec713022608b41daa053dd6acb2b29af8452d5e5 100644
--- a/libraries/technology/pll/tech_pll_clk125.vhd
+++ b/libraries/technology/pll/tech_pll_clk125.vhd
@@ -99,5 +99,4 @@ begin
       locked   => locked
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk200.vhd b/libraries/technology/pll/tech_pll_clk200.vhd
index 015ec5d6067375c3741d4f0fefe0cf501101dbf9..2eb0bee13e0ba7aee192cc6b0c6b38b762659227 100644
--- a/libraries/technology/pll/tech_pll_clk200.vhd
+++ b/libraries/technology/pll/tech_pll_clk200.vhd
@@ -104,5 +104,4 @@ begin
       locked   => locked
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk200_p6.vhd b/libraries/technology/pll/tech_pll_clk200_p6.vhd
index cecd550a403c1d215423f7a04d62419f963f637c..80ef6903fb2e105e049bb4e6e4d1d584ed5dece0 100644
--- a/libraries/technology/pll/tech_pll_clk200_p6.vhd
+++ b/libraries/technology/pll/tech_pll_clk200_p6.vhd
@@ -81,5 +81,4 @@ begin
                  g_clk1_phase_shift, g_clk2_phase_shift, g_clk3_phase_shift, g_clk4_phase_shift, g_clk5_phase_shift, g_clk6_phase_shift)
     port map (areset, inclk0, c0, c1, c2, c3, c4, c5, c6, locked);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/pll/tech_pll_clk25.vhd b/libraries/technology/pll/tech_pll_clk25.vhd
index 1bc410bbd632144ff2e6b63f950ad358f51ae234..a7c6687aeb774ad7f04dcbea0353402343e8893d 100644
--- a/libraries/technology/pll/tech_pll_clk25.vhd
+++ b/libraries/technology/pll/tech_pll_clk25.vhd
@@ -115,5 +115,4 @@ begin
       locked => locked
     );
   end generate;
-
 end architecture;
diff --git a/libraries/technology/pll/tech_pll_component_pkg.vhd b/libraries/technology/pll/tech_pll_component_pkg.vhd
index 7cbbb3c3b45eb944e29202d73253f969ea5780e8..a34264fedcff309a20828d35988169021bd2dc71 100644
--- a/libraries/technology/pll/tech_pll_component_pkg.vhd
+++ b/libraries/technology/pll/tech_pll_component_pkg.vhd
@@ -333,5 +333,4 @@ package tech_pll_component_pkg is
     locked    : out std_logic
   );
   end component;
-
 end tech_pll_component_pkg;
diff --git a/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd b/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
index 3508161b1cc4da72859a16f8095700bcbaf7ac8c..c87200816be24f784f9ada775fdc67af8d4aaa5c 100644
--- a/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_component_pkg.vhd
@@ -208,5 +208,4 @@ package tech_transceiver_component_pkg is
   ------------------------------------------------------------------------------
   -- ip_arria10
   ------------------------------------------------------------------------------
-
 end tech_transceiver_component_pkg;
diff --git a/libraries/technology/transceiver/tech_transceiver_gx.vhd b/libraries/technology/transceiver/tech_transceiver_gx.vhd
index 88b4ca2fd7e6ce603dbfff5dcfcdde27dcf56e15..931175892341c99b478c15bf7a8eb21d740ee621 100644
--- a/libraries/technology/transceiver/tech_transceiver_gx.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_gx.vhd
@@ -72,5 +72,4 @@ begin
     generic map (g_data_w, g_nof_gx, g_mbps, g_sim, g_tx, g_rx)
     port map (cal_rec_clk, tr_clk, rx_clk, rx_rst, rx_sosi_arr, rx_siso_arr, tx_clk, tx_rst, tx_sosi_arr, tx_siso_arr, rx_datain, tx_dataout, tx_state, tx_align_en, rx_state, rx_align_en);
   end generate;
-
 end str;
diff --git a/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd b/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
index ae67ed78162430985aad62984abd8add565d01c3..0e65b8684986b1f6e485d1e0923af982be1809fa 100644
--- a/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_rx_rst.vhd
@@ -147,5 +147,4 @@ begin
         dout => trc_rx_freq_locked(i)
       );
   end generate;
-
 end rtl;
diff --git a/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd b/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
index 73c37e36cbd9b4566f16f823797d6ba98ec6d94f..943635833c464465c0bdedf978d78b2f3548228f 100644
--- a/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_tx_rst.vhd
@@ -131,5 +131,4 @@ begin
       dout => trc_tx_pll_locked(i)
     );
   end generate;
-
 end rtl;
diff --git a/libraries/technology/tse/tb_tech_tse_pkg.vhd b/libraries/technology/tse/tb_tech_tse_pkg.vhd
index 910d8e34cdaefd79db80454b70cc3d0bdb0a9152..8b6cefa92a844c35f5b2e99ba8436857379c7b29 100644
--- a/libraries/technology/tse/tb_tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tb_tech_tse_pkg.vhd
@@ -483,5 +483,4 @@ package body tb_tech_tse_pkg is
     end if;
     -- No verify on CRC32 word
   end proc_tech_tse_rx_packet;
-
 end tb_tech_tse_pkg;
diff --git a/libraries/technology/tse/tech_tse.vhd b/libraries/technology/tse/tech_tse.vhd
index a845de8a8e2b4e96ca18915d0c0edb3a356f9ab5..62ca2e3c6d2abf0f461656aa4a9eaa47728bc96f 100644
--- a/libraries/technology/tse/tech_tse.vhd
+++ b/libraries/technology/tse/tech_tse.vhd
@@ -198,5 +198,4 @@ begin
               eth_txp, eth_rxp,
               tse_led);
   end generate;
-
 end architecture;
diff --git a/libraries/technology/tse/tech_tse_arria10.vhd b/libraries/technology/tse/tech_tse_arria10.vhd
index 31c266d5de41fc07629026a2aa86693a882da822..f9f2e050fad180fbd34923ca359cf594477074d8 100644
--- a/libraries/technology/tse/tech_tse_arria10.vhd
+++ b/libraries/technology/tse/tech_tse_arria10.vhd
@@ -245,5 +245,4 @@ begin
       rx_is_lockedtodata => open  -- : out std_logic_vector(0 downto 0)                      --            rx_is_lockedtodata.rx_is_lockedtodata
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e1sg.vhd b/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
index 0444f9b47bb8e4406f17922234a414412196596e..dd959d7599c193cdfc6286b9925f00ae62f9a462 100644
--- a/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e1sg.vhd
@@ -245,5 +245,4 @@ begin
       rx_is_lockedtodata => open  -- : out std_logic_vector(0 downto 0)                      --            rx_is_lockedtodata.rx_is_lockedtodata
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e2sg.vhd b/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
index 11487915543524911bb789908bf4699f40e51c28..6987798c360a223ce4b52092d4c552d378177e01 100644
--- a/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e2sg.vhd
@@ -245,5 +245,4 @@ begin
       rx_is_lockedtodata => open  -- : out std_logic_vector(0 downto 0)                      --            rx_is_lockedtodata.rx_is_lockedtodata
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd b/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
index acc32ee58982acdbaf447f034ed0df9df424a2db..5c8a586e8dfa9cd12b705e352a0632f0350e8a37 100644
--- a/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
+++ b/libraries/technology/tse/tech_tse_arria10_e3sge3.vhd
@@ -245,5 +245,4 @@ begin
       rx_is_lockedtodata => open  -- : out std_logic_vector(0 downto 0)                      --            rx_is_lockedtodata.rx_is_lockedtodata
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/tse/tech_tse_component_pkg.vhd b/libraries/technology/tse/tech_tse_component_pkg.vhd
index 7a2360d23e35a114a205e039b98c3ffd4bd99cf2..253f31679b1d45df03ed552595f2230533cd1d0e 100644
--- a/libraries/technology/tse/tech_tse_component_pkg.vhd
+++ b/libraries/technology/tse/tech_tse_component_pkg.vhd
@@ -606,5 +606,4 @@ package tech_tse_component_pkg is
     tx_serial_clk      : in  std_logic_vector(0 downto 0)  := (others => '0')  -- tx_serial_clk.clk
   );
   end component;
-
 end tech_tse_component_pkg;
diff --git a/libraries/technology/tse/tech_tse_pkg.vhd b/libraries/technology/tse/tech_tse_pkg.vhd
index a38b153de7221a113fe9fdd8b135fee5ee0f58ec..a12f1e6a3abe51773c3fa8c1761fbf7a347e6ba9 100644
--- a/libraries/technology/tse/tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tech_tse_pkg.vhd
@@ -82,7 +82,6 @@ package tech_tse_pkg is
   end record;
 
   function func_tech_tse_map_pcs_addr(pcs_addr : natural) return natural;
-
 end tech_tse_pkg;
 
 package body tech_tse_pkg is
@@ -90,5 +89,4 @@ function func_tech_tse_map_pcs_addr(pcs_addr : natural) return natural is
 begin
   return pcs_addr * 2 + c_tech_tse_byte_addr_pcs_offset;
 end func_tech_tse_map_pcs_addr;
-
 end tech_tse_pkg;
diff --git a/libraries/technology/tse/tech_tse_stratixiv.vhd b/libraries/technology/tse/tech_tse_stratixiv.vhd
index f94abe46c85f4cfc8109779a8675f53181d7349e..74c60d529d6ba375d6c4c003a623447e683bc8de 100644
--- a/libraries/technology/tse/tech_tse_stratixiv.vhd
+++ b/libraries/technology/tse/tech_tse_stratixiv.vhd
@@ -256,5 +256,4 @@ begin
       reconfig_togxb   => reconfig_togxb
     );
   end generate;
-
 end str;
diff --git a/libraries/technology/xaui/tech_xaui.vhd b/libraries/technology/xaui/tech_xaui.vhd
index 037de428a0ce1152851490b1ff57373fb5d56c22..19f3db32c2f8b70471abef8be8ee0ec7848f480d 100644
--- a/libraries/technology/xaui/tech_xaui.vhd
+++ b/libraries/technology/xaui/tech_xaui.vhd
@@ -90,5 +90,4 @@ begin
               xgmii_tx_dc_arr, xgmii_rx_dc_arr,
               xaui_tx_arr, xaui_rx_arr);
   end generate;
-
 end str;
diff --git a/libraries/technology/xaui/tech_xaui_component_pkg.vhd b/libraries/technology/xaui/tech_xaui_component_pkg.vhd
index c41813e96435768af4f5d8b99956222224ad4ef4..97381f2a97e14a06e34f7e062f6de0ed0f505691 100644
--- a/libraries/technology/xaui/tech_xaui_component_pkg.vhd
+++ b/libraries/technology/xaui/tech_xaui_component_pkg.vhd
@@ -232,7 +232,6 @@ package tech_xaui_component_pkg is
     reconfig_togxb   : out std_logic_vector(g_togxb_bus_w - 1 downto 0)
   );
   end component;
-
 end tech_xaui_component_pkg;
 
 package body tech_xaui_component_pkg is
@@ -244,5 +243,4 @@ package body tech_xaui_component_pkg is
     end case;
 
   end;
-
 end tech_xaui_component_pkg;