From c8538ffc80ef549e12234dd05f13527af421b5a4 Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Wed, 22 Mar 2023 14:41:58 +0100 Subject: [PATCH] Support cnt clear via input in_clr. --- .../dp/src/vhdl/dp_strobe_total_count.vhd | 20 ++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd b/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd index 2332d5953b..eb2c76424f 100644 --- a/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd +++ b/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd @@ -68,7 +68,7 @@ -- * This dp_strobe_total_count could have been a common_strobe_total_count -- component, because it does not use sosi/siso signals. However it is fine -- to keep it in dp_lib, to avoid extra work of moving and renaming. --- * Use clear to clear the total counters +-- * Use MM clear to clear the total counters, or use in_clr input signal. -- * The MM counter values are held at sync. Use flush to force the current -- last counter values into the MM counter values. This is useful if the -- ref_sync stopped already. @@ -93,6 +93,7 @@ ENTITY dp_strobe_total_count IS ref_sync : IN STD_LOGIC := '1'; in_strobe_arr : IN STD_LOGIC_VECTOR(g_nof_counts-1 DOWNTO 0); + in_clr : IN STD_LOGIC := '0'; mm_rst : IN STD_LOGIC; mm_clk : IN STD_LOGIC; @@ -126,8 +127,9 @@ ARCHITECTURE rtl OF dp_strobe_total_count IS SIGNAL rd_reg : STD_LOGIC_VECTOR(c_mm_reg.nof_dat*c_mm_reg.dat_w-1 DOWNTO 0) := (OTHERS=>'0'); SIGNAL mm_cnt_clear : STD_LOGIC; SIGNAL mm_cnt_flush : STD_LOGIC; - SIGNAL cnt_flush : STD_LOGIC; - SIGNAL cnt_clr : STD_LOGIC; + SIGNAL dp_cnt_clear : STD_LOGIC; + SIGNAL dp_cnt_flush : STD_LOGIC; + SIGNAL cnt_clr : STD_LOGIC := '0'; SIGNAL cnt_en : STD_LOGIC := '0'; SIGNAL cnt_en_arr : STD_LOGIC_VECTOR(g_nof_counts-1 DOWNTO 0); SIGNAL cnt_arr : t_cnt_arr(g_nof_counts-1 DOWNTO 0); @@ -149,9 +151,13 @@ BEGIN in_pulse => mm_cnt_clear, out_rst => dp_rst, out_clk => dp_clk, - out_pulse => cnt_clr + out_pulse => dp_cnt_clear ); + -- Support cnt clear via either MM or via an input strobe, use register + -- to ease timing closure + cnt_clr <= dp_cnt_clear OR in_clr WHEN rising_edge(dp_clk); + u_common_spulse_flush : ENTITY common_lib.common_spulse PORT MAP ( in_rst => mm_rst, @@ -159,7 +165,7 @@ BEGIN in_pulse => mm_cnt_flush, out_rst => dp_rst, out_clk => dp_clk, - out_pulse => cnt_flush + out_pulse => dp_cnt_flush ); -- Register inputs to ease timing closure @@ -211,14 +217,14 @@ BEGIN END GENERATE; -- Hold counter values at ref_sync_reg2 to have stable values for MM read - -- for comparision between nodes. Use mm_cnt_flush/cnt_flush to support + -- for comparision between nodes. Use mm_cnt_flush/dp_cnt_flush to support -- observing the current counter values via MM. p_hold_counters : PROCESS(dp_clk) BEGIN IF rising_edge(dp_clk) THEN IF cnt_clr = '1' THEN hold_cnt_arr <= (OTHERS=>(OTHERS=>'0')); - ELSIF ref_sync_reg2 = '1' OR cnt_flush = '1' THEN + ELSIF ref_sync_reg2 = '1' OR dp_cnt_flush = '1' THEN hold_cnt_arr <= cnt_arr; END IF; END IF; -- GitLab