From c79a0bef47a7cc9b30ebdd68798943172b253485 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Wed, 19 Aug 2020 15:19:05 +0200
Subject: [PATCH] Updated compile_ip scripts and hdllib.cg files according to
the files that are generated byt qsys-generate
---
.../altera_emif_180/compile_ip.tcl | 64 ++++++++++---------
.../altera_emif_180/hdllib.cfg | 2 +-
.../altera_emif_arch_nf_180/compile_ip.tcl | 12 ++--
.../compile_ip.tcl | 8 +--
.../altera_emif_cal_slave_nf_180/hdllib.cfg | 2 +-
.../altera_ip_col_if_180/compile_ip.tcl | 2 +-
.../altera_ip_col_if_180/hdllib.cfg | 2 +-
.../altmult_complex_180/compile_ip.tcl | 36 +++++++++++
.../altmult_complex_180/hdllib.cfg | 20 ++++++
.../complex_mult/compile_ip.tcl | 4 +-
.../ip_arria10_e1sg/complex_mult/hdllib.cfg | 2 +-
.../ddr4_4g_1600/copy_hex_files.tcl | 6 +-
.../ddr4_4g_2000/copy_hex_files.tcl | 8 +--
.../ddr4_8g_1600/copy_hex_files.tcl | 8 +--
.../ddr4_8g_2400/copy_hex_files.tcl | 8 +--
15 files changed, 120 insertions(+), 64 deletions(-)
create mode 100644 libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/compile_ip.tcl
create mode 100644 libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/hdllib.cfg
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
index b28e1dcf65..9240118178 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/compile_ip.tcl
@@ -28,18 +28,10 @@
#vlib ./work/ ;# Assume library work already exist
#
-vmap altera_emif_180 ./work/
+vmap altera_avalon_mm_bridge_180 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
- vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_180_dzobyri.v" -work altera_emif_180
-
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000sim"
- vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_180_lwknerq.v" -work altera_emif_180
-
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
- vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_180_ebfu2ha.v" -work altera_emif_180
+ vlog "$IP_DIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_180
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
- vlog "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.v" -work altera_emif_180
vmap altera_emif_arch_nf_180 ./work/
# ddr4_4g_1600
@@ -47,28 +39,28 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.vhd" -work altera_emif_arch_nf_180
# ddr4_4g_2000
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.vhd" -work altera_emif_arch_nf_180
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_top.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_io_aux.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama.vhd" -work altera_emif_arch_nf_180
# ddr4_8g_2400
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd" -work altera_emif_arch_nf_180
# common dependencies
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_180
@@ -109,19 +101,6 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_180
-vmap altera_emif_cal_slave_nf_180 ./work/
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
-
vmap altera_reset_controller_180 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
vlog "$IP_DIR/../altera_reset_controller_180/sim/mentor/altera_reset_controller.v" -work altera_reset_controller_180
@@ -155,7 +134,30 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
vcom "$IP_DIR/../altera_avalon_onchip_memory2_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_avalon_onchip_memory2_180_xymx6za.vhd" -work altera_avalon_onchip_memory2_180
+vmap altera_emif_cal_slave_nf_180 ./work/
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
-vmap altera_avalon_mm_bridge_180 ./work/
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
+
+
+
+vmap altera_emif_180 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
- vlog "$IP_DIR/../altera_avalon_mm_bridge_180/sim/altera_avalon_mm_bridge.v" -work altera_avalon_mm_bridge_180
+ vcom "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_180_dzobyri.vhd" -work altera_emif_180
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
+ vcom "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_180_lwknerq.vhd" -work altera_emif_180
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
+ vcom "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_180_gt57qoa.vhd" -work altera_emif_180
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
+ vcom "$IP_DIR/../altera_emif_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_180_nz3mdxa.vhd" -work altera_emif_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
index b934e75cc0..1be2e657dc 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_180/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_altera_emif_180
hdl_library_clause_name = altera_emif_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_merlin_slave_translator_180
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_merlin_master_translator_180 ip_arria10_e1sg_altera_merlin_slave_translator_180 ip_arria10_e1sg_altera_emif_arch_nf_180 ip_arria10_e1sg_altera_emif_cal_slave_nf_180 ip_arria10_e1sg_altera_ip_col_if_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
index 64ca0f6eea..fa00f3d2fb 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_arch_nf_180/compile_ip.tcl
@@ -34,28 +34,28 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y.vhd" -work altera_emif_arch_nf_180
# ddr4_4g_2000
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy.vhd" -work altera_emif_arch_nf_180
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_top.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_spx5pgi.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_top.sv" -work altera_emif_arch_nf_180
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_io_aux.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama.vhd" -work altera_emif_arch_nf_180
# ddr4_8g_2400
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_top.sv" -work altera_emif_arch_nf_180
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_io_aux.sv" -work altera_emif_arch_nf_180
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.sv" -work altera_emif_arch_nf_180
+ vcom "$IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i.vhd" -work altera_emif_arch_nf_180
# common dependencies
vlog -sv "$IP_DIR/../altera_emif_arch_nf_180/sim/altera_emif_arch_nf_bufs.sv" -work altera_emif_arch_nf_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
index 096a6b3130..9e8e93ee02 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/compile_ip.tcl
@@ -31,15 +31,15 @@
vmap altera_emif_cal_slave_nf_180 ./work/
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_1600/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_4g_2000/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_1600/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_ddr4_8g_2400/sim"
- vlog "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.v" -work altera_emif_cal_slave_nf_180
+ vcom "$IP_DIR/../altera_emif_cal_slave_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_cal_slave_nf_180_efslyyq.vhd" -work altera_emif_cal_slave_nf_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
index b7252eec61..56092a8285 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_emif_cal_slave_nf_180/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_altera_emif_cal_slave_nf_180
hdl_library_clause_name = altera_emif_cal_slave_nf_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim =
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_avalon_mm_bridge_180 ip_arria10_e1sg_altera_avalon_onchip_memory2_180 ip_arria10_e1sg_altera_mm_interconnect_180 ip_arria10_e1sg_altera_reset_controller_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
index 1edfa6f5a6..369e946de1 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/compile_ip.tcl
@@ -34,4 +34,4 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vmap altera_ip_col_if_180 ./work/
- vlog "$IP_DIR/../altera_ip_col_if_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_ip_col_if_180_jvd2zcq.v" -work altera_ip_col_if_180
+ vcom "$IP_DIR/../altera_ip_col_if_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_ip_col_if_180_cne6k7q.vhd" -work altera_ip_col_if_180
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
index 3ba5bffd7c..b1a0d1270b 100644
--- a/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altera_ip_col_if_180/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_altera_ip_col_if_180
hdl_library_clause_name = altera_ip_col_if_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim =
+hdl_lib_uses_sim = ip_arria10_e1sg_altera_avalon_mm_bridge_180 ip_arria10_e1sg_alt_mem_if_jtag_master_180 ip_arria10_e1sg_altera_mm_interconnect_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/compile_ip.tcl
new file mode 100644
index 0000000000..3b75820430
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/compile_ip.tcl
@@ -0,0 +1,36 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2017
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file mentor/msim_setup.tcl.
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
+
+#vlib ./work/ ;# Assume library work already exist
+
+
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_complex_mult/sim"
+
+vmap altmult_complex_180 ./work/
+
+ vcom "$IP_DIR/../altmult_complex_180/sim/ip_arria10_e1sg_complex_mult_altmult_complex_180_nkpx3mi.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/hdllib.cfg
new file mode 100644
index 0000000000..215374a056
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/hdllib.cfg
@@ -0,0 +1,20 @@
+hdl_lib_name = ip_arria10_e1sg_altmult_complex_180
+hdl_library_clause_name = altmult_complex_180
+hdl_lib_uses_synth =
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+
+test_bench_files =
+ # The generated testbench is listed here to create a simulation configuration for it. However
+ # the tb is commented because it is not useful, see generate_ip.sh.
+ #$RADIOHDL_BUILD_DIR/sim/ip_arria10_e1sg_mac_10g_tb.vhd
+
+
+[modelsim_project_file]
+modelsim_compile_ip_files =
+ $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg/altera_libraries/altmult_complex_180/compile_ip.tcl
+
+
+
diff --git a/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl b/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
index bf653f2f16..abb9b5970a 100644
--- a/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e1sg/complex_mult/compile_ip.tcl
@@ -30,6 +30,4 @@
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1sg_complex_mult/sim"
-vmap altmult_complex_180 ./work/
- vlog "$IP_DIR/../altmult_complex_180/synth/ip_arria10_e1sg_complex_mult_altmult_complex_180_nkpx3mi.v" -work altmult_complex_180
- #vlog "$IP_DIR/ip_arria10_e1sg_complex_mult_bb.v"
+ vcom "$IP_DIR/ip_arria10_e1sg_complex_mult.vhd"
diff --git a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
index 2cb2598b2f..79378af3c9 100644
--- a/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/complex_mult/hdllib.cfg
@@ -1,7 +1,7 @@
hdl_lib_name = ip_arria10_e1sg_complex_mult
hdl_library_clause_name = ip_arria10_e1sg_complex_mult_altmult_complex_180
hdl_lib_uses_synth =
-hdl_lib_uses_sim =
+hdl_lib_uses_sim = ip_arria10_e1sg_altmult_complex_180
hdl_lib_technology = ip_arria10_e1sg
synth_files =
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
index 807580094d..47c09e91fb 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_1600/copy_hex_files.tcl
@@ -27,7 +27,7 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
file copy -force $IP_DIR/../altera_avalon_onchip_memory2_180/sim/seq_cal_soft_m20k.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_cal.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_6dhhhti_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_seq_cal.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_1600_altera_emif_arch_nf_180_ud6bb7y_seq_params_synth.hex ./
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
index d5f9fe639b..c41260fe48 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_4g_2000/copy_hex_files.tcl
@@ -26,8 +26,8 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_151_mhuabmq_seq_cal_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_151_mhuabmq_seq_cal_synth.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_151_mhuabmq_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_151_mhuabmq_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_seq_cal_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_4g_2000_altera_emif_arch_nf_180_n4j75iy_seq_params_synth.hex ./
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
index 14517ed715..bfcceced1f 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_1600/copy_hex_files.tcl
@@ -26,8 +26,8 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_151_4thorvi_seq_cal_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_151_4thorvi_seq_cal_synth.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_151_4thorvi_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_151_4thorvi_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_seq_cal_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_1600_altera_emif_arch_nf_180_7cl5ama_seq_params_synth.hex ./
}
diff --git a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
index 104e49f90d..48548cc80d 100644
--- a/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e1sg/ddr4_8g_2400/copy_hex_files.tcl
@@ -26,8 +26,8 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e1s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_151_izxxuoi_seq_cal_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_151_izxxuoi_seq_cal_synth.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_151_izxxuoi_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_151/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_151_izxxuoi_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_cal_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_180/sim/ip_arria10_e1sg_ddr4_8g_2400_altera_emif_arch_nf_180_e37lt4i_seq_params_synth.hex ./
}
--
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