From c5ea20c2ce811bf98b4269f49acd5422c8647185 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Thu, 28 Apr 2016 13:17:03 +0000
Subject: [PATCH] Use hdl_lib_include_ip to include DDR3 IP. Removed
hdl_lib_excludes.
---
.../designs/unb1_test/revisions/unb1_test_all/hdllib.cfg | 4 +---
.../designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg | 4 +---
.../unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg | 5 +----
.../unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg | 5 +----
.../revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg | 5 +----
.../unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg | 5 +----
.../unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg | 6 +-----
.../unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg | 5 +----
8 files changed, 8 insertions(+), 31 deletions(-)
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
index 309f8c6efc..18894362a5 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/hdllib.cfg
@@ -3,9 +3,7 @@ hdl_library_clause_name = unb1_test_all_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_4g_800_master
synth_files =
unb1_test_all.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
index 6603d3c125..f37c913aa1 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr/hdllib.cfg
@@ -3,9 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_4g_800_master
synth_files =
unb1_test_ddr.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
index 1cc1ad308b..1454028e66 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I/hdllib.cfg
@@ -3,10 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_16g_MB_I_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
synth_files =
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
index 3e8133c285..0976da6a26 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_II/hdllib.cfg
@@ -3,10 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_16g_MB_II_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
synth_files =
unb1_test_ddr_16g_MB_II.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
index 6cd6991ddd..02b71ffe27 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_16g_MB_I_II/hdllib.cfg
@@ -3,10 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_16g_MB_I_II_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
- ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
synth_files =
unb1_test_ddr_16g_MB_I_II.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
index 01a53de499..d6d700acef 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I/hdllib.cfg
@@ -3,10 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_MB_I_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
- ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
synth_files =
unb1_test_ddr_MB_I.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
index 999ef9629c..b1569dd161 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_II/hdllib.cfg
@@ -3,11 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_MB_II_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
- ip_stratixiv_ddr3_uphy_4g_800_slave
- ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
-
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
synth_files =
unb1_test_ddr_MB_II.vhd
diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
index 2ff1c3c08f..69d6bb04c8 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_ddr_MB_I_II/hdllib.cfg
@@ -3,10 +3,7 @@ hdl_library_clause_name = unb1_test_ddr_MB_I_II_lib
hdl_lib_uses_synth = unb1_board unb1_test
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
-hdl_lib_excludes = ip_stratixiv_ddr3_uphy_16g_dual_rank_800
- ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
- ip_stratixiv_ddr3_uphy_4g_800_master
- ip_stratixiv_ddr3_uphy_4g_800_slave
+hdl_lib_include_ip = ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
synth_files =
unb1_test_ddr_MB_I_II.vhd
--
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