diff --git a/libraries/technology/ddr/tech_ddr.vhd b/libraries/technology/ddr/tech_ddr.vhd
index 0cd773fef3a5e6cab6691dc9570568ac716a31ae..c13dcec25f15cc460b25ce665429fe7acc79dc83 100644
--- a/libraries/technology/ddr/tech_ddr.vhd
+++ b/libraries/technology/ddr/tech_ddr.vhd
@@ -20,6 +20,15 @@
 --
 --------------------------------------------------------------------------------
 
+-- Purpose: Technology independent component for DDR memory access.
+-- Description:
+--   The component also supports different types of DDR, so DDR3 and DDR4.
+-- Remarks:
+-- . The ctlr_init_done goes high after power up. It could have been AND-ed
+--   with ctlr_miso.waitrequest_n to avoid having it as a port. However the
+--   timing closure for ctlr_miso.waitrequest_n can be critical, so therefore
+--   it is better not to combinatorially load it with the AND ctlr_init_done. 
+
 LIBRARY IEEE, common_lib, technology_lib, tech_ddr_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
 USE common_lib.common_mem_pkg.ALL;