From c45fdfa4ee6d7e733df9a9a6c671127c1c9526c1 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Tue, 7 Dec 2021 16:04:44 +0100
Subject: [PATCH] fixed several issues in ring design
---
.../qsys_lofar2_unb2b_ring_cpu_0.ip | 4 +-
..._ring_reg_dp_block_validate_bsn_at_sync.ip | 18 ++---
.../quartus/qsys_lofar2_unb2b_ring.qsys | 80 +++++++++----------
libraries/base/ring/src/vhdl/ring_rx.vhd | 34 +++++---
libraries/base/ring/src/vhdl/ring_tx.vhd | 35 +++++---
5 files changed, 95 insertions(+), 76 deletions(-)
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_cpu_0.ip b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_cpu_0.ip
index 3d25e3f64b..8402aef52e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_cpu_0.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_cpu_0.ip
@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x700' end='0x740' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_diag_bg.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='pio_pps.mem' start='0x30D0' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3100' end='0x3108' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
+ <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x700' end='0x740' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_fpga_voltage_sens.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_bg.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_epcs.mem' start='0x30C0' end='0x30E0' datawidth='32' /><slave name='reg_remu.mem' start='0x30E0' end='0x3100' datawidth='32' /><slave name='reg_ring_info.mem' start='0x3100' end='0x3110' datawidth='32' /><slave name='pio_pps.mem' start='0x3110' end='0x3120' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3120' end='0x3128' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3128' end='0x3130' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3130' end='0x3138' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3138' end='0x3140' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3140' end='0x3148' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
@@ -3489,7 +3489,7 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x700' end='0x740' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_diag_bg.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='pio_pps.mem' start='0x30D0' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3100' end='0x3108' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x700' end='0x740' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_fpga_voltage_sens.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_bg.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_epcs.mem' start='0x30C0' end='0x30E0' datawidth='32' /><slave name='reg_remu.mem' start='0x30E0' end='0x3100' datawidth='32' /><slave name='reg_ring_info.mem' start='0x3100' end='0x3110' datawidth='32' /><slave name='pio_pps.mem' start='0x3110' end='0x3120' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3120' end='0x3128' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3128' end='0x3130' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3130' end='0x3138' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3138' end='0x3140' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3140' end='0x3148' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_dp_block_validate_bsn_at_sync.ip b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_dp_block_validate_bsn_at_sync.ip
index 0e0f769722..62032c3b4e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_dp_block_validate_bsn_at_sync.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/ip/qsys_lofar2_unb2b_ring/qsys_lofar2_unb2b_ring_reg_dp_block_validate_bsn_at_sync.ip
@@ -129,7 +129,7 @@
<spirit:parameter>
<spirit:name>addressSpan</spirit:name>
<spirit:displayName>Address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressSpan">64</spirit:value>
+ <spirit:value spirit:format="string" spirit:id="addressSpan">128</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>addressUnits</spirit:name>
@@ -607,7 +607,7 @@
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>3</spirit:right>
+ <spirit:right>4</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -703,7 +703,7 @@
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
- <spirit:right>3</spirit:right>
+ <spirit:right>4</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
@@ -783,7 +783,7 @@
<spirit:parameter>
<spirit:name>g_adr_w</spirit:name>
<spirit:displayName>g_adr_w</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="g_adr_w">4</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="g_adr_w">5</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>g_dat_w</spirit:name>
@@ -846,7 +846,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>4</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -910,7 +910,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>4</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -979,7 +979,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>64</value>
+ <value>128</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -1374,11 +1374,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x40' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x80' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>6</value>
+ <value>7</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
diff --git a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/qsys_lofar2_unb2b_ring.qsys b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/qsys_lofar2_unb2b_ring.qsys
index 80c202e281..58ffe1d78a 100644
--- a/applications/lofar2/designs/lofar2_unb2b_ring/quartus/qsys_lofar2_unb2b_ring.qsys
+++ b/applications/lofar2/designs/lofar2_unb2b_ring/quartus/qsys_lofar2_unb2b_ring.qsys
@@ -30,7 +30,7 @@
{
datum baseAddress
{
- value = "128";
+ value = "1792";
type = "String";
}
}
@@ -83,7 +83,7 @@
{
datum baseAddress
{
- value = "12544";
+ value = "12608";
type = "String";
}
}
@@ -133,7 +133,7 @@
{
datum baseAddress
{
- value = "12496";
+ value = "12560";
type = "String";
}
}
@@ -250,7 +250,7 @@
{
datum baseAddress
{
- value = "12352";
+ value = "12416";
type = "String";
}
}
@@ -266,7 +266,7 @@
{
datum baseAddress
{
- value = "1792";
+ value = "128";
type = "String";
}
}
@@ -298,7 +298,7 @@
{
datum baseAddress
{
- value = "1920";
+ value = "1984";
type = "String";
}
}
@@ -314,7 +314,7 @@
{
datum baseAddress
{
- value = "1856";
+ value = "1920";
type = "String";
}
}
@@ -335,7 +335,7 @@
{
datum baseAddress
{
- value = "12536";
+ value = "12600";
type = "String";
}
}
@@ -356,7 +356,7 @@
{
datum baseAddress
{
- value = "12528";
+ value = "12592";
type = "String";
}
}
@@ -377,7 +377,7 @@
{
datum baseAddress
{
- value = "12416";
+ value = "12480";
type = "String";
}
}
@@ -393,7 +393,7 @@
{
datum baseAddress
{
- value = "12384";
+ value = "12448";
type = "String";
}
}
@@ -414,7 +414,7 @@
{
datum baseAddress
{
- value = "1984";
+ value = "12352";
type = "String";
}
}
@@ -435,7 +435,7 @@
{
datum baseAddress
{
- value = "12520";
+ value = "12584";
type = "String";
}
}
@@ -456,7 +456,7 @@
{
datum baseAddress
{
- value = "12512";
+ value = "12576";
type = "String";
}
}
@@ -477,7 +477,7 @@
{
datum baseAddress
{
- value = "12448";
+ value = "12512";
type = "String";
}
}
@@ -493,7 +493,7 @@
{
datum baseAddress
{
- value = "12480";
+ value = "12544";
type = "String";
}
}
@@ -509,7 +509,7 @@
{
datum baseAddress
{
- value = "192";
+ value = "1856";
type = "String";
}
}
@@ -4684,7 +4684,7 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x700' end='0x740' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_diag_bg.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='pio_pps.mem' start='0x30D0' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3100' end='0x3108' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='ram_diag_bg.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_dp_block_validate_err.mem' start='0x400' end='0x600' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x600' end='0x700' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x700' end='0x740' datawidth='32' /><slave name='reg_ring_lane_info.mem' start='0x740' end='0x780' datawidth='32' /><slave name='reg_dp_xonoff_local.mem' start='0x780' end='0x7C0' datawidth='32' /><slave name='reg_dp_xonoff_lane.mem' start='0x7C0' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_fpga_voltage_sens.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_bg.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_epcs.mem' start='0x30C0' end='0x30E0' datawidth='32' /><slave name='reg_remu.mem' start='0x30E0' end='0x3100' datawidth='32' /><slave name='reg_ring_info.mem' start='0x3100' end='0x3110' datawidth='32' /><slave name='pio_pps.mem' start='0x3110' end='0x3120' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3120' end='0x3128' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3128' end='0x3130' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3130' end='0x3138' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3138' end='0x3140' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3140' end='0x3148' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx.mem' start='0x4000' end='0x5000' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx.mem' start='0x5000' end='0x6000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
@@ -11035,7 +11035,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>4</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -11099,7 +11099,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>4</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -11168,7 +11168,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>64</value>
+ <value>128</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -11574,11 +11574,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x40' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x80' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>6</value>
+ <value>7</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -24067,7 +24067,7 @@
version="18.0"
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
- <parameter name="baseAddress" value="0x3100" />
+ <parameter name="baseAddress" value="0x3140" />
</connection>
<connection
kind="avalon"
@@ -24102,7 +24102,7 @@
version="18.0"
start="cpu_0.data_master"
end="pio_pps.mem">
- <parameter name="baseAddress" value="0x30d0" />
+ <parameter name="baseAddress" value="0x3110" />
</connection>
<connection
kind="avalon"
@@ -24116,49 +24116,49 @@
version="18.0"
start="cpu_0.data_master"
end="reg_remu.mem">
- <parameter name="baseAddress" value="0x30a0" />
+ <parameter name="baseAddress" value="0x30e0" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_epcs.mem">
- <parameter name="baseAddress" value="0x3080" />
+ <parameter name="baseAddress" value="0x30c0" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem">
- <parameter name="baseAddress" value="0x30f8" />
+ <parameter name="baseAddress" value="0x3138" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_dpmm_data.mem">
- <parameter name="baseAddress" value="0x30f0" />
+ <parameter name="baseAddress" value="0x3130" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem">
- <parameter name="baseAddress" value="0x30e8" />
+ <parameter name="baseAddress" value="0x3128" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_mmdp_data.mem">
- <parameter name="baseAddress" value="0x30e0" />
+ <parameter name="baseAddress" value="0x3120" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_fpga_temp_sens.mem">
- <parameter name="baseAddress" value="0x3060" />
+ <parameter name="baseAddress" value="0x30a0" />
</connection>
<connection
kind="avalon"
@@ -24172,7 +24172,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_fpga_voltage_sens.mem">
- <parameter name="baseAddress" value="0x07c0" />
+ <parameter name="baseAddress" value="0x3040" />
</connection>
<connection
kind="avalon"
@@ -24200,14 +24200,14 @@
version="18.0"
start="cpu_0.data_master"
end="reg_dp_xonoff_lane.mem">
- <parameter name="baseAddress" value="0x0780" />
+ <parameter name="baseAddress" value="0x07c0" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_dp_xonoff_local.mem">
- <parameter name="baseAddress" value="0x0740" />
+ <parameter name="baseAddress" value="0x0780" />
</connection>
<connection
kind="avalon"
@@ -24221,14 +24221,14 @@
version="18.0"
start="cpu_0.data_master"
end="reg_dp_block_validate_bsn_at_sync.mem">
- <parameter name="baseAddress" value="0x0700" />
+ <parameter name="baseAddress" value="0x0080" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_ring_info.mem">
- <parameter name="baseAddress" value="0x30c0" />
+ <parameter name="baseAddress" value="0x3100" />
</connection>
<connection
kind="avalon"
@@ -24249,14 +24249,14 @@
version="18.0"
start="cpu_0.data_master"
end="reg_ring_lane_info.mem">
- <parameter name="baseAddress" value="0x00c0" />
+ <parameter name="baseAddress" value="0x0740" />
</connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="reg_diag_bg.mem">
- <parameter name="baseAddress" value="0x3040" />
+ <parameter name="baseAddress" value="0x3080" />
</connection>
<connection
kind="avalon"
@@ -24277,7 +24277,7 @@
version="18.0"
start="cpu_0.data_master"
end="avs_eth_0.mms_reg">
- <parameter name="baseAddress" value="0x0080" />
+ <parameter name="baseAddress" value="0x0700" />
</connection>
<connection
kind="avalon"
diff --git a/libraries/base/ring/src/vhdl/ring_rx.vhd b/libraries/base/ring/src/vhdl/ring_rx.vhd
index c7096b82a6..cf000d439c 100644
--- a/libraries/base/ring/src/vhdl/ring_rx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_rx.vhd
@@ -81,14 +81,15 @@ ARCHITECTURE str OF ring_rx IS
CONSTANT c_hdr_field_size : NATURAL := sel_a_b(g_use_dp_layer, c_ring_dp_hdr_field_size, c_ring_eth_hdr_field_size);
CONSTANT c_packet_size : NATURAL := g_block_size + c_hdr_field_size;
- SIGNAL lane_rx_sosi : t_dp_sosi;
- SIGNAL packet_sosi : t_dp_sosi;
- SIGNAL validated_sosi : t_dp_sosi;
- SIGNAL offload_rx_sosi : t_dp_sosi;
- SIGNAL decoded_sosi : t_dp_sosi;
- SIGNAL monitor_sosi : t_dp_sosi;
- SIGNAL demux_sosi_arr : t_dp_sosi_arr(0 TO g_nof_rx_monitors-1); -- using 0 TO ... as that is the output of the demux
- SIGNAL monitor_sosi_arr : t_dp_sosi_arr(g_nof_rx_monitors-1 DOWNTO 0);
+ SIGNAL lane_rx_sosi : t_dp_sosi;
+ SIGNAL packet_sosi : t_dp_sosi;
+ SIGNAL validated_sosi : t_dp_sosi;
+ SIGNAL offload_rx_sosi : t_dp_sosi;
+ SIGNAL decoded_sosi : t_dp_sosi;
+ SIGNAL monitor_sosi : t_dp_sosi;
+ SIGNAL piped_monitor_sosi : t_dp_sosi;
+ SIGNAL demux_sosi_arr : t_dp_sosi_arr(0 TO g_nof_rx_monitors-1); -- using 0 TO ... as that is the output of the demux
+ SIGNAL monitor_sosi_arr : t_dp_sosi_arr(g_nof_rx_monitors-1 DOWNTO 0);
SIGNAL hdr_fields_out : STD_LOGIC_VECTOR(1023 DOWNTO 0);
SIGNAL hdr_fields_raw : STD_LOGIC_VECTOR(1023 DOWNTO 0);
@@ -187,10 +188,19 @@ BEGIN
);
-- Convert nof_hops to source RN
- p_hop_to_src_rn: PROCESS(decoded_sosi, this_rn, N_rn)
+ p_hop_to_src_rn: PROCESS(dp_rst, dp_clk)
BEGIN
- monitor_sosi <= decoded_sosi;
- monitor_sosi.channel <= func_nof_hops_to_source_rn(decoded_sosi.channel, this_rn, N_rn, g_lane_direction);
+ IF dp_rst = '1' THEN
+ monitor_sosi <= c_dp_sosi_rst;
+ piped_monitor_sosi <= c_dp_sosi_rst;
+ ELSIF rising_edge(dp_clk) THEN
+ -- Pipe monitor sosi to ease timing.
+ piped_monitor_sosi <= monitor_sosi;
+
+ -- Convert nof_hops to source RN
+ monitor_sosi <= decoded_sosi;
+ monitor_sosi.channel <= func_nof_hops_to_source_rn(decoded_sosi.channel, this_rn, N_rn, g_lane_direction);
+ END IF;
END PROCESS;
u_dp_demux : ENTITY dp_lib.dp_demux
@@ -200,7 +210,7 @@ BEGIN
PORT MAP (
rst => dp_rst,
clk => dp_clk,
- snk_in => monitor_sosi,
+ snk_in => piped_monitor_sosi,
src_out_arr => demux_sosi_arr
);
monitor_sosi_arr <= func_dp_stream_arr_reverse_range(demux_sosi_arr); -- Fix reversed bus.
diff --git a/libraries/base/ring/src/vhdl/ring_tx.vhd b/libraries/base/ring/src/vhdl/ring_tx.vhd
index 3c5b9df0b8..30adb166c2 100644
--- a/libraries/base/ring/src/vhdl/ring_tx.vhd
+++ b/libraries/base/ring/src/vhdl/ring_tx.vhd
@@ -79,14 +79,15 @@ ARCHITECTURE str OF ring_tx IS
CONSTANT c_hdr_field_arr : t_common_field_arr(c_nof_hdr_fields-1 DOWNTO 0) := sel_a_b(g_use_dp_layer, c_ring_dp_hdr_field_arr, c_ring_eth_hdr_field_arr);
CONSTANT c_fifo_size : NATURAL := 8; -- Large enough to fit ETH/DP header (choose power of 2).
- SIGNAL validated_sosi : t_dp_sosi;
- SIGNAL tx_sosi : t_dp_sosi;
- SIGNAL tx_fifo_sosi : t_dp_sosi;
- SIGNAL tx_fifo_siso : t_dp_siso;
- SIGNAL lane_tx_sosi : t_dp_sosi;
- SIGNAL monitor_sosi : t_dp_sosi;
- SIGNAL demux_sosi_arr : t_dp_sosi_arr(0 TO g_nof_tx_monitors-1); -- using 0 TO ... as that is the output of the demux
- SIGNAL monitor_sosi_arr : t_dp_sosi_arr(g_nof_tx_monitors-1 DOWNTO 0);
+ SIGNAL validated_sosi : t_dp_sosi;
+ SIGNAL tx_sosi : t_dp_sosi;
+ SIGNAL tx_fifo_sosi : t_dp_sosi;
+ SIGNAL tx_fifo_siso : t_dp_siso;
+ SIGNAL lane_tx_sosi : t_dp_sosi;
+ SIGNAL monitor_sosi : t_dp_sosi;
+ SIGNAL piped_monitor_sosi : t_dp_sosi;
+ SIGNAL demux_sosi_arr : t_dp_sosi_arr(0 TO g_nof_tx_monitors-1); -- using 0 TO ... as that is the output of the demux
+ SIGNAL monitor_sosi_arr : t_dp_sosi_arr(g_nof_tx_monitors-1 DOWNTO 0);
SIGNAL hdr_fields_in : STD_LOGIC_VECTOR(1023 DOWNTO 0);
SIGNAL hdr_fields_in_reg : STD_LOGIC_VECTOR(1023 DOWNTO 0);
@@ -192,11 +193,19 @@ BEGIN
-- BSN Monitors
gen_bsn_monitors : IF g_use_dp_layer GENERATE
- -- Convert nof_hops to source RN
- p_hop_to_src_rn: PROCESS(validated_sosi, this_rn, N_rn)
+ p_hop_to_src_rn: PROCESS(dp_rst, dp_clk)
BEGIN
- monitor_sosi <= validated_sosi;
- monitor_sosi.channel <= func_nof_hops_to_source_rn(validated_sosi.channel, this_rn, N_rn, g_lane_direction);
+ IF dp_rst = '1' THEN
+ monitor_sosi <= c_dp_sosi_rst;
+ piped_monitor_sosi <= c_dp_sosi_rst;
+ ELSIF rising_edge(dp_clk) THEN
+ -- Pipe monitor sosi to ease timing.
+ piped_monitor_sosi <= monitor_sosi;
+
+ -- Convert nof_hops to source RN
+ monitor_sosi <= validated_sosi;
+ monitor_sosi.channel <= func_nof_hops_to_source_rn(validated_sosi.channel, this_rn, N_rn, g_lane_direction);
+ END IF;
END PROCESS;
u_dp_demux : ENTITY dp_lib.dp_demux
@@ -206,7 +215,7 @@ BEGIN
PORT MAP (
rst => dp_rst,
clk => dp_clk,
- snk_in => monitor_sosi,
+ snk_in => piped_monitor_sosi,
src_out_arr => demux_sosi_arr
);
monitor_sosi_arr <= func_dp_stream_arr_reverse_range(demux_sosi_arr); -- Fix reversed bus.
--
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