From c3c48a1041fc9c6fe0cd58fda6d3656a71280b26 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Mon, 20 Apr 2015 13:04:43 +0000 Subject: [PATCH] Moves modelsim_search_libraries to hdltool_<toolset>.cfg. --- boards/uniboard1/designs/unb1_ddr3/hdllib.cfg | 14 -------------- .../designs/unb1_ddr3_transpose/hdllib.cfg | 11 ----------- .../unb1_test/revisions/unb1_test_10GbE/hdllib.cfg | 11 ----------- boards/uniboard2/designs/unb2_minimal/hdllib.cfg | 6 ------ boards/uniboard2/designs/unb2_test/hdllib.cfg | 6 ------ boards/uniboard2/libraries/unb2_board/hdllib.cfg | 5 ----- 6 files changed, 53 deletions(-) diff --git a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg index 8314de6a2b..6bc4859c10 100644 --- a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg +++ b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg @@ -5,9 +5,6 @@ hdl_lib_uses_sim = hdl_lib_technology = ip_stratixiv hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave -build_dir_sim = $HDL_BUILD_DIR -build_dir_synth = $HDL_BUILD_DIR - synth_files = $HDL_BUILD_DIR/quartus/unb1_ddr3/sopc_unb1_ddr3.vhd src/vhdl/node_unb1_ddr3.vhd @@ -38,14 +35,3 @@ quartus_qip_files = modelsim_compile_ip_files = $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl -modelsim_search_libraries = -# stratixiv only - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver - altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip -# arria10 only -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip -# both (will yield errors if the technology library is not available in simulator but these errors can be ignored) -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip twentynm twentynm_hssi twentynm_hip - diff --git a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg index 4439489929..dea60a4a96 100644 --- a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg +++ b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg @@ -36,14 +36,3 @@ modelsim_compile_ip_files = $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl -modelsim_search_libraries = -# stratixiv only - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver - altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip -# arria10 only -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip -# both (will yield errors if the technology library is not available in simulator but these errors can be ignored) -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip twentynm twentynm_hssi twentynm_hip - diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg index 800e58990b..5cd0b73e78 100644 --- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg +++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/hdllib.cfg @@ -52,14 +52,3 @@ modelsim_compile_ip_files = $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl -modelsim_search_libraries = -# stratixiv only - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver - altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip -# arria10 only -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip -# both (will yield errors if the technology library is not available in simulator but these errors can be ignored) -# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver -# altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip twentynm twentynm_hssi twentynm_hip - diff --git a/boards/uniboard2/designs/unb2_minimal/hdllib.cfg b/boards/uniboard2/designs/unb2_minimal/hdllib.cfg index cc6e60105c..4a6d9a637e 100644 --- a/boards/uniboard2/designs/unb2_minimal/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_minimal/hdllib.cfg @@ -29,9 +29,3 @@ quartus_vhdl_files = quartus_qip_files = $HDL_BUILD_DIR/quartus/unb2_minimal/qsys_unb2_minimal/synthesis/qsys_unb2_minimal.qip - -# vsim -L ... -L ... ... -modelsim_search_libraries = - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver - altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip - diff --git a/boards/uniboard2/designs/unb2_test/hdllib.cfg b/boards/uniboard2/designs/unb2_test/hdllib.cfg index 2a802bf67f..b77a8245ee 100644 --- a/boards/uniboard2/designs/unb2_test/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_test/hdllib.cfg @@ -43,9 +43,3 @@ quartus_vhdl_files = quartus_qip_files = $HDL_BUILD_DIR/quartus/unb2_test/qsys_unb2_test/synthesis/qsys_unb2_test.qip - -# vsim -L ... -L ... ... -modelsim_search_libraries = - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver - altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip - diff --git a/boards/uniboard2/libraries/unb2_board/hdllib.cfg b/boards/uniboard2/libraries/unb2_board/hdllib.cfg index 2d910fbbc2..2f3f38074a 100644 --- a/boards/uniboard2/libraries/unb2_board/hdllib.cfg +++ b/boards/uniboard2/libraries/unb2_board/hdllib.cfg @@ -36,8 +36,3 @@ test_bench_files = tb/vhdl/tb_unb2_board_node_ctrl.vhd tb/vhdl/tb_unb2_board_qsfp_leds.vhd -# vsim -L ... -L ... ... -modelsim_search_libraries = - altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver - altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip - -- GitLab