From c22426ccd8c04c81c18e6d8fca2c286e63529b3b Mon Sep 17 00:00:00 2001 From: Jonathan Hargreaves <hargreaves@astron.nl> Date: Mon, 3 Nov 2014 13:06:10 +0000 Subject: [PATCH] add new signals to port map for arria 10. paramaterize for 24/32 bit bus ios --- .../flash/tech_flash_asmi_parallel.vhd | 8 ++++++-- .../flash/tech_flash_component_pkg.vhd | 20 ++++++++++++++++++- .../flash/tech_flash_remote_update.vhd | 4 ++-- 3 files changed, 27 insertions(+), 5 deletions(-) diff --git a/libraries/technology/flash/tech_flash_asmi_parallel.vhd b/libraries/technology/flash/tech_flash_asmi_parallel.vhd index 2ad7f8121b..bdb381a790 100644 --- a/libraries/technology/flash/tech_flash_asmi_parallel.vhd +++ b/libraries/technology/flash/tech_flash_asmi_parallel.vhd @@ -35,7 +35,7 @@ ENTITY tech_flash_asmi_parallel IS g_technology : NATURAL := c_tech_select_default ); PORT ( - addr : IN STD_LOGIC_VECTOR (23 DOWNTO 0); + addr : IN STD_LOGIC_VECTOR (flash_addr_w(g_technology)-1 DOWNTO 0); clkin : IN STD_LOGIC ; datain : IN STD_LOGIC_VECTOR (7 DOWNTO 0); rden : IN STD_LOGIC ; @@ -48,7 +48,11 @@ ENTITY tech_flash_asmi_parallel IS data_valid : OUT STD_LOGIC ; dataout : OUT STD_LOGIC_VECTOR (7 DOWNTO 0); illegal_erase : OUT STD_LOGIC ; - illegal_write : OUT STD_LOGIC + illegal_write : OUT STD_LOGIC ; + reset : in std_logic := '0'; + sce : in std_logic_vector(2 downto 0) := (others => '0'); + en4b_addr : in std_logic := '0' + ); END tech_flash_asmi_parallel; diff --git a/libraries/technology/flash/tech_flash_component_pkg.vhd b/libraries/technology/flash/tech_flash_component_pkg.vhd index a8534244ee..2121937e41 100644 --- a/libraries/technology/flash/tech_flash_component_pkg.vhd +++ b/libraries/technology/flash/tech_flash_component_pkg.vhd @@ -21,8 +21,9 @@ -- Purpose: IP components declarations for various devices that get wrapped by the tech components -LIBRARY IEEE; +LIBRARY IEEE, technology_lib; USE IEEE.STD_LOGIC_1164.ALL; +USE technology_lib.technology_pkg.ALL; PACKAGE tech_flash_component_pkg IS @@ -108,5 +109,22 @@ PACKAGE tech_flash_component_pkg IS ); end component ip_arria10_remote_update; + function flash_addr_w( technology: in integer ) return integer; + function flash_data_w( technology: in integer ) return integer; + +package body tech_flash_component_pkg is + + function flash_addr_w( technology : in integer ) return integer is + begin + if technology = c_tech_stratixiv then return 24 end if; + if technology = c_tech_arria10 then return 32 end if; + end; + + function flash_data_w( technology : in integer ) return integer is + begin + if technology = c_tech_stratixiv then return 24 end if; + if technology = c_tech_arria10 then return 32 end if; + end; + END tech_flash_component_pkg; diff --git a/libraries/technology/flash/tech_flash_remote_update.vhd b/libraries/technology/flash/tech_flash_remote_update.vhd index 52b2701ce8..ee46f70da0 100644 --- a/libraries/technology/flash/tech_flash_remote_update.vhd +++ b/libraries/technology/flash/tech_flash_remote_update.vhd @@ -36,7 +36,7 @@ ENTITY tech_flash_remote_update IS ); PORT ( clock : IN STD_LOGIC; - data_in : IN STD_LOGIC_VECTOR (23 DOWNTO 0); + data_in : IN STD_LOGIC_VECTOR (flash_data_w(g_technology)-1 DOWNTO 0); param : IN STD_LOGIC_VECTOR (2 DOWNTO 0); read_param : IN STD_LOGIC; reconfig : IN STD_LOGIC; @@ -44,7 +44,7 @@ ENTITY tech_flash_remote_update IS reset_timer : IN STD_LOGIC; write_param : IN STD_LOGIC; busy : OUT STD_LOGIC; - data_out : OUT STD_LOGIC_VECTOR (23 DOWNTO 0) + data_out : OUT STD_LOGIC_VECTOR (flash_data_w(g_technology)-1 DOWNTO 0) ); END tech_flash_remote_update; -- GitLab