From c16ac056cfff4a067cc53484711d0545622575d2 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Mon, 3 Feb 2020 16:21:13 +0100
Subject: [PATCH] corrected assignments
---
.../ta2_unb2b_bsp/hardware/unb2b/top_post.sdc | 27 ++++---------------
1 file changed, 5 insertions(+), 22 deletions(-)
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc
index 466ccb7ffc..5fe42ab979 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc
@@ -52,23 +52,20 @@ set_clock_groups -asynchronous -group [get_clocks pll_clk200]
set_clock_groups -asynchronous -group [get_clocks pll_clk200p]
set_clock_groups -asynchronous -group [get_clocks pll_clk400]
# Isolate the 200MHz dp_clk
-set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2_board|\gen_pll:u_unb2_board_clk200_pll|\gen_st_fractional_pll:u_st_fractional_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|outclk0}]
+set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2b_board|\gen_pll:u_unb2b_board_clk200_pll|\gen_st_fractional_pll:u_st_fractional_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|*}]
# Isolate the 125MHz mm_clk
-set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2_board|\gen_mm_clk_hardware:u_unb2_board_clk125_pll|\gen_fractional_pll:u_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|outclk1}]
+set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2b_board|\gen_mm_clk_hardware:u_unb2b_board_clk125_pll|\gen_fractional_pll:u_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|*}]
# Isolate Kernel clock
-set_clock_groups -asynchronous -group [get_clocks {board_inst|kernel_clk_gen|board_kernel_clk_gen|kernel_pll|outclk0}]
+set_clock_groups -asynchronous -group [get_clocks {board_inst|kernel_clk_gen|board_kernel_clk_gen|kernel_pll|*}]
#**************************************************************
# Set False Path
#**************************************************************
-set_false_path -from {u_ctrl_unb2_board|u_mms_ppsh|u_ppsh|u_in|u_ddio_in|\gen_ip_arria10_e1sg:u0|\gen_w:0:u_ip_arria10_e1sg_ddio_in_1|ip_arria10_ddio_in_1|core|gpio_one_bit.i_loop[0].altera_gpio_bit_i|input_path.in_path_fr.buffer_data_in_fr_ddio~ddio_in_fr__nff} -to {u_ctrl_unb2_board|u_mms_ppsh|u_ppsh|pps_ext_cap}
-
-#cut paths to led pins
+set_false_path -from * -to {u_unb2b_board_qsfp_leds|green_on_arr[*]}
set_false_path -from * -to QSFP_LED[*]
-
-set_false_path -from [get_clocks {board_inst|ta2_unb2b_40gbe|board_ta2_unb2b_40gbe|u_ta2_unb2b_40GbE|u_arria10_40g_mac|alt_eth_ultra_40_0|e40_inst|phy.phy_inst|rxp|e40_rx_pll|rx_core_clk}] -to [get_clocks {u_ctrl_unb2_board|\gen_mm_clk_hardware:u_unb2_board_clk125_pll|\gen_fractional_pll:u_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|outclk2}]
+set_false_path -from {u_ctrl_unb2b_board|u_mms_ppsh|u_ppsh|u_in|u_ddio_in|\gen_ip_arria10_e1sg:u0|\gen_w:0:u_ip_arria10_e1sg_ddio_in_1|ip_arria10_ddio_in_1|core|i_loop[0].altera_gpio_bit_i|input_path.in_path_fr.buffer_data_in_fr_ddio~ddio_in_fr__nff} -to {u_ctrl_unb2b_board|u_mms_ppsh|u_ppsh|pps_ext_cap}
# Make the kernel reset multicycle
set_multicycle_path -to * -setup 4 -from {board_inst|kernel_interface|kernel_interface|reset_controller_sw|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out}
@@ -82,18 +79,4 @@ set_multicycle_path -to * -hold 3 -from {freeze_wrapper_inst|board_kernel_reset_
# kernel interface consistent and prevents kernel_clk2x to be swept away by synthesis)
set_false_path -from * -to freeze_wrapper_inst|pr_region_inst|*|twoXclock_consumer_NO_SHIFT_REG
-# Relax Kernel constraints - only do this during base revision compiles
-if {! [string equal $::TimeQuestInfo(nameofexecutable) "quartus_map"]} {
-# Case 196028 can't call get_current_revision in parallel map
-
-if { [get_current_revision] eq "base" } {
-
- post_message -type critical_warning "Compiling with slowed OpenCL Kernel clock. This is to help achieve timing closure for board bringup."
-
- if {! [string equal $::TimeQuestInfo(nameofexecutable) "quartus_sta"]} {
- set kernel_keepers [get_keepers freeze_wrapper_inst\|pr_region_inst\|*]
- set_max_delay 5 -from $kernel_keepers -to $kernel_keepers
- }
-}
-}
--
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