diff --git a/libraries/technology/clkbuf/hdllib.cfg b/libraries/technology/clkbuf/hdllib.cfg index e23d729cf3a5afa2e379b738cc0effa1a840ca76..e576fef06a3b61e05ac86203bd58783e500c5287 100644 --- a/libraries/technology/clkbuf/hdllib.cfg +++ b/libraries/technology/clkbuf/hdllib.cfg @@ -1,6 +1,6 @@ hdl_lib_name = tech_clkbuf hdl_library_clause_name = tech_clkbuf_lib -hdl_lib_uses_synth = technology ip_arria10_clkbuf_global common +hdl_lib_uses_synth = technology ip_arria10_clkbuf_global ip_arria10_e3sge3_clkbuf_global common hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/flash/hdllib.cfg b/libraries/technology/flash/hdllib.cfg index d3eae4d3b448afcfe36cf0b6fdc299424d793aa8..7f549d0a61ec5dad2c28e3074d918c8bff080138 100644 --- a/libraries/technology/flash/hdllib.cfg +++ b/libraries/technology/flash/hdllib.cfg @@ -4,6 +4,8 @@ hdl_lib_uses_synth = technology ip_stratixiv_flash ip_arria10_asmi_parallel ip_arria10_remote_update + ip_arria10_e3sge3_asmi_parallel + ip_arria10_e3sge3_remote_update hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/fpga_temp_sens/hdllib.cfg b/libraries/technology/fpga_temp_sens/hdllib.cfg index 6308482944fc07aad907747a59a7f87cae3457dc..f52490785a5fa46e87aa0916183876de838cd47e 100644 --- a/libraries/technology/fpga_temp_sens/hdllib.cfg +++ b/libraries/technology/fpga_temp_sens/hdllib.cfg @@ -1,6 +1,6 @@ hdl_lib_name = tech_fpga_temp_sens hdl_library_clause_name = tech_fpga_temp_sens_lib -hdl_lib_uses_synth = technology common ip_arria10_temp_sense +hdl_lib_uses_synth = technology common ip_arria10_temp_sense ip_arria10_e3sge3_temp_sense hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/fpga_voltage_sens/hdllib.cfg b/libraries/technology/fpga_voltage_sens/hdllib.cfg index b2cb3f8f43ecf211d40e8e0344b22619bfaf8f32..9793a24998340a3fc3c873b9dfcc4a568c0ae05f 100644 --- a/libraries/technology/fpga_voltage_sens/hdllib.cfg +++ b/libraries/technology/fpga_voltage_sens/hdllib.cfg @@ -1,6 +1,6 @@ hdl_lib_name = tech_fpga_voltage_sens hdl_library_clause_name = tech_fpga_voltage_sens_lib -hdl_lib_uses_synth = technology common ip_arria10_voltage_sense +hdl_lib_uses_synth = technology common ip_arria10_voltage_sense ip_arria10_e3sge3_voltage_sense hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/fractional_pll/hdllib.cfg b/libraries/technology/fractional_pll/hdllib.cfg index ae0b61a030b1dc3fd9c1be770c8474357966987c..c5e72e6023d8e2bcb81e8903ea97dde9ec1cf302 100644 --- a/libraries/technology/fractional_pll/hdllib.cfg +++ b/libraries/technology/fractional_pll/hdllib.cfg @@ -1,6 +1,6 @@ hdl_lib_name = tech_fractional_pll hdl_library_clause_name = tech_fractional_pll_lib -hdl_lib_uses_synth = technology ip_arria10_fractional_pll_clk200 ip_arria10_fractional_pll_clk125 common +hdl_lib_uses_synth = technology ip_arria10_fractional_pll_clk200 ip_arria10_fractional_pll_clk125 ip_arria10_e3sge3_fractional_pll_clk200 ip_arria10_e3sge3_fractional_pll_clk125 common hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/iobuf/hdllib.cfg b/libraries/technology/iobuf/hdllib.cfg index 3e250bc1c873405af62a89e6e102215b02771b39..410b543a388dad6bf907c9311e56660e6442096d 100644 --- a/libraries/technology/iobuf/hdllib.cfg +++ b/libraries/technology/iobuf/hdllib.cfg @@ -1,6 +1,6 @@ hdl_lib_name = tech_iobuf hdl_library_clause_name = tech_iobuf_lib -hdl_lib_uses_synth = technology ip_stratixiv_ddio ip_arria10_ddio +hdl_lib_uses_synth = technology ip_stratixiv_ddio ip_arria10_ddio ip_arria10_e3sge3_ddio hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/pll/hdllib.cfg b/libraries/technology/pll/hdllib.cfg index 527874d38a878d2f98371ac804893f37de85761b..b22b74085d00541279d734471b00165064bf069f 100644 --- a/libraries/technology/pll/hdllib.cfg +++ b/libraries/technology/pll/hdllib.cfg @@ -1,6 +1,17 @@ hdl_lib_name = tech_pll hdl_library_clause_name = tech_pll_lib -hdl_lib_uses_synth = technology ip_stratixiv_pll ip_arria10_pll_xgmii_mac_clocks ip_arria10_pll_clk200 ip_arria10_pll_clk25 ip_stratixiv_pll_clk25 ip_arria10_pll_clk125 common +hdl_lib_uses_synth = technology + ip_stratixiv_pll + ip_arria10_pll_xgmii_mac_clocks + ip_arria10_pll_clk200 + ip_arria10_pll_clk25 + ip_stratixiv_pll_clk25 + ip_arria10_pll_clk125 + ip_arria10_e3sge3_pll_xgmii_mac_clocks + ip_arria10_e3sge3_pll_clk200 + ip_arria10_e3sge3_pll_clk25 + ip_arria10_e3sge3_pll_clk125 + common hdl_lib_uses_sim = hdl_lib_technology = diff --git a/libraries/technology/tse/hdllib.cfg b/libraries/technology/tse/hdllib.cfg index e50883673b180ce02134644d12d343f47f9a17aa..4ddb613a83f1db2a3cd11bebf65c5841f251aa0c 100644 --- a/libraries/technology/tse/hdllib.cfg +++ b/libraries/technology/tse/hdllib.cfg @@ -3,6 +3,7 @@ hdl_library_clause_name = tech_tse_lib hdl_lib_uses_synth = technology ip_stratixiv_tse_sgmii_lvds ip_stratixiv_tse_sgmii_gx ip_arria10_tse_sgmii_lvds ip_arria10_tse_sgmii_gx + ip_arria10_e3sge3_tse_sgmii_lvds ip_arria10_e3sge3_tse_sgmii_gx common dp hdl_lib_uses_sim =