From c12a1327736603da605a91751a5fe6425c43bccd Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Thu, 23 Jun 2022 10:46:19 +0200
Subject: [PATCH] Corrected dp_clk in comment.

---
 libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd b/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
index dc663d3698..b355ca2e1d 100644
--- a/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
+++ b/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
@@ -128,7 +128,7 @@ BEGIN
   -- The synchronous start_pulse and sync_in in the dp_clk domain cannot be
   -- passed on via two separate common_spulse instances, because then they may
   -- appear at different clock cycles in the mm_clk domain, due to that the
-  -- mm_clk and mm_clk are asynchronous on HW. Therefore use mm_sync_level to
+  -- dp_clk and mm_clk are asynchronous on HW. Therefore use mm_sync_level to
   -- pass on sync_in.
   u_common_spulse_sync : ENTITY common_lib.common_spulse
   GENERIC MAP (
-- 
GitLab