diff --git a/applications/ta2/designs/.gitignore b/applications/ta2/designs/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..00bdd025b727d6ba26b2d269775fbf79095fc9bc
--- /dev/null
+++ b/applications/ta2/designs/.gitignore
@@ -0,0 +1,5 @@
+*/*.aoco
+*/*.aocr
+*/*.aocx
+*/*.sof
+*/*.rbf
diff --git a/applications/ta2/designs/ta2_unb2b_qsfp_demo/Makefile b/applications/ta2/designs/ta2_unb2b_qsfp_demo/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..81968dcdd763a837a867662a3622ef1ebd9e8153
--- /dev/null
+++ b/applications/ta2/designs/ta2_unb2b_qsfp_demo/Makefile
@@ -0,0 +1,103 @@
+CXX=			g++ #-mcmodel=medium
+CXXFLAGS=		-std=c++11 -mavx2 -g -O3 -fopenmp #-DCL_ALTERA
+AOC=			aoc
+AOCFLAGS=		-v -g
+#AOCRFLAGS+=		-fp-relaxed
+AOCRFLAGS+=		-report
+AOCRFLAGS+=   -opt-arg=-allow-io-channel-autorun-kernel
+#AOCRFLAGS+=		-board=p385a_min_ax115_1710240
+AOCOFLAGS+=		-board=unb2b
+
+#AOCOFLAGS+=		-board=p385a_min_ax115
+#AOCOFLAGS+=		-board=p520_max_sg280l
+#AOCOFLAGS=		-board=a10gx_hostch
+#AOCRFLAGS+=		-board=s10gx_ea
+AOCOFLAGS+=		-I$(INTELOCLSDKROOT)/include/kernel_headers
+#AOCFLAGS=		-v -g -cl-opt-disable -cl-fast-relaxed-math -cl-mad-enable -fp-relaxed -report -board=a10gx_hostch
+#AOCXFLAGS+=		-high-effort
+#AOCFLAGS+=		-fast-compile
+#AOCRFLAGS+=		-profile=all
+#AOCOFLAGS+=		-march=emulator -DEMULATOR
+#AOCRFLAGS+=		-emulator-channel-depth-model=strict
+#AOCXFLAGS+=   -bsp-flow=base
+AOCXFLAGS+=   -bsp-flow=flat
+ifneq ("$(SEED)", "")
+AOCXFLAGS+=		-seed=$(SEED)
+endif
+INCLUDES=		$(shell aocl compile-config) #-I..
+LDFLAGS=		$(shell aocl link-config) #-ldl -lacl_emulator_kernel_rt #-lbfd
+#INCLUDES=               -I/var/scratch/package/altera_pro/18.0.0.219/hld/host/include
+#LDFLAGS=                -L/cm/shared/package/altera_pro/18.0.0.219/hld/board/nalla_pcie/linux64/lib -L/var/scratch/package/altera_pro/18.0.0.219/hld/host/linux64/lib -Wl,--no-as-needed -lalteracl -lnalla_pcie_mmd -lelf
+#TMPDIR=			/tmp/unb2b_LED_Demo_base
+TMPDIR=			$(RADIOHDL_BUILD_DIR)/unb2b/OpenCL/$(lastword $(subst /, ,$(dir $(abspath $1))))
+CXXFLAGS+=		$(INCLUDES)
+
+
+CXXSOURCES=		GridderTest.cc
+CXXSOURCES=		DegridderTest.cc
+#CXXSOURCES+=		FFT32Test.cc
+#CXXSOURCES=		IOChannelTest.cc
+
+
+q:
+OBJECTS=		$(CXXSOURCES:%.cc=%.o)
+DEPENDENCIES=		$(CXXSOURCES:%.cc=%.d)
+EXECUTABLES=		$(CXXSOURCES:%.cc=%)
+
+%.d:			%.cc
+			-$(CXX) $(CXXFLAGS) -MM -MT $@ -MT ${@:%.d=%.o} $< -o $@
+
+%.o:			%.cc
+			$(CXX) -c $(CXXFLAGS) -o $@ $<
+
+%.aoco:			%.cl
+			(unset DISPLAY; mkdir -p $(TMPDIR)/$* && cp -a  $< $(TMPDIR)/$* && cd $(TMPDIR)/$* && $(AOC) -c $(AOCOFLAGS) $< && cd - && cp -a $(TMPDIR)/$*/$@ .)
+
+%.aocr:			%.aoco
+			(unset DISPLAY; cp -a  $< $(TMPDIR)/$* && cd $(TMPDIR)/$* && $(AOC) -rtl $(AOCRFLAGS) $< && cd - && cp -a $(TMPDIR)/$*/$@ .)
+
+%.aocx:			%.aocr
+			(unset DISPLAY; cp -a  $< $(TMPDIR)/$* && cd $(TMPDIR)/$* && $(AOC) $(AOCXFLAGS) $< && cd - && cp -a $(TMPDIR)/$*/$@ .)
+
+%.sof:     %.aocx      
+			(unset DISPLAY; cp -a $(TMPDIR)/$*/flat.sof ./$@)
+
+%.rbf:     %.sof      
+			(unset DISPLAY; cp -a $(TMPDIR)/$*/flat.rbf ./$@)
+
+#temp test
+#%.aocx:			%.aoco
+#			(unset DISPLAY; cp -a  $< $(TMPDIR)/$* && cd $(TMPDIR)/$* && $(AOC) -rtl $(AOCRFLAGS) $(AOCXFLAGS) $< && cd - && cp -a $(TMPDIR)/$*/$@ .)
+
+
+#%.build:
+#			test -f $@ || (unset DISPLAY; echo `hostname` && rm -rf $(TMPDIR)/$* && cp -a $(TMPDIR)/`basename $* $(lastword $(subst _, ,$*))`template $(TMPDIR)/$* && cd $(TMPDIR)/$* && mv *.aoco $*.aoco && mv *.aocr $*.aocr && mv *.cl $*.cl && mv *template $* && time $(AOC) $(AOCXFLAGS) -seed=$(lastword $(subst _, ,$*)) $*.aocr && fgrep MHz $*/quartus_sh_compile.log|tail -n 1) >$@ 2>&1
+
+
+%.build:
+			test -f $@ || test -f /tmp/stop || (echo `hostname` && cp `basename $* _$(lastword $(subst _, ,$*))`.cl $*.cl && SEED=$(lastword $(subst _, ,$*)) time make -j1 $*.aocx && fgrep MHz $(TMPDIR)/$*/$*/quartus_sh_compile.log|tail -n 1) >$@ 2>&1
+
+
+all::			$(EXECUTABLES)
+
+GridderTest:		GridderTest.o
+			$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
+
+DegridderTest:		DegridderTest.o
+			$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
+
+FFT32Test:		FFT32Test.o
+			$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
+
+IOChannelTest:		IOChannelTest.o
+			$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
+
+clean::
+			$(RM) a.out $(DEPENDENCIES) $(OBJECTS)
+
+sleep.%::
+			$(subst ., ,$@)
+
+ifeq (0, $(words $(findstring $(MAKECMDGOALS), clean)))
+-include $(DEPENDENCIES)
+endif
diff --git a/applications/ta2/designs/ta2_unb2b_qsfp_demo/qsfp_demo.cl b/applications/ta2/designs/ta2_unb2b_qsfp_demo/qsfp_demo.cl
new file mode 100644
index 0000000000000000000000000000000000000000..3cfe03a3ba7012ab494d622e2d359f3c40c075b2
--- /dev/null
+++ b/applications/ta2/designs/ta2_unb2b_qsfp_demo/qsfp_demo.cl
@@ -0,0 +1,2288 @@
+#pragma OPENCL EXTENSION cl_intel_channels : enable
+
+#include <ihc_apint.h>
+
+
+#define FLAG_FIRST	0x01
+#define FLAG_LAST	0x02
+
+struct line_40gbe {
+  uint8 payload;
+  uchar flags;
+} __attribute__((packed));
+
+struct line_10gbe {
+  uint2 payload;
+  uchar flags;
+} __attribute__((packed));
+
+
+//channel struct line_40gbe ch_in_40_gbe  __attribute__((depth(0))) __attribute__((io("kernel_input_40GbE")));
+channel struct line_40gbe ch_out_40gbe  __attribute__((depth(0))) __attribute__((io("kernel_output_40GbE")));
+
+//channel struct line_10gbe ch_in_10gbe  __attribute__((depth(0))) __attribute__((io("kernel_input_10GbE")));
+channel struct line_10gbe ch_out_10gbe  __attribute__((depth(0))) __attribute__((io("kernel_output_10GbE")));
+
+
+#if 0
+struct udp_packet {
+  struct ethernet_header {
+    uchar destination_mac[6], source_mac[6];
+    ushort ether_type;
+  } ethernet_header;
+
+  struct ipv4_header {
+    uchar version_ihl, dscp_ecn;
+    ushort length;
+    ushort identification, flags_fragment_offset;
+    uchar  ttl, protocol;
+    ushort checksum;
+    uint   source_ip_address, destination_ip_address;
+  } __attribute__((packed)) ipv4_header;
+
+  struct udp_header {
+    ushort source_port, destination_port;
+    ushort length, checksum;
+  } udp_header;
+
+  uchar payload[8192];
+};
+
+__constant uchar packet_header[] = {
+  0x00, 0x07, 0x43, 0x3b, 0xf6, 0x40,
+  0xf4, 0x52, 0x14, 0x94, 0xdc, 0xc1,
+  0x08, 0x00,
+  
+  0x45,
+  0x00,
+  (sizeof(struct ipv4_header) + sizeof(struct udp_header) + 8192) / 256, (sizeof(struct ipv4_header) + sizeof(struct udp_header) + 8192) % 256,
+  0xc6, 0xd8,
+  0x40, 0x00,
+  0x40,
+  0x11,
+  0x00, 0x00,
+  0x0a, 0xc4, 0xf8, 0xfe,
+  0x0a, 0xc4, 0xf8, 0x02,
+
+  0x8f, 0x28,
+  0x11, 0x5c,
+  (sizeof(struct udp_header) + 8192) / 256, (sizeof(struct udp_header) + 8192) % 256,
+  0x00, 0x00,
+};
+
+
+uint htonl(uint n)
+{
+#if defined __ENDIAN_LITTLE__
+  return as_uint(as_uchar4(n).wzyx);
+#else
+  return n;
+#endif
+}
+
+
+ushort htons(ushort n)
+{
+#if defined __ENDIAN_LITTLE__
+  return as_ushort(as_uchar2(n).yx);
+#else
+  return n;
+#endif
+}
+
+#endif
+
+__constant uchar packets[4][8512] __attribute__((aligned(32))) = {
+  {
+    0x00, 0x07, 0x43, 0x3B, 0xF6, 0x40, 0xF4, 0x52, 0x14, 0x94, 0xDC, 0xC1, 0x08, 0x00, 0x45, 0x00,
+    0x21, 0x31, 0x58, 0xEB, 0x40, 0x00, 0x40, 0x11, 0xBA, 0x47, 0x0A, 0xC4, 0xF8, 0xFE, 0x0A, 0xC4,
+    0xF8, 0x02, 0xCF, 0x7E, 0x11, 0x58, 0x21, 0x1D, 0x9F, 0x98, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20,
+    0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x2C, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69,
+    0x74, 0x2C, 0x20, 0x73, 0x65, 0x64, 0x20, 0x64, 0x6F, 0x20, 0x65, 0x69, 0x75, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x75, 0x74, 0x20, 0x6C, 0x61, 0x62, 0x6F, 0x72, 0x65, 0x20, 0x65, 0x74,
+    0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x2E, 0x20, 0x50, 0x75, 0x72, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65,
+    0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x56, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74,
+    0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x4D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x49, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x76, 0x69, 0x76, 0x65,
+    0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x6E,
+    0x69, 0x73, 0x6C, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x61, 0x64, 0x69,
+    0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x49, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61, 0x72, 0x63,
+    0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x2E, 0x20, 0x45,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x69, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E,
+    0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61,
+    0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x69, 0x65, 0x73, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x4E, 0x75,
+    0x6C, 0x6C, 0x61, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x65,
+    0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72,
+    0x61, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65, 0x61,
+    0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x75,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x65, 0x75, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20,
+    0x75, 0x74, 0x2E, 0x20, 0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20,
+    0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73,
+    0x69, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65,
+    0x74, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x75, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x61, 0x72,
+    0x69, 0x75, 0x73, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F,
+    0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E,
+    0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x41, 0x74,
+    0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71,
+    0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F,
+    0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x74, 0x2E, 0x20, 0x56,
+    0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x73, 0x65, 0x64, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73,
+    0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61, 0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63,
+    0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x41, 0x64, 0x69, 0x70,
+    0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E,
+    0x69, 0x73, 0x6C, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75,
+    0x73, 0x74, 0x6F, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x6C, 0x6F,
+    0x72, 0x65, 0x6D, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75,
+    0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69,
+    0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x65, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65,
+    0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x0A, 0x0A, 0x53, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69,
+    0x73, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69,
+    0x65, 0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65,
+    0x75, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x2E, 0x20, 0x52, 0x69, 0x73,
+    0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x2E, 0x20, 0x44, 0x69, 0x63, 0x74, 0x75,
+    0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D,
+    0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61, 0x74, 0x65, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x45,
+    0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69,
+    0x62, 0x75, 0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x2E, 0x20, 0x53, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69,
+    0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x20,
+    0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x2E, 0x20, 0x56,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x73, 0x61, 0x67,
+    0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x4D,
+    0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74,
+    0x75, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x63,
+    0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67,
+    0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x43, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x61, 0x65, 0x6E, 0x65,
+    0x61, 0x6E, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C,
+    0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x69, 0x73, 0x20, 0x64, 0x69, 0x73, 0x20, 0x70, 0x61, 0x72, 0x74, 0x75, 0x72, 0x69, 0x65, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x6E, 0x74, 0x65, 0x73, 0x20, 0x6E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x72, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x2E,
+    0x20, 0x45, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F,
+    0x72, 0x74, 0x61, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x6D, 0x6F, 0x6C, 0x6C, 0x69, 0x73,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x61, 0x2E, 0x20, 0x4C, 0x75, 0x63,
+    0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67,
+    0x69, 0x6C, 0x6C, 0x61, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69,
+    0x74, 0x6F, 0x72, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x64, 0x6F, 0x6C, 0x6F,
+    0x72, 0x2E, 0x20, 0x45, 0x75, 0x20, 0x6D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75,
+    0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61,
+    0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x44,
+    0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20,
+    0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72,
+    0x65, 0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64,
+    0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x2E,
+    0x20, 0x54, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70,
+    0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x69, 0x61, 0x63, 0x75, 0x6C, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74,
+    0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73,
+    0x69, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75,
+    0x73, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x74,
+    0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x64, 0x75, 0x69, 0x20, 0x75, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C,
+    0x69, 0x73, 0x69, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73,
+    0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x49, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x6F,
+    0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61,
+    0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F,
+    0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E,
+    0x61, 0x72, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74,
+    0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75,
+    0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4F,
+    0x64, 0x69, 0x6F, 0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x0A,
+    0x0A, 0x50, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6E, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64,
+    0x69, 0x65, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x61, 0x2E, 0x20, 0x50, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x44, 0x69, 0x61, 0x6D,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E,
+    0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x69, 0x6E,
+    0x2E, 0x20, 0x42, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x6F, 0x64, 0x69, 0x6F,
+    0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x68,
+    0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x69, 0x64, 0x20, 0x61,
+    0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x66, 0x65, 0x75,
+    0x67, 0x69, 0x61, 0x74, 0x2E, 0x20, 0x52, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20,
+    0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20,
+    0x65, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x64,
+    0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65,
+    0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x6D, 0x6F,
+    0x72, 0x62, 0x69, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x66, 0x61,
+    0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E,
+    0x64, 0x75, 0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E,
+    0x2E, 0x0A, 0x0A, 0x54, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x20, 0x70, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x2E,
+    0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x43, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x41, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75, 0x69,
+    0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x2E, 0x20, 0x41, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65,
+    0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x2E, 0x20,
+    0x53, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61,
+    0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x69, 0x64, 0x20, 0x73, 0x65, 0x6D, 0x70, 0x65, 0x72,
+    0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65,
+    0x72, 0x69, 0x74, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72,
+    0x75, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71,
+    0x75, 0x65, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61,
+    0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D,
+    0x73, 0x61, 0x6E, 0x2E, 0x20, 0x44, 0x75, 0x69, 0x20, 0x75, 0x74, 0x20, 0x6F, 0x72, 0x6E, 0x61,
+    0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x41, 0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20,
+    0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61,
+    0x63, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72,
+    0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x76, 0x65, 0x6C,
+    0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70,
+    0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69,
+    0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20,
+    0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75, 0x72, 0x20, 0x72, 0x69,
+    0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69,
+    0x65, 0x73, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x2E, 0x20,
+    0x45, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69,
+    0x74, 0x75, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73,
+    0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x2E, 0x20,
+    0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61,
+    0x6D, 0x65, 0x74, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69,
+    0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x65,
+    0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73, 0x63, 0x65,
+    0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x74,
+    0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x4F, 0x72, 0x6E,
+    0x61, 0x72, 0x65, 0x20, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61,
+    0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65,
+    0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x66, 0x75, 0x73, 0x63, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x75, 0x74, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72,
+    0x72, 0x61, 0x20, 0x73, 0x75, 0x73, 0x70, 0x65, 0x6E, 0x64, 0x69, 0x73, 0x73, 0x65, 0x2E, 0x20,
+    0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20,
+    0x76, 0x65, 0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x75,
+    0x72, 0x70, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68,
+    0x61, 0x63, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61,
+    0x74, 0x65, 0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72,
+    0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x45, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64,
+    0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73,
+    0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69,
+    0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x2E, 0x20, 0x53, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x66, 0x61,
+    0x6D, 0x65, 0x73, 0x20, 0x61, 0x63, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x2E, 0x20, 0x4C,
+    0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x69, 0x64, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74,
+    0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x6E, 0x6F, 0x6E,
+    0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x54, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x2E, 0x20, 0x47, 0x72, 0x61, 0x76, 0x69,
+    0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20,
+    0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73,
+    0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65,
+    0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63,
+    0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x6E,
+    0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61,
+    0x74, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20,
+    0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x69, 0x6E, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x2E, 0x20, 0x56, 0x65, 0x6C,
+    0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x70, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x70,
+    0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69,
+    0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74,
+    0x69, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x65, 0x72, 0x6F,
+    0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4C, 0x65, 0x6F,
+    0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75,
+    0x74, 0x61, 0x74, 0x65, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x6E, 0x65, 0x63, 0x20,
+    0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x41, 0x6C, 0x69, 0x71, 0x75,
+    0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x75, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D,
+    0x20, 0x61, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x76,
+    0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x69,
+    0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20,
+    0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69,
+    0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x50,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61,
+    0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x75, 0x6C, 0x74,
+    0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20, 0x6D, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x68,
+    0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x62,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x2E, 0x20, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x65, 0x6C,
+    0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x65, 0x6C,
+    0x6C, 0x75, 0x73, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75,
+    0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63,
+    0x2E, 0x20, 0x41, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72,
+    0x61, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x63, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65,
+    0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69,
+    0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76,
+    0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x67, 0x65,
+    0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69,
+    0x73, 0x2E, 0x20, 0x4D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61,
+    0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73,
+    0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x4D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x69,
+    0x64, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73,
+    0x2E, 0x20, 0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x20, 0x65, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x4E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20,
+    0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x69, 0x61, 0x63,
+    0x75, 0x6C, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x69, 0x64, 0x20, 0x76, 0x6F, 0x6C,
+    0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x4E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73,
+    0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20,
+    0x44, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69,
+    0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20,
+    0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64,
+    0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65, 0x74, 0x20,
+    0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x76, 0x65,
+    0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63,
+    0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20, 0x73,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69,
+    0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x2E, 0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C,
+    0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74,
+    0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x4E,
+    0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61,
+    0x63, 0x20, 0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D,
+    0x61, 0x75, 0x72, 0x69, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E,
+    0x69, 0x6D, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x76,
+    0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20,
+    0x69, 0x6E, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61,
+    0x74, 0x65, 0x20, 0x65, 0x75, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65,
+    0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6C, 0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74,
+    0x70, 0x61, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75, 0x63,
+    0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x4E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E,
+    0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73,
+    0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x69, 0x64,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D,
+    0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65,
+    0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x2E, 0x20, 0x46, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C,
+    0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x2E, 0x20, 0x4E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66,
+    0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C,
+    0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74,
+    0x61, 0x73, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20,
+    0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x65, 0x6D, 0x70, 0x65, 0x72, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x61, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74,
+    0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E, 0x75,
+    0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C,
+    0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65,
+    0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75,
+    0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20,
+    0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x20, 0x69,
+    0x64, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x2E, 0x20, 0x43,
+    0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20, 0x66, 0x65, 0x6C, 0x69,
+    0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61,
+    0x6D, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x49, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63,
+    0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74,
+    0x20, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75,
+    0x69, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74,
+    0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63,
+    0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61,
+    0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61,
+    0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20, 0x52, 0x68, 0x6F, 0x6E, 0x63,
+    0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69,
+    0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x41, 0x75, 0x67,
+    0x75, 0x65, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61,
+    0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74,
+    0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x2E, 0x20, 0x41,
+    0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73,
+    0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x20, 0x69, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x55, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65,
+    0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20,
+    0x56, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x74, 0x65,
+    0x6C, 0x6C, 0x75, 0x73, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73,
+    0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x65, 0x75, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76,
+    0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x2E, 0x20, 0x46, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73,
+    0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73,
+    0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65,
+    0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D,
+    0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x63,
+    0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x50, 0x75, 0x6C,
+    0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x65, 0x71,
+    0x75, 0x65, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20,
+    0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6D, 0x61, 0x74,
+    0x74, 0x69, 0x73, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20,
+    0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70,
+    0x65, 0x72, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x75, 0x6C, 0x6C,
+    0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E, 0x20,
+    0x53, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x2E, 0x20, 0x45, 0x72, 0x61, 0x74,
+    0x20, 0x6E, 0x61, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x75,
+    0x72, 0x6E, 0x61, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C,
+    0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x53,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65,
+    0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65,
+    0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E,
+    0x20, 0x55, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x6F, 0x64, 0x69,
+    0x6F, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x75,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69,
+    0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E,
+    0x20, 0x53, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x65, 0x74, 0x20, 0x6C, 0x69, 0x67, 0x75, 0x6C,
+    0x61, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x72, 0x6F, 0x69, 0x6E, 0x20, 0x6C, 0x69,
+    0x62, 0x65, 0x72, 0x6F, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x65, 0x6C, 0x65, 0x6D,
+    0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69, 0x74, 0x75, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73,
+    0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x42,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69,
+    0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69,
+    0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C,
+    0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x49, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65,
+    0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C,
+    0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74,
+    0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64,
+    0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x2E, 0x20, 0x48, 0x61, 0x63,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65,
+    0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69,
+    0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x0A,
+  }, {
+    0x00, 0x07, 0x43, 0x3B, 0xF6, 0x40, 0xF4, 0x52, 0x14, 0x94, 0xDC, 0xC1, 0x08, 0x00, 0x45, 0x00,
+    0x21, 0x31, 0x5E, 0xB9, 0x40, 0x00, 0x40, 0x11, 0xB4, 0x79, 0x0A, 0xC4, 0xF8, 0xFE, 0x0A, 0xC4,
+    0xF8, 0x02, 0x9E, 0x52, 0x11, 0x59, 0x21, 0x1D, 0xD0, 0xC3, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20,
+    0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x2C, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69,
+    0x74, 0x2C, 0x20, 0x73, 0x65, 0x64, 0x20, 0x64, 0x6F, 0x20, 0x65, 0x69, 0x75, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x75, 0x74, 0x20, 0x6C, 0x61, 0x62, 0x6F, 0x72, 0x65, 0x20, 0x65, 0x74,
+    0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x2E, 0x20, 0x50, 0x75, 0x72, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65,
+    0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x56, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74,
+    0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x4D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x49, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x76, 0x69, 0x76, 0x65,
+    0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x6E,
+    0x69, 0x73, 0x6C, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x61, 0x64, 0x69,
+    0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x49, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61, 0x72, 0x63,
+    0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x2E, 0x20, 0x45,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x69, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E,
+    0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61,
+    0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x69, 0x65, 0x73, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x4E, 0x75,
+    0x6C, 0x6C, 0x61, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x65,
+    0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72,
+    0x61, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65, 0x61,
+    0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x75,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x65, 0x75, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20,
+    0x75, 0x74, 0x2E, 0x20, 0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20,
+    0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73,
+    0x69, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65,
+    0x74, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x75, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x61, 0x72,
+    0x69, 0x75, 0x73, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F,
+    0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E,
+    0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x41, 0x74,
+    0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71,
+    0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F,
+    0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x74, 0x2E, 0x20, 0x56,
+    0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x73, 0x65, 0x64, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73,
+    0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61, 0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63,
+    0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x41, 0x64, 0x69, 0x70,
+    0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E,
+    0x69, 0x73, 0x6C, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75,
+    0x73, 0x74, 0x6F, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x6C, 0x6F,
+    0x72, 0x65, 0x6D, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75,
+    0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69,
+    0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x65, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65,
+    0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x0A, 0x0A, 0x53, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69,
+    0x73, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69,
+    0x65, 0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65,
+    0x75, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x2E, 0x20, 0x52, 0x69, 0x73,
+    0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x2E, 0x20, 0x44, 0x69, 0x63, 0x74, 0x75,
+    0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D,
+    0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61, 0x74, 0x65, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x45,
+    0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69,
+    0x62, 0x75, 0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x2E, 0x20, 0x53, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69,
+    0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x20,
+    0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x2E, 0x20, 0x56,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x73, 0x61, 0x67,
+    0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x4D,
+    0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74,
+    0x75, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x63,
+    0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67,
+    0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x43, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x61, 0x65, 0x6E, 0x65,
+    0x61, 0x6E, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C,
+    0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x69, 0x73, 0x20, 0x64, 0x69, 0x73, 0x20, 0x70, 0x61, 0x72, 0x74, 0x75, 0x72, 0x69, 0x65, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x6E, 0x74, 0x65, 0x73, 0x20, 0x6E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x72, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x2E,
+    0x20, 0x45, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F,
+    0x72, 0x74, 0x61, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x6D, 0x6F, 0x6C, 0x6C, 0x69, 0x73,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x61, 0x2E, 0x20, 0x4C, 0x75, 0x63,
+    0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67,
+    0x69, 0x6C, 0x6C, 0x61, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69,
+    0x74, 0x6F, 0x72, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x64, 0x6F, 0x6C, 0x6F,
+    0x72, 0x2E, 0x20, 0x45, 0x75, 0x20, 0x6D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75,
+    0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61,
+    0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x44,
+    0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20,
+    0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72,
+    0x65, 0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64,
+    0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x2E,
+    0x20, 0x54, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70,
+    0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x69, 0x61, 0x63, 0x75, 0x6C, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74,
+    0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73,
+    0x69, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75,
+    0x73, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x74,
+    0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x64, 0x75, 0x69, 0x20, 0x75, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C,
+    0x69, 0x73, 0x69, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73,
+    0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x49, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x6F,
+    0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61,
+    0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F,
+    0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E,
+    0x61, 0x72, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74,
+    0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75,
+    0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4F,
+    0x64, 0x69, 0x6F, 0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x0A,
+    0x0A, 0x50, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6E, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64,
+    0x69, 0x65, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x61, 0x2E, 0x20, 0x50, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x44, 0x69, 0x61, 0x6D,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E,
+    0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x69, 0x6E,
+    0x2E, 0x20, 0x42, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x6F, 0x64, 0x69, 0x6F,
+    0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x68,
+    0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x69, 0x64, 0x20, 0x61,
+    0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x66, 0x65, 0x75,
+    0x67, 0x69, 0x61, 0x74, 0x2E, 0x20, 0x52, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20,
+    0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20,
+    0x65, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x64,
+    0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65,
+    0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x6D, 0x6F,
+    0x72, 0x62, 0x69, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x66, 0x61,
+    0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E,
+    0x64, 0x75, 0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E,
+    0x2E, 0x0A, 0x0A, 0x54, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x20, 0x70, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x2E,
+    0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x43, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x41, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75, 0x69,
+    0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x2E, 0x20, 0x41, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65,
+    0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x2E, 0x20,
+    0x53, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61,
+    0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x69, 0x64, 0x20, 0x73, 0x65, 0x6D, 0x70, 0x65, 0x72,
+    0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65,
+    0x72, 0x69, 0x74, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72,
+    0x75, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71,
+    0x75, 0x65, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61,
+    0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D,
+    0x73, 0x61, 0x6E, 0x2E, 0x20, 0x44, 0x75, 0x69, 0x20, 0x75, 0x74, 0x20, 0x6F, 0x72, 0x6E, 0x61,
+    0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x41, 0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20,
+    0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61,
+    0x63, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72,
+    0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x76, 0x65, 0x6C,
+    0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70,
+    0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69,
+    0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20,
+    0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75, 0x72, 0x20, 0x72, 0x69,
+    0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69,
+    0x65, 0x73, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x2E, 0x20,
+    0x45, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69,
+    0x74, 0x75, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73,
+    0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x2E, 0x20,
+    0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61,
+    0x6D, 0x65, 0x74, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69,
+    0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x65,
+    0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73, 0x63, 0x65,
+    0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x74,
+    0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x4F, 0x72, 0x6E,
+    0x61, 0x72, 0x65, 0x20, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61,
+    0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65,
+    0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x66, 0x75, 0x73, 0x63, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x75, 0x74, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72,
+    0x72, 0x61, 0x20, 0x73, 0x75, 0x73, 0x70, 0x65, 0x6E, 0x64, 0x69, 0x73, 0x73, 0x65, 0x2E, 0x20,
+    0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20,
+    0x76, 0x65, 0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x75,
+    0x72, 0x70, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68,
+    0x61, 0x63, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61,
+    0x74, 0x65, 0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72,
+    0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x45, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64,
+    0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73,
+    0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69,
+    0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x2E, 0x20, 0x53, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x66, 0x61,
+    0x6D, 0x65, 0x73, 0x20, 0x61, 0x63, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x2E, 0x20, 0x4C,
+    0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x69, 0x64, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74,
+    0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x6E, 0x6F, 0x6E,
+    0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x54, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x2E, 0x20, 0x47, 0x72, 0x61, 0x76, 0x69,
+    0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20,
+    0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73,
+    0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65,
+    0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63,
+    0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x6E,
+    0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61,
+    0x74, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20,
+    0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x69, 0x6E, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x2E, 0x20, 0x56, 0x65, 0x6C,
+    0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x70, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x70,
+    0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69,
+    0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74,
+    0x69, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x65, 0x72, 0x6F,
+    0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4C, 0x65, 0x6F,
+    0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75,
+    0x74, 0x61, 0x74, 0x65, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x6E, 0x65, 0x63, 0x20,
+    0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x41, 0x6C, 0x69, 0x71, 0x75,
+    0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x75, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D,
+    0x20, 0x61, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x76,
+    0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x69,
+    0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20,
+    0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69,
+    0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x50,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61,
+    0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x75, 0x6C, 0x74,
+    0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20, 0x6D, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x68,
+    0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x62,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x2E, 0x20, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x65, 0x6C,
+    0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x65, 0x6C,
+    0x6C, 0x75, 0x73, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75,
+    0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63,
+    0x2E, 0x20, 0x41, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72,
+    0x61, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x63, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65,
+    0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69,
+    0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76,
+    0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x67, 0x65,
+    0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69,
+    0x73, 0x2E, 0x20, 0x4D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61,
+    0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73,
+    0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x4D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x69,
+    0x64, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73,
+    0x2E, 0x20, 0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x20, 0x65, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x4E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20,
+    0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x69, 0x61, 0x63,
+    0x75, 0x6C, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x69, 0x64, 0x20, 0x76, 0x6F, 0x6C,
+    0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x4E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73,
+    0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20,
+    0x44, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69,
+    0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20,
+    0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64,
+    0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65, 0x74, 0x20,
+    0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x76, 0x65,
+    0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63,
+    0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20, 0x73,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69,
+    0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x2E, 0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C,
+    0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74,
+    0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x4E,
+    0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61,
+    0x63, 0x20, 0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D,
+    0x61, 0x75, 0x72, 0x69, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E,
+    0x69, 0x6D, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x76,
+    0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20,
+    0x69, 0x6E, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61,
+    0x74, 0x65, 0x20, 0x65, 0x75, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65,
+    0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6C, 0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74,
+    0x70, 0x61, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75, 0x63,
+    0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x4E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E,
+    0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73,
+    0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x69, 0x64,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D,
+    0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65,
+    0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x2E, 0x20, 0x46, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C,
+    0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x2E, 0x20, 0x4E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66,
+    0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C,
+    0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74,
+    0x61, 0x73, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20,
+    0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x65, 0x6D, 0x70, 0x65, 0x72, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x61, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74,
+    0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E, 0x75,
+    0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C,
+    0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65,
+    0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75,
+    0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20,
+    0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x20, 0x69,
+    0x64, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x2E, 0x20, 0x43,
+    0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20, 0x66, 0x65, 0x6C, 0x69,
+    0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61,
+    0x6D, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x49, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63,
+    0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74,
+    0x20, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75,
+    0x69, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74,
+    0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63,
+    0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61,
+    0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61,
+    0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20, 0x52, 0x68, 0x6F, 0x6E, 0x63,
+    0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69,
+    0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x41, 0x75, 0x67,
+    0x75, 0x65, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61,
+    0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74,
+    0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x2E, 0x20, 0x41,
+    0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73,
+    0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x20, 0x69, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x55, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65,
+    0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20,
+    0x56, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x74, 0x65,
+    0x6C, 0x6C, 0x75, 0x73, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73,
+    0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x65, 0x75, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76,
+    0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x2E, 0x20, 0x46, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73,
+    0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73,
+    0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65,
+    0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D,
+    0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x63,
+    0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x50, 0x75, 0x6C,
+    0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x65, 0x71,
+    0x75, 0x65, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20,
+    0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6D, 0x61, 0x74,
+    0x74, 0x69, 0x73, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20,
+    0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70,
+    0x65, 0x72, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x75, 0x6C, 0x6C,
+    0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E, 0x20,
+    0x53, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x2E, 0x20, 0x45, 0x72, 0x61, 0x74,
+    0x20, 0x6E, 0x61, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x75,
+    0x72, 0x6E, 0x61, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C,
+    0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x53,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65,
+    0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65,
+    0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E,
+    0x20, 0x55, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x6F, 0x64, 0x69,
+    0x6F, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x75,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69,
+    0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E,
+    0x20, 0x53, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x65, 0x74, 0x20, 0x6C, 0x69, 0x67, 0x75, 0x6C,
+    0x61, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x72, 0x6F, 0x69, 0x6E, 0x20, 0x6C, 0x69,
+    0x62, 0x65, 0x72, 0x6F, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x65, 0x6C, 0x65, 0x6D,
+    0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69, 0x74, 0x75, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73,
+    0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x42,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69,
+    0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69,
+    0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C,
+    0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x49, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65,
+    0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C,
+    0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74,
+    0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64,
+    0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x2E, 0x20, 0x48, 0x61, 0x63,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65,
+    0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69,
+    0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x0A
+  }, {
+    0x00, 0x07, 0x43, 0x3B, 0xF6, 0x40, 0xF4, 0x52, 0x14, 0x94, 0xDC, 0xC1, 0x08, 0x00, 0x45, 0x00,
+    0x21, 0x31, 0x71, 0x36, 0x40, 0x00, 0x40, 0x11, 0xA1, 0xFC, 0x0A, 0xC4, 0xF8, 0xFE, 0x0A, 0xC4,
+    0xF8, 0x02, 0xB0, 0xB7, 0x11, 0x5A, 0x21, 0x1D, 0xBE, 0x5D, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20,
+    0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x2C, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69,
+    0x74, 0x2C, 0x20, 0x73, 0x65, 0x64, 0x20, 0x64, 0x6F, 0x20, 0x65, 0x69, 0x75, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x75, 0x74, 0x20, 0x6C, 0x61, 0x62, 0x6F, 0x72, 0x65, 0x20, 0x65, 0x74,
+    0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x2E, 0x20, 0x50, 0x75, 0x72, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65,
+    0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x56, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74,
+    0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x4D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x49, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x76, 0x69, 0x76, 0x65,
+    0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x6E,
+    0x69, 0x73, 0x6C, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x61, 0x64, 0x69,
+    0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x49, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61, 0x72, 0x63,
+    0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x2E, 0x20, 0x45,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x69, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E,
+    0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61,
+    0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x69, 0x65, 0x73, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x4E, 0x75,
+    0x6C, 0x6C, 0x61, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x65,
+    0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72,
+    0x61, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65, 0x61,
+    0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x75,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x65, 0x75, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20,
+    0x75, 0x74, 0x2E, 0x20, 0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20,
+    0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73,
+    0x69, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65,
+    0x74, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x75, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x61, 0x72,
+    0x69, 0x75, 0x73, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F,
+    0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E,
+    0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x41, 0x74,
+    0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71,
+    0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F,
+    0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x74, 0x2E, 0x20, 0x56,
+    0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x73, 0x65, 0x64, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73,
+    0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61, 0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63,
+    0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x41, 0x64, 0x69, 0x70,
+    0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E,
+    0x69, 0x73, 0x6C, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75,
+    0x73, 0x74, 0x6F, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x6C, 0x6F,
+    0x72, 0x65, 0x6D, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75,
+    0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69,
+    0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x65, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65,
+    0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x0A, 0x0A, 0x53, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69,
+    0x73, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69,
+    0x65, 0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65,
+    0x75, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x2E, 0x20, 0x52, 0x69, 0x73,
+    0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x2E, 0x20, 0x44, 0x69, 0x63, 0x74, 0x75,
+    0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D,
+    0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61, 0x74, 0x65, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x45,
+    0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69,
+    0x62, 0x75, 0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x2E, 0x20, 0x53, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69,
+    0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x20,
+    0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x2E, 0x20, 0x56,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x73, 0x61, 0x67,
+    0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x4D,
+    0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74,
+    0x75, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x63,
+    0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67,
+    0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x43, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x61, 0x65, 0x6E, 0x65,
+    0x61, 0x6E, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C,
+    0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x69, 0x73, 0x20, 0x64, 0x69, 0x73, 0x20, 0x70, 0x61, 0x72, 0x74, 0x75, 0x72, 0x69, 0x65, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x6E, 0x74, 0x65, 0x73, 0x20, 0x6E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x72, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x2E,
+    0x20, 0x45, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F,
+    0x72, 0x74, 0x61, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x6D, 0x6F, 0x6C, 0x6C, 0x69, 0x73,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x61, 0x2E, 0x20, 0x4C, 0x75, 0x63,
+    0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67,
+    0x69, 0x6C, 0x6C, 0x61, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69,
+    0x74, 0x6F, 0x72, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x64, 0x6F, 0x6C, 0x6F,
+    0x72, 0x2E, 0x20, 0x45, 0x75, 0x20, 0x6D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75,
+    0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61,
+    0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x44,
+    0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20,
+    0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72,
+    0x65, 0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64,
+    0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x2E,
+    0x20, 0x54, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70,
+    0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x69, 0x61, 0x63, 0x75, 0x6C, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74,
+    0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73,
+    0x69, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75,
+    0x73, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x74,
+    0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x64, 0x75, 0x69, 0x20, 0x75, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C,
+    0x69, 0x73, 0x69, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73,
+    0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x49, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x6F,
+    0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61,
+    0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F,
+    0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E,
+    0x61, 0x72, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74,
+    0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75,
+    0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4F,
+    0x64, 0x69, 0x6F, 0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x0A,
+    0x0A, 0x50, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6E, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64,
+    0x69, 0x65, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x61, 0x2E, 0x20, 0x50, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x44, 0x69, 0x61, 0x6D,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E,
+    0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x69, 0x6E,
+    0x2E, 0x20, 0x42, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x6F, 0x64, 0x69, 0x6F,
+    0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x68,
+    0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x69, 0x64, 0x20, 0x61,
+    0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x66, 0x65, 0x75,
+    0x67, 0x69, 0x61, 0x74, 0x2E, 0x20, 0x52, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20,
+    0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20,
+    0x65, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x64,
+    0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65,
+    0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x6D, 0x6F,
+    0x72, 0x62, 0x69, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x66, 0x61,
+    0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E,
+    0x64, 0x75, 0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E,
+    0x2E, 0x0A, 0x0A, 0x54, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x20, 0x70, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x2E,
+    0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x43, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x41, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75, 0x69,
+    0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x2E, 0x20, 0x41, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65,
+    0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x2E, 0x20,
+    0x53, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61,
+    0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x69, 0x64, 0x20, 0x73, 0x65, 0x6D, 0x70, 0x65, 0x72,
+    0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65,
+    0x72, 0x69, 0x74, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72,
+    0x75, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71,
+    0x75, 0x65, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61,
+    0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D,
+    0x73, 0x61, 0x6E, 0x2E, 0x20, 0x44, 0x75, 0x69, 0x20, 0x75, 0x74, 0x20, 0x6F, 0x72, 0x6E, 0x61,
+    0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x41, 0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20,
+    0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61,
+    0x63, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72,
+    0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x76, 0x65, 0x6C,
+    0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70,
+    0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69,
+    0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20,
+    0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75, 0x72, 0x20, 0x72, 0x69,
+    0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69,
+    0x65, 0x73, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x2E, 0x20,
+    0x45, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69,
+    0x74, 0x75, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73,
+    0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x2E, 0x20,
+    0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61,
+    0x6D, 0x65, 0x74, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69,
+    0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x65,
+    0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73, 0x63, 0x65,
+    0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x74,
+    0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x4F, 0x72, 0x6E,
+    0x61, 0x72, 0x65, 0x20, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61,
+    0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65,
+    0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x66, 0x75, 0x73, 0x63, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x75, 0x74, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72,
+    0x72, 0x61, 0x20, 0x73, 0x75, 0x73, 0x70, 0x65, 0x6E, 0x64, 0x69, 0x73, 0x73, 0x65, 0x2E, 0x20,
+    0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20,
+    0x76, 0x65, 0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x75,
+    0x72, 0x70, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68,
+    0x61, 0x63, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61,
+    0x74, 0x65, 0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72,
+    0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x45, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64,
+    0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73,
+    0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69,
+    0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x2E, 0x20, 0x53, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x66, 0x61,
+    0x6D, 0x65, 0x73, 0x20, 0x61, 0x63, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x2E, 0x20, 0x4C,
+    0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x69, 0x64, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74,
+    0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x6E, 0x6F, 0x6E,
+    0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x54, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x2E, 0x20, 0x47, 0x72, 0x61, 0x76, 0x69,
+    0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20,
+    0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73,
+    0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65,
+    0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63,
+    0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x6E,
+    0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61,
+    0x74, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20,
+    0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x69, 0x6E, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x2E, 0x20, 0x56, 0x65, 0x6C,
+    0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x70, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x70,
+    0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69,
+    0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74,
+    0x69, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x65, 0x72, 0x6F,
+    0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4C, 0x65, 0x6F,
+    0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75,
+    0x74, 0x61, 0x74, 0x65, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x6E, 0x65, 0x63, 0x20,
+    0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x41, 0x6C, 0x69, 0x71, 0x75,
+    0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x75, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D,
+    0x20, 0x61, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x76,
+    0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x69,
+    0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20,
+    0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69,
+    0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x50,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61,
+    0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x75, 0x6C, 0x74,
+    0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20, 0x6D, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x68,
+    0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x62,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x2E, 0x20, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x65, 0x6C,
+    0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x65, 0x6C,
+    0x6C, 0x75, 0x73, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75,
+    0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63,
+    0x2E, 0x20, 0x41, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72,
+    0x61, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x63, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65,
+    0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69,
+    0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76,
+    0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x67, 0x65,
+    0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69,
+    0x73, 0x2E, 0x20, 0x4D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61,
+    0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73,
+    0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x4D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x69,
+    0x64, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73,
+    0x2E, 0x20, 0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x20, 0x65, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x4E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20,
+    0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x69, 0x61, 0x63,
+    0x75, 0x6C, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x69, 0x64, 0x20, 0x76, 0x6F, 0x6C,
+    0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x4E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73,
+    0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20,
+    0x44, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69,
+    0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20,
+    0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64,
+    0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65, 0x74, 0x20,
+    0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x76, 0x65,
+    0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63,
+    0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20, 0x73,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69,
+    0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x2E, 0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C,
+    0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74,
+    0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x4E,
+    0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61,
+    0x63, 0x20, 0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D,
+    0x61, 0x75, 0x72, 0x69, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E,
+    0x69, 0x6D, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x76,
+    0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20,
+    0x69, 0x6E, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61,
+    0x74, 0x65, 0x20, 0x65, 0x75, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65,
+    0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6C, 0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74,
+    0x70, 0x61, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75, 0x63,
+    0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x4E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E,
+    0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73,
+    0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x69, 0x64,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D,
+    0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65,
+    0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x2E, 0x20, 0x46, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C,
+    0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x2E, 0x20, 0x4E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66,
+    0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C,
+    0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74,
+    0x61, 0x73, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20,
+    0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x65, 0x6D, 0x70, 0x65, 0x72, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x61, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74,
+    0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E, 0x75,
+    0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C,
+    0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65,
+    0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75,
+    0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20,
+    0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x20, 0x69,
+    0x64, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x2E, 0x20, 0x43,
+    0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20, 0x66, 0x65, 0x6C, 0x69,
+    0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61,
+    0x6D, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x49, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63,
+    0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74,
+    0x20, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75,
+    0x69, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74,
+    0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63,
+    0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61,
+    0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61,
+    0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20, 0x52, 0x68, 0x6F, 0x6E, 0x63,
+    0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69,
+    0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x41, 0x75, 0x67,
+    0x75, 0x65, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61,
+    0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74,
+    0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x2E, 0x20, 0x41,
+    0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73,
+    0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x20, 0x69, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x55, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65,
+    0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20,
+    0x56, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x74, 0x65,
+    0x6C, 0x6C, 0x75, 0x73, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73,
+    0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x65, 0x75, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76,
+    0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x2E, 0x20, 0x46, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73,
+    0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73,
+    0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65,
+    0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D,
+    0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x63,
+    0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x50, 0x75, 0x6C,
+    0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x65, 0x71,
+    0x75, 0x65, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20,
+    0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6D, 0x61, 0x74,
+    0x74, 0x69, 0x73, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20,
+    0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70,
+    0x65, 0x72, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x75, 0x6C, 0x6C,
+    0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E, 0x20,
+    0x53, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x2E, 0x20, 0x45, 0x72, 0x61, 0x74,
+    0x20, 0x6E, 0x61, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x75,
+    0x72, 0x6E, 0x61, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C,
+    0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x53,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65,
+    0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65,
+    0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E,
+    0x20, 0x55, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x6F, 0x64, 0x69,
+    0x6F, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x75,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69,
+    0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E,
+    0x20, 0x53, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x65, 0x74, 0x20, 0x6C, 0x69, 0x67, 0x75, 0x6C,
+    0x61, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x72, 0x6F, 0x69, 0x6E, 0x20, 0x6C, 0x69,
+    0x62, 0x65, 0x72, 0x6F, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x65, 0x6C, 0x65, 0x6D,
+    0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69, 0x74, 0x75, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73,
+    0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x42,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69,
+    0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69,
+    0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C,
+    0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x49, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65,
+    0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C,
+    0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74,
+    0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64,
+    0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x2E, 0x20, 0x48, 0x61, 0x63,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65,
+    0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69,
+    0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x0A,
+  }, {
+    0x00, 0x07, 0x43, 0x3B, 0xF6, 0x40, 0xF4, 0x52, 0x14, 0x94, 0xDC, 0xC1, 0x08, 0x00, 0x45, 0x00,
+    0x21, 0x31, 0x82, 0x14, 0x40, 0x00, 0x40, 0x11, 0x91, 0x1E, 0x0A, 0xC4, 0xF8, 0xFE, 0x0A, 0xC4,
+    0xF8, 0x02, 0x95, 0x99, 0x11, 0x5B, 0x21, 0x1D, 0xD9, 0x7A, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20,
+    0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x2C, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69,
+    0x74, 0x2C, 0x20, 0x73, 0x65, 0x64, 0x20, 0x64, 0x6F, 0x20, 0x65, 0x69, 0x75, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x75, 0x74, 0x20, 0x6C, 0x61, 0x62, 0x6F, 0x72, 0x65, 0x20, 0x65, 0x74,
+    0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x2E, 0x20, 0x50, 0x75, 0x72, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65,
+    0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x56, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74,
+    0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x4D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x49, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x76, 0x69, 0x76, 0x65,
+    0x72, 0x72, 0x61, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x6E,
+    0x69, 0x73, 0x6C, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x61, 0x64, 0x69,
+    0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x49, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x61, 0x72, 0x63,
+    0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x2E, 0x20, 0x45,
+    0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x69, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E,
+    0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61,
+    0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x69, 0x65, 0x73, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x4E, 0x75,
+    0x6C, 0x6C, 0x61, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x65,
+    0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72,
+    0x61, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65, 0x61,
+    0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x75,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x65, 0x75, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20,
+    0x75, 0x74, 0x2E, 0x20, 0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20,
+    0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73,
+    0x69, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65,
+    0x74, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x75, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x61, 0x72,
+    0x69, 0x75, 0x73, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F,
+    0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E,
+    0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x41, 0x74,
+    0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71,
+    0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F,
+    0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x74, 0x2E, 0x20, 0x56,
+    0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x73, 0x65, 0x64, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73,
+    0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61, 0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63,
+    0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x20, 0x41, 0x64, 0x69, 0x70,
+    0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E,
+    0x69, 0x73, 0x6C, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75,
+    0x73, 0x74, 0x6F, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x6C, 0x6F,
+    0x72, 0x65, 0x6D, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75,
+    0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69,
+    0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x65, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65,
+    0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x0A, 0x0A, 0x53, 0x69, 0x74, 0x20,
+    0x61, 0x6D, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65,
+    0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69,
+    0x73, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69,
+    0x65, 0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65,
+    0x75, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x2E, 0x20, 0x52, 0x69, 0x73,
+    0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x20, 0x71,
+    0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x2E, 0x20, 0x44, 0x69, 0x63, 0x74, 0x75,
+    0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D,
+    0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61, 0x74, 0x65, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x45,
+    0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69,
+    0x62, 0x75, 0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x2E, 0x20, 0x53, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73,
+    0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69,
+    0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x20,
+    0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x2E, 0x20, 0x56,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x73, 0x61, 0x67,
+    0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x69, 0x64, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20, 0x75, 0x74, 0x2E, 0x20, 0x4D,
+    0x61, 0x73, 0x73, 0x61, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74,
+    0x75, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x63,
+    0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67,
+    0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72,
+    0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F,
+    0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x43, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x61, 0x65, 0x6E, 0x65,
+    0x61, 0x6E, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C,
+    0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x69, 0x73, 0x20, 0x64, 0x69, 0x73, 0x20, 0x70, 0x61, 0x72, 0x74, 0x75, 0x72, 0x69, 0x65, 0x6E,
+    0x74, 0x20, 0x6D, 0x6F, 0x6E, 0x74, 0x65, 0x73, 0x20, 0x6E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75,
+    0x72, 0x20, 0x72, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x2E,
+    0x20, 0x45, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F,
+    0x72, 0x74, 0x61, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x6D, 0x6F, 0x6C, 0x6C, 0x69, 0x73,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x61, 0x2E, 0x20, 0x4C, 0x75, 0x63,
+    0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67,
+    0x69, 0x6C, 0x6C, 0x61, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69,
+    0x74, 0x6F, 0x72, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x20, 0x64, 0x6F, 0x6C, 0x6F,
+    0x72, 0x2E, 0x20, 0x45, 0x75, 0x20, 0x6D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75,
+    0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6C, 0x61,
+    0x63, 0x69, 0x6E, 0x69, 0x61, 0x20, 0x61, 0x74, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x44,
+    0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20,
+    0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x74, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72,
+    0x65, 0x20, 0x61, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64,
+    0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x2E,
+    0x20, 0x54, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70,
+    0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x69, 0x61, 0x63, 0x75, 0x6C, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74,
+    0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20, 0x6E, 0x69, 0x73,
+    0x69, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75,
+    0x73, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x74,
+    0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x64, 0x75, 0x69, 0x20, 0x75, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C,
+    0x69, 0x73, 0x69, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73,
+    0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x2E,
+    0x20, 0x49, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x6F,
+    0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x2E, 0x20, 0x41, 0x6D, 0x65, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61,
+    0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F,
+    0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E,
+    0x61, 0x72, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74,
+    0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75,
+    0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x2E, 0x20, 0x4F,
+    0x64, 0x69, 0x6F, 0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x2E, 0x0A,
+    0x0A, 0x50, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6E, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64,
+    0x69, 0x65, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x65, 0x75, 0x69, 0x73, 0x6D, 0x6F, 0x64, 0x20,
+    0x6E, 0x69, 0x73, 0x69, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x61, 0x2E, 0x20, 0x50, 0x6F, 0x72, 0x74,
+    0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x44, 0x69, 0x61, 0x6D,
+    0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E,
+    0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x69, 0x6E,
+    0x2E, 0x20, 0x42, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x6F, 0x64, 0x69, 0x6F,
+    0x20, 0x75, 0x74, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x68,
+    0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x2E,
+    0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x69, 0x64, 0x20, 0x61,
+    0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x66, 0x65, 0x75,
+    0x67, 0x69, 0x61, 0x74, 0x2E, 0x20, 0x52, 0x69, 0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20,
+    0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65,
+    0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20,
+    0x65, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x64,
+    0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x2E, 0x20, 0x53, 0x63, 0x65, 0x6C, 0x65,
+    0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x6D, 0x6F,
+    0x72, 0x62, 0x69, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x66, 0x61,
+    0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E,
+    0x64, 0x75, 0x6D, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E,
+    0x2E, 0x0A, 0x0A, 0x54, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61,
+    0x73, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x20, 0x70, 0x6F,
+    0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C, 0x65, 0x6F, 0x2E,
+    0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x70, 0x75, 0x72, 0x75, 0x73, 0x20,
+    0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x43, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x73, 0x75, 0x73, 0x63, 0x69, 0x70, 0x69, 0x74, 0x20, 0x74,
+    0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x2E, 0x20,
+    0x41, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75, 0x69,
+    0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x2E, 0x20, 0x41, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65,
+    0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x2E, 0x20,
+    0x53, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61,
+    0x65, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x69, 0x64, 0x20, 0x73, 0x65, 0x6D, 0x70, 0x65, 0x72,
+    0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x65, 0x6E, 0x64, 0x72, 0x65,
+    0x72, 0x69, 0x74, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x72, 0x75, 0x74, 0x72,
+    0x75, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71,
+    0x75, 0x65, 0x74, 0x20, 0x70, 0x6F, 0x72, 0x74, 0x74, 0x69, 0x74, 0x6F, 0x72, 0x20, 0x6C, 0x61,
+    0x63, 0x75, 0x73, 0x20, 0x6C, 0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D,
+    0x73, 0x61, 0x6E, 0x2E, 0x20, 0x44, 0x75, 0x69, 0x20, 0x75, 0x74, 0x20, 0x6F, 0x72, 0x6E, 0x61,
+    0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D,
+    0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x41, 0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20,
+    0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73,
+    0x75, 0x73, 0x2E, 0x20, 0x45, 0x72, 0x6F, 0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61,
+    0x63, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72,
+    0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62, 0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69,
+    0x63, 0x65, 0x73, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x63, 0x6F,
+    0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x76, 0x65, 0x6C,
+    0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70,
+    0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x65, 0x67, 0x65,
+    0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69,
+    0x71, 0x75, 0x65, 0x20, 0x73, 0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20,
+    0x6E, 0x65, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x2E, 0x20, 0x4E, 0x61, 0x73, 0x63, 0x65, 0x74, 0x75, 0x72, 0x20, 0x72, 0x69,
+    0x64, 0x69, 0x63, 0x75, 0x6C, 0x75, 0x73, 0x20, 0x6D, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69,
+    0x65, 0x73, 0x20, 0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x2E, 0x20,
+    0x45, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69,
+    0x74, 0x75, 0x72, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73,
+    0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x72, 0x75, 0x74, 0x72, 0x75, 0x6D, 0x2E, 0x20,
+    0x53, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65, 0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69,
+    0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61,
+    0x6D, 0x65, 0x74, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69,
+    0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x65,
+    0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73, 0x63, 0x65,
+    0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x74,
+    0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x64, 0x61, 0x70, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x4F, 0x72, 0x6E,
+    0x61, 0x72, 0x65, 0x20, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61,
+    0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x20, 0x65,
+    0x75, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x66, 0x75, 0x73, 0x63, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x75, 0x74, 0x20, 0x74, 0x6F, 0x72, 0x74,
+    0x6F, 0x72, 0x20, 0x70, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72,
+    0x72, 0x61, 0x20, 0x73, 0x75, 0x73, 0x70, 0x65, 0x6E, 0x64, 0x69, 0x73, 0x73, 0x65, 0x2E, 0x20,
+    0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20,
+    0x76, 0x65, 0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x75,
+    0x72, 0x70, 0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68,
+    0x61, 0x63, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61,
+    0x74, 0x65, 0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x75, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72,
+    0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x45, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64,
+    0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73,
+    0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69,
+    0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63,
+    0x65, 0x73, 0x2E, 0x20, 0x53, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x6E, 0x65, 0x71, 0x75,
+    0x65, 0x20, 0x73, 0x6F, 0x64, 0x61, 0x6C, 0x65, 0x73, 0x20, 0x75, 0x74, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x2E, 0x0A, 0x0A, 0x54, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20, 0x73,
+    0x65, 0x6E, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6E, 0x65, 0x74, 0x75, 0x73,
+    0x20, 0x65, 0x74, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x66, 0x61,
+    0x6D, 0x65, 0x73, 0x20, 0x61, 0x63, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x2E, 0x20, 0x4C,
+    0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x69, 0x64, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x6E, 0x69, 0x73, 0x6C, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74,
+    0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x6E, 0x6F, 0x6E,
+    0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x54, 0x75, 0x72, 0x70, 0x69,
+    0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x69, 0x6E, 0x20, 0x68, 0x61, 0x63, 0x20,
+    0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x2E, 0x20, 0x47, 0x72, 0x61, 0x76, 0x69,
+    0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20,
+    0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75,
+    0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73,
+    0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65,
+    0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69,
+    0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63,
+    0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x69, 0x6E, 0x2E, 0x20, 0x55, 0x74,
+    0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x6E,
+    0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x64, 0x69, 0x67, 0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x65, 0x6E, 0x69, 0x6D,
+    0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61,
+    0x74, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20,
+    0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x69, 0x6E, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65, 0x74, 0x75, 0x72, 0x2E, 0x20, 0x56, 0x65, 0x6C,
+    0x20, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74,
+    0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x70, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x70,
+    0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x68, 0x61, 0x62, 0x69,
+    0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74,
+    0x69, 0x71, 0x75, 0x65, 0x2E, 0x20, 0x4C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x75,
+    0x72, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x20, 0x65, 0x72, 0x6F,
+    0x73, 0x20, 0x69, 0x6E, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4C, 0x65, 0x6F,
+    0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65, 0x73, 0x75, 0x61,
+    0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x72, 0x69, 0x73, 0x75,
+    0x73, 0x2E, 0x20, 0x50, 0x72, 0x65, 0x74, 0x69, 0x75, 0x6D, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75,
+    0x74, 0x61, 0x74, 0x65, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x6E, 0x65, 0x63, 0x20,
+    0x73, 0x61, 0x67, 0x69, 0x74, 0x74, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x41, 0x6C, 0x69, 0x71, 0x75,
+    0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x20, 0x66, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61,
+    0x20, 0x75, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x69, 0x6E, 0x63, 0x69, 0x64,
+    0x75, 0x6E, 0x74, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x49, 0x70, 0x73, 0x75, 0x6D,
+    0x20, 0x61, 0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x76,
+    0x69, 0x74, 0x61, 0x65, 0x20, 0x63, 0x6F, 0x6E, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x20, 0x4D, 0x69, 0x20, 0x69,
+    0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20,
+    0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69,
+    0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x50,
+    0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61,
+    0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x75, 0x6C, 0x74,
+    0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20, 0x6D, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x68,
+    0x65, 0x6E, 0x64, 0x72, 0x65, 0x72, 0x69, 0x74, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x62,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x2E, 0x20, 0x4C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73,
+    0x65, 0x64, 0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D,
+    0x2E, 0x20, 0x45, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x65, 0x6C,
+    0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x65, 0x6C,
+    0x6C, 0x75, 0x73, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75, 0x73, 0x20, 0x70,
+    0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75,
+    0x6D, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63,
+    0x2E, 0x20, 0x41, 0x65, 0x6E, 0x65, 0x61, 0x6E, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72,
+    0x61, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x61, 0x63, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65,
+    0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x2E, 0x20,
+    0x4F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x73, 0x69,
+    0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x65, 0x73, 0x74, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65,
+    0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76,
+    0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74, 0x72, 0x61, 0x2E, 0x20, 0x45, 0x67, 0x65,
+    0x74, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E,
+    0x63, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69,
+    0x73, 0x2E, 0x20, 0x4D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C, 0x61, 0x63, 0x65, 0x72, 0x61,
+    0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73,
+    0x20, 0x6C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x4D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20,
+    0x69, 0x64, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x74, 0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x69,
+    0x64, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73,
+    0x2E, 0x20, 0x46, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x20, 0x65, 0x75, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x2E,
+    0x20, 0x4E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20,
+    0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x75, 0x73, 0x20, 0x69, 0x61, 0x63,
+    0x75, 0x6C, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x69, 0x64, 0x20, 0x76, 0x6F, 0x6C,
+    0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x4E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73,
+    0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E, 0x20,
+    0x44, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69,
+    0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x74, 0x72, 0x69, 0x73, 0x74, 0x69, 0x71, 0x75, 0x65, 0x20,
+    0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65,
+    0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64,
+    0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65, 0x74, 0x20,
+    0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x66, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x20, 0x76, 0x65,
+    0x68, 0x69, 0x63, 0x75, 0x6C, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x61, 0x20, 0x61,
+    0x72, 0x63, 0x75, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x54, 0x69, 0x6E, 0x63,
+    0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x6D, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x6E, 0x69, 0x73, 0x69, 0x20, 0x65, 0x73, 0x74, 0x20, 0x73,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69,
+    0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E, 0x61, 0x2E, 0x20, 0x4C, 0x61, 0x63, 0x75, 0x73, 0x20, 0x6C,
+    0x75, 0x63, 0x74, 0x75, 0x73, 0x20, 0x61, 0x63, 0x63, 0x75, 0x6D, 0x73, 0x61, 0x6E, 0x20, 0x74,
+    0x6F, 0x72, 0x74, 0x6F, 0x72, 0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x2E, 0x20, 0x4E,
+    0x6F, 0x6E, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x6F, 0x72, 0x63, 0x69, 0x20, 0x61,
+    0x63, 0x20, 0x61, 0x75, 0x63, 0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D,
+    0x61, 0x75, 0x72, 0x69, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20,
+    0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E,
+    0x69, 0x6D, 0x20, 0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x2E, 0x20, 0x55, 0x74, 0x20, 0x76,
+    0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x74, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20,
+    0x69, 0x6E, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x76, 0x75, 0x6C, 0x70, 0x75, 0x74, 0x61,
+    0x74, 0x65, 0x20, 0x65, 0x75, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x66, 0x65, 0x6C, 0x69, 0x73, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65,
+    0x74, 0x2E, 0x20, 0x50, 0x75, 0x6C, 0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x6D, 0x61, 0x74, 0x74,
+    0x69, 0x73, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x73, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6C, 0x69, 0x62, 0x65, 0x72, 0x6F, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74,
+    0x70, 0x61, 0x74, 0x2E, 0x20, 0x4F, 0x72, 0x63, 0x69, 0x20, 0x61, 0x63, 0x20, 0x61, 0x75, 0x63,
+    0x74, 0x6F, 0x72, 0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73,
+    0x20, 0x61, 0x75, 0x67, 0x75, 0x65, 0x2E, 0x20, 0x4E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61, 0x6E,
+    0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E,
+    0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x2E, 0x20, 0x43, 0x6F, 0x6E,
+    0x67, 0x75, 0x65, 0x20, 0x71, 0x75, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x67, 0x65, 0x73,
+    0x74, 0x61, 0x73, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x69, 0x6E, 0x20, 0x61, 0x72, 0x63, 0x75,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x69, 0x64,
+    0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x65, 0x74, 0x75, 0x73, 0x20, 0x61, 0x6C,
+    0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D,
+    0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x2E, 0x0A, 0x0A, 0x41, 0x6D, 0x65,
+    0x74, 0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x67, 0x6E,
+    0x61, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x74, 0x65, 0x6D, 0x70, 0x6F, 0x72, 0x20, 0x6F,
+    0x72, 0x63, 0x69, 0x2E, 0x20, 0x46, 0x72, 0x69, 0x6E, 0x67, 0x69, 0x6C, 0x6C, 0x61, 0x20, 0x70,
+    0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62, 0x75,
+    0x73, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x65, 0x6C,
+    0x65, 0x69, 0x66, 0x65, 0x6E, 0x64, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x2E, 0x20, 0x4E, 0x65,
+    0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61, 0x20, 0x69, 0x6E, 0x20, 0x66,
+    0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74, 0x20, 0x73, 0x6F, 0x6C, 0x6C,
+    0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x63, 0x20, 0x6F, 0x72, 0x63, 0x69,
+    0x20, 0x70, 0x68, 0x61, 0x73, 0x65, 0x6C, 0x6C, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74,
+    0x61, 0x73, 0x2E, 0x20, 0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20,
+    0x74, 0x69, 0x6E, 0x63, 0x69, 0x64, 0x75, 0x6E, 0x74, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20,
+    0x73, 0x65, 0x6D, 0x70, 0x65, 0x72, 0x20, 0x71, 0x75, 0x69, 0x73, 0x20, 0x6C, 0x65, 0x63, 0x74,
+    0x75, 0x73, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61, 0x20, 0x61, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75,
+    0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x56, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61, 0x72, 0x65, 0x74,
+    0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x74, 0x75, 0x72, 0x70, 0x69, 0x73, 0x20, 0x6E, 0x75,
+    0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74, 0x2E, 0x20, 0x4D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x6C,
+    0x65, 0x6F, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65,
+    0x20, 0x61, 0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75,
+    0x20, 0x66, 0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20,
+    0x56, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x65, 0x73, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x20, 0x65, 0x67, 0x65, 0x73, 0x74, 0x61, 0x73, 0x20, 0x64, 0x75, 0x69, 0x20, 0x69,
+    0x64, 0x20, 0x6F, 0x72, 0x6E, 0x61, 0x72, 0x65, 0x20, 0x61, 0x72, 0x63, 0x75, 0x2E, 0x20, 0x43,
+    0x6F, 0x6E, 0x73, 0x65, 0x71, 0x75, 0x61, 0x74, 0x20, 0x61, 0x63, 0x20, 0x66, 0x65, 0x6C, 0x69,
+    0x73, 0x20, 0x64, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x65, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20,
+    0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x64, 0x69, 0x61,
+    0x6D, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x2E, 0x20, 0x49, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x20, 0x61, 0x74, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C,
+    0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63,
+    0x69, 0x6E, 0x67, 0x20, 0x63, 0x6F, 0x6D, 0x6D, 0x6F, 0x64, 0x6F, 0x20, 0x65, 0x6C, 0x69, 0x74,
+    0x20, 0x61, 0x74, 0x20, 0x69, 0x6D, 0x70, 0x65, 0x72, 0x64, 0x69, 0x65, 0x74, 0x20, 0x64, 0x75,
+    0x69, 0x2E, 0x20, 0x45, 0x6E, 0x69, 0x6D, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74,
+    0x20, 0x76, 0x65, 0x6E, 0x65, 0x6E, 0x61, 0x74, 0x69, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20,
+    0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x65, 0x67, 0x65, 0x74, 0x20, 0x6E, 0x75, 0x6E, 0x63,
+    0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69, 0x76,
+    0x65, 0x72, 0x72, 0x61, 0x2E, 0x20, 0x42, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D, 0x20, 0x61,
+    0x74, 0x20, 0x76, 0x61, 0x72, 0x69, 0x75, 0x73, 0x20, 0x76, 0x65, 0x6C, 0x20, 0x70, 0x68, 0x61,
+    0x72, 0x65, 0x74, 0x72, 0x61, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20, 0x52, 0x68, 0x6F, 0x6E, 0x63,
+    0x75, 0x73, 0x20, 0x75, 0x72, 0x6E, 0x61, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x76, 0x69,
+    0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6A, 0x75, 0x73, 0x74, 0x6F, 0x2E, 0x20, 0x41, 0x75, 0x67,
+    0x75, 0x65, 0x20, 0x6E, 0x65, 0x71, 0x75, 0x65, 0x20, 0x67, 0x72, 0x61, 0x76, 0x69, 0x64, 0x61,
+    0x20, 0x69, 0x6E, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x74,
+    0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69, 0x74, 0x75, 0x64, 0x69, 0x6E, 0x2E, 0x20, 0x41,
+    0x6E, 0x74, 0x65, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x69, 0x62, 0x68, 0x20, 0x6D, 0x61, 0x75, 0x72,
+    0x69, 0x73, 0x20, 0x63, 0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x6D, 0x61, 0x74, 0x74, 0x69, 0x73,
+    0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61, 0x20, 0x69, 0x61, 0x63, 0x75,
+    0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x55, 0x6C, 0x74, 0x72, 0x69, 0x63, 0x69, 0x65, 0x73, 0x20,
+    0x6C, 0x65, 0x6F, 0x20, 0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x6D, 0x61, 0x6C, 0x65,
+    0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x76, 0x65, 0x6C, 0x2E, 0x20,
+    0x56, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x20,
+    0x65, 0x67, 0x65, 0x74, 0x20, 0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x74, 0x65,
+    0x6C, 0x6C, 0x75, 0x73, 0x20, 0x63, 0x72, 0x61, 0x73, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73,
+    0x63, 0x69, 0x6E, 0x67, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x65, 0x75, 0x2E, 0x20, 0x4E, 0x75,
+    0x6E, 0x63, 0x20, 0x73, 0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x76,
+    0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20, 0x69, 0x6E,
+    0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x73, 0x65, 0x6D, 0x2E, 0x20, 0x46, 0x61,
+    0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x64, 0x69, 0x67,
+    0x6E, 0x69, 0x73, 0x73, 0x69, 0x6D, 0x20, 0x64, 0x69, 0x61, 0x6D, 0x20, 0x71, 0x75, 0x69, 0x73,
+    0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6C, 0x6F, 0x62, 0x6F, 0x72, 0x74, 0x69, 0x73, 0x20, 0x73,
+    0x63, 0x65, 0x6C, 0x65, 0x72, 0x69, 0x73, 0x71, 0x75, 0x65, 0x20, 0x66, 0x65, 0x72, 0x6D, 0x65,
+    0x6E, 0x74, 0x75, 0x6D, 0x2E, 0x20, 0x56, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D,
+    0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x63,
+    0x75, 0x72, 0x73, 0x75, 0x73, 0x20, 0x72, 0x69, 0x73, 0x75, 0x73, 0x2E, 0x20, 0x50, 0x75, 0x6C,
+    0x76, 0x69, 0x6E, 0x61, 0x72, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20,
+    0x69, 0x6E, 0x74, 0x65, 0x67, 0x65, 0x72, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x6E, 0x65, 0x71,
+    0x75, 0x65, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x6E, 0x6F, 0x6E, 0x20, 0x62, 0x6C, 0x61,
+    0x6E, 0x64, 0x69, 0x74, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20,
+    0x6E, 0x65, 0x63, 0x20, 0x64, 0x75, 0x69, 0x20, 0x6E, 0x75, 0x6E, 0x63, 0x20, 0x6D, 0x61, 0x74,
+    0x74, 0x69, 0x73, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x2E, 0x20, 0x53, 0x65, 0x64, 0x20, 0x6C, 0x65,
+    0x63, 0x74, 0x75, 0x73, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69, 0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20,
+    0x6D, 0x61, 0x74, 0x74, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70,
+    0x65, 0x72, 0x20, 0x76, 0x65, 0x6C, 0x69, 0x74, 0x20, 0x73, 0x65, 0x64, 0x20, 0x75, 0x6C, 0x6C,
+    0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E, 0x20,
+    0x53, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74,
+    0x65, 0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20,
+    0x65, 0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75,
+    0x65, 0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x2E, 0x20, 0x45, 0x72, 0x61, 0x74,
+    0x20, 0x6E, 0x61, 0x6D, 0x20, 0x61, 0x74, 0x20, 0x6C, 0x65, 0x63, 0x74, 0x75, 0x73, 0x20, 0x75,
+    0x72, 0x6E, 0x61, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C,
+    0x69, 0x73, 0x20, 0x63, 0x6F, 0x6E, 0x76, 0x61, 0x6C, 0x6C, 0x69, 0x73, 0x2E, 0x0A, 0x0A, 0x53,
+    0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x20, 0x63, 0x6F, 0x6E, 0x73, 0x65, 0x63, 0x74, 0x65,
+    0x74, 0x75, 0x72, 0x20, 0x61, 0x64, 0x69, 0x70, 0x69, 0x73, 0x63, 0x69, 0x6E, 0x67, 0x20, 0x65,
+    0x6C, 0x69, 0x74, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65, 0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x6E, 0x74, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x2E,
+    0x20, 0x55, 0x72, 0x6E, 0x61, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x74, 0x20, 0x65, 0x6C, 0x65, 0x6D, 0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x65, 0x75, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x73, 0x65, 0x64, 0x20, 0x6F, 0x64, 0x69,
+    0x6F, 0x20, 0x6D, 0x6F, 0x72, 0x62, 0x69, 0x20, 0x71, 0x75, 0x69, 0x73, 0x2E, 0x20, 0x45, 0x75,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6F, 0x64, 0x69, 0x6F, 0x20, 0x66,
+    0x61, 0x63, 0x69, 0x6C, 0x69, 0x73, 0x69, 0x73, 0x20, 0x6D, 0x61, 0x75, 0x72, 0x69, 0x73, 0x20,
+    0x73, 0x69, 0x74, 0x20, 0x61, 0x6D, 0x65, 0x74, 0x2E, 0x20, 0x4F, 0x64, 0x69, 0x6F, 0x20, 0x75,
+    0x74, 0x20, 0x65, 0x6E, 0x69, 0x6D, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76,
+    0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73,
+    0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69,
+    0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x2E,
+    0x20, 0x53, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x65, 0x74, 0x20, 0x6C, 0x69, 0x67, 0x75, 0x6C,
+    0x61, 0x20, 0x75, 0x6C, 0x6C, 0x61, 0x6D, 0x63, 0x6F, 0x72, 0x70, 0x65, 0x72, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x70, 0x72, 0x6F, 0x69, 0x6E, 0x20, 0x6C, 0x69,
+    0x62, 0x65, 0x72, 0x6F, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x6D, 0x61,
+    0x6C, 0x65, 0x73, 0x75, 0x61, 0x64, 0x61, 0x20, 0x62, 0x69, 0x62, 0x65, 0x6E, 0x64, 0x75, 0x6D,
+    0x20, 0x61, 0x72, 0x63, 0x75, 0x20, 0x76, 0x69, 0x74, 0x61, 0x65, 0x20, 0x65, 0x6C, 0x65, 0x6D,
+    0x65, 0x6E, 0x74, 0x75, 0x6D, 0x20, 0x63, 0x75, 0x72, 0x61, 0x62, 0x69, 0x74, 0x75, 0x72, 0x20,
+    0x76, 0x69, 0x74, 0x61, 0x65, 0x2E, 0x20, 0x44, 0x6F, 0x6E, 0x65, 0x63, 0x20, 0x6D, 0x61, 0x73,
+    0x73, 0x61, 0x20, 0x73, 0x61, 0x70, 0x69, 0x65, 0x6E, 0x20, 0x66, 0x61, 0x75, 0x63, 0x69, 0x62,
+    0x75, 0x73, 0x20, 0x65, 0x74, 0x20, 0x6D, 0x6F, 0x6C, 0x65, 0x73, 0x74, 0x69, 0x65, 0x20, 0x61,
+    0x63, 0x20, 0x66, 0x65, 0x75, 0x67, 0x69, 0x61, 0x74, 0x20, 0x73, 0x65, 0x64, 0x2E, 0x20, 0x42,
+    0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61, 0x74, 0x20,
+    0x6D, 0x61, 0x65, 0x63, 0x65, 0x6E, 0x61, 0x73, 0x20, 0x76, 0x6F, 0x6C, 0x75, 0x74, 0x70, 0x61,
+    0x74, 0x20, 0x62, 0x6C, 0x61, 0x6E, 0x64, 0x69, 0x74, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61,
+    0x6D, 0x20, 0x65, 0x74, 0x69, 0x61, 0x6D, 0x20, 0x65, 0x72, 0x61, 0x74, 0x20, 0x76, 0x65, 0x6C,
+    0x69, 0x74, 0x2E, 0x20, 0x41, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x65, 0x6C, 0x65, 0x69,
+    0x66, 0x65, 0x6E, 0x64, 0x20, 0x6D, 0x69, 0x20, 0x69, 0x6E, 0x20, 0x6E, 0x75, 0x6C, 0x6C, 0x61,
+    0x20, 0x70, 0x6F, 0x73, 0x75, 0x65, 0x72, 0x65, 0x20, 0x73, 0x6F, 0x6C, 0x6C, 0x69, 0x63, 0x69,
+    0x74, 0x75, 0x64, 0x69, 0x6E, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x61, 0x6D, 0x20, 0x75, 0x6C,
+    0x74, 0x72, 0x69, 0x63, 0x65, 0x73, 0x2E, 0x20, 0x49, 0x6E, 0x20, 0x70, 0x65, 0x6C, 0x6C, 0x65,
+    0x6E, 0x74, 0x65, 0x73, 0x71, 0x75, 0x65, 0x20, 0x6D, 0x61, 0x73, 0x73, 0x61, 0x20, 0x70, 0x6C,
+    0x61, 0x63, 0x65, 0x72, 0x61, 0x74, 0x20, 0x64, 0x75, 0x69, 0x73, 0x20, 0x75, 0x6C, 0x74, 0x72,
+    0x69, 0x63, 0x69, 0x65, 0x73, 0x2E, 0x20, 0x4E, 0x75, 0x6E, 0x63, 0x20, 0x65, 0x67, 0x65, 0x74,
+    0x20, 0x6C, 0x6F, 0x72, 0x65, 0x6D, 0x20, 0x64, 0x6F, 0x6C, 0x6F, 0x72, 0x20, 0x73, 0x65, 0x64,
+    0x20, 0x76, 0x69, 0x76, 0x65, 0x72, 0x72, 0x61, 0x20, 0x69, 0x70, 0x73, 0x75, 0x6D, 0x20, 0x6E,
+    0x75, 0x6E, 0x63, 0x20, 0x61, 0x6C, 0x69, 0x71, 0x75, 0x65, 0x74, 0x2E, 0x20, 0x48, 0x61, 0x63,
+    0x20, 0x68, 0x61, 0x62, 0x69, 0x74, 0x61, 0x73, 0x73, 0x65, 0x20, 0x70, 0x6C, 0x61, 0x74, 0x65,
+    0x61, 0x20, 0x64, 0x69, 0x63, 0x74, 0x75, 0x6D, 0x73, 0x74, 0x20, 0x76, 0x65, 0x73, 0x74, 0x69,
+    0x62, 0x75, 0x6C, 0x75, 0x6D, 0x20, 0x72, 0x68, 0x6F, 0x6E, 0x63, 0x75, 0x73, 0x2E, 0x0A,
+  }
+};
+
+
+void write_packet_40gbe(__constant const void *packet, unsigned size)
+{
+  for (unsigned i = 0; 32 * i < size; i ++) {
+    struct line_40gbe line;
+    line.payload = ((__constant uint8 *) packet)[i];
+    line.flags   = 0;
+
+    if (i == 0)
+      line.flags |= FLAG_FIRST;
+
+    if (i == (size - 1) / 32U)
+      line.flags |= FLAG_LAST | ((-size % 32U) << 3);
+
+    write_channel_intel(ch_out_40gbe, line);
+  }
+}
+
+
+void write_packet_10gbe(__constant const void *packet, unsigned size)
+{
+  for (unsigned i = 0; 8 * i < size; i ++) {
+    struct line_10gbe line;
+    line.payload = ((__constant uint2 *) packet)[i];
+    line.flags   = 0;
+
+    if (i == 0)
+      line.flags |= FLAG_FIRST;
+
+    if (i == (size - 1) / 8U)
+      line.flags |= FLAG_LAST | ((-size % 8U) << 5);
+
+    write_channel_intel(ch_out_10gbe, line);
+  }
+}
+
+
+__attribute__((autorun, max_global_work_dim(0)))
+__kernel void writer_40gbe()
+{
+  for (uint2_t i = 0;; i ++)
+    write_packet_40gbe(packets[i], 8511);
+}
+
+
+__attribute__((autorun, max_global_work_dim(0)))
+__kernel void writer_10gbe()
+{
+  for (uint2_t i = 0;; i ++)
+    write_packet_10gbe(packets[i], 8511);
+}
+
+
+__attribute__((max_global_work_dim(0)))
+__kernel void dummy()
+{
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/README.txt b/applications/ta2/libraries/ta2_unb2b_bsp/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..0a985a8e82b5c1b87620a0f5a38e137caabd3519
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/README.txt
@@ -0,0 +1,46 @@
+SETUP ONCE
+- Install Quartus 18.0.219 with arria10 dependencies.
+- Make sure the directory /home/software/Altera/18.0.219 points to the Quartus Root directory. 
+  This can be done by installing Quartus in this location or make a symbolic link to it.
+- Aquire the RadioHDL library from SVN or other source.
+- Export the environment variable $RADIOHDL in your .bashrc and source the setup script as follows:
+  export RADIOHDL=/path/to/RadioHDL/trunk
+  export RADIOHDL_WORK=${RADIOHDL}
+  . ${RADIOHDL}/tools/setup_radiohdl.sh
+- Generate all IP by first navigating to $RADIOHDL/libraries/technology/ip_arria10_e1sg and then executing generate-all-ip.sh
+- Run the python script: quartus_config by executing:
+  python $RADIOHDL/tools/oneclick/base/quartus_config.py -t unb2b
+
+
+
+COMPILING OPENCL APPLICATION
+- Make sure you have defined the required environment variables for OpenCL compilation with Uniboard2.
+- With the provided makefile you can compile your application by executing:
+  make myApp.sof myApp.rbf
+  
+FLASH SOF TO FPGA
+The quickest way to program the FPGA is to use a JTAG connection and program the FPGA with the Quartus programmer, writing the .sof file.
+- To configure a jtagserver you can use the command:
+  jtagconfig -addserver <server name> <password>
+  For using dop36 to program the Uniboard2 in the lab, the command is:
+  jtagconfig --addserver dop36 BG132V051
+  
+- To program the FPGA use the following command:
+quartus_pgm -c USB-BLASTERII -m jtag -o p\;my_app.sof@1
+
+The above command will program FPGA 1 of Uniboard2 with my_app.sof.
+FPGAs 2, 3, and 4 can also be programmed by changing the FPGA ID. For example
+For FPGA 2 -> quartus_pgm -c USB-BLASTERII -m jtag -o p\;my_app.sof@2
+For FPGA 3 -> quartus_pgm -c USB-BLASTERII -m jtag -o p\;my_app.sof@3
+For FPGA 4 -> quartus_pgm -c USB-BLASTERII -m jtag -o p\;my_app.sof@4
+
+Multiple FPGAs can be targeted simultaniously for example, programming FPGAs 1,2 and 4:
+quartus_pgm -c USB-BLASTERII -m jtag -o p\;my_app.sof@1 -o p\;my_app.sof@2 -o p\;my_app.sof@4
+
+
+FLASH RBF TO FPGA
+If a JTAG connection is not available, the application can be written using the .rbf file over a 1GbE connection.
+This is achieved by running the util_unb2.py script
+
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/board_env.xml b/applications/ta2/libraries/ta2_unb2b_bsp/board_env.xml
new file mode 100755
index 0000000000000000000000000000000000000000..b76970b06313e704967727c1c3e2f697f0addbe1
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/board_env.xml
@@ -0,0 +1,17 @@
+<?xml version="1.0"?>
+<board_env version="18.0" name="ta2_unb2b_bsp">
+  <hardware dir="hardware" default="unb2b"></hardware>
+  <platform name="linux64">
+    <mmdlib>%b/linux64/lib/libaltera_a10_ref_mmd.so</mmdlib>
+    <linkflags>-L%b/linux64/lib</linkflags>
+    <linklibs>-laltera_a10_ref_mmd</linklibs>
+    <utilbindir>%b/linux64/libexec</utilbindir>
+  </platform>
+
+  <platform name="windows64">
+    <mmdlib>%b/windows64/bin/altera_a10_ref_mmd.dll</mmdlib>
+    <linkflags>/libpath:%b/windows64/lib</linkflags>
+    <linklibs>altera_a10_ref_mmd.lib</linklibs>
+    <utilbindir>%b/windows64/libexec</utilbindir>
+  </platform>
+</board_env>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/bringup/README.txt b/applications/ta2/libraries/ta2_unb2b_bsp/bringup/README.txt
new file mode 100755
index 0000000000000000000000000000000000000000..5bd0bf55aaf3f4ce87f2dc55468523a143017155
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/bringup/README.txt
@@ -0,0 +1,50 @@
+(C) 1992-2018 Intel Corporation.                            
+Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+and/or other countries. Other marks and brands may be claimed as the property  
+of others. See Trademarks on intel.com for full list of Intel trademarks or    
+the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+Your use of Intel Corporation's design tools, logic functions and other        
+software and tools, and its AMPP partner logic functions, and any output       
+files any of the foregoing (including device programming or simulation         
+files), and any associated documentation or information are expressly subject  
+to the terms and conditions of the Altera Program License Subscription         
+Agreement, Intel MegaCore Function License Agreement, or other applicable      
+license agreement, including, without limitation, that your use is for the     
+sole purpose of programming logic devices manufactured by Intel and sold by    
+Intel or its authorized distributors.  Please refer to the applicable          
+agreement for further details.                                                 
+
+
+Initializing the A10 GX Development Kit for OpenCL Use
+======================================================
+
+The A10 GX Development Kit is targetted for generic FPGA development and
+therefore is not shipped ready for use with OpenCL.  An Intel FAE should
+normally perform all bringup/initialization steps so that the A10 Dev Kit
+works out of the box, meaning a user would need to only: plug the A10 dev kit
+board into a machine's PCIe slot, run "aocl install", and then successfully
+run "aocl diagnose".
+
+In the event that an Intel FAE is unable to carry out the task, an end-user
+(at their own risk) can follow the directions found in the document
+
+"Configuring the Intel Arria 10 GX FPGA Development Kit for the Intel FPGA SDK for OpenCL" 
+
+which can be downloaded from here:
+
+https://www.altera.com/documentation/tgy1490191698959.html 
+
+to prepare the board for OpenCL use.
+
+********************************************************
+* WARNING: This process requires hardware assembly and *
+* familiarity with Quartus.  In addition there is real *
+* risk that the card be damaged during an attempt to   *
+* initialize it for OpenCL use.                        *
+********************************************************
+
+It is strongly advised that this initialization procedure is carried out by 
+an Intel FAE only. Service requests should be placed to carry out or assist
+with the A10 Dev Kit initialization for OpenCL.
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/bringup/a10_ref_initialization.tgz b/applications/ta2/libraries/ta2_unb2b_bsp/bringup/a10_ref_initialization.tgz
new file mode 100755
index 0000000000000000000000000000000000000000..adc3597c643c5fd0ca4b491989a4acd86170436f
Binary files /dev/null and b/applications/ta2/libraries/ta2_unb2b_bsp/bringup/a10_ref_initialization.tgz differ
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board.qsys b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board.qsys
new file mode 100644
index 0000000000000000000000000000000000000000..71cb5fde7f5d9a83e5f8505d3a1a31a374b099c6
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board.qsys
@@ -0,0 +1,20125 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<system name="board">
+ <component
+   name="$${FILENAME}"
+   displayName="$${FILENAME}"
+   version="1.0"
+   description=""
+   tags=""
+   categories="System"
+   tool="QsysPro" />
+ <parameter name="bonusData"><![CDATA[bonusData 
+{
+   element avs_eth_0
+   {
+      datum _sortIndex
+      {
+         value = "6";
+         type = "int";
+      }
+   }
+   element avs_eth_0.mms_ram
+   {
+      datum baseAddress
+      {
+         value = "36864";
+         type = "String";
+      }
+   }
+   element avs_eth_0.mms_reg
+   {
+      datum baseAddress
+      {
+         value = "128";
+         type = "String";
+      }
+   }
+   element avs_eth_0.mms_tse
+   {
+      datum baseAddress
+      {
+         value = "32768";
+         type = "String";
+      }
+   }
+   element board_onchip_memory
+   {
+      datum _sortIndex
+      {
+         value = "24";
+         type = "int";
+      }
+   }
+   element clk_0
+   {
+      datum _sortIndex
+      {
+         value = "0";
+         type = "int";
+      }
+   }
+   element cpu_0
+   {
+      datum _sortIndex
+      {
+         value = "1";
+         type = "int";
+      }
+   }
+   element cpu_0.debug_mem_slave
+   {
+      datum baseAddress
+      {
+         value = "14336";
+         type = "String";
+      }
+   }
+   element jtag_uart_0
+   {
+      datum _sortIndex
+      {
+         value = "3";
+         type = "int";
+      }
+   }
+   element jtag_uart_0.avalon_jtag_slave
+   {
+      datum baseAddress
+      {
+         value = "952";
+         type = "String";
+      }
+   }
+   element jtag_uart_0.irq
+   {
+      datum _tags
+      {
+         value = "";
+         type = "String";
+      }
+   }
+   element kernel_clk_export
+   {
+      datum _sortIndex
+      {
+         value = "23";
+         type = "int";
+      }
+   }
+   element kernel_clk_gen
+   {
+      datum _sortIndex
+      {
+         value = "21";
+         type = "int";
+      }
+   }
+   element kernel_clk_gen.ctrl
+   {
+      datum baseAddress
+      {
+         value = "8192";
+         type = "String";
+      }
+   }
+   element kernel_interface
+   {
+      datum _sortIndex
+      {
+         value = "22";
+         type = "int";
+      }
+   }
+   element kernel_interface.ctrl
+   {
+      datum baseAddress
+      {
+         value = "16384";
+         type = "String";
+      }
+   }
+   element onchip_memory2_0
+   {
+      datum _sortIndex
+      {
+         value = "2";
+         type = "int";
+      }
+   }
+   element onchip_memory2_0.s1
+   {
+      datum _lockedAddress
+      {
+         value = "1";
+         type = "boolean";
+      }
+      datum baseAddress
+      {
+         value = "131072";
+         type = "String";
+      }
+   }
+   element pio_pps
+   {
+      datum _sortIndex
+      {
+         value = "12";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element pio_pps.mem
+   {
+      datum baseAddress
+      {
+         value = "944";
+         type = "String";
+      }
+   }
+   element pio_system_info
+   {
+      datum _sortIndex
+      {
+         value = "11";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element pio_system_info.mem
+   {
+      datum _lockedAddress
+      {
+         value = "1";
+         type = "boolean";
+      }
+   }
+   element pio_wdi
+   {
+      datum _sortIndex
+      {
+         value = "4";
+         type = "int";
+      }
+   }
+   element pio_wdi.s1
+   {
+      datum baseAddress
+      {
+         value = "896";
+         type = "String";
+      }
+   }
+   element reg_dpmm_ctrl
+   {
+      datum _sortIndex
+      {
+         value = "16";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_dpmm_ctrl.mem
+   {
+      datum baseAddress
+      {
+         value = "936";
+         type = "String";
+      }
+   }
+   element reg_dpmm_data
+   {
+      datum _sortIndex
+      {
+         value = "17";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_dpmm_data.mem
+   {
+      datum baseAddress
+      {
+         value = "928";
+         type = "String";
+      }
+   }
+   element reg_epcs
+   {
+      datum _sortIndex
+      {
+         value = "15";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_epcs.mem
+   {
+      datum baseAddress
+      {
+         value = "832";
+         type = "String";
+      }
+   }
+   element reg_fpga_temp_sens
+   {
+      datum _sortIndex
+      {
+         value = "9";
+         type = "int";
+      }
+   }
+   element reg_fpga_temp_sens.mem
+   {
+      datum baseAddress
+      {
+         value = "800";
+         type = "String";
+      }
+   }
+   element reg_fpga_voltage_sens
+   {
+      datum _sortIndex
+      {
+         value = "20";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "1";
+         type = "boolean";
+      }
+   }
+   element reg_fpga_voltage_sens.mem
+   {
+      datum baseAddress
+      {
+         value = "192";
+         type = "String";
+      }
+   }
+   element reg_mmdp_ctrl
+   {
+      datum _sortIndex
+      {
+         value = "18";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_mmdp_ctrl.mem
+   {
+      datum baseAddress
+      {
+         value = "920";
+         type = "String";
+      }
+   }
+   element reg_mmdp_data
+   {
+      datum _sortIndex
+      {
+         value = "19";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_mmdp_data.mem
+   {
+      datum baseAddress
+      {
+         value = "912";
+         type = "String";
+      }
+   }
+   element reg_remu
+   {
+      datum _sortIndex
+      {
+         value = "14";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_remu.mem
+   {
+      datum baseAddress
+      {
+         value = "864";
+         type = "String";
+      }
+   }
+   element reg_unb_pmbus
+   {
+      datum _sortIndex
+      {
+         value = "8";
+         type = "int";
+      }
+   }
+   element reg_unb_pmbus.mem
+   {
+      datum baseAddress
+      {
+         value = "256";
+         type = "String";
+      }
+   }
+   element reg_unb_sens
+   {
+      datum _sortIndex
+      {
+         value = "7";
+         type = "int";
+      }
+   }
+   element reg_unb_sens.mem
+   {
+      datum baseAddress
+      {
+         value = "512";
+         type = "String";
+      }
+   }
+   element reg_wdi
+   {
+      datum _sortIndex
+      {
+         value = "13";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "0";
+         type = "boolean";
+      }
+   }
+   element reg_wdi.mem
+   {
+      datum _lockedAddress
+      {
+         value = "1";
+         type = "boolean";
+      }
+      datum baseAddress
+      {
+         value = "12288";
+         type = "String";
+      }
+   }
+   element rom_system_info
+   {
+      datum _sortIndex
+      {
+         value = "10";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "1";
+         type = "boolean";
+      }
+   }
+   element rom_system_info.mem
+   {
+      datum _lockedAddress
+      {
+         value = "1";
+         type = "boolean";
+      }
+      datum baseAddress
+      {
+         value = "4096";
+         type = "String";
+      }
+   }
+   element ta2_unb2b_10GbE
+   {
+      datum _sortIndex
+      {
+         value = "26";
+         type = "int";
+      }
+   }
+   element ta2_unb2b_1GbE_mc
+   {
+      datum _sortIndex
+      {
+         value = "27";
+         type = "int";
+      }
+   }
+   element ta2_unb2b_40GbE
+   {
+      datum _sortIndex
+      {
+         value = "25";
+         type = "int";
+      }
+   }
+   element timer_0
+   {
+      datum _sortIndex
+      {
+         value = "5";
+         type = "int";
+      }
+   }
+   element timer_0.s1
+   {
+      datum baseAddress
+      {
+         value = "768";
+         type = "String";
+      }
+   }
+}
+]]></parameter>
+ <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
+ <parameter name="device" value="10AX115U2F45E1SG" />
+ <parameter name="deviceFamily" value="Arria 10" />
+ <parameter name="deviceSpeedGrade" value="1" />
+ <parameter name="fabricMode" value="QSYS" />
+ <parameter name="generateLegacySim" value="false" />
+ <parameter name="generationId" value="0" />
+ <parameter name="globalResetBus" value="false" />
+ <parameter name="hdlLanguage" value="VERILOG" />
+ <parameter name="hideFromIPCatalog" value="false" />
+ <parameter name="lockedInterfaceDefinition" value="" />
+ <parameter name="maxAdditionalLatency" value="1" />
+ <parameter name="sopcBorderPoints" value="false" />
+ <parameter name="systemHash" value="0" />
+ <parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>kernel_clk</key>
+            <value>
+                <connectionPointName>kernel_clk</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>400000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>kernel_clk2x</key>
+            <value>
+                <connectionPointName>kernel_clk2x</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>800000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>kernel_register_mem</key>
+            <value>
+                <connectionPointName>kernel_register_mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='board_onchip_memory.s1' start='0x0' end='0x1000' datawidth='256' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>256</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>rom_system_info_clk</key>
+            <value>
+                <connectionPointName>rom_system_info_clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></parameter>
+ <parameter name="systemScripts" value="" />
+ <parameter name="testBenchDutName" value="" />
+ <parameter name="timeStamp" value="0" />
+ <parameter name="useTestBenchNamingPattern" value="false" />
+ <instanceScript></instanceScript>
+ <interface
+   name="avs_eth_0_clk"
+   internal="avs_eth_0.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_irq"
+   internal="avs_eth_0.irq"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_ram_address"
+   internal="avs_eth_0.ram_address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_ram_read"
+   internal="avs_eth_0.ram_read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_ram_readdata"
+   internal="avs_eth_0.ram_readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_ram_write"
+   internal="avs_eth_0.ram_write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_ram_writedata"
+   internal="avs_eth_0.ram_writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reg_address"
+   internal="avs_eth_0.reg_address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reg_read"
+   internal="avs_eth_0.reg_read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reg_readdata"
+   internal="avs_eth_0.reg_readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reg_write"
+   internal="avs_eth_0.reg_write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reg_writedata"
+   internal="avs_eth_0.reg_writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_reset"
+   internal="avs_eth_0.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_address"
+   internal="avs_eth_0.tse_address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_read"
+   internal="avs_eth_0.tse_read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_readdata"
+   internal="avs_eth_0.tse_readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_waitrequest"
+   internal="avs_eth_0.tse_waitrequest"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_write"
+   internal="avs_eth_0.tse_write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="avs_eth_0_tse_writedata"
+   internal="avs_eth_0.tse_writedata"
+   type="conduit"
+   dir="end" />
+ <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
+ <interface
+   name="kernel_clk"
+   internal="kernel_clk_export.clk"
+   type="clock"
+   dir="start" />
+ <interface
+   name="kernel_clk2x"
+   internal="kernel_clk_gen.kernel_clk2x"
+   type="clock"
+   dir="start" />
+ <interface
+   name="kernel_cra"
+   internal="kernel_interface.kernel_cra"
+   type="avalon"
+   dir="start" />
+ <interface
+   name="kernel_interface_sw_reset_in"
+   internal="kernel_interface.sw_reset_in"
+   type="reset"
+   dir="end" />
+ <interface
+   name="kernel_irq"
+   internal="kernel_interface.kernel_irq_from_kernel"
+   type="interrupt"
+   dir="start" />
+ <interface
+   name="kernel_register_mem"
+   internal="board_onchip_memory.s1"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="kernel_reset"
+   internal="kernel_clk_export.clk_reset"
+   type="reset"
+   dir="start" />
+ <interface
+   name="pio_pps_address"
+   internal="pio_pps.address"
+   type="conduit"
+   dir="end" />
+ <interface name="pio_pps_clk" internal="pio_pps.clk" type="conduit" dir="end" />
+ <interface name="pio_pps_read" internal="pio_pps.read" type="conduit" dir="end" />
+ <interface
+   name="pio_pps_readdata"
+   internal="pio_pps.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_pps_reset"
+   internal="pio_pps.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_pps_write"
+   internal="pio_pps.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_pps_writedata"
+   internal="pio_pps.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_address"
+   internal="pio_system_info.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_clk"
+   internal="pio_system_info.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_read"
+   internal="pio_system_info.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_readdata"
+   internal="pio_system_info.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_reset"
+   internal="pio_system_info.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_write"
+   internal="pio_system_info.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_system_info_writedata"
+   internal="pio_system_info.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="pio_wdi_external_connection"
+   internal="pio_wdi.external_connection"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_address"
+   internal="reg_dpmm_ctrl.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_clk"
+   internal="reg_dpmm_ctrl.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_read"
+   internal="reg_dpmm_ctrl.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_readdata"
+   internal="reg_dpmm_ctrl.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_reset"
+   internal="reg_dpmm_ctrl.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_write"
+   internal="reg_dpmm_ctrl.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_ctrl_writedata"
+   internal="reg_dpmm_ctrl.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_address"
+   internal="reg_dpmm_data.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_clk"
+   internal="reg_dpmm_data.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_read"
+   internal="reg_dpmm_data.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_readdata"
+   internal="reg_dpmm_data.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_reset"
+   internal="reg_dpmm_data.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_write"
+   internal="reg_dpmm_data.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_dpmm_data_writedata"
+   internal="reg_dpmm_data.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_epcs_address"
+   internal="reg_epcs.address"
+   type="conduit"
+   dir="end" />
+ <interface name="reg_epcs_clk" internal="reg_epcs.clk" type="conduit" dir="end" />
+ <interface
+   name="reg_epcs_read"
+   internal="reg_epcs.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_epcs_readdata"
+   internal="reg_epcs.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_epcs_reset"
+   internal="reg_epcs.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_epcs_write"
+   internal="reg_epcs.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_epcs_writedata"
+   internal="reg_epcs.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_address"
+   internal="reg_fpga_temp_sens.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_clk"
+   internal="reg_fpga_temp_sens.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_read"
+   internal="reg_fpga_temp_sens.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_readdata"
+   internal="reg_fpga_temp_sens.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_reset"
+   internal="reg_fpga_temp_sens.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_write"
+   internal="reg_fpga_temp_sens.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_temp_sens_writedata"
+   internal="reg_fpga_temp_sens.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_address"
+   internal="reg_fpga_voltage_sens.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_clk"
+   internal="reg_fpga_voltage_sens.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_read"
+   internal="reg_fpga_voltage_sens.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_readdata"
+   internal="reg_fpga_voltage_sens.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_reset"
+   internal="reg_fpga_voltage_sens.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_write"
+   internal="reg_fpga_voltage_sens.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_fpga_voltage_sens_writedata"
+   internal="reg_fpga_voltage_sens.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_address"
+   internal="reg_mmdp_ctrl.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_clk"
+   internal="reg_mmdp_ctrl.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_read"
+   internal="reg_mmdp_ctrl.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_readdata"
+   internal="reg_mmdp_ctrl.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_reset"
+   internal="reg_mmdp_ctrl.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_write"
+   internal="reg_mmdp_ctrl.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_ctrl_writedata"
+   internal="reg_mmdp_ctrl.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_address"
+   internal="reg_mmdp_data.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_clk"
+   internal="reg_mmdp_data.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_read"
+   internal="reg_mmdp_data.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_readdata"
+   internal="reg_mmdp_data.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_reset"
+   internal="reg_mmdp_data.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_write"
+   internal="reg_mmdp_data.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_mmdp_data_writedata"
+   internal="reg_mmdp_data.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_remu_address"
+   internal="reg_remu.address"
+   type="conduit"
+   dir="end" />
+ <interface name="reg_remu_clk" internal="reg_remu.clk" type="conduit" dir="end" />
+ <interface
+   name="reg_remu_read"
+   internal="reg_remu.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_remu_readdata"
+   internal="reg_remu.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_remu_reset"
+   internal="reg_remu.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_remu_write"
+   internal="reg_remu.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_remu_writedata"
+   internal="reg_remu.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_address"
+   internal="reg_unb_pmbus.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_clk"
+   internal="reg_unb_pmbus.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_read"
+   internal="reg_unb_pmbus.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_readdata"
+   internal="reg_unb_pmbus.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_reset"
+   internal="reg_unb_pmbus.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_write"
+   internal="reg_unb_pmbus.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_pmbus_writedata"
+   internal="reg_unb_pmbus.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_address"
+   internal="reg_unb_sens.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_clk"
+   internal="reg_unb_sens.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_read"
+   internal="reg_unb_sens.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_readdata"
+   internal="reg_unb_sens.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_reset"
+   internal="reg_unb_sens.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_write"
+   internal="reg_unb_sens.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_unb_sens_writedata"
+   internal="reg_unb_sens.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_wdi_address"
+   internal="reg_wdi.address"
+   type="conduit"
+   dir="end" />
+ <interface name="reg_wdi_clk" internal="reg_wdi.clk" type="conduit" dir="end" />
+ <interface name="reg_wdi_read" internal="reg_wdi.read" type="conduit" dir="end" />
+ <interface
+   name="reg_wdi_readdata"
+   internal="reg_wdi.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_wdi_reset"
+   internal="reg_wdi.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_wdi_write"
+   internal="reg_wdi.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="reg_wdi_writedata"
+   internal="reg_wdi.writedata"
+   type="conduit"
+   dir="end" />
+ <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
+ <interface
+   name="rom_system_info_address"
+   internal="rom_system_info.address"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_clk"
+   internal="rom_system_info.clk"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_read"
+   internal="rom_system_info.read"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_readdata"
+   internal="rom_system_info.readdata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_reset"
+   internal="rom_system_info.reset"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_write"
+   internal="rom_system_info.write"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rom_system_info_writedata"
+   internal="rom_system_info.writedata"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_10gbe_kernel_snk"
+   internal="ta2_unb2b_10GbE.kernel_snk"
+   type="avalon_streaming"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_10gbe_kernel_src"
+   internal="ta2_unb2b_10GbE.kernel_src"
+   type="avalon_streaming"
+   dir="start" />
+ <interface
+   name="ta2_unb2b_10gbe_refclk"
+   internal="ta2_unb2b_10GbE.refclk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_10gbe_rx_serial_data"
+   internal="ta2_unb2b_10GbE.rx_serial_data"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_10gbe_rx_status"
+   internal="ta2_unb2b_10GbE.rx_status"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_10gbe_tx_serial_data"
+   internal="ta2_unb2b_10GbE.tx_serial_data"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_kernel_snk"
+   internal="ta2_unb2b_1GbE_mc.kernel_snk"
+   type="avalon_streaming"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_kernel_src"
+   internal="ta2_unb2b_1GbE_mc.kernel_src"
+   type="avalon_streaming"
+   dir="start" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_st_clk"
+   internal="ta2_unb2b_1GbE_mc.st_clk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_st_rst"
+   internal="ta2_unb2b_1GbE_mc.st_rst"
+   type="reset"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_udp_rx_snk_in"
+   internal="ta2_unb2b_1GbE_mc.udp_rx_snk_in"
+   type="avalon_streaming"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_udp_rx_snk_in_xon"
+   internal="ta2_unb2b_1GbE_mc.udp_rx_snk_in_xon"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_udp_tx_src_out"
+   internal="ta2_unb2b_1GbE_mc.udp_tx_src_out"
+   type="avalon_streaming"
+   dir="start" />
+ <interface
+   name="ta2_unb2b_1gbe_mc_udp_tx_src_out_xon"
+   internal="ta2_unb2b_1GbE_mc.udp_tx_src_out_xon"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_40gbe_kernel_snk"
+   internal="ta2_unb2b_40GbE.kernel_snk"
+   type="avalon_streaming"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_40gbe_kernel_src"
+   internal="ta2_unb2b_40GbE.kernel_src"
+   type="avalon_streaming"
+   dir="start" />
+ <interface
+   name="ta2_unb2b_40gbe_refclk"
+   internal="ta2_unb2b_40GbE.refclk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_40gbe_rx_serial_data"
+   internal="ta2_unb2b_40GbE.rx_serial_data"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_40gbe_rx_status"
+   internal="ta2_unb2b_40GbE.rx_status"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="ta2_unb2b_40gbe_tx_serial_data"
+   internal="ta2_unb2b_40GbE.tx_serial_data"
+   type="conduit"
+   dir="end" />
+ <module
+   name="avs_eth_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>interrupt</name>
+                <type>interrupt</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>ins_interrupt_irq</name>
+                        <role>irq</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                            <value>avs_eth_0.mms_reg</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>mm</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>mm_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedReceiverOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToReceiver</key>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>irq</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_irq_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mm</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_mm_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mm_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_mm_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>mm</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mms_ram</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>mms_ram_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_ram_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_ram_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_ram_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_ram_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>mm</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>mm_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>2</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mms_reg</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>mms_reg_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_reg_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_reg_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_reg_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_reg_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>64</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>mm</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>mm_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mms_tse</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>mms_tse_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_tse_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_tse_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_tse_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_tse_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>mms_tse_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>mm</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>mm_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ram_address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_ram_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ram_read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_ram_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ram_readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_ram_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ram_write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_ram_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ram_writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_ram_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reg_address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reg_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reg_read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reg_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reg_readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reg_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reg_write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reg_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reg_writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reg_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_waitrequest</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_waitrequest_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tse_writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_tse_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs2_eth_coe</className>
+        <version>1.0</version>
+        <displayName>avs2_eth_coe</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors/>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mms_ram</key>
+                <value>
+                    <connectionPointName>mms_ram</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mms_ram' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>12</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>mms_reg</key>
+                <value>
+                    <connectionPointName>mms_reg</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mms_reg' start='0x0' end='0x40' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>6</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>mms_tse</key>
+                <value>
+                    <connectionPointName>mms_tse</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mms_tse' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>12</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_avs_eth_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_avs_eth_0</fileSetName>
+            <fileSetFixedName>board_avs_eth_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_avs_eth_0</fileSetName>
+            <fileSetFixedName>board_avs_eth_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_avs_eth_0</fileSetName>
+            <fileSetFixedName>board_avs_eth_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_avs_eth_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="board_onchip_memory"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk1</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset1</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>reset_req</name>
+                        <role>reset_req</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk1</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>s1</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>7</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>clken</name>
+                        <role>clken</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>chipselect</name>
+                        <role>chipselect</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>256</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>256</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk1</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset1</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_avalon_onchip_memory2</className>
+        <version>18.0</version>
+        <displayName>On-Chip Memory (RAM or ROM) Intel FPGA IP</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>autoInitializationFileName</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>UNIQUE_ID</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>NONE</parameterDefaultValue>
+                <parameterName>deviceFamily</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FAMILY</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>NONE</parameterDefaultValue>
+                <parameterName>deviceFeatures</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FEATURES</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>s1</key>
+                <value>
+                    <connectionPointName>s1</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x1000' datawidth='256' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>12</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>256</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_onchip_memory</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_onchip_memory</fileSetName>
+            <fileSetFixedName>board_onchip_memory</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_onchip_memory</fileSetName>
+            <fileSetFixedName>board_onchip_memory</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_onchip_memory</fileSetName>
+            <fileSetFixedName>board_onchip_memory</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_onchip_memory.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CONTENTS_INFO</key>
+            <value>""</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DUAL_PORT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE</key>
+            <value>AUTO</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INIT_CONTENTS_FILE</key>
+            <value>board_onchip_memory_board_onchip_memory</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INIT_MEM_CONTENT</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INSTANCE_ID</key>
+            <value>NONE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.RAM_BLOCK_TYPE</key>
+            <value>AUTO</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.READ_DURING_WRITE_MODE</key>
+            <value>DONT_CARE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SINGLE_CLOCK_OP</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SIZE_MULTIPLE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SIZE_VALUE</key>
+            <value>4096</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.WRITABLE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</key>
+            <value>SIM_DIR</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.GENERATE_DAT_SYM</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.GENERATE_HEX</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.HAS_BYTE_LANE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.HEX_INSTALL_DIR</key>
+            <value>QPF_DIR</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</key>
+            <value>256</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.MEM_INIT_FILENAME</key>
+            <value>board_onchip_memory_board_onchip_memory</value>
+        </entry>
+        <entry>
+            <key>postgeneration.simulation.init_file.param_name</key>
+            <value>INIT_FILE</value>
+        </entry>
+        <entry>
+            <key>postgeneration.simulation.init_file.type</key>
+            <value>MEM_INIT</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="clk_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>clk_out</name>
+                        <role>clk</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedDirectClock</key>
+                            <value>clk_in</value>
+                        </entry>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>100000000</value>
+                        </entry>
+                        <entry>
+                            <key>clockRateKnown</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_in</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>in_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>clk</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>100000000</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_in_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>reset</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_reset</name>
+                <type>reset</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n_out</name>
+                        <role>reset_n</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedDirectReset</key>
+                            <value>clk_in_reset</value>
+                        </entry>
+                        <entry>
+                            <key>associatedResetSinks</key>
+                            <value>clk_in_reset</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>clock_source</className>
+        <displayName>Clock Source</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>inputClockFrequency</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk_in</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>clk_in</key>
+                <value>
+                    <connectionPointName>clk_in</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>0</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_clk_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_clk_0</fileSetName>
+            <fileSetFixedName>board_clk_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_clk_0</fileSetName>
+            <fileSetFixedName>board_clk_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_clk_0</fileSetName>
+            <fileSetFixedName>board_clk_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_clk_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="cpu_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>custom_instruction_master</name>
+                <type>nios_custom_instruction</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>dummy_ci_port</name>
+                        <role>readra</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>CIName</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>addressWidth</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>clockCycle</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>enabled</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxAddressWidth</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>opcodeExtension</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>sharedCombinationalAndMulticycle</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>data_master</name>
+                <type>avalon</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>d_address</name>
+                        <role>address</role>
+                        <direction>Output</direction>
+                        <width>18</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Output</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_read</name>
+                        <role>read</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_readdata</name>
+                        <role>readdata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_write</name>
+                        <role>write</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>d_writedata</name>
+                        <role>writedata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_debugaccess_to_roms</name>
+                        <role>debugaccess</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>debug.providesServices</key>
+                            <value>master</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>adaptsTo</key>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>SYMBOLS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>dBSBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamReads</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamWrites</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isAsynchronous</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isReadable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isWriteable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxAddressWidth</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>debug_mem_slave</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>debug_mem_slave_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>9</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_debugaccess</name>
+                        <role>debugaccess</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>debug_mem_slave_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.hideDevice</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>qsys.ui.connect</key>
+                            <value>instruction_master,data_master</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>2048</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>debug_reset_request</name>
+                <type>reset</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>debug_reset_request</name>
+                        <role>reset</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedDirectReset</key>
+                        </entry>
+                        <entry>
+                            <key>associatedResetSinks</key>
+                            <value>none</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>instruction_master</name>
+                <type>avalon</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>i_address</name>
+                        <role>address</role>
+                        <direction>Output</direction>
+                        <width>18</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>i_read</name>
+                        <role>read</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>i_readdata</name>
+                        <role>readdata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>i_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>adaptsTo</key>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>SYMBOLS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>dBSBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamReads</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamWrites</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isAsynchronous</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isReadable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isWriteable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>maxAddressWidth</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>irq</name>
+                <type>interrupt</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>irq</name>
+                        <role>irq</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                            <value>cpu_0.data_master</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>irqMap</key>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>INDIVIDUAL_REQUESTS</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>reset_req</name>
+                        <role>reset_req</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_nios2_gen2</className>
+        <version>18.0</version>
+        <displayName>Nios II Processor</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_CLK_CLOCK_DOMAIN</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>CLOCK_DOMAIN</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_CLK_RESET_DOMAIN</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>RESET_DOMAIN</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE_SPEEDGRADE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>50000000</parameterDefaultValue>
+                <parameterName>clockFrequency</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>customInstSlavesSystemInfo</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>custom_instruction_master</systemInfoArgs>
+                <systemInfotype>CUSTOM_INSTRUCTION_SLAVES</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>customInstSlavesSystemInfo_nios_a</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>custom_instruction_master_a</systemInfoArgs>
+                <systemInfotype>CUSTOM_INSTRUCTION_SLAVES</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>customInstSlavesSystemInfo_nios_b</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>custom_instruction_master_b</systemInfoArgs>
+                <systemInfotype>CUSTOM_INSTRUCTION_SLAVES</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>customInstSlavesSystemInfo_nios_c</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>custom_instruction_master_c</systemInfoArgs>
+                <systemInfotype>CUSTOM_INSTRUCTION_SLAVES</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>dataAddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>data_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>dataMasterHighPerformanceAddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>data_master_high_performance</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>dataMasterHighPerformanceMapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>data_master_high_performance</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>dataSlaveMapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>data_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>STRATIXIV</parameterDefaultValue>
+                <parameterName>deviceFamilyName</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FAMILY</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>deviceFeaturesSystemInfo</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FEATURES</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>faAddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>flash_instruction_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>faSlaveMapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>flash_instruction_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>instAddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>instruction_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>instSlaveMapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>instruction_master</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>instructionMasterHighPerformanceAddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>instruction_master_high_performance</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>instructionMasterHighPerformanceMapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>instruction_master_high_performance</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>internalIrqMaskSystemInfo</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>irq</systemInfoArgs>
+                <systemInfotype>INTERRUPTS_USED</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster0AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_0</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster0MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_0</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster1AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_1</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster1MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_1</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster2AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_2</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster2MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_2</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster3AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_3</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledDataMaster3MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_data_master_3</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster0AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_0</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster0MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_0</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster1AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_1</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster1MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_1</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster2AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_2</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster2MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_2</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>1</parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster3AddrWidth</parameterName>
+                <parameterType>java.lang.Integer</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_3</systemInfoArgs>
+                <systemInfotype>ADDRESS_WIDTH</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>tightlyCoupledInstructionMaster3MapParam</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfoArgs>tightly_coupled_instruction_master_3</systemInfoArgs>
+                <systemInfotype>ADDRESS_MAP</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_DOMAIN</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                        <entry>
+                            <key>RESET_DOMAIN</key>
+                            <value>1</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>custom_instruction_master</key>
+                <value>
+                    <connectionPointName>custom_instruction_master</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CUSTOM_INSTRUCTION_SLAVES</key>
+                            <value></value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>data_master</key>
+                <value>
+                    <connectionPointName>data_master</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='kernel_clk_gen.ctrl' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x8000' end='0x9000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x9000' end='0xA000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>18</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>debug_mem_slave</key>
+                <value>
+                    <connectionPointName>debug_mem_slave</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='debug_mem_slave' start='0x0' end='0x800' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>11</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>instruction_master</key>
+                <value>
+                    <connectionPointName>instruction_master</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>18</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>irq</key>
+                <value>
+                    <connectionPointName>irq</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>INTERRUPTS_USED</key>
+                            <value>7</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_cpu_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_cpu_0</fileSetName>
+            <fileSetFixedName>board_cpu_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_cpu_0</fileSetName>
+            <fileSetFixedName>board_cpu_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_cpu_0</fileSetName>
+            <fileSetFixedName>board_cpu_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_cpu_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>debug.hostConnection</key>
+            <value>type jtag id 70:34|110:135</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.BIG_ENDIAN</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.BREAK_ADDR</key>
+            <value>0x00003820</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CPU_ARCH_NIOS2_R1</key>
+            <value></value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CPU_FREQ</key>
+            <value>100000000u</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CPU_ID_SIZE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CPU_ID_VALUE</key>
+            <value>0x00000000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CPU_IMPLEMENTATION</key>
+            <value>"tiny"</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DATA_ADDR_WIDTH</key>
+            <value>18</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DCACHE_LINE_SIZE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DCACHE_SIZE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.EXCEPTION_ADDR</key>
+            <value>0x00020020</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FLASH_ACCELERATOR_LINES</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FLUSHDA_SUPPORTED</key>
+            <value></value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HARDWARE_MULX_PRESENT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_DEBUG_CORE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_DEBUG_STUB</key>
+            <value></value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION</key>
+            <value></value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_JMPI_INSTRUCTION</key>
+            <value></value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.ICACHE_LINE_SIZE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.ICACHE_SIZE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INST_ADDR_WIDTH</key>
+            <value>18</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.OCI_VERSION</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.RESET_ADDR</key>
+            <value>0x00020000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.DataCacheVictimBufImpl</key>
+            <value>ram</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.HDLSimCachesCleared</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.breakOffset</key>
+            <value>32</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.breakSlave</key>
+            <value>cpu_0.debug_mem_slave</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.cpuArchitecture</key>
+            <value>Nios II</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.exceptionOffset</key>
+            <value>32</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.exceptionSlave</key>
+            <value>onchip_memory2_0.s1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.resetOffset</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.configuration.resetSlave</key>
+            <value>onchip_memory2_0.s1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.compatible</key>
+            <value>altr,nios2-1.1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.group</key>
+            <value>cpu</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.name</key>
+            <value>nios2</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.altr,exception-addr</key>
+            <value>0x00020020</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.altr,implementation</key>
+            <value>"tiny"</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.altr,reset-addr</key>
+            <value>0x00020000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.clock-frequency</key>
+            <value>100000000u</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.dcache-line-size</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.dcache-size</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.icache-line-size</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.icache-size</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.vendor</key>
+            <value>altr</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="jtag_uart_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>avalon_jtag_slave</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>av_chipselect</name>
+                        <role>chipselect</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_read_n</name>
+                        <role>read_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_write_n</name>
+                        <role>write_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>av_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>1</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>NATIVE</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>2</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+                <cmsisInfo>
+                    <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_jtag_uart&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;8&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+      &lt;registers&gt;
+        &lt;register&gt;     
+         &lt;name&gt;DATA&lt;/name&gt;  
+         &lt;displayName&gt;Data&lt;/displayName&gt;
+         &lt;description&gt;Embedded software accesses the read and write FIFOs via the data register. A read from the data register returns the first character from the FIFO (if one is available) in the DATA field. Reading also returns information about the number of characters remaining in the FIFO in the RAVAIL field. A write to the data register stores the value of the DATA field in the write FIFO. If the write FIFO is full, the character is lost.&lt;/description&gt;
+         &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;data&lt;/name&gt;
+           &lt;description&gt;The value to transfer to/from the JTAG core. When writing, the DATA field holds a character to be written to the write FIFO. When reading, the DATA field holds a character read from the read FIFO.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;8&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;rvalid&lt;/name&gt;
+           &lt;description&gt;Indicates whether the DATA field is valid. If RVALID=1, the DATA field is valid, otherwise DATA is undefined.&lt;/description&gt;
+            &lt;bitOffset&gt;0xf&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ravail&lt;/name&gt;
+           &lt;description&gt;The number of characters remaining in the read FIFO (after the current read).&lt;/description&gt;
+            &lt;bitOffset&gt;0x10&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;16&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;CONTROL&lt;/name&gt;  
+         &lt;displayName&gt;Control&lt;/displayName&gt;
+         &lt;description&gt;Embedded software controls the JTAG UART core's interrupt generation and reads status information via the control register. A read from the control register returns the status of the read and write FIFOs. Writes to the register can be used to enable/disable interrupts, or clear the AC bit.&lt;/description&gt;
+         &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;re&lt;/name&gt;
+            &lt;description&gt;Interrupt-enable bit for read interrupts.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;we&lt;/name&gt;
+            &lt;description&gt;Interrupt-enable bit for write interrupts&lt;/description&gt;
+            &lt;bitOffset&gt;0x1&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ri&lt;/name&gt;
+            &lt;description&gt;Indicates that the read interrupt is pending.&lt;/description&gt;
+            &lt;bitOffset&gt;0x8&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;wi&lt;/name&gt;
+            &lt;description&gt;Indicates that the write interrupt is pending.&lt;/description&gt;
+            &lt;bitOffset&gt;0x9&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ac&lt;/name&gt;
+            &lt;description&gt;Indicates that there has been JTAG activity since the bit was cleared. Writing 1 to AC clears it to 0.&lt;/description&gt;
+            &lt;bitOffset&gt;0xa&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;wspace&lt;/name&gt;
+            &lt;description&gt;The number of spaces available in the write FIFO&lt;/description&gt;
+            &lt;bitOffset&gt;0x10&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;16&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt;            
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                    <addressGroup></addressGroup>
+                    <cmsisVars/>
+                </cmsisInfo>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>irq</name>
+                <type>interrupt</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>av_irq</name>
+                        <role>irq</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                            <value>jtag_uart_0.avalon_jtag_slave</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedReceiverOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToReceiver</key>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>rst_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_avalon_jtag_uart</className>
+        <version>18.0</version>
+        <displayName>JTAG UART Intel FPGA IP</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>avalonSpec</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>AVALON_SPEC</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>clkFreq</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>avalon_jtag_slave</key>
+                <value>
+                    <connectionPointName>avalon_jtag_slave</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='avalon_jtag_slave' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_jtag_uart_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_jtag_uart_0</fileSetName>
+            <fileSetFixedName>board_jtag_uart_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_jtag_uart_0</fileSetName>
+            <fileSetFixedName>board_jtag_uart_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_jtag_uart_0</fileSetName>
+            <fileSetFixedName>board_jtag_uart_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_jtag_uart_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>embeddedsw.CMacro.READ_DEPTH</key>
+            <value>64</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.READ_THRESHOLD</key>
+            <value>8</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.WRITE_DEPTH</key>
+            <value>64</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.WRITE_THRESHOLD</key>
+            <value>8</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.compatible</key>
+            <value>altr,juart-1.0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.group</key>
+            <value>serial</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.name</key>
+            <value>juart</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.vendor</key>
+            <value>altr</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="kernel_clk_export"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>clk_out</name>
+                        <role>clk</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedDirectClock</key>
+                            <value>clk_in</value>
+                        </entry>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>400000000</value>
+                        </entry>
+                        <entry>
+                            <key>clockRateKnown</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_in</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>in_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>clk</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>400000000</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_in_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>reset</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk_reset</name>
+                <type>reset</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n_out</name>
+                        <role>reset_n</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedDirectReset</key>
+                            <value>clk_in_reset</value>
+                        </entry>
+                        <entry>
+                            <key>associatedResetSinks</key>
+                            <value>clk_in_reset</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>clock_source</className>
+        <displayName>Clock Source</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>inputClockFrequency</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk_in</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>400000000</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>clk_in</key>
+                <value>
+                    <connectionPointName>clk_in</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>400000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_kernel_clk</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_kernel_clk</fileSetName>
+            <fileSetFixedName>board_kernel_clk</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_clk</fileSetName>
+            <fileSetFixedName>board_kernel_clk</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_clk</fileSetName>
+            <fileSetFixedName>board_kernel_clk</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_kernel_clk.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="kernel_clk_gen"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>clk</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>50000000</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ctrl</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>ctrl_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_readdatavalid</name>
+                        <role>readdatavalid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_burstcount</name>
+                        <role>burstcount</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>12</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_debugaccess</name>
+                        <role>debugaccess</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>SYMBOLS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>4</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_clk</name>
+                <type>clock</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk_clk</name>
+                        <role>clk</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedDirectClock</key>
+                        </entry>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>400000000</value>
+                        </entry>
+                        <entry>
+                            <key>clockRateKnown</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_clk2x</name>
+                <type>clock</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk2x_clk</name>
+                        <role>clk</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedDirectClock</key>
+                        </entry>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>800000000</value>
+                        </entry>
+                        <entry>
+                            <key>clockRateKnown</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_pll_locked</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_pll_locked_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_pll_refclk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_pll_refclk_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>ui.blockdiagram.direction</key>
+                            <value>input</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>100000000</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>reset</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>acl_kernel_clk_a10</className>
+        <version>16.1</version>
+        <displayName>OpenCL A10 Kernel Clock Generator</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE_FAMILY</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FAMILY</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE_SPEEDGRADE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>ctrl</key>
+                <value>
+                    <connectionPointName>ctrl</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='ctrl' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>12</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>kernel_clk</key>
+                <value>
+                    <connectionPointName>kernel_clk</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>400000000</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>kernel_clk2x</key>
+                <value>
+                    <connectionPointName>kernel_clk2x</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>800000000</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_kernel_clk_gen</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_kernel_clk_gen</fileSetName>
+            <fileSetFixedName>board_kernel_clk_gen</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_clk_gen</fileSetName>
+            <fileSetFixedName>board_kernel_clk_gen</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_clk_gen</fileSetName>
+            <fileSetFixedName>board_kernel_clk_gen</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_kernel_clk_gen.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="kernel_interface"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>acl_bsp_memorg_host0x018</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>acl_bsp_memorg_host0x018_mode</name>
+                        <role>mode</role>
+                        <direction>Output</direction>
+                        <width>2</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>clk</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>100000000</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>ctrl</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>ctrl_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_readdatavalid</name>
+                        <role>readdatavalid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_burstcount</name>
+                        <role>burstcount</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>14</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>ctrl_debugaccess</name>
+                        <role>debugaccess</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>16384</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>SYMBOLS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_cra</name>
+                <type>avalon</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_cra_waitrequest</name>
+                        <role>waitrequest</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_readdata</name>
+                        <role>readdata</role>
+                        <direction>Input</direction>
+                        <width>64</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_readdatavalid</name>
+                        <role>readdatavalid</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_burstcount</name>
+                        <role>burstcount</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_writedata</name>
+                        <role>writedata</role>
+                        <direction>Output</direction>
+                        <width>64</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_address</name>
+                        <role>address</role>
+                        <direction>Output</direction>
+                        <width>30</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_write</name>
+                        <role>write</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_read</name>
+                        <role>read</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Output</direction>
+                        <width>8</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_cra_debugaccess</name>
+                        <role>debugaccess</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>adaptsTo</key>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>SYMBOLS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>dBSBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamReads</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>doStreamWrites</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isAsynchronous</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isReadable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isWriteable</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxAddressWidth</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_irq_from_kernel</name>
+                <type>interrupt</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_irq_from_kernel_irq</name>
+                        <role>irq</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>irqMap</key>
+                            <value>&lt;map&gt;&lt;mapping port='0' sender='sender0_irq' /&gt;&lt;/map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>INDIVIDUAL_REQUESTS</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_irq_to_host</name>
+                <type>interrupt</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_irq_to_host_irq</name>
+                        <role>irq</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedReceiverOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToReceiver</key>
+                            <value>kernel_interface.kernel_irq_from_kernel</value>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_reset</name>
+                <type>reset</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_reset_reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedDirectReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>associatedResetSinks</key>
+                            <value>reset,reset,sw_reset_in</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>qsys.ui.export_name</key>
+                            <value>reset</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>sw_reset_export</name>
+                <type>reset</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>sw_reset_export_reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedDirectReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>associatedResetSinks</key>
+                            <value>reset,sw_reset_in</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>sw_reset_in</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>sw_reset_in_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>kernel_interface</className>
+        <version>15.1</version>
+        <displayName>OpenCL Kernel Interface</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE_FAMILY</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FAMILY</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>AUTO_DEVICE_SPEEDGRADE</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>ctrl</key>
+                <value>
+                    <connectionPointName>ctrl</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='ctrl' start='0x0' end='0x4000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>14</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_kernel_interface</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_kernel_interface</fileSetName>
+            <fileSetFixedName>board_kernel_interface</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_interface</fileSetName>
+            <fileSetFixedName>board_kernel_interface</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_kernel_interface</fileSetName>
+            <fileSetFixedName>board_kernel_interface</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_kernel_interface.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="onchip_memory2_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk1</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset1</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>reset_req</name>
+                        <role>reset_req</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk1</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>s1</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>15</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>clken</name>
+                        <role>clken</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>chipselect</name>
+                        <role>chipselect</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>byteenable</name>
+                        <role>byteenable</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>131072</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk1</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset1</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>131072</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_avalon_onchip_memory2</className>
+        <version>18.0</version>
+        <displayName>On-Chip Memory (RAM or ROM) Intel FPGA IP</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue></parameterDefaultValue>
+                <parameterName>autoInitializationFileName</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>UNIQUE_ID</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>NONE</parameterDefaultValue>
+                <parameterName>deviceFamily</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FAMILY</systemInfotype>
+            </descriptor>
+            <descriptor>
+                <parameterDefaultValue>NONE</parameterDefaultValue>
+                <parameterName>deviceFeatures</parameterName>
+                <parameterType>java.lang.String</parameterType>
+                <systemInfotype>DEVICE_FEATURES</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>s1</key>
+                <value>
+                    <connectionPointName>s1</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x20000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>17</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_onchip_memory2_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_onchip_memory2_0</fileSetName>
+            <fileSetFixedName>board_onchip_memory2_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_onchip_memory2_0</fileSetName>
+            <fileSetFixedName>board_onchip_memory2_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_onchip_memory2_0</fileSetName>
+            <fileSetFixedName>board_onchip_memory2_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_onchip_memory2_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CONTENTS_INFO</key>
+            <value>""</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DUAL_PORT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE</key>
+            <value>AUTO</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INIT_CONTENTS_FILE</key>
+            <value>onchip_memory2_0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INIT_MEM_CONTENT</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.INSTANCE_ID</key>
+            <value>NONE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.RAM_BLOCK_TYPE</key>
+            <value>AUTO</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.READ_DURING_WRITE_MODE</key>
+            <value>DONT_CARE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SINGLE_CLOCK_OP</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SIZE_MULTIPLE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SIZE_VALUE</key>
+            <value>131072</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.WRITABLE</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</key>
+            <value>SIM_DIR</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.GENERATE_DAT_SYM</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.GENERATE_HEX</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.HAS_BYTE_LANE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.HEX_INSTALL_DIR</key>
+            <value>QPF_DIR</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</key>
+            <value>32</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.memoryInfo.MEM_INIT_FILENAME</key>
+            <value>onchip_memory2_0</value>
+        </entry>
+        <entry>
+            <key>postgeneration.simulation.init_file.param_name</key>
+            <value>INIT_FILE</value>
+        </entry>
+        <entry>
+            <key>postgeneration.simulation.init_file.type</key>
+            <value>MEM_INIT</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="pio_pps"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_pio_pps</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_pio_pps</fileSetName>
+            <fileSetFixedName>board_pio_pps</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_pps</fileSetName>
+            <fileSetFixedName>board_pio_pps</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_pps</fileSetName>
+            <fileSetFixedName>board_pio_pps</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_pio_pps.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="pio_system_info"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>5</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>5</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>128</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>7</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_pio_system_info</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_pio_system_info</fileSetName>
+            <fileSetFixedName>board_pio_system_info</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_system_info</fileSetName>
+            <fileSetFixedName>board_pio_system_info</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_system_info</fileSetName>
+            <fileSetFixedName>board_pio_system_info</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_pio_system_info.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="pio_wdi"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>external_connection</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>out_port</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>s1</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>2</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>write_n</name>
+                        <role>write_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>chipselect</name>
+                        <role>chipselect</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>NATIVE</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+                <cmsisInfo>
+                    <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_pio&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;32&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+      &lt;registers&gt;
+        &lt;register&gt;     
+         &lt;name&gt;DATA&lt;/name&gt;  
+         &lt;displayName&gt;Data&lt;/displayName&gt;
+         &lt;description&gt;Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).&lt;/description&gt;
+         &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;data&lt;/name&gt;
+           &lt;description&gt;Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;DIRECTION&lt;/name&gt;  
+         &lt;displayName&gt;Direction&lt;/displayName&gt;
+         &lt;description&gt;The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.&lt;/description&gt;
+         &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;direction&lt;/name&gt;
+            &lt;description&gt;Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;IRQ_MASK&lt;/name&gt;  
+         &lt;displayName&gt;Interrupt mask&lt;/displayName&gt;
+         &lt;description&gt;Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.&lt;/description&gt;
+         &lt;addressOffset&gt;0x8&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;interruptmask&lt;/name&gt;
+            &lt;description&gt;IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;EDGE_CAP&lt;/name&gt;  
+         &lt;displayName&gt;Edge capture&lt;/displayName&gt;
+         &lt;description&gt;Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.&lt;/description&gt;
+         &lt;addressOffset&gt;0xc&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;edgecapture&lt;/name&gt;
+            &lt;description&gt;Edge detection for each input port.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;
+         &lt;name&gt;SET_BIT&lt;/name&gt;  
+         &lt;displayName&gt;Outset&lt;/displayName&gt;
+         &lt;description&gt;You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.&lt;/description&gt;
+         &lt;addressOffset&gt;0x10&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;write-only&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;outset&lt;/name&gt;
+            &lt;description&gt;Specifies which bit of the output port to set.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;write-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;CLEAR_BITS&lt;/name&gt;  
+         &lt;displayName&gt;Outclear&lt;/displayName&gt;
+         &lt;description&gt;You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.&lt;/description&gt;
+         &lt;addressOffset&gt;0x14&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;write-only&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;outclear&lt;/name&gt;
+            &lt;description&gt;Specifies which output bit to clear.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;write-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt;            
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                    <addressGroup></addressGroup>
+                    <cmsisVars/>
+                </cmsisInfo>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_avalon_pio</className>
+        <version>18.0</version>
+        <displayName>PIO (Parallel I/O) Intel FPGA IP</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>clockRate</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>s1</key>
+                <value>
+                    <connectionPointName>s1</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x10' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>4</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_pio_wdi</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_pio_wdi</fileSetName>
+            <fileSetFixedName>board_pio_wdi</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_wdi</fileSetName>
+            <fileSetFixedName>board_pio_wdi</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_pio_wdi</fileSetName>
+            <fileSetFixedName>board_pio_wdi</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_pio_wdi.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.CAPTURE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DATA_WIDTH</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.DRIVEN_SIM_VALUE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.EDGE_TYPE</key>
+            <value>NONE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FREQ</key>
+            <value>100000000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_IN</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_OUT</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.HAS_TRI</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.IRQ_TYPE</key>
+            <value>NONE</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.RESET_VALUE</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.compatible</key>
+            <value>altr,pio-1.0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.group</key>
+            <value>gpio</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.name</key>
+            <value>pio</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.altr,gpio-bank-width</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.params.resetvalue</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.vendor</key>
+            <value>altr</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_dpmm_ctrl"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_dpmm_ctrl</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_ctrl</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_ctrl</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_ctrl</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_dpmm_ctrl.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_dpmm_data"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_dpmm_data</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_data</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_data</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_data</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_data</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_dpmm_data</fileSetName>
+            <fileSetFixedName>board_reg_dpmm_data</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_dpmm_data.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_epcs"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>5</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_epcs</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_epcs</fileSetName>
+            <fileSetFixedName>board_reg_epcs</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_epcs</fileSetName>
+            <fileSetFixedName>board_reg_epcs</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_epcs</fileSetName>
+            <fileSetFixedName>board_reg_epcs</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_epcs.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_fpga_temp_sens"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>5</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_fpga_temp_sens</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_fpga_temp_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_temp_sens</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_fpga_temp_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_temp_sens</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_fpga_temp_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_temp_sens</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_fpga_temp_sens.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_fpga_voltage_sens"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>64</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x40' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>6</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_fpga_voltage_sens</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_fpga_voltage_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_voltage_sens</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_fpga_voltage_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_voltage_sens</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_fpga_voltage_sens</fileSetName>
+            <fileSetFixedName>board_reg_fpga_voltage_sens</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_fpga_voltage_sens.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_mmdp_ctrl"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_mmdp_ctrl</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_ctrl</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_ctrl</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_ctrl</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_ctrl</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_mmdp_ctrl.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_mmdp_data"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_mmdp_data</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_data</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_data</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_data</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_data</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_mmdp_data</fileSetName>
+            <fileSetFixedName>board_reg_mmdp_data</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_mmdp_data.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_remu"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>32</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>5</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_remu</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_remu</fileSetName>
+            <fileSetFixedName>board_reg_remu</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_remu</fileSetName>
+            <fileSetFixedName>board_reg_remu</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_remu</fileSetName>
+            <fileSetFixedName>board_reg_remu</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_remu.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_unb_pmbus"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>6</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>6</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>256</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_unb_pmbus</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_unb_pmbus</fileSetName>
+            <fileSetFixedName>board_reg_unb_pmbus</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_unb_pmbus</fileSetName>
+            <fileSetFixedName>board_reg_unb_pmbus</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_unb_pmbus</fileSetName>
+            <fileSetFixedName>board_reg_unb_pmbus</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_unb_pmbus.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_unb_sens"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>6</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>6</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>256</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_unb_sens</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_unb_sens</fileSetName>
+            <fileSetFixedName>board_reg_unb_sens</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_unb_sens</fileSetName>
+            <fileSetFixedName>board_reg_unb_sens</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_unb_sens</fileSetName>
+            <fileSetFixedName>board_reg_unb_sens</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_unb_sens.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="reg_wdi"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>3</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_reg_wdi</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_reg_wdi</fileSetName>
+            <fileSetFixedName>board_reg_wdi</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_wdi</fileSetName>
+            <fileSetFixedName>board_reg_wdi</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_reg_wdi</fileSetName>
+            <fileSetFixedName>board_reg_wdi</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_reg_wdi.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="rom_system_info"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>address</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_address_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>clk</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_clk_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>mem</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>avs_mem_address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>10</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_write</name>
+                        <role>write</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_read</name>
+                        <role>read</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>avs_mem_readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>DYNAMIC</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>4096</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>system_reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>read</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_read_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>readdata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_readdata_export</name>
+                        <role>export</role>
+                        <direction>Input</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_reset_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>system_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>csi_system_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>system</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>write</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_write_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>writedata</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>coe_writedata_export</name>
+                        <role>export</role>
+                        <direction>Output</direction>
+                        <width>32</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>avs_common_mm</className>
+        <version>1.0</version>
+        <displayName>avs_common_mm</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>-1</parameterDefaultValue>
+                <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>system</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>mem</key>
+                <value>
+                    <connectionPointName>mem</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>12</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>32</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+            <entry>
+                <key>system</key>
+                <value>
+                    <connectionPointName>system</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_rom_system_info</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_rom_system_info</fileSetName>
+            <fileSetFixedName>board_rom_system_info</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_rom_system_info</fileSetName>
+            <fileSetFixedName>board_rom_system_info</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_rom_system_info</fileSetName>
+            <fileSetFixedName>board_rom_system_info</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_rom_system_info.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="ta2_unb2b_10GbE"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>config_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>config_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_snk</name>
+                <type>avalon_streaming</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_snk_data</name>
+                        <role>data</role>
+                        <direction>Input</direction>
+                        <width>72</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_ready</name>
+                        <role>ready</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_valid</name>
+                        <role>valid</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_src</name>
+                <type>avalon_streaming</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_src_data</name>
+                        <role>data</role>
+                        <direction>Output</direction>
+                        <width>72</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_ready</name>
+                        <role>ready</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_valid</name>
+                        <role>valid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>refclk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk_ref_r</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>rx_serial_data</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>rx_serial_r</name>
+                        <role>conduit</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>rx_status</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>rx_status</name>
+                        <role>rx_status</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tx_serial_data</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>tx_serial_r</name>
+                        <role>conduit</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>ta2_unb2b_10GbE</className>
+        <version>1.0</version>
+        <displayName>ta2_unb2b_10GbE</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors/>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos/>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_ta2_unb2b_10GbE</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_10GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_10GbE</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_10GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_10GbE</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_10GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_10GbE</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_ta2_unb2b_10GbE.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="ta2_unb2b_1GbE_mc"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>kernel_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_snk</name>
+                <type>avalon_streaming</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_snk_data</name>
+                        <role>data</role>
+                        <direction>Input</direction>
+                        <width>40</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_ready</name>
+                        <role>ready</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_valid</name>
+                        <role>valid</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_src</name>
+                <type>avalon_streaming</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_src_data</name>
+                        <role>data</role>
+                        <direction>Output</direction>
+                        <width>40</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_ready</name>
+                        <role>ready</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_valid</name>
+                        <role>valid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>st_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>st_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>st_rst</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>st_rst</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>st_clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>udp_rx_snk_in</name>
+                <type>avalon_streaming</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>udp_rx_siso_ready</name>
+                        <role>ready</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_rx_sosi_data</name>
+                        <role>data</role>
+                        <direction>Input</direction>
+                        <width>40</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_rx_sosi_empty</name>
+                        <role>empty</role>
+                        <direction>Input</direction>
+                        <width>2</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_rx_sosi_eop</name>
+                        <role>endofpacket</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_rx_sosi_sop</name>
+                        <role>startofpacket</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_rx_sosi_valid</name>
+                        <role>valid</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>st_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>st_rst</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>udp_rx_snk_in_xon</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>udp_rx_siso_xon</name>
+                        <role>xon</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>st_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>st_rst</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>udp_tx_src_out</name>
+                <type>avalon_streaming</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>udp_tx_siso_ready</name>
+                        <role>ready</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_tx_sosi_data</name>
+                        <role>data</role>
+                        <direction>Output</direction>
+                        <width>40</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_tx_sosi_empty</name>
+                        <role>empty</role>
+                        <direction>Output</direction>
+                        <width>2</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_tx_sosi_eop</name>
+                        <role>endofpacket</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_tx_sosi_sop</name>
+                        <role>startofpacket</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>udp_tx_sosi_valid</name>
+                        <role>valid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>st_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>st_rst</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>udp_tx_src_out_xon</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>udp_tx_siso_xon</name>
+                        <role>xon</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>st_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>st_rst</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>ta2_unb2b_1GbE_mc</className>
+        <version>1.0</version>
+        <displayName>ta2_unb2b_1GbE_mc</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors/>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos/>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_ta2_unb2b_1GbE_mc</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_1GbE_mc</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_1GbE_mc</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_1GbE_mc</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_1GbE_mc</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_1GbE_mc</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_1GbE_mc</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_ta2_unb2b_1GbE_mc.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="ta2_unb2b_40GbE"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>config_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>config_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>config_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>config_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>config_clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_reset</name>
+                        <role>reset</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_snk</name>
+                <type>avalon_streaming</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_snk_data</name>
+                        <role>data</role>
+                        <direction>Input</direction>
+                        <width>264</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_ready</name>
+                        <role>ready</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_snk_valid</name>
+                        <role>valid</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>kernel_src</name>
+                <type>avalon_streaming</type>
+                <isStart>true</isStart>
+                <ports>
+                    <port>
+                        <name>kernel_src_data</name>
+                        <role>data</role>
+                        <direction>Output</direction>
+                        <width>264</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_ready</name>
+                        <role>ready</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>kernel_src_valid</name>
+                        <role>valid</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>kernel_clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>kernel_reset</value>
+                        </entry>
+                        <entry>
+                            <key>beatsPerCycle</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>dataBitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>emptyWithinPacket</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>errorDescriptor</key>
+                        </entry>
+                        <entry>
+                            <key>firstSymbolInHighOrderBits</key>
+                            <value>true</value>
+                        </entry>
+                        <entry>
+                            <key>highOrderSymbolAtMSB</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maxChannel</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>packetDescription</key>
+                            <value></value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readyAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readyLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>symbolsPerBeat</key>
+                            <value>1</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>refclk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk_ref_r</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>rx_serial_data</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>rx_serial_r</name>
+                        <role>conduit</role>
+                        <direction>Input</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>rx_status</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>rx_status</name>
+                        <role>rx_status</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>tx_serial_data</name>
+                <type>conduit</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>tx_serial_r</name>
+                        <role>conduit</role>
+                        <direction>Output</direction>
+                        <width>4</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>ta2_unb2b_40GbE</className>
+        <version>1.0</version>
+        <displayName>ta2_unb2b_40GbE</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors/>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos/>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_ta2_unb2b_40GbE</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_40GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_40GbE</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_40GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_40GbE</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_ta2_unb2b_40GbE</fileSetName>
+            <fileSetFixedName>board_ta2_unb2b_40GbE</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_ta2_unb2b_40GbE.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <module
+   name="timer_0"
+   kind="altera_generic_component"
+   version="1.0"
+   enabled="1">
+  <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+    <boundary>
+        <interfaces>
+            <interface>
+                <name>clk</name>
+                <type>clock</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>clk</name>
+                        <role>clk</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>clockRate</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>externallyDriven</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>ptfSchematicName</key>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>irq</name>
+                <type>interrupt</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>irq</name>
+                        <role>irq</role>
+                        <direction>Output</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedAddressablePoint</key>
+                            <value>timer_0.s1</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedReceiverOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToReceiver</key>
+                        </entry>
+                        <entry>
+                            <key>irqScheme</key>
+                            <value>NONE</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>reset</name>
+                <type>reset</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>reset_n</name>
+                        <role>reset_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap/>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>synchronousEdges</key>
+                            <value>DEASSERT</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+            </interface>
+            <interface>
+                <name>s1</name>
+                <type>avalon</type>
+                <isStart>false</isStart>
+                <ports>
+                    <port>
+                        <name>address</name>
+                        <role>address</role>
+                        <direction>Input</direction>
+                        <width>3</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>writedata</name>
+                        <role>writedata</role>
+                        <direction>Input</direction>
+                        <width>16</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>readdata</name>
+                        <role>readdata</role>
+                        <direction>Output</direction>
+                        <width>16</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                    </port>
+                    <port>
+                        <name>chipselect</name>
+                        <role>chipselect</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                    <port>
+                        <name>write_n</name>
+                        <role>write_n</role>
+                        <direction>Input</direction>
+                        <width>1</width>
+                        <lowerBound>0</lowerBound>
+                        <vhdlType>STD_LOGIC</vhdlType>
+                    </port>
+                </ports>
+                <assignments>
+                    <assignmentValueMap>
+                        <entry>
+                            <key>embeddedsw.configuration.isFlash</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isMemoryDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isPrintableDevice</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>embeddedsw.configuration.isTimerDevice</key>
+                            <value>1</value>
+                        </entry>
+                    </assignmentValueMap>
+                </assignments>
+                <parameters>
+                    <parameterValueMap>
+                        <entry>
+                            <key>addressAlignment</key>
+                            <value>NATIVE</value>
+                        </entry>
+                        <entry>
+                            <key>addressGroup</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>addressSpan</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>addressUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>alwaysBurstMaxBurst</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>associatedClock</key>
+                            <value>clk</value>
+                        </entry>
+                        <entry>
+                            <key>associatedReset</key>
+                            <value>reset</value>
+                        </entry>
+                        <entry>
+                            <key>bitsPerSymbol</key>
+                            <value>8</value>
+                        </entry>
+                        <entry>
+                            <key>bridgedAddressOffset</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>bridgesToMaster</key>
+                        </entry>
+                        <entry>
+                            <key>burstOnBurstBoundariesOnly</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>burstcountUnits</key>
+                            <value>WORDS</value>
+                        </entry>
+                        <entry>
+                            <key>constantBurstBehavior</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>explicitAddressSpan</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>holdTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>interleaveBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isBigEndian</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isFlash</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isMemoryDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>isNonVolatileStorage</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>linewrapBursts</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingReadTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>maximumPendingWriteTransactions</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>minimumReadLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumResponseLatency</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>minimumUninterruptedRunLength</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>prSafe</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>printableDevice</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>readLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitStates</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>readWaitTime</key>
+                            <value>1</value>
+                        </entry>
+                        <entry>
+                            <key>registerIncomingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>registerOutgoingSignals</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>setupTime</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>timingUnits</key>
+                            <value>Cycles</value>
+                        </entry>
+                        <entry>
+                            <key>transparentBridge</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>waitrequestAllowance</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>wellBehavedWaitrequest</key>
+                            <value>false</value>
+                        </entry>
+                        <entry>
+                            <key>writeLatency</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitStates</key>
+                            <value>0</value>
+                        </entry>
+                        <entry>
+                            <key>writeWaitTime</key>
+                            <value>0</value>
+                        </entry>
+                    </parameterValueMap>
+                </parameters>
+                <cmsisInfo>
+                    <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_timer&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;16&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+       &lt;registers&gt;
+         &lt;register&gt;     
+          &lt;name&gt;status&lt;/name&gt;  
+          &lt;displayName&gt;Status&lt;/displayName&gt;
+          &lt;description&gt;The status register has two defined bits. TO (timeout), RUN&lt;/description&gt;
+          &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+          &lt;size&gt;16&lt;/size&gt;
+          &lt;access&gt;read-write&lt;/access&gt;
+          &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+          &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+          &lt;fields&gt;
+            &lt;field&gt;&lt;name&gt;TO&lt;/name&gt;
+            &lt;description&gt;The TO (timeout) bit is set to 1 when the internal counter reaches zero. Once set by a timeout event, the TO bit stays set until explicitly cleared by a master peripheral. Write zero to the status register to clear the TO bit.&lt;/description&gt;
+             &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+             &lt;access&gt;read-only&lt;/access&gt;
+             &lt;readAction&gt;clear&lt;/readAction&gt;
+            &lt;/field&gt;
+            &lt;field&gt;&lt;name&gt;RUN&lt;/name&gt;
+            &lt;description&gt;The RUN bit reads as 1 when the internal counter is running; otherwise this bit reads as 0. The RUN bit is not changed by
+ a write operation to the status register.&lt;/description&gt;
+             &lt;bitOffset&gt;1&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+             &lt;access&gt;read-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+             &lt;name&gt;Reserved&lt;/name&gt;
+             &lt;description&gt;Reserved&lt;/description&gt;
+             &lt;bitOffset&gt;2&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;14&lt;/bitWidth&gt;
+             &lt;access&gt;read-write&lt;/access&gt;
+             &lt;parameters&gt;
+                 &lt;parameter&gt;
+                 &lt;name&gt;Reserved&lt;/name&gt;
+                 &lt;value&gt;true&lt;/value&gt;
+                 &lt;/parameter&gt;
+             &lt;/parameters&gt;
+            &lt;/field&gt;
+          &lt;/fields&gt;
+        &lt;/register&gt; 
+        &lt;register&gt;
+            &lt;name&gt;control&lt;/name&gt;
+            &lt;description&gt;The control register has four defined bits. ITO (Timeout Interrupt), CONT (continue), START, STOP&lt;/description&gt;
+            &lt;addressOffset&gt;0x1&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;reset&gt;
+                &lt;value&gt;0x0&lt;/value&gt;
+            &lt;/reset&gt;
+            &lt;field&gt;
+                &lt;name&gt;ITO&lt;/name&gt;
+                &lt;description&gt;If the ITO bit is 1, the interval timer core generates an IRQ when the status register's TO bit is 1. When the ITO bit is 0, the timer does not generate IRQs.&lt;/description&gt;
+                &lt;bitOffset&gt;0&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;CONT&lt;/name&gt;
+                &lt;description&gt;The CONT (continuous) bit determines how the internal counter behaves when it reaches zero. If the CONT bit is 1, the counter runs continuously until it is stopped by the STOP bit. If CONT is 0, the counter stops after it reaches zero. When the counter reaches zero, it reloads with the value stored in the period registers, regardless of the CONT bit.&lt;/description&gt;
+                &lt;bitOffset&gt;1&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;START&lt;/name&gt;
+                &lt;description&gt;Writing a 1 to the START bit starts the internal counter running (counting down). The START bit is an event bit that enables the counter when a write operation is performed. If the timer is stopped, writing a 1 to the START bit causes the timer to restart counting from the number currently stored in its counter. If the timer is already running, writing a 1 to START has no effect. Writing 0 to the START bit has no effect.&lt;/description&gt;
+                &lt;bitOffset&gt;2&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;write-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;STOP&lt;/name&gt;
+                &lt;description&gt;Writing a 1 to the STOP bit stops the internal counter. The STOP bit is an event bit that causes the counter to stop when a write operation is performed. If the timer is already stopped, writing a 1 to STOP has no effect. Writing a 0 to the stop bit has no effect. If the timer hardware is configured with Start/Stop control bits off, writing the STOP bit has no effect.&lt;/description&gt;
+                &lt;bitOffset&gt;3&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;write-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;Reserved&lt;/name&gt;
+                &lt;description&gt;Reserved&lt;/description&gt;
+                &lt;bitOffset&gt;4&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;12&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+                &lt;parameters&gt;
+                    &lt;parameter&gt;
+                    &lt;name&gt;Reserved&lt;/name&gt;
+                    &lt;value&gt;true&lt;/value&gt;
+                    &lt;/parameter&gt;
+                &lt;/parameters&gt;
+            &lt;/field&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_name_0}&lt;/name&gt;
+            &lt;description&gt;The period_n registers together store the timeout period value when a write operation to one of the period_n register or the internal counter reaches 0. The timer's actual period is one cycle greater than the value stored in the period_n registers because the counter assumes the value zero for one clock cycle. Writing to one of the period_n registers stops the internal counter, except when the hardware is configured with Start/Stop control bits off. If Start/Stop control bits is off, writing either register does not stop the counter. When the hardware is configured with Writeable period disabled, writing to one of the period_n registers causes the counter to reset to the fixed Timeout Period specified at system generation time.&lt;/description&gt;
+            &lt;addressOffset&gt;0x2&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_name_0_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_name_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x3&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_name_1_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_snap_0}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_snap_0_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_snap_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x5&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_snap_1_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_0}&lt;/name&gt;
+            &lt;description&gt;A master peripheral may request a coherent snapshot of the current internal counter by performing a write operation (write-data ignored) to one of the snap_n registers. When a write occurs, the value of the counter is copied to snap_n registers. The snapshot occurs whether or not the counter is running. Requesting a snapshot does not change the internal counter's operation.&lt;/description&gt;
+            &lt;addressOffset&gt;0x6&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x7&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_2}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x8&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_3}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x9&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                    <addressGroup></addressGroup>
+                    <cmsisVars>
+                        <entry>
+                            <key>period_name_1_reset_value</key>
+                            <value>0x1</value>
+                        </entry>
+                        <entry>
+                            <key>snap_0</key>
+                            <value>Reserved</value>
+                        </entry>
+                        <entry>
+                            <key>period_name_0_reset_value</key>
+                            <value>0x869f</value>
+                        </entry>
+                        <entry>
+                            <key>snap_2</key>
+                            <value>Reserved</value>
+                        </entry>
+                        <entry>
+                            <key>snap_1</key>
+                            <value>Reserved</value>
+                        </entry>
+                        <entry>
+                            <key>snap_3</key>
+                            <value>Reserved</value>
+                        </entry>
+                        <entry>
+                            <key>period_name_0</key>
+                            <value>periodl</value>
+                        </entry>
+                        <entry>
+                            <key>period_name_1</key>
+                            <value>periodh</value>
+                        </entry>
+                        <entry>
+                            <key>period_snap_1</key>
+                            <value>snaph</value>
+                        </entry>
+                        <entry>
+                            <key>period_snap_1_reset_value</key>
+                            <value>0x0</value>
+                        </entry>
+                        <entry>
+                            <key>period_snap_0_reset_value</key>
+                            <value>0x0</value>
+                        </entry>
+                        <entry>
+                            <key>period_snap_0</key>
+                            <value>snapl</value>
+                        </entry>
+                    </cmsisVars>
+                </cmsisInfo>
+            </interface>
+        </interfaces>
+    </boundary>
+    <originalModuleInfo>
+        <className>altera_avalon_timer</className>
+        <version>18.0</version>
+        <displayName>Interval Timer Intel FPGA IP</displayName>
+    </originalModuleInfo>
+    <systemInfoParameterDescriptors>
+        <descriptors>
+            <descriptor>
+                <parameterDefaultValue>0</parameterDefaultValue>
+                <parameterName>systemFrequency</parameterName>
+                <parameterType>java.lang.Long</parameterType>
+                <systemInfoArgs>clk</systemInfoArgs>
+                <systemInfotype>CLOCK_RATE</systemInfotype>
+            </descriptor>
+        </descriptors>
+    </systemInfoParameterDescriptors>
+    <systemInfos>
+        <connPtSystemInfos>
+            <entry>
+                <key>clk</key>
+                <value>
+                    <connectionPointName>clk</connectionPointName>
+                    <suppliedSystemInfos/>
+                    <consumedSystemInfos>
+                        <entry>
+                            <key>CLOCK_RATE</key>
+                            <value>100000000</value>
+                        </entry>
+                    </consumedSystemInfos>
+                </value>
+            </entry>
+            <entry>
+                <key>s1</key>
+                <value>
+                    <connectionPointName>s1</connectionPointName>
+                    <suppliedSystemInfos>
+                        <entry>
+                            <key>ADDRESS_MAP</key>
+                            <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x20' datawidth='16' /&gt;&lt;/address-map&gt;</value>
+                        </entry>
+                        <entry>
+                            <key>ADDRESS_WIDTH</key>
+                            <value>5</value>
+                        </entry>
+                        <entry>
+                            <key>MAX_SLAVE_DATA_WIDTH</key>
+                            <value>16</value>
+                        </entry>
+                    </suppliedSystemInfos>
+                    <consumedSystemInfos/>
+                </value>
+            </entry>
+        </connPtSystemInfos>
+    </systemInfos>
+</componentDefinition>]]></parameter>
+  <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+    <hdlLibraryName>board_timer_0</hdlLibraryName>
+    <fileSets>
+        <fileSet>
+            <fileSetName>board_timer_0</fileSetName>
+            <fileSetFixedName>board_timer_0</fileSetFixedName>
+            <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_timer_0</fileSetName>
+            <fileSetFixedName>board_timer_0</fileSetFixedName>
+            <fileSetKind>SIM_VERILOG</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+        <fileSet>
+            <fileSetName>board_timer_0</fileSetName>
+            <fileSetFixedName>board_timer_0</fileSetFixedName>
+            <fileSetKind>SIM_VHDL</fileSetKind>
+            <fileSetFiles/>
+        </fileSet>
+    </fileSets>
+</generationInfoDefinition>]]></parameter>
+  <parameter name="hlsFile" value="" />
+  <parameter name="logicalView">ip/board/board_timer_0.ip</parameter>
+  <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+    <assignmentValueMap>
+        <entry>
+            <key>embeddedsw.CMacro.ALWAYS_RUN</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.COUNTER_SIZE</key>
+            <value>32</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FIXED_PERIOD</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.FREQ</key>
+            <value>100000000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.LOAD_VALUE</key>
+            <value>99999</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.MULT</key>
+            <value>0.001</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.PERIOD</key>
+            <value>1</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.PERIOD_UNITS</key>
+            <value>ms</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.RESET_OUTPUT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.SNAPSHOT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.TICKS_PER_SEC</key>
+            <value>1000</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT</key>
+            <value>0</value>
+        </entry>
+        <entry>
+            <key>embeddedsw.dts.vendor</key>
+            <value>altr</value>
+        </entry>
+    </assignmentValueMap>
+</assignmentDefinition>]]></parameter>
+  <parameter name="svInterfaceDefinition" value="" />
+ </module>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="jtag_uart_0.avalon_jtag_slave">
+  <parameter name="baseAddress" value="0x03b8" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="kernel_clk_gen.ctrl">
+  <parameter name="baseAddress" value="0x2000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="kernel_interface.ctrl">
+  <parameter name="baseAddress" value="0x4000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="cpu_0.debug_mem_slave">
+  <parameter name="baseAddress" value="0x3800" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_unb_sens.mem">
+  <parameter name="baseAddress" value="0x0200" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="rom_system_info.mem">
+  <parameter name="baseAddress" value="0x1000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="pio_system_info.mem">
+  <parameter name="baseAddress" value="0x0000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="pio_pps.mem">
+  <parameter name="baseAddress" value="0x03b0" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_wdi.mem">
+  <parameter name="baseAddress" value="0x3000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_remu.mem">
+  <parameter name="baseAddress" value="0x0360" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_epcs.mem">
+  <parameter name="baseAddress" value="0x0340" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_dpmm_ctrl.mem">
+  <parameter name="baseAddress" value="0x03a8" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_dpmm_data.mem">
+  <parameter name="baseAddress" value="0x03a0" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_mmdp_ctrl.mem">
+  <parameter name="baseAddress" value="0x0398" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_mmdp_data.mem">
+  <parameter name="baseAddress" value="0x0390" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_fpga_temp_sens.mem">
+  <parameter name="baseAddress" value="0x0320" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_unb_pmbus.mem">
+  <parameter name="baseAddress" value="0x0100" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="reg_fpga_voltage_sens.mem">
+  <parameter name="baseAddress" value="0x00c0" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="avs_eth_0.mms_ram">
+  <parameter name="baseAddress" value="0x9000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="avs_eth_0.mms_reg">
+  <parameter name="baseAddress" value="0x0080" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="avs_eth_0.mms_tse">
+  <parameter name="baseAddress" value="0x8000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="onchip_memory2_0.s1">
+  <parameter name="baseAddress" value="0x00020000" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="pio_wdi.s1">
+  <parameter name="baseAddress" value="0x0380" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.data_master"
+   end="timer_0.s1">
+  <parameter name="baseAddress" value="0x0300" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.instruction_master"
+   end="cpu_0.debug_mem_slave">
+  <parameter name="baseAddress" value="0x3800" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="18.0"
+   start="cpu_0.instruction_master"
+   end="onchip_memory2_0.s1">
+  <parameter name="baseAddress" value="0x00020000" />
+ </connection>
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="jtag_uart_0.clk" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="pio_wdi.clk" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="cpu_0.clk" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="timer_0.clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="kernel_interface.clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="kernel_clk_gen.clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="onchip_memory2_0.clk1" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="ta2_unb2b_40GbE.config_clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="kernel_clk_gen.kernel_pll_refclk" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="avs_eth_0.mm" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_unb_sens.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="rom_system_info.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="pio_system_info.system" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="pio_pps.system" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="reg_wdi.system" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="reg_remu.system" />
+ <connection kind="clock" version="18.0" start="clk_0.clk" end="reg_epcs.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_dpmm_ctrl.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_mmdp_data.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_dpmm_data.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_mmdp_ctrl.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_fpga_temp_sens.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_unb_pmbus.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="clk_0.clk"
+   end="reg_fpga_voltage_sens.system" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="board_onchip_memory.clk1" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="kernel_clk_export.clk_in" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="kernel_interface.kernel_clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="ta2_unb2b_40GbE.kernel_clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="ta2_unb2b_10GbE.kernel_clk" />
+ <connection
+   kind="clock"
+   version="18.0"
+   start="kernel_clk_gen.kernel_clk"
+   end="ta2_unb2b_1GbE_mc.kernel_clk" />
+ <connection
+   kind="interrupt"
+   version="18.0"
+   start="cpu_0.irq"
+   end="avs_eth_0.interrupt" />
+ <connection
+   kind="interrupt"
+   version="18.0"
+   start="cpu_0.irq"
+   end="jtag_uart_0.irq">
+  <parameter name="irqNumber" value="1" />
+ </connection>
+ <connection kind="interrupt" version="18.0" start="cpu_0.irq" end="timer_0.irq">
+  <parameter name="irqNumber" value="2" />
+ </connection>
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="ta2_unb2b_40GbE.config_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="ta2_unb2b_10GbE.config_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="avs_eth_0.mm_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="jtag_uart_0.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="pio_wdi.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="timer_0.reset" />
+ <connection kind="reset" version="18.0" start="clk_0.clk_reset" end="cpu_0.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="kernel_interface.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="kernel_clk_gen.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="onchip_memory2_0.reset1" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_unb_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="rom_system_info.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="pio_system_info.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="pio_pps.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_wdi.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_remu.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_epcs.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_dpmm_ctrl.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_mmdp_data.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_mmdp_ctrl.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_dpmm_data.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_fpga_temp_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_unb_pmbus.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="clk_0.clk_reset"
+   end="reg_fpga_voltage_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="ta2_unb2b_40GbE.config_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="ta2_unb2b_10GbE.config_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="avs_eth_0.mm_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="jtag_uart_0.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="pio_wdi.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="timer_0.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="cpu_0.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="kernel_clk_gen.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="kernel_interface.reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="onchip_memory2_0.reset1" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_unb_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="rom_system_info.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="pio_system_info.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="pio_pps.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_wdi.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_remu.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_epcs.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_dpmm_ctrl.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_mmdp_data.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_dpmm_data.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_mmdp_ctrl.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_fpga_temp_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_unb_pmbus.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="cpu_0.debug_reset_request"
+   end="reg_fpga_voltage_sens.system_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="kernel_interface.kernel_reset"
+   end="kernel_clk_export.clk_in_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="kernel_interface.kernel_reset"
+   end="ta2_unb2b_40GbE.kernel_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="kernel_interface.kernel_reset"
+   end="ta2_unb2b_10GbE.kernel_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="kernel_interface.kernel_reset"
+   end="ta2_unb2b_1GbE_mc.kernel_reset" />
+ <connection
+   kind="reset"
+   version="18.0"
+   start="kernel_interface.kernel_reset"
+   end="board_onchip_memory.reset1" />
+ <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
+ <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
+ <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
+</system>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board_spec.xml b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board_spec.xml
new file mode 100755
index 0000000000000000000000000000000000000000..96c20a401ecb366259b90d5e56255d25cd2afae0
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/board_spec.xml
@@ -0,0 +1,45 @@
+<?xml version="1.0"?>
+<board version="18.0" name="unb2b">
+
+  <compile name="flat" project="top" revision="flat" qsys_file="none" generic_kernel="1">
+    <generate cmd="quartus_sh -t scripts/pre_flow_pr.tcl flat"/>
+    <synthesize cmd="quartus_sh --flow compile top -c flat"/>
+    <auto_migrate platform_type="a10_ref" >
+      <include fixes=""/>
+      <exclude fixes="pre_skipbak,post_skipbak"/>
+    </auto_migrate>
+  </compile>
+
+  <device device_model="10ax115s2f45i2sges_dm.xml">
+    <used_resources>
+      <alms num="33433"/> <!-- (Total ALMs) - (ALMs available to kernel_system_inst) -->
+      <ffs num="133600"/>
+      <dsps num="0"/>
+      <rams num="179"/>
+    </used_resources>
+  </device>
+
+  <!-- Registers, 32 bit @ 125MHz -->
+  <global_mem name="REG" max_bandwidth="4000" interleaved_bytes="32">
+    <interface name="board" port="kernel_register_mem" type="slave" width="256" maxburst="1" address="0x000000000" size="0x000001000" latency_type="fixed"/>
+  </global_mem>
+
+  <channels>
+    <interface name="board" port="kernel_stream_src_1GbE" type="streamsource" width="40" chan_id="kernel_input_1GbE"/>
+    <interface name="board" port="kernel_stream_snk_1GbE" type="streamsink" width="40" chan_id="kernel_output_1GbE"/>
+    <interface name="board" port="kernel_stream_src_10GbE" type="streamsource" width="72" chan_id="kernel_input_10GbE"/>
+    <interface name="board" port="kernel_stream_snk_10GbE" type="streamsink" width="72" chan_id="kernel_output_10GbE"/>
+    <interface name="board" port="kernel_stream_src_40GbE" type="streamsource" width="264" chan_id="kernel_input_40GbE"/>
+    <interface name="board" port="kernel_stream_snk_40GbE" type="streamsink" width="264" chan_id="kernel_output_40GbE"/>
+  </channels>
+
+  <host>
+    <kernel_config start="0x00000000" size="0x0100000"/>
+  </host>
+
+  <interfaces>
+    <interface name="board" port="kernel_cra" type="master" width="64" misc="0"/>
+    <interface name="board" port="kernel_irq" type="irq" width="1"/>
+    <kernel_clk_reset clk="board.kernel_clk" clk2x="board.kernel_clk2x" reset="board.kernel_reset"/>
+  </interfaces>
+</board>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..98fa9c715a993d3a5545198684871c81d1f713ac
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl
@@ -0,0 +1,49 @@
+post_message "Running ctrl_unb2_board script"
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
+
+#============================================================
+# Files and basic settings
+#============================================================
+# All used HDL library *_lib.qip files in order with top level last
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ppsh/ppsh_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/i2c/i2c_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_tse_sgmii_lvds/ip_arria10_e1sg_tse_sgmii_lvds_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_tse/tech_tse_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/eth/eth_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_asmi_parallel/ip_arria10_e1sg_asmi_parallel_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_remote_update/ip_arria10_e1sg_remote_update_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_flash/tech_flash_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/remu/remu_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_clkbuf_global/ip_arria10_e1sg_clkbuf_global_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_clkbuf/tech_clkbuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk200/ip_arria10_e1sg_fractional_pll_clk200_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk125/ip_arria10_e1sg_fractional_pll_clk125_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fractional_pll/tech_fractional_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/epcs/epcs_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_temp_sense/ip_arria10_e1sg_temp_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fpga_temp_sens/tech_fpga_temp_sens_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_voltage_sense/ip_arria10_e1sg_voltage_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fpga_voltage_sens/tech_fpga_voltage_sens_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/fpga_sense/fpga_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/unb2b_board/unb2b_board_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/device.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/device.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..2f5349edc4196528f7777177ed1a97bf3c5f6b88
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/device.tcl
@@ -0,0 +1,65 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+# This file contains .qsf settings that are unique to this particular device
+
+#############################################################
+# Device
+#############################################################
+set_global_assignment -name FAMILY "Arria 10"
+set_global_assignment -name DEVICE 10AX115U2F45E1SG
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "1.8 V"
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+#set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
+#set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
+set_global_assignment -name DEVICE_FILTER_SPEED_GRADE ANY
+#set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 4
+set_global_assignment -name ENABLE_OCT_DONE OFF
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
+set_global_assignment -name ENABLE_NCE_PIN OFF
+set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
+set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X4"
+#set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X1"
+set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE EPCQL1024
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+set_global_assignment -name STRATIXIII_UPDATE_MODE REMOTE
+
+set_global_assignment -name CRC_ERROR_OPEN_DRAIN ON
+#set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
+#set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
+#set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
+#set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
+
+set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 1.8V
+set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION ON
+#set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_12_5MHZ
+set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_25MHZ
+#set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
+
+set_global_assignment -name USER_START_UP_CLOCK OFF
+
+set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1932
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/flat.qsf b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/flat.qsf
new file mode 100755
index 0000000000000000000000000000000000000000..6910c5edd952bac0272d2c950afdeb3d874f76a2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/flat.qsf
@@ -0,0 +1,465 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+
+# device.tcl contains settings unique to each device type/board variant (most importantly, the device string for the particular device type)
+source device.tcl
+source ctrl_unb2_board.tcl
+source ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
+source ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
+source ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
+#============================================================
+# Files and basic settings
+#============================================================
+
+set_global_assignment -name SDC_FILE top.sdc
+
+# opencl_bsp_ip.qsf contains all necessary Verilog and IP files including 
+# top.v, ip/freeze_wrapper.v and kernel_mem IP that are used for all revision compiles.
+# Flat and base revision compiles generate board.qsys and append the resulting .ip files 
+# to opencl_bsp_ip.qsf, while top revision compiles imports a post-fit netlist of board.qsys 
+# from the base revision compile and does not require the sources.
+source opencl_bsp_ip.qsf
+set_global_assignment -name TOP_LEVEL_ENTITY top
+
+# Post IP SDC constraints
+set_global_assignment -name SDC_FILE top_post.sdc
+
+# Execute the pre/post CAD flow
+set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_cdb:scripts/post_flow_pr.tcl"
+
+# Enable QHD 
+set_global_assignment -name QHD_MODE ON
+
+#============================================================
+# Revision Specific Settings
+#============================================================
+set_global_assignment -name AUTO_GLOBAL_CLOCK OFF
+set_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS OFF
+
+# Clocks
+#set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to board_inst|config_clk~pad
+#set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to board_inst|clk_clk~pad
+#set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to board_inst|pll_ref_clk~pad
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to board_inst|kernel_clk_gen|board_kernel_clk_gen|kernel_pll|altera_iopll_i|twentynm_pll|*
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to *ALTERA_INSERTED_OSCILLATOR_FOR_IOPLL*
+
+#set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to u_ctrl_unb2b_board|\gen_eth:u_eth|u_tech_tse|\gen_ip_arria10_e1sg:u0|\u_LVDS_tse:u_tse|eth_tse_0|i_lvdsio_rx_0|core|arch_inst|internal_pll.pll_inst|outclock[2] 
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to u_ctrl_unb2b_board|\gen_mm_clk_hardware:u_unb2_board_clk125_pll|\gen_fractional_pll:u_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|* 
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to u_ctrl_unb2b_board|\gen_pll:u_unb2_board_clk200_pll|\gen_st_fractional_pll:u_st_fractional_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|* 
+
+
+# Resets
+#set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to freeze_wrapper_inst|kernel_system_clock_reset_reset_reset_n
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to freeze_wrapper_inst|board_kernel_reset_reset_n
+
+# This setting indicates that the global signal will be frozen high during PR by user logic (implemented in the freeze_wrapper)
+#set_instance_assignment -name PR_ALLOW_GLOBAL_LIMS ON -to freeze_wrapper_inst|kernel_system_clock_reset_reset_reset_n
+#set_instance_assignment -name PR_ALLOW_GLOBAL_LIMS ON -to freeze_wrapper_inst|board_kernel_reset_reset_n
+
+
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to "*|reset_controller_sw|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out"
+
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to "*sdi_ii_ed_loopback*|fifo_reset_sync_out"
+
+#============================================================
+# Synthesis and Fitter Fine-Tuning
+#============================================================
+set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
+set_global_assignment -name FIT_ONLY_ONE_ATTEMPT ON
+set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
+set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
+set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
+set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
+set_global_assignment -name ALLOW_SHIFT_REGISTER_MERGING_ACROSS_HIERARCHIES OFF
+set_global_assignment -name DISABLE_REGISTER_MERGING_ACROSS_HIERARCHIES ON
+set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Pro Edition"
+#set_instance_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF -to board_inst|*pipe_stage_*
+set_global_assignment -name ENABLE_PR_PINS OFF
+set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF
+
+#============================================================
+# End of original settings
+#============================================================
+
+#============================================================
+# Board settings
+#============================================================
+
+#############################################################
+# Misc
+#############################################################
+# Programming file generation
+set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF
+
+# Power model
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+
+# I/O Configuration
+set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
+
+#############################################################
+# Pinouts
+#############################################################
+set_location_assignment PIN_K15 -to CLK
+set_location_assignment PIN_J15 -to "CLK(n)"
+set_location_assignment PIN_N12 -to ETH_CLK
+set_location_assignment PIN_K14 -to PPS
+set_location_assignment PIN_J14 -to "PPS(n)"
+
+# enable 100 ohm termination:
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to CLK
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to PPS
+
+#set_location_assignment PIN_AT33 -to CFG_DATA[0]
+#set_location_assignment PIN_AT32 -to CFG_DATA[1]
+#set_location_assignment PIN_BB33 -to CFG_DATA[2]
+#set_location_assignment PIN_BA33 -to CFG_DATA[3]
+
+
+
+
+# IO Standard Assignments from Gijs (excluding memory)
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ETH_CLK
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to ETH_CLK
+set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[0]
+set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[0](n)"
+set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGIN[1]
+set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGIN[1](n)"
+set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[0]
+set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[0](n)"
+set_instance_assignment -name IO_STANDARD LVDS -to ETH_SGOUT[1]
+set_instance_assignment -name IO_STANDARD LVDS -to "ETH_SGOUT[1](n)"
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[0]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[1]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[2]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[3]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[4]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[5]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[6]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to ID[7]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to INTA
+set_instance_assignment -name IO_STANDARD "1.8 V" -to INTB
+set_instance_assignment -name IO_STANDARD "1.8 V" -to SENS_SC
+set_instance_assignment -name IO_STANDARD "1.8 V" -to SENS_SD
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[0]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[1]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[2]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[3]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[4]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[5]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[0]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[1]
+set_instance_assignment -name IO_STANDARD "1.8 V" -to WDI
+
+# locations changed 30 sept
+set_location_assignment PIN_P16 -to ID[0]
+set_location_assignment PIN_P15 -to ID[1]
+set_location_assignment PIN_K13 -to ID[2]
+set_location_assignment PIN_L13 -to ID[3]
+set_location_assignment PIN_N16 -to ID[4]
+set_location_assignment PIN_N14 -to ID[5]
+set_location_assignment PIN_U13 -to ID[6]
+
+set_location_assignment PIN_T13 -to ID[7]
+set_location_assignment PIN_AU31 -to INTA
+set_location_assignment PIN_AR30 -to INTB
+
+set_location_assignment PIN_BC31 -to SENS_SC
+set_location_assignment PIN_BB31 -to SENS_SD
+
+set_location_assignment PIN_BA25 -to PMBUS_SC
+set_location_assignment PIN_BD25 -to PMBUS_SD
+set_location_assignment PIN_BD26 -to PMBUS_ALERT
+set_instance_assignment -name IO_STANDARD "1.2 V" -to PMBUS_SC
+set_instance_assignment -name IO_STANDARD "1.2 V" -to PMBUS_SD
+set_instance_assignment -name IO_STANDARD "1.2 V" -to PMBUS_ALERT
+
+
+set_location_assignment PIN_AN32 -to TESTIO[0]
+set_location_assignment PIN_AP32 -to TESTIO[1]
+set_location_assignment PIN_AT30 -to TESTIO[2]
+set_location_assignment PIN_BD31 -to TESTIO[3]
+set_location_assignment PIN_AU30 -to TESTIO[4]
+set_location_assignment PIN_BD30 -to TESTIO[5]
+
+set_location_assignment PIN_AB12 -to VERSION[0]
+set_location_assignment PIN_AB13 -to VERSION[1]
+set_location_assignment PIN_BB30 -to WDI
+
+set_location_assignment PIN_K12 -to ETH_SGIN[0]
+set_location_assignment PIN_J12 -to "ETH_SGIN[0](n)"
+set_location_assignment PIN_AF33 -to ETH_SGIN[1]
+set_location_assignment PIN_AE33 -to "ETH_SGIN[1](n)"
+set_location_assignment PIN_H13 -to ETH_SGOUT[0]
+set_location_assignment PIN_H12 -to "ETH_SGOUT[0](n)"
+set_location_assignment PIN_AW31 -to ETH_SGOUT[1]
+set_location_assignment PIN_AV31 -to "ETH_SGOUT[1](n)"
+
+set_instance_assignment -name IO_STANDARD LVDS -to PPS
+set_instance_assignment -name IO_STANDARD LVDS -to "PPS(n)"
+set_instance_assignment -name IO_STANDARD LVDS -to CLK
+set_instance_assignment -name IO_STANDARD LVDS -to "CLK(n)"
+
+# Enable internal termination for LVDS inputs
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to PPS
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to CLK
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[0]
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[1]
+
+# Enable 100 ohm termination resistors
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to "ETH_SGIN[0](n)"
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to ETH_SGIN[0]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to ETH_SGIN[1]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to "ETH_SGIN[1](n)"
+
+set_location_assignment PIN_AG31 -to altera_reserved_tms
+set_location_assignment PIN_AJ31 -to altera_reserved_tck
+set_location_assignment PIN_AK18 -to altera_reserved_tdi
+set_location_assignment PIN_AH31 -to altera_reserved_ntrst
+set_location_assignment PIN_AM29 -to altera_reserved_tdo
+#set_location_assignment PIN_AV33 -to ~ALTERA_DATA0~
+
+
+set_location_assignment PIN_BA33 -to QSFP_LED[0]
+set_location_assignment PIN_BA30 -to QSFP_LED[1]
+set_location_assignment PIN_BB33 -to QSFP_LED[2]
+set_location_assignment PIN_AU33 -to QSFP_LED[3]
+set_location_assignment PIN_AV32 -to QSFP_LED[4]
+set_location_assignment PIN_AW30 -to QSFP_LED[5]
+set_location_assignment PIN_AP31 -to QSFP_LED[6]
+set_location_assignment PIN_AP30 -to QSFP_LED[7]
+set_location_assignment PIN_AT33 -to QSFP_LED[8]
+set_location_assignment PIN_AG32 -to QSFP_LED[9]
+set_location_assignment PIN_AF32 -to QSFP_LED[10]
+set_location_assignment PIN_AE32 -to QSFP_LED[11]
+
+
+
+set_location_assignment PIN_Y36 -to SA_CLK
+set_instance_assignment -name IO_STANDARD LVDS -to SA_CLK
+# internal termination should be enabled.
+set_instance_assignment -name XCVR_A10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to SA_CLK
+
+set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON
+
+### QSFP_0
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_0_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_0_RX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_RX[0]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[0]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[0]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[0]
+
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_0_RX[1]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_RX[1]
+#
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[1]
+#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[1]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[1]
+#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[1]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[1]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[1]
+#
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_0_RX[2]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_RX[2]
+#
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[2]
+#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[2]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[2]
+#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[2]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[2]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[2]
+#
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_0_RX[3]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_RX[3]
+#
+#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_0_TX[3]
+#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_0_TX[3]
+#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_0_TX[3]
+#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_0_TX[3]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_0_TX[3]
+#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[3]
+
+# QSFP_1
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[0]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[0]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[0]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[0]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[1]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[1]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[1]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[1]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[1]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[1]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[1]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[1]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[1]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[2]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[2]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[2]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[2]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[2]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[2]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[2]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[2]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[2]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to                             QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to          QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to              QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to  QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to                QSFP_1_RX[3]
+set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to                QSFP_1_RX[3]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_RX[3]
+
+set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to                   QSFP_1_TX[3]
+set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to                  QSFP_1_TX[3]
+set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to                           QSFP_1_TX[3]
+set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to                    QSFP_1_TX[3]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to     QSFP_1_TX[3]
+set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[3]
+
+## QSFP_0_RX
+set_location_assignment PIN_AN38 -to QSFP_0_RX[0]
+set_location_assignment PIN_AM40 -to QSFP_0_RX[1]
+set_location_assignment PIN_AK40 -to QSFP_0_RX[2]
+set_location_assignment PIN_AJ38 -to QSFP_0_RX[3]
+#
+## QSFP_0_TX
+set_location_assignment PIN_AN42 -to QSFP_0_TX[0]
+set_location_assignment PIN_AM44 -to QSFP_0_TX[1]
+set_location_assignment PIN_AK44 -to QSFP_0_TX[2]
+set_location_assignment PIN_AJ42 -to QSFP_0_TX[3]
+#
+## QSFP_1_RX
+set_location_assignment PIN_AC38 -to QSFP_1_RX[0]
+set_location_assignment PIN_AD40 -to QSFP_1_RX[1]
+set_location_assignment PIN_AF40 -to QSFP_1_RX[2]
+set_location_assignment PIN_AG38 -to QSFP_1_RX[3]
+#
+## QSFP_1_TX
+set_location_assignment PIN_AC42 -to QSFP_1_TX[0]
+set_location_assignment PIN_AD44 -to QSFP_1_TX[1]
+set_location_assignment PIN_AF44 -to QSFP_1_TX[2]
+set_location_assignment PIN_AG42 -to QSFP_1_TX[3]
+
+set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_40GbE.ip
+set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_10GbE.ip
+set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_1GbE_mc.ip
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/hw_iface.iipx b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/hw_iface.iipx
new file mode 100755
index 0000000000000000000000000000000000000000..f1625b055d1a2c2dc9c45e4ef1e76344784a4342
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/hw_iface.iipx
@@ -0,0 +1,708 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<library>
+ <!--  date: 2018.04.26.16:36:02 -->
+ <!--  generated by: ip-make-ipx -->
+ <!--   -->
+ <!--     45 in ${INTELFPGAOCLSDKROOT}/ip/board -->
+ <!--   -->
+ <component
+   name="acl_avalon_mm_bridge_s10"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/acl_avalon_mm_bridge_s10/acl_avalon_mm_bridge_s10_hw.tcl"
+   displayName="Avalon-MM Pipeline Bridge for S10"
+   version="16.930"
+   description="Inserts a register stage in the Avalon-MM command and response paths. Accepts commands on its Avalon-MM slave port and propagates them to its Avalon-MM master port."
+   tags="AUTHORSHIP=Intel Corporation /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG,SIM_VHDL" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
+  <documentUrl
+     displayName="User Guide"
+     type="OTHER"
+     url="https://documentation.altera.com/#/link/mwh1409960181641/mwh1409959275749" />
+  <documentUrl
+     displayName="Release Notes"
+     type="OTHER"
+     url="https://documentation.altera.com/#/link/hco1416836145555/hco1416836653221" />
+ </component>
+ <component
+   name="acl_direction_splitter"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/direction_splitter/direction_splitter_hw.tcl"
+   displayName="ACL Direction Splitter"
+   version="13.0"
+   description="Splits read/write masters into one read and one write "
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="13.0" />
+ </component>
+ <component
+   name="acl_dma"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/iface/acl_dma.qsys"
+   displayName="OpenCL SGDMA Controller"
+   version="1.0"
+   description="OpenCL SGDMA Controller"
+   tags="INTERNAL_COMPONENT=false"
+   categories="OpenCL BSP Components"
+   factory="QsysFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+ </component>
+ <component
+   name="acl_dma_core"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/iface/acl_dma_core.qsys"
+   displayName="acl_dma_core"
+   version="1.0"
+   description="OpenCL SGDMA Core"
+   tags="INTERNAL_COMPONENT=true"
+   categories="ACL Internal Components"
+   factory="QsysFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+ </component>
+ <component
+   name="acl_export_master"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/export/export_master_hw.tcl"
+   displayName="Avalon Master to Conduit Bridge"
+   version="10.0"
+   description="Export an avalon master to the top level design"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,conduit,interrupt,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="acl_hyper_optimized_ccb"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/acl_hyper_optimized_ccb/acl_hyper_optimized_ccb_hw.tcl"
+   displayName="AVMM S10 Clock Crossing Bridge"
+   version="1.0"
+   description=""
+   tags="CONNECTION_TYPES=avalon,clock,reset /// INTERNAL_COMPONENT=false"
+   categories=""
+   factory="TclModuleFactory">
+  <tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
+  <tag2 key="REPORT_HIERARCHY" value="false" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="17.0" />
+ </component>
+ <component
+   name="acl_irq_ena"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/irq_ena/irq_ena_hw.tcl"
+   displayName="ACL irq ena"
+   version="13.0"
+   description="Adds enable to an irq line"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,interrupt,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+ </component>
+ <component
+   name="acl_irq_to_polling_slave"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/irq_to_polling_slave/irq_to_polling_slave_hw.tcl"
+   displayName="Avalon IRQ to Avalon Slave for Polling"
+   version="10.0"
+   description="Convert IRQ to an Avalon slave that can be polled"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,interrupt,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="acl_kernel_clk"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/iface/acl_kernel_clk.qsys"
+   displayName="OpenCL Kernel Clock Generator"
+   version="1.0"
+   description="Generates the kernel clocks for ACL"
+   tags="INTERNAL_COMPONENT=false"
+   categories="OpenCL BSP Components"
+   factory="QsysFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+ </component>
+ <component
+   name="acl_kernel_clk_a10"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/bsp/acl_kernel_clk_a10_hw.tcl"
+   displayName="OpenCL A10 Kernel Clock Generator"
+   version="16.1"
+   description="default description"
+   tags="AUTHORSHIP=author"
+   categories="OpenCL BSP Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="COMPOSITION_CALLBACK" value="comp" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="16.1" />
+ </component>
+ <component
+   name="acl_kernel_clk_noreconfig"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/iface/acl_kernel_clk_noreconfig.qsys"
+   displayName="OpenCL Kernel Clock Generator - no Dynamic Reconfig"
+   version="1.0"
+   description="Generates the kernel clocks for ACL"
+   tags="INTERNAL_COMPONENT=false"
+   categories="OpenCL BSP Components"
+   factory="QsysFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+ </component>
+ <component
+   name="acl_kernel_clk_s10"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/bsp/acl_kernel_clk_s10_hw.tcl"
+   displayName="OpenCL S10 Kernel Clock Generator"
+   version="17.0"
+   description="default description"
+   tags="AUTHORSHIP=author"
+   categories="OpenCL BSP Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="COMPOSITION_CALLBACK" value="comp" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="16.1" />
+ </component>
+ <component
+   name="acl_kernel_interface_soc"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/iface/acl_kernel_interface_soc.qsys"
+   displayName="acl_kernel_interface_soc"
+   version="1.0"
+   description="ACL Kernel Interface"
+   tags=""
+   categories="ACL BSP Components"
+   factory="QsysFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+ </component>
+ <component
+   name="acl_memory_bank_divider"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/bsp/acl_memory_bank_divider_hw.tcl"
+   displayName="OpenCL Memory Bank Divider"
+   version="1.0"
+   description="default description"
+   tags="AUTHORSHIP=author /// CONNECTION_TYPES=avalon_streaming,clock,reset"
+   categories="OpenCL BSP Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="COMPOSITION_CALLBACK" value="compose" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="12.1" />
+ </component>
+ <component
+   name="acl_snoop_adapter"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/export/snoop_adapter_hw.tcl"
+   displayName="Avalon Snoop Adapter"
+   version="11.0"
+   description="Generate a streaming interface for snooped writes"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,avalon_streaming,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="acl_temperature_a10"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/temperature/temperature_a10_hw.tcl"
+   displayName="ACL temperature sensor for A10"
+   version="15.1"
+   description="ACL Temperature sensor - Arria 10"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="acl_timer"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/timer/timer_hw.tcl"
+   displayName="ACL timer"
+   version="10.0"
+   description="Timer"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="acl_timer_s10"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/timer/timer_s10_hw.tcl"
+   displayName="ACL timer for S10"
+   version="17.0"
+   description="Timer"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="alt_hiconnect_dc_fifo"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/acl_hyper_optimized_ccb/alt_hiconnect_dc_fifo_hw.tcl"
+   displayName="Avalon-ST Dual Clock FIFO"
+   version="100.99.98.97"
+   description=""
+   tags="AUTHORSHIP=Altera Corporation"
+   categories="Qsys Interconnect/Memory-Mapped Alpha"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_QUARTUS" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG,SIM_VHDL" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="15.0" />
+  <documentUrl
+     displayName="DATASHEET"
+     type="DATASHEET"
+     url="http://www.altera.com/literature/hb/nios2/qts_qii55014.pdf" />
+ </component>
+ <component
+   name="aoc_sim_main_dpi_controller"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/opencl_sim/aoc_sim_main_dpi_controller_hw.tcl"
+   displayName="OpenCL Simulation Main"
+   version="1.0"
+   description="Handles kernel system reset and interrupt"
+   tags="AUTHORSHIP=Intel Corporation /// CONNECTION_TYPES=clock,conduit,interrupt,reset /// INTERNAL_COMPONENT=false"
+   categories="OpenCL Simulation"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="14.0" />
+ </component>
+ <component
+   name="aoc_sim_mm_master_dpi_bfm"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/opencl_sim/aoc_sim_mm_master_dpi_bfm_hw.tcl"
+   displayName="OpenCL Simulation Avalon-MM Master DPI BFM"
+   version="1.0"
+   description="Interface between Simulator MMD and Kernel Interface and Memory Bank Divider"
+   tags="AUTHORSHIP=Intel Corporation /// INTERNAL_COMPONENT=false"
+   categories="OpenCL Simulation"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="SIM_VERILOG,QUARTUS_SYNTH" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="14.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="aoc_sim_mm_slave_dpi_bfm"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/opencl_sim/aoc_sim_mm_slave_dpi_bfm_hw.tcl"
+   displayName="OpenCL Simulation Avalon-MM Slave DPI BFM"
+   version="1.0"
+   description="Interface between Simulator MMD and kernel system global memory interconnect"
+   tags="AUTHORSHIP=Intel Corporation /// INTERNAL_COMPONENT=false"
+   categories="OpenCL Simulation"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="SIM_VERILOG,QUARTUS_SYNTH" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="14.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="burst_boundary_splitter"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/burst_boundary_splitter/burst_boundary_splitter_hw.tcl"
+   displayName="ACL Burst Boundary Splitter"
+   version="1.0"
+   description="Split burst read/writes on burst word boundary"
+   tags="AUTHORSHIP=Altera OpenCL /// INTERNAL_COMPONENT=false"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
+  <tag2 key="REPORT_HIERARCHY" value="false" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH,SIM_VERILOG" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="cade_id"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/cade_id/cade_id_hw.tcl"
+   displayName="ACL CADE_ID register"
+   version="1.0"
+   description="Contains CADE_ID register"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,conduit,reset /// INTERNAL_COMPONENT=false"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="true" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
+  <tag2 key="REPORT_HIERARCHY" value="false" />
+  <tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
+ </component>
+ <component
+   name="clockdiv"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/clockdiv/clockdiv_hw.tcl"
+   displayName="ACL Clk Divider"
+   version="10.0"
+   description="Divide clock using soft logic"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=clock"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="dma_pcie_bridge"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/dma_pcie_bridge/dma_pcie_bridge_hw.tcl"
+   displayName="ACL DMA to PCIe Bridge"
+   version="11.0"
+   description="Bridge the width and burst mismatch between PCIe and the DMA"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="dma_read_master"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/Read_Master/read_master_hw.tcl"
+   displayName="Read Master"
+   version="1.0"
+   description="A module responsible for streaming data from memory"
+   tags="AUTHORSHIP=JCJB /// CONNECTION_TYPES=avalon,avalon_streaming,clock /// INTERNAL_COMPONENT=false"
+   categories="Modular_DMA"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate_me" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="9.1" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate_me" />
+  <documentUrl
+     displayName="DATASHEET"
+     type="DATASHEET"
+     url="file:/${INTELFPGAOCLSDKROOT}/ip/board/Read_Master/Modular_SGDMA_Read_Master_Core_UG.pdf" />
+ </component>
+ <component
+   name="dma_write_master"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/Write_Master/write_master_hw.tcl"
+   displayName="Write Master"
+   version="1.0"
+   description="A module responsible for writing streaming data to memory"
+   tags="AUTHORSHIP=JCJB /// CONNECTION_TYPES=avalon,avalon_streaming,clock /// INTERNAL_COMPONENT=false"
+   categories="Modular_DMA"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate_me" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="9.1" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate_me" />
+  <documentUrl
+     displayName="DATASHEET"
+     type="DATASHEET"
+     url="file:/${INTELFPGAOCLSDKROOT}/ip/board/Write_Master/Modular_SGDMA_Write_Master_Core_UG.pdf" />
+ </component>
+ <component
+   name="fake_nonburstboundary"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/fake_nonburstboundary/fake_nonburstboundary_hw.tcl"
+   displayName="ACL Fake nonBurstBoundary"
+   version="10.0"
+   description="Pipelined clock crossing splitter"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="global_routing_clk"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/global_routing/global_routing_clk_hw.tcl"
+   displayName="ACL Global Clk Signal"
+   version="10.0"
+   description="Make signal use global routing"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=clock"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="global_routing_reset"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/global_routing/global_routing_reset_hw.tcl"
+   displayName="ACL Global Reset Signal"
+   version="10.0"
+   description="Hardware monitoring and software reset logic"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="kernel_interface"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/bsp/acl_kernel_interface_hw.tcl"
+   displayName="OpenCL Kernel Interface"
+   version="15.1"
+   description="Connects the OpenCL host to the FPGA kernel"
+   tags="AUTHORSHIP=author"
+   categories="OpenCL BSP Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
+  <tag2 key="COMPOSITION_CALLBACK" value="compose" />
+  <tag2 key="OPAQUE_ADDRESS_MAP" value="false" />
+  <tag2 key="PARAMETER_UPGRADE_CALLBACK" value="ip_upgrade" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="13.1" />
+ </component>
+ <component
+   name="mem_org_mode"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/mem_org_mode/mem_org_mode_hw.tcl"
+   displayName="ACL Mem Organization Control"
+   version="10.0"
+   description="Configures address space"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,conduit,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="mem_splitter"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/mem_splitter/mem_splitter_hw.tcl"
+   displayName="ACL Bank Splitter w. Reorder"
+   version="10.0"
+   description="Pipelined clock crossing splitter"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=conduit"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="mem_window"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/mem_window/mem_window_hw.tcl"
+   displayName="ACL Memory Window Bridge"
+   version="10.0"
+   description="Access a wide memory range through smaller addressable windows."
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="modular_sgdma_dispatcher"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/SGDMA_dispatcher/dispatcher_hw.tcl"
+   displayName="Modular SGDMA Dispatcher"
+   version="1.0"
+   description="SGDMA scheduling block"
+   tags="AUTHORSHIP=JCJB /// CONNECTION_TYPES=avalon,avalon_streaming,clock,interrupt"
+   categories="Modular_DMA"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate_me" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate_me" />
+  <documentUrl
+     displayName="DATASHEET"
+     type="DATASHEET"
+     url="file:/${INTELFPGAOCLSDKROOT}/ip/board/SGDMA_dispatcher/Modular_SGDMA_Dispatcher_Core_UG.pdf" />
+ </component>
+ <component
+   name="no_reset"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/no_reset/no_reset_hw.tcl"
+   displayName="ACL No Reset"
+   version="10.0"
+   description="Permanently deassert reset"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="pll_lock_avs"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/pll_lock_avs/pll_lock_avs_hw.tcl"
+   displayName="ACL PLL locked to AVS"
+   version="10.0"
+   description="Hardware monitoring and software reset logic"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,conduit,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="reset_and_status"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/reset_and_status/reset_and_status_hw.tcl"
+   displayName="ACL Reset and Status"
+   version="10.0"
+   description="Hardware monitoring and software reset logic"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=clock,conduit,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="sw_reset"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/sw_reset/sw_reset_hw.tcl"
+   displayName="ACL SW Reset"
+   version="10.0"
+   description="Reset pulse triggered by Avalon write"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="temperature"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/temperature/temperature_hw.tcl"
+   displayName="ACL temperature sensor"
+   version="10.0"
+   description="Temperature sensor - Stratix V"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="uniphy_status"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/uniphy_status/uniphy_status_hw.tcl"
+   displayName="ACL Uniphy status to AVS"
+   version="10.0"
+   description="Aggregates Uniphy status conduit into a slave (success returns 0)"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="uniphy_status_20nm"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/uniphy_status/uniphy_status_20nm_hw.tcl"
+   displayName="ACL Uniphy status to AVS for A10"
+   version="14.1"
+   description="Aggregates Uniphy status conduit into a slave (success returns 0)"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+ <component
+   name="unpipeline"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/unpipeline/unpipeline_hw.tcl"
+   displayName="ACL Unpipeline"
+   version="10.0"
+   description="Make reads non-pipelined"
+   tags="AUTHORSHIP=Altera OpenCL"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="ELABORATION_CALLBACK" value="elaborate" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+  <tag2 key="VALIDATION_CALLBACK" value="validate" />
+ </component>
+ <component
+   name="version_id"
+   file="${INTELFPGAOCLSDKROOT}/ip/board/version_id/version_id_hw.tcl"
+   displayName="ACL Version ID Component"
+   version="10.0"
+   description="Hardcoded version ID"
+   tags="AUTHORSHIP=Altera OpenCL /// CONNECTION_TYPES=avalon,clock,reset"
+   categories="ACL Internal Components"
+   factory="TclModuleFactory">
+  <tag2 key="ANALYZE_HDL" value="false" />
+  <tag2 key="COMPONENT_EDITABLE" value="false" />
+  <tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
+  <tag2 key="TCL_PACKAGE_VERSION" value="10.0" />
+ </component>
+</library>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/iface.ipx b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/iface.ipx
new file mode 100755
index 0000000000000000000000000000000000000000..47dbc7e0bc19d7c9f5373aa60361d611ff67091d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/iface.ipx
@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<library>
+ <!--  date: 2018.04.26.16:36:03 -->
+ <!--  generated by: ip-make-ipx -->
+ <!--  This is a toplevel .ipx file that references mulitple .iipx (intermediate-ipx) files -->
+ <!--   -->
+ <path path="hw_iface.iipx" />
+ <path path="sw_iface.iipx" />
+</library>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_avs_eth_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_avs_eth_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..e3ff34c2ac7d68463d4fc65271296b8a87637c0c
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_avs_eth_0.ip
@@ -0,0 +1,3746 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_avs_eth_0</spirit:library>
+  <spirit:name>avs_eth_0</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>interrupt</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ins_interrupt_irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">board_avs_eth_0.mms_reg</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">mm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">mm_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedReceiverOffset</spirit:name>
+          <spirit:displayName>Bridged receiver offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToReceiver</spirit:name>
+          <spirit:displayName>Bridges to receiver</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>irq</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_irq_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mm</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_mm_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mm_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_mm_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">mm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mms_ram</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_ram_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_ram_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_ram_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_ram_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_ram_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">mm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">mm_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mms_reg</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_reg_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_reg_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_reg_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_reg_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_reg_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">mm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">mm_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mms_tse</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>mms_tse_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">mm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">mm_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ram_address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_ram_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ram_read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_ram_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ram_readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_ram_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ram_write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_ram_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ram_writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_ram_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reg_address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reg_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reg_read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reg_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reg_readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reg_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reg_write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reg_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reg_writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reg_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_waitrequest</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_waitrequest_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tse_writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_tse_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs2_eth_coe</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_mm_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_mm_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_tse_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_reg_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_reg_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_reg_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_reg_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_reg_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_ram_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_ram_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_ram_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_ram_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>mms_ram_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ins_interrupt_irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_tse_waitrequest_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reg_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reg_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reg_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reg_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reg_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_ram_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_ram_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_ram_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_ram_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_ram_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_irq_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_avs_eth_0</spirit:library>
+      <spirit:name>avs2_eth_coe</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters></spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>interrupt</name>
+            <type>interrupt</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>ins_interrupt_irq</name>
+                    <role>irq</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                        <value>board_avs_eth_0.mms_reg</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>mm</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>mm_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedReceiverOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToReceiver</key>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>irq</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_irq_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mm</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_mm_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mm_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_mm_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>mm</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mms_ram</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>mms_ram_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_ram_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_ram_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_ram_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_ram_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>mm</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>mm_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>2</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mms_reg</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>mms_reg_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_reg_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_reg_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_reg_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_reg_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>64</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>mm</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>mm_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mms_tse</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>mms_tse_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_tse_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_tse_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>mms_tse_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_tse_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>mms_tse_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>mm</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>mm_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ram_address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_ram_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ram_read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_ram_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ram_readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_ram_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ram_write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_ram_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ram_writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_ram_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reg_address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reg_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reg_read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reg_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reg_readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reg_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reg_write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reg_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reg_writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reg_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_waitrequest</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_waitrequest_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tse_writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_tse_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mms_ram</key>
+            <value>
+                <connectionPointName>mms_ram</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mms_ram' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>mms_reg</key>
+            <value>
+                <connectionPointName>mms_reg</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mms_reg' start='0x0' end='0x40' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>6</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>mms_tse</key>
+            <value>
+                <connectionPointName>mms_tse</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mms_tse' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="avs_eth_0.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="interrupt" altera:internal="avs_eth_0.interrupt" altera:type="interrupt" altera:dir="end">
+        <altera:port_mapping altera:name="ins_interrupt_irq" altera:internal="ins_interrupt_irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="irq" altera:internal="avs_eth_0.irq" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_irq_export" altera:internal="coe_irq_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mm" altera:internal="avs_eth_0.mm" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_mm_clk" altera:internal="csi_mm_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mm_reset" altera:internal="avs_eth_0.mm_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_mm_reset" altera:internal="csi_mm_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mms_ram" altera:internal="avs_eth_0.mms_ram" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="mms_ram_address" altera:internal="mms_ram_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_ram_read" altera:internal="mms_ram_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_ram_readdata" altera:internal="mms_ram_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_ram_write" altera:internal="mms_ram_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_ram_writedata" altera:internal="mms_ram_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mms_reg" altera:internal="avs_eth_0.mms_reg" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="mms_reg_address" altera:internal="mms_reg_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_reg_read" altera:internal="mms_reg_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_reg_readdata" altera:internal="mms_reg_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_reg_write" altera:internal="mms_reg_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_reg_writedata" altera:internal="mms_reg_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mms_tse" altera:internal="avs_eth_0.mms_tse" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="mms_tse_address" altera:internal="mms_tse_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_tse_read" altera:internal="mms_tse_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_tse_readdata" altera:internal="mms_tse_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_tse_waitrequest" altera:internal="mms_tse_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_tse_write" altera:internal="mms_tse_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="mms_tse_writedata" altera:internal="mms_tse_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ram_address" altera:internal="avs_eth_0.ram_address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_ram_address_export" altera:internal="coe_ram_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ram_read" altera:internal="avs_eth_0.ram_read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_ram_read_export" altera:internal="coe_ram_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ram_readdata" altera:internal="avs_eth_0.ram_readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_ram_readdata_export" altera:internal="coe_ram_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ram_write" altera:internal="avs_eth_0.ram_write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_ram_write_export" altera:internal="coe_ram_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ram_writedata" altera:internal="avs_eth_0.ram_writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_ram_writedata_export" altera:internal="coe_ram_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reg_address" altera:internal="avs_eth_0.reg_address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reg_address_export" altera:internal="coe_reg_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reg_read" altera:internal="avs_eth_0.reg_read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reg_read_export" altera:internal="coe_reg_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reg_readdata" altera:internal="avs_eth_0.reg_readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reg_readdata_export" altera:internal="coe_reg_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reg_write" altera:internal="avs_eth_0.reg_write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reg_write_export" altera:internal="coe_reg_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reg_writedata" altera:internal="avs_eth_0.reg_writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reg_writedata_export" altera:internal="coe_reg_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="avs_eth_0.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_address" altera:internal="avs_eth_0.tse_address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_address_export" altera:internal="coe_tse_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_read" altera:internal="avs_eth_0.tse_read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_read_export" altera:internal="coe_tse_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_readdata" altera:internal="avs_eth_0.tse_readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_readdata_export" altera:internal="coe_tse_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_waitrequest" altera:internal="avs_eth_0.tse_waitrequest" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_waitrequest_export" altera:internal="coe_tse_waitrequest_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_write" altera:internal="avs_eth_0.tse_write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_write_export" altera:internal="coe_tse_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tse_writedata" altera:internal="avs_eth_0.tse_writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_tse_writedata_export" altera:internal="coe_tse_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>true</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_clk_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_clk_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..2e3d7dcb3dc0b060f063aa9960f4c1dd20c800b2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_clk_0.ip
@@ -0,0 +1,506 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Altera Corporation</spirit:vendor>
+  <spirit:library>board_clk_0</spirit:library>
+  <spirit:name>clk_0</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_out</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedDirectClock</spirit:name>
+          <spirit:displayName>Associated direct clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectClock">clk_in</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRateKnown</spirit:name>
+          <spirit:displayName>Clock rate known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_in</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>in_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">clk</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_in_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">reset</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n_out</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedDirectReset</spirit:name>
+          <spirit:displayName>Associated direct reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectReset">clk_in_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedResetSinks</spirit:name>
+          <spirit:displayName>Associated reset sinks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedResetSinks">clk_in_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>clock_source</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>in_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_out</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n_out</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Altera Corporation</spirit:vendor>
+      <spirit:library>board_clk_0</spirit:library>
+      <spirit:name>clock_source</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockFrequency</spirit:name>
+          <spirit:displayName>Clock frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockFrequency">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockFrequencyKnown</spirit:name>
+          <spirit:displayName>Clock frequency is known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockFrequencyKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>inputClockFrequency</spirit:name>
+          <spirit:displayName>inputClockFrequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="inputClockFrequency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetSynchronousEdges</spirit:name>
+          <spirit:displayName>Reset synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="resetSynchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>clk_out</name>
+                    <role>clk</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedDirectClock</key>
+                        <value>clk_in</value>
+                    </entry>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>100000000</value>
+                    </entry>
+                    <entry>
+                        <key>clockRateKnown</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_in</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>in_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>clk</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>100000000</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_in_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>reset</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_reset</name>
+            <type>reset</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>reset_n_out</name>
+                    <role>reset_n</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedDirectReset</key>
+                        <value>clk_in_reset</value>
+                    </entry>
+                    <entry>
+                        <key>associatedResetSinks</key>
+                        <value>clk_in_reset</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>clk_in</key>
+            <value>
+                <connectionPointName>clk_in</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>0</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="clk_0.clk" altera:type="clock" altera:dir="start">
+        <altera:port_mapping altera:name="clk_out" altera:internal="clk_out"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_in" altera:internal="clk_0.clk_in" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="in_clk" altera:internal="in_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_in_reset" altera:internal="clk_0.clk_in_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_n" altera:internal="reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_reset" altera:internal="clk_0.clk_reset" altera:type="reset" altera:dir="start">
+        <altera:port_mapping altera:name="reset_n_out" altera:internal="reset_n_out"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_cpu_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_cpu_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..7576f2745d01d2071f20ed763182f7fa8f5a1a87
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_cpu_0.ip
@@ -0,0 +1,3605 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_cpu_0</spirit:library>
+  <spirit:name>cpu_0</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>custom_instruction_master</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="nios_custom_instruction" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readra</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>dummy_ci_port</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>CIName</spirit:name>
+          <spirit:displayName>CIName</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="CIName"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressWidth</spirit:name>
+          <spirit:displayName>addressWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressWidth">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockCycle</spirit:name>
+          <spirit:displayName>Clock cycles</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="clockCycle">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enabled</spirit:name>
+          <spirit:displayName>enabled</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxAddressWidth</spirit:name>
+          <spirit:displayName>maxAddressWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxAddressWidth">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>opcodeExtension</spirit:name>
+          <spirit:displayName>opcodeExtension</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="opcodeExtension">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>sharedCombinationalAndMulticycle</spirit:name>
+          <spirit:displayName>sharedCombinationalAndMulticycle</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="sharedCombinationalAndMulticycle">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>data_master</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>d_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>debugaccess</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_debugaccess_to_roms</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>adaptsTo</spirit:name>
+          <spirit:displayName>Adapts to</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="adaptsTo"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dBSBigEndian</spirit:name>
+          <spirit:displayName>dBS big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="dBSBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamReads</spirit:name>
+          <spirit:displayName>Use flow control for read transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamReads">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamWrites</spirit:name>
+          <spirit:displayName>Use flow control for write transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamWrites">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isAsynchronous</spirit:name>
+          <spirit:displayName>Is asynchronous</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isAsynchronous">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Is big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isReadable</spirit:name>
+          <spirit:displayName>Is readable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isReadable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isWriteable</spirit:name>
+          <spirit:displayName>Is writeable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isWriteable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxAddressWidth</spirit:name>
+          <spirit:displayName>Maximum address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxAddressWidth">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>debug.providesServices</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="debug.providesServices">master</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>debug_mem_slave</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>debugaccess</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_debugaccess</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_mem_slave_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">2048</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.hideDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.hideDevice">1</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">1</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.connect</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.connect">instruction_master,data_master</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>debug_reset_request</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>debug_reset_request</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedDirectReset</spirit:name>
+          <spirit:displayName>Associated direct reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedResetSinks</spirit:name>
+          <spirit:displayName>Associated reset sinks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedResetSinks">none</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>instruction_master</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>i_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>i_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>i_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>i_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>adaptsTo</spirit:name>
+          <spirit:displayName>Adapts to</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="adaptsTo"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dBSBigEndian</spirit:name>
+          <spirit:displayName>dBS big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="dBSBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamReads</spirit:name>
+          <spirit:displayName>Use flow control for read transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamReads">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamWrites</spirit:name>
+          <spirit:displayName>Use flow control for write transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamWrites">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isAsynchronous</spirit:name>
+          <spirit:displayName>Is asynchronous</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isAsynchronous">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Is big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isReadable</spirit:name>
+          <spirit:displayName>Is readable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isReadable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isWriteable</spirit:name>
+          <spirit:displayName>Is writeable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isWriteable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxAddressWidth</spirit:name>
+          <spirit:displayName>Maximum address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxAddressWidth">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>irq</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">board_cpu_0.data_master</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqMap</spirit:name>
+          <spirit:displayName>IRQ Map</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqMap"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">INDIVIDUAL_REQUESTS</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_nios2_gen2</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>dummy_ci_port</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>17</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>d_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_debugaccess_to_roms</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>8</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_debugaccess</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_mem_slave_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>debug_reset_request</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>i_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>17</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>i_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>i_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>i_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_req</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_cpu_0</spirit:library>
+      <spirit:name>altera_nios2_gen2</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>tmr_enabled</spirit:name>
+          <spirit:displayName>Nios II Triple Mode Redundancy</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="tmr_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_disable_tmr_inj</spirit:name>
+          <spirit:displayName>Disabled TMR Error Injection Port</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_disable_tmr_inj">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_showUnpublishedSettings</spirit:name>
+          <spirit:displayName>Show Unpublished Settings</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_showUnpublishedSettings">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_showInternalSettings</spirit:name>
+          <spirit:displayName>Show Internal Verification Settings</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_showInternalSettings">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_preciseIllegalMemAccessException</spirit:name>
+          <spirit:displayName>Misaligned memory access</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_preciseIllegalMemAccessException">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_exportPCB</spirit:name>
+          <spirit:displayName>setting_exportPCB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_exportPCB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_exportdebuginfo</spirit:name>
+          <spirit:displayName>Export Instruction Execution States</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_exportdebuginfo">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_clearXBitsLDNonBypass</spirit:name>
+          <spirit:displayName>Clear X data bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_clearXBitsLDNonBypass">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_bigEndian</spirit:name>
+          <spirit:displayName>setting_bigEndian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_bigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_export_large_RAMs</spirit:name>
+          <spirit:displayName>Export Large RAMs</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_export_large_RAMs">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_asic_enabled</spirit:name>
+          <spirit:displayName>ASIC enabled</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_asic_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>register_file_por</spirit:name>
+          <spirit:displayName>Register File POR</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="register_file_por">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_asic_synopsys_translate_on_off</spirit:name>
+          <spirit:displayName>ASIC Synopsys translate</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_asic_synopsys_translate_on_off">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_asic_third_party_synthesis</spirit:name>
+          <spirit:displayName>ASIC third party synthesis</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_asic_third_party_synthesis">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_asic_add_scan_mode_input</spirit:name>
+          <spirit:displayName>ASIC add scan mode input</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_asic_add_scan_mode_input">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_oci_version</spirit:name>
+          <spirit:displayName>Nios II OCI Version</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setting_oci_version">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_fast_register_read</spirit:name>
+          <spirit:displayName>Fast Register Read</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_fast_register_read">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_exportHostDebugPort</spirit:name>
+          <spirit:displayName>Export Debug Host Slave</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_exportHostDebugPort">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_oci_export_jtag_signals</spirit:name>
+          <spirit:displayName>Export JTAG signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_oci_export_jtag_signals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_avalonDebugPortPresent</spirit:name>
+          <spirit:displayName>Avalon Debug Port Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_avalonDebugPortPresent">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_alwaysEncrypt</spirit:name>
+          <spirit:displayName>Always encrypt</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_alwaysEncrypt">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>io_regionbase</spirit:name>
+          <spirit:displayName>Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="io_regionbase">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>io_regionsize</spirit:name>
+          <spirit:displayName>Size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="io_regionsize">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_support31bitdcachebypass</spirit:name>
+          <spirit:displayName>Use most-significant address bit in processor to bypass data cache</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_support31bitdcachebypass">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_activateTrace</spirit:name>
+          <spirit:displayName>Generate trace file during RTL simulation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_activateTrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_allow_break_inst</spirit:name>
+          <spirit:displayName>Allow Break instructions</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_allow_break_inst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_activateTestEndChecker</spirit:name>
+          <spirit:displayName>Activate test end checker</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_activateTestEndChecker">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_ecc_sim_test_ports</spirit:name>
+          <spirit:displayName>Enable ECC simulation test ports</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_ecc_sim_test_ports">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_disableocitrace</spirit:name>
+          <spirit:displayName>Disable comptr generation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_disableocitrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_activateMonitors</spirit:name>
+          <spirit:displayName>Activate monitors</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_activateMonitors">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_HDLSimCachesCleared</spirit:name>
+          <spirit:displayName>HDL simulation caches cleared</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_HDLSimCachesCleared">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_HBreakTest</spirit:name>
+          <spirit:displayName>Add HBreak Request port</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_HBreakTest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_breakslaveoveride</spirit:name>
+          <spirit:displayName>Manually assign break slave</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_breakslaveoveride">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_useLimit</spirit:name>
+          <spirit:displayName>Use Limit for region range</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="mpu_useLimit">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_enabled</spirit:name>
+          <spirit:displayName>Include MPU</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="mpu_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_enabled</spirit:name>
+          <spirit:displayName>Include MMU</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="mmu_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_autoAssignTlbPtrSz</spirit:name>
+          <spirit:displayName>Optimize TLB entries base on device family</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="mmu_autoAssignTlbPtrSz">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>cpuReset</spirit:name>
+          <spirit:displayName>Include cpu_resetrequest and cpu_resettaken signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="cpuReset">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetrequest_enabled</spirit:name>
+          <spirit:displayName>Include reset_req signal for OCI RAM and Multi-Cycle Custom Instructions</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="resetrequest_enabled">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_removeRAMinit</spirit:name>
+          <spirit:displayName>Remove RAM Initialization</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_removeRAMinit">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_tmr_output_disable</spirit:name>
+          <spirit:displayName>Create a signal to disable TMR outputs</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_tmr_output_disable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_shadowRegisterSets</spirit:name>
+          <spirit:displayName>Number of shadow register sets (0-63)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setting_shadowRegisterSets">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_numOfInstRegion</spirit:name>
+          <spirit:displayName>        Number of instruction regions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mpu_numOfInstRegion">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_numOfDataRegion</spirit:name>
+          <spirit:displayName>        Number of data regions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mpu_numOfDataRegion">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_TLBMissExcOffset</spirit:name>
+          <spirit:displayName>Fast TLB Miss Exception vector offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_TLBMissExcOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetOffset</spirit:name>
+          <spirit:displayName>Reset vector offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="resetOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>exceptionOffset</spirit:name>
+          <spirit:displayName>Exception vector offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="exceptionOffset">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>cpuID</spirit:name>
+          <spirit:displayName>CPUID control register value</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="cpuID">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>breakOffset</spirit:name>
+          <spirit:displayName>Break vector offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="breakOffset">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>userDefinedSettings</spirit:name>
+          <spirit:displayName>User Defined Settings</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="userDefinedSettings"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tracefilename</spirit:name>
+          <spirit:displayName>Trace File Name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tracefilename"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetSlave</spirit:name>
+          <spirit:displayName>Reset vector memory</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="resetSlave">onchip_memory2_0.s1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_TLBMissExcSlave</spirit:name>
+          <spirit:displayName>Fast TLB Miss Exception vector memory</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="mmu_TLBMissExcSlave">None</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>exceptionSlave</spirit:name>
+          <spirit:displayName>Exception vector memory</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="exceptionSlave">onchip_memory2_0.s1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>breakSlave</spirit:name>
+          <spirit:displayName>Break vector memory</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="breakSlave">None</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_interruptControllerType</spirit:name>
+          <spirit:displayName>Interrupt controller</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="setting_interruptControllerType">Internal</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_branchpredictiontype</spirit:name>
+          <spirit:displayName>Branch prediction type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="setting_branchpredictiontype">Dynamic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_bhtPtrSz</spirit:name>
+          <spirit:displayName>        Number of entries (2-bits wide)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setting_bhtPtrSz">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>cpuArchRev</spirit:name>
+          <spirit:displayName>Architecture Revision</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="cpuArchRev">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>stratix_dspblock_shift_mul</spirit:name>
+          <spirit:displayName>stratix_dspblock_shift_mul</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="stratix_dspblock_shift_mul">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>shifterType</spirit:name>
+          <spirit:displayName>shifterType</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="shifterType">medium_le_shift</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>multiplierType</spirit:name>
+          <spirit:displayName>multiplierType</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="multiplierType">no_mul</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mul_shift_choice</spirit:name>
+          <spirit:displayName>Multiply/Shift/Rotate Hardware</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mul_shift_choice">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mul_32_impl</spirit:name>
+          <spirit:displayName>Multiply Implementation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mul_32_impl">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mul_64_impl</spirit:name>
+          <spirit:displayName>Multiply Extended Implementation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mul_64_impl">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>shift_rot_impl</spirit:name>
+          <spirit:displayName>Shift/Rotate Implementation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="shift_rot_impl">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dividerType</spirit:name>
+          <spirit:displayName>Divide Hardware</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dividerType">no_div</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_minInstRegionSize</spirit:name>
+          <spirit:displayName>        Minimum instruction region size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mpu_minInstRegionSize">12</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpu_minDataRegionSize</spirit:name>
+          <spirit:displayName>        Minimum data region size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mpu_minDataRegionSize">12</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_uitlbNumEntries</spirit:name>
+          <spirit:displayName>        Micro ITLB entries</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_uitlbNumEntries">4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_udtlbNumEntries</spirit:name>
+          <spirit:displayName>        Micro DTLB entries</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_udtlbNumEntries">6</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_tlbPtrSz</spirit:name>
+          <spirit:displayName>        TLB entries</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_tlbPtrSz">7</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_tlbNumWays</spirit:name>
+          <spirit:displayName>        TLB Set-Associativity</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_tlbNumWays">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_processIDNumBits</spirit:name>
+          <spirit:displayName>        Process ID (PID) bits</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_processIDNumBits">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>impl</spirit:name>
+          <spirit:displayName>Nios II Core</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="impl">Tiny</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>icache_size</spirit:name>
+          <spirit:displayName>Size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="icache_size">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>fa_cache_line</spirit:name>
+          <spirit:displayName>Number of Cache Lines</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="fa_cache_line">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>fa_cache_linesize</spirit:name>
+          <spirit:displayName>Line Size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="fa_cache_linesize">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>icache_tagramBlockType</spirit:name>
+          <spirit:displayName>Tag RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="icache_tagramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>icache_ramBlockType</spirit:name>
+          <spirit:displayName>Data RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="icache_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>icache_numTCIM</spirit:name>
+          <spirit:displayName>Number of tightly coupled instruction master ports</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="icache_numTCIM">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>icache_burstType</spirit:name>
+          <spirit:displayName>Add burstcount signal to instruction_master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="icache_burstType">None</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_bursts</spirit:name>
+          <spirit:displayName>Add burstcount signal to data_master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dcache_bursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_victim_buf_impl</spirit:name>
+          <spirit:displayName>Victim buffer implementation</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dcache_victim_buf_impl">ram</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_size</spirit:name>
+          <spirit:displayName>Size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dcache_size">2048</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_tagramBlockType</spirit:name>
+          <spirit:displayName>Tag RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dcache_tagramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_ramBlockType</spirit:name>
+          <spirit:displayName>Data RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dcache_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_numTCDM</spirit:name>
+          <spirit:displayName>Number of tightly coupled data master ports</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dcache_numTCDM">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_exportvectors</spirit:name>
+          <spirit:displayName>Export Vectors</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_exportvectors">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_usedesignware</spirit:name>
+          <spirit:displayName>Use Designware Components</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_usedesignware">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_ecc_present</spirit:name>
+          <spirit:displayName>ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_ecc_present">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_ic_ecc_present</spirit:name>
+          <spirit:displayName>Instruction Cache ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_ic_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_rf_ecc_present</spirit:name>
+          <spirit:displayName>Register File ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_rf_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_mmu_ecc_present</spirit:name>
+          <spirit:displayName>MMU ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_mmu_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_dc_ecc_present</spirit:name>
+          <spirit:displayName>Data Cache ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_dc_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_itcm_ecc_present</spirit:name>
+          <spirit:displayName>Instruction TCM ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_itcm_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_dtcm_ecc_present</spirit:name>
+          <spirit:displayName>Data TCM ECC Present</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_dtcm_ecc_present">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>regfile_ramBlockType</spirit:name>
+          <spirit:displayName>RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="regfile_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ocimem_ramBlockType</spirit:name>
+          <spirit:displayName>RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ocimem_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ocimem_ramInit</spirit:name>
+          <spirit:displayName>Initialized OCI RAM</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="ocimem_ramInit">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_ramBlockType</spirit:name>
+          <spirit:displayName>        MMU RAM block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="mmu_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bht_ramBlockType</spirit:name>
+          <spirit:displayName>BHT RAM Block Type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bht_ramBlockType">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>cdx_enabled</spirit:name>
+          <spirit:displayName>CDX (Code Density eXtension) Instructions</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="cdx_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mpx_enabled</spirit:name>
+          <spirit:displayName>mpx_enabled</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="mpx_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_enabled</spirit:name>
+          <spirit:displayName>Include JTAG Debug</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_enabled">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_triggerArming</spirit:name>
+          <spirit:displayName>Trigger Arming</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_triggerArming">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_debugReqSignals</spirit:name>
+          <spirit:displayName>Include debugreq and debugack Signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_debugReqSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_assignJtagInstanceID</spirit:name>
+          <spirit:displayName>Assign JTAG Instance ID for debug core manually</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_assignJtagInstanceID">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_jtagInstanceID</spirit:name>
+          <spirit:displayName>JTAG Instance ID value</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="debug_jtagInstanceID">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_OCIOnchipTrace</spirit:name>
+          <spirit:displayName>Onchip Trace Frame Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="debug_OCIOnchipTrace">_128</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_hwbreakpoint</spirit:name>
+          <spirit:displayName>Hardware Breakpoints</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="debug_hwbreakpoint">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_datatrigger</spirit:name>
+          <spirit:displayName>Data Triggers</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="debug_datatrigger">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_traceType</spirit:name>
+          <spirit:displayName>Trace Types</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="debug_traceType">none</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_traceStorage</spirit:name>
+          <spirit:displayName>Trace Storage</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="debug_traceStorage">onchip_trace</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>master_addr_map</spirit:name>
+          <spirit:displayName>Manually Set Master Base Address and Size</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="master_addr_map">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instruction_master_paddr_base</spirit:name>
+          <spirit:displayName>Instruction Master Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="instruction_master_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instruction_master_paddr_size</spirit:name>
+          <spirit:displayName>Instruction Master Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instruction_master_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>flash_instruction_master_paddr_base</spirit:name>
+          <spirit:displayName>Flash Instruction Master Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="flash_instruction_master_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>flash_instruction_master_paddr_size</spirit:name>
+          <spirit:displayName>Flash Instruction Master Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="flash_instruction_master_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>data_master_paddr_base</spirit:name>
+          <spirit:displayName>Data Master Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="data_master_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>data_master_paddr_size</spirit:name>
+          <spirit:displayName>Data Master Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="data_master_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_0_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 0 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_instruction_master_0_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_0_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 0 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_instruction_master_0_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_1_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 1 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_instruction_master_1_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_1_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 1 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_instruction_master_1_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_2_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 2 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_instruction_master_2_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_2_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 2 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_instruction_master_2_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_3_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 3 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_instruction_master_3_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_instruction_master_3_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Instruction Master 3 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_instruction_master_3_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_0_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 0 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_data_master_0_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_0_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 0 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_data_master_0_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_1_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 1 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_data_master_1_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_1_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 1 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_data_master_1_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_2_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 2 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_data_master_2_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_2_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 2 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_data_master_2_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_3_paddr_base</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 3 Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightly_coupled_data_master_3_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightly_coupled_data_master_3_paddr_size</spirit:name>
+          <spirit:displayName>Tightly coupled Data Master 3 Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightly_coupled_data_master_3_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instruction_master_high_performance_paddr_base</spirit:name>
+          <spirit:displayName>Instruction Master High Performance Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="instruction_master_high_performance_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instruction_master_high_performance_paddr_size</spirit:name>
+          <spirit:displayName>Instruction Master High Performance Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instruction_master_high_performance_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>data_master_high_performance_paddr_base</spirit:name>
+          <spirit:displayName>Data Master High Performance Base Address</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="data_master_high_performance_paddr_base">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>data_master_high_performance_paddr_size</spirit:name>
+          <spirit:displayName>Data Master High Performance Size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="data_master_high_performance_paddr_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetAbsoluteAddr</spirit:name>
+          <spirit:displayName>Reset vector</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="resetAbsoluteAddr">131072</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>exceptionAbsoluteAddr</spirit:name>
+          <spirit:displayName>Exception vector</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="exceptionAbsoluteAddr">131104</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>breakAbsoluteAddr</spirit:name>
+          <spirit:displayName>Break vector</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="breakAbsoluteAddr">14368</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mmu_TLBMissExcAbsAddr</spirit:name>
+          <spirit:displayName>Fast TLB Miss Exception vector</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mmu_TLBMissExcAbsAddr">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_bursts_derived</spirit:name>
+          <spirit:displayName>dcache_bursts_derived</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dcache_bursts_derived">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_size_derived</spirit:name>
+          <spirit:displayName>dcache_size_derived</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dcache_size_derived">2048</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>breakSlave_derived</spirit:name>
+          <spirit:displayName>breakSlave_derived</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="breakSlave_derived">cpu_0.debug_mem_slave</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dcache_lineSize_derived</spirit:name>
+          <spirit:displayName>dcache_lineSize_derived</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dcache_lineSize_derived">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_ioregionBypassDCache</spirit:name>
+          <spirit:displayName>setting_ioregionBypassDCache</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_ioregionBypassDCache">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setting_bit31BypassDCache</spirit:name>
+          <spirit:displayName>setting_bit31BypassDCache</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="setting_bit31BypassDCache">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>translate_on</spirit:name>
+          <spirit:displayName>translate_on</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="translate_on"> "synthesis translate_on"  </spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>translate_off</spirit:name>
+          <spirit:displayName>translate_off</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="translate_off"> "synthesis translate_off" </spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_onchiptrace</spirit:name>
+          <spirit:displayName>debug_onchiptrace</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_onchiptrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_offchiptrace</spirit:name>
+          <spirit:displayName>debug_offchiptrace</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_offchiptrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_insttrace</spirit:name>
+          <spirit:displayName>debug_insttrace</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_insttrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>debug_datatrace</spirit:name>
+          <spirit:displayName>debug_datatrace</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="debug_datatrace">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instAddrWidth</spirit:name>
+          <spirit:displayName>instAddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="instAddrWidth">18</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>faAddrWidth</spirit:name>
+          <spirit:displayName>faAddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="faAddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataAddrWidth</spirit:name>
+          <spirit:displayName>dataAddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataAddrWidth">18</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster0AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster0AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledDataMaster0AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster1AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster1AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledDataMaster1AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster2AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster2AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledDataMaster2AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster3AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster3AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledDataMaster3AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster0AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster0AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledInstructionMaster0AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster1AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster1AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledInstructionMaster1AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster2AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster2AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledInstructionMaster2AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster3AddrWidth</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster3AddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="tightlyCoupledInstructionMaster3AddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataMasterHighPerformanceAddrWidth</spirit:name>
+          <spirit:displayName>dataMasterHighPerformanceAddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataMasterHighPerformanceAddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instructionMasterHighPerformanceAddrWidth</spirit:name>
+          <spirit:displayName>instructionMasterHighPerformanceAddrWidth</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="instructionMasterHighPerformanceAddrWidth">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instSlaveMapParam</spirit:name>
+          <spirit:displayName>instSlaveMapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instSlaveMapParam"><![CDATA[<address-map><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>faSlaveMapParam</spirit:name>
+          <spirit:displayName>faSlaveMapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="faSlaveMapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataSlaveMapParam</spirit:name>
+          <spirit:displayName>dataSlaveMapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /><slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /><slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /><slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /><slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /><slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /><slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='kernel_clk_gen.ctrl' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x8000' end='0x9000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x9000' end='0xA000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster0MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledDataMaster0MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster1MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster1MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledDataMaster1MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster2MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster2MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledDataMaster2MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledDataMaster3MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledDataMaster3MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledDataMaster3MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster0MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster0MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledInstructionMaster0MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster1MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster1MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledInstructionMaster1MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster2MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster2MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledInstructionMaster2MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>tightlyCoupledInstructionMaster3MapParam</spirit:name>
+          <spirit:displayName>tightlyCoupledInstructionMaster3MapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="tightlyCoupledInstructionMaster3MapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataMasterHighPerformanceMapParam</spirit:name>
+          <spirit:displayName>dataMasterHighPerformanceMapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dataMasterHighPerformanceMapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instructionMasterHighPerformanceMapParam</spirit:name>
+          <spirit:displayName>instructionMasterHighPerformanceMapParam</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instructionMasterHighPerformanceMapParam"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockFrequency</spirit:name>
+          <spirit:displayName>clockFrequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockFrequency">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamilyName</spirit:name>
+          <spirit:displayName>deviceFamilyName</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamilyName">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>internalIrqMaskSystemInfo</spirit:name>
+          <spirit:displayName>internalIrqMaskSystemInfo</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="internalIrqMaskSystemInfo">7</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>customInstSlavesSystemInfo</spirit:name>
+          <spirit:displayName>customInstSlavesSystemInfo</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="customInstSlavesSystemInfo"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>customInstSlavesSystemInfo_nios_a</spirit:name>
+          <spirit:displayName>customInstSlavesSystemInfo_nios_a</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="customInstSlavesSystemInfo_nios_a"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>customInstSlavesSystemInfo_nios_b</spirit:name>
+          <spirit:displayName>customInstSlavesSystemInfo_nios_b</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="customInstSlavesSystemInfo_nios_b"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>customInstSlavesSystemInfo_nios_c</spirit:name>
+          <spirit:displayName>customInstSlavesSystemInfo_nios_c</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="customInstSlavesSystemInfo_nios_c"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFeaturesSystemInfo</spirit:name>
+          <spirit:displayName>deviceFeaturesSystemInfo</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFeaturesSystemInfo">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE</spirit:name>
+          <spirit:displayName>Auto DEVICE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE_SPEEDGRADE</spirit:name>
+          <spirit:displayName>Auto DEVICE_SPEEDGRADE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_SPEEDGRADE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_CLK_CLOCK_DOMAIN</spirit:name>
+          <spirit:displayName>Auto CLOCK_DOMAIN</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AUTO_CLK_CLOCK_DOMAIN">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_CLK_RESET_DOMAIN</spirit:name>
+          <spirit:displayName>Auto RESET_DOMAIN</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AUTO_CLK_RESET_DOMAIN">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>debug.hostConnection</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="debug.hostConnection">type jtag id 70:34|110:135</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.BIG_ENDIAN</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BIG_ENDIAN">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.BREAK_ADDR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BREAK_ADDR">0x00003820</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CPU_ARCH_NIOS2_R1</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CPU_ARCH_NIOS2_R1"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CPU_FREQ</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CPU_FREQ">100000000u</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CPU_ID_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CPU_ID_SIZE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CPU_ID_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CPU_ID_VALUE">0x00000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CPU_IMPLEMENTATION</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CPU_IMPLEMENTATION">"tiny"</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DATA_ADDR_WIDTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_ADDR_WIDTH">18</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DCACHE_LINE_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DCACHE_LINE_SIZE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DCACHE_LINE_SIZE_LOG2">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DCACHE_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DCACHE_SIZE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.EXCEPTION_ADDR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.EXCEPTION_ADDR">0x00020020</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FLASH_ACCELERATOR_LINES</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FLASH_ACCELERATOR_LINES">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FLASH_ACCELERATOR_LINE_SIZE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FLUSHDA_SUPPORTED</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FLUSHDA_SUPPORTED"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HARDWARE_MULX_PRESENT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HARDWARE_MULX_PRESENT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_DEBUG_CORE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_DEBUG_CORE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_DEBUG_STUB</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_DEBUG_STUB"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_ILLEGAL_INSTRUCTION_EXCEPTION"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_JMPI_INSTRUCTION</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_JMPI_INSTRUCTION"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ICACHE_LINE_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ICACHE_LINE_SIZE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ICACHE_LINE_SIZE_LOG2">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ICACHE_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ICACHE_SIZE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INST_ADDR_WIDTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INST_ADDR_WIDTH">18</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.OCI_VERSION</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.OCI_VERSION">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.RESET_ADDR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.RESET_ADDR">0x00020000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.DataCacheVictimBufImpl</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.DataCacheVictimBufImpl">ram</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.HDLSimCachesCleared</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.HDLSimCachesCleared">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.breakOffset</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.breakOffset">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.breakSlave</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.breakSlave">cpu_0.debug_mem_slave</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.cpuArchitecture</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.cpuArchitecture">Nios II</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.exceptionOffset</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.exceptionOffset">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.exceptionSlave</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.exceptionSlave">onchip_memory2_0.s1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.resetOffset</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.resetOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.configuration.resetSlave</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.resetSlave">onchip_memory2_0.s1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.compatible</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.compatible">altr,nios2-1.1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.group</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.group">cpu</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.name</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.name">nios2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.altr,exception-addr</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.altr,exception-addr">0x00020020</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.altr,implementation</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.altr,implementation">"tiny"</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.altr,reset-addr</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.altr,reset-addr">0x00020000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.clock-frequency</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.clock-frequency">100000000u</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.dcache-line-size</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.dcache-line-size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.dcache-size</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.dcache-size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.icache-line-size</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.icache-line-size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.icache-size</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.icache-size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.vendor</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.vendor">altr</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>custom_instruction_master</name>
+            <type>nios_custom_instruction</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>dummy_ci_port</name>
+                    <role>readra</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>CIName</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>addressWidth</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>clockCycle</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>enabled</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxAddressWidth</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>opcodeExtension</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>sharedCombinationalAndMulticycle</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>data_master</name>
+            <type>avalon</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>d_address</name>
+                    <role>address</role>
+                    <direction>Output</direction>
+                    <width>18</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>d_byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Output</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>d_read</name>
+                    <role>read</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>d_readdata</name>
+                    <role>readdata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>d_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>d_write</name>
+                    <role>write</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>d_writedata</name>
+                    <role>writedata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_debugaccess_to_roms</name>
+                    <role>debugaccess</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>debug.providesServices</key>
+                        <value>master</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>adaptsTo</key>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>SYMBOLS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>dBSBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamReads</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamWrites</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isAsynchronous</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isReadable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isWriteable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxAddressWidth</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>debug_mem_slave</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>debug_mem_slave_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>9</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_debugaccess</name>
+                    <role>debugaccess</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>debug_mem_slave_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.hideDevice</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>qsys.ui.connect</key>
+                        <value>instruction_master,data_master</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>2048</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>debug_reset_request</name>
+            <type>reset</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>debug_reset_request</name>
+                    <role>reset</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedDirectReset</key>
+                    </entry>
+                    <entry>
+                        <key>associatedResetSinks</key>
+                        <value>none</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>instruction_master</name>
+            <type>avalon</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>i_address</name>
+                    <role>address</role>
+                    <direction>Output</direction>
+                    <width>18</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>i_read</name>
+                    <role>read</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>i_readdata</name>
+                    <role>readdata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>i_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>adaptsTo</key>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>SYMBOLS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>dBSBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamReads</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamWrites</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isAsynchronous</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isReadable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isWriteable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>maxAddressWidth</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>irq</name>
+            <type>interrupt</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>irq</name>
+                    <role>irq</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                        <value>board_cpu_0.data_master</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>irqMap</key>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>INDIVIDUAL_REQUESTS</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>reset_req</name>
+                    <role>reset_req</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_DOMAIN</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                    <entry>
+                        <key>RESET_DOMAIN</key>
+                        <value>1</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>custom_instruction_master</key>
+            <value>
+                <connectionPointName>custom_instruction_master</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CUSTOM_INSTRUCTION_SLAVES</key>
+                        <value></value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>data_master</key>
+            <value>
+                <connectionPointName>data_master</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='kernel_clk_gen.ctrl' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x8000' end='0x9000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x9000' end='0xA000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>18</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>debug_mem_slave</key>
+            <value>
+                <connectionPointName>debug_mem_slave</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='debug_mem_slave' start='0x0' end='0x800' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>11</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>instruction_master</key>
+            <value>
+                <connectionPointName>instruction_master</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>18</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>irq</key>
+            <value>
+                <connectionPointName>irq</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>INTERRUPTS_USED</key>
+                        <value>7</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="cpu_0.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="custom_instruction_master" altera:internal="cpu_0.custom_instruction_master" altera:type="nios_custom_instruction" altera:dir="start">
+        <altera:port_mapping altera:name="dummy_ci_port" altera:internal="dummy_ci_port"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="data_master" altera:internal="cpu_0.data_master" altera:type="avalon" altera:dir="start">
+        <altera:port_mapping altera:name="d_address" altera:internal="d_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_byteenable" altera:internal="d_byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_read" altera:internal="d_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_readdata" altera:internal="d_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_waitrequest" altera:internal="d_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_write" altera:internal="d_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="d_writedata" altera:internal="d_writedata"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_debugaccess_to_roms" altera:internal="debug_mem_slave_debugaccess_to_roms"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="debug_mem_slave" altera:internal="cpu_0.debug_mem_slave" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="debug_mem_slave_address" altera:internal="debug_mem_slave_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_byteenable" altera:internal="debug_mem_slave_byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_debugaccess" altera:internal="debug_mem_slave_debugaccess"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_read" altera:internal="debug_mem_slave_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_readdata" altera:internal="debug_mem_slave_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_waitrequest" altera:internal="debug_mem_slave_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_write" altera:internal="debug_mem_slave_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="debug_mem_slave_writedata" altera:internal="debug_mem_slave_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="debug_reset_request" altera:internal="cpu_0.debug_reset_request" altera:type="reset" altera:dir="start">
+        <altera:port_mapping altera:name="debug_reset_request" altera:internal="debug_reset_request"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="instruction_master" altera:internal="cpu_0.instruction_master" altera:type="avalon" altera:dir="start">
+        <altera:port_mapping altera:name="i_address" altera:internal="i_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="i_read" altera:internal="i_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="i_readdata" altera:internal="i_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="i_waitrequest" altera:internal="i_waitrequest"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="irq" altera:internal="cpu_0.irq" altera:type="interrupt" altera:dir="start">
+        <altera:port_mapping altera:name="irq" altera:internal="irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="cpu_0.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_n" altera:internal="reset_n"></altera:port_mapping>
+        <altera:port_mapping altera:name="reset_req" altera:internal="reset_req"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_jtag_uart_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_jtag_uart_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..26076b6450fa80b1caafe52b046db59927318334
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_jtag_uart_0.ip
@@ -0,0 +1,1241 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_jtag_uart_0</spirit:library>
+  <spirit:name>jtag_uart_0</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>avalon_jtag_slave</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_chipselect</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_read_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_write_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">NATIVE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">1</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>irq</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>av_irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">board_jtag_uart_0.avalon_jtag_slave</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedReceiverOffset</spirit:name>
+          <spirit:displayName>Bridged receiver offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToReceiver</spirit:name>
+          <spirit:displayName>Bridges to receiver</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rst_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_avalon_jtag_uart</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rst_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_chipselect</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_read_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_write_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>av_irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_jtag_uart_0</spirit:library>
+      <spirit:name>altera_avalon_jtag_uart</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>allowMultipleConnections</spirit:name>
+          <spirit:displayName>Allow multiple connections to Avalon JTAG slave</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="allowMultipleConnections">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hubInstanceID</spirit:name>
+          <spirit:displayName>hubInstanceID</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="hubInstanceID">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readBufferDepth</spirit:name>
+          <spirit:displayName>Buffer depth (bytes)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readBufferDepth">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readIRQThreshold</spirit:name>
+          <spirit:displayName>IRQ threshold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readIRQThreshold">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simInputCharacterStream</spirit:name>
+          <spirit:displayName>Contents</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="simInputCharacterStream"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simInteractiveOptions</spirit:name>
+          <spirit:displayName>Options</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useRegistersForReadBuffer</spirit:name>
+          <spirit:displayName>Construct using registers instead of memory blocks</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useRegistersForReadBuffer">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useRegistersForWriteBuffer</spirit:name>
+          <spirit:displayName>Construct using registers instead of memory blocks</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useRegistersForWriteBuffer">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useRelativePathForSimFile</spirit:name>
+          <spirit:displayName>useRelativePathForSimFile</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useRelativePathForSimFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeBufferDepth</spirit:name>
+          <spirit:displayName>Buffer depth (bytes)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeBufferDepth">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeIRQThreshold</spirit:name>
+          <spirit:displayName>IRQ threshold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeIRQThreshold">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clkFreq</spirit:name>
+          <spirit:displayName>clkFreq</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clkFreq">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>avalonSpec</spirit:name>
+          <spirit:displayName>avalonSpec</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="avalonSpec">2.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>legacySignalAllow</spirit:name>
+          <spirit:displayName>legacySignalAllow</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="legacySignalAllow">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enableInteractiveInput</spirit:name>
+          <spirit:displayName>enableInteractiveInput</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enableInteractiveInput">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enableInteractiveOutput</spirit:name>
+          <spirit:displayName>enableInteractiveOutput</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enableInteractiveOutput">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.READ_DEPTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.READ_DEPTH">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.READ_THRESHOLD</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.READ_THRESHOLD">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.WRITE_DEPTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.WRITE_DEPTH">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.WRITE_THRESHOLD</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.WRITE_THRESHOLD">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.compatible</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.compatible">altr,juart-1.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.group</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.group">serial</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.name</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.name">juart</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.vendor</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.vendor">altr</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>avalon_jtag_slave</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>av_chipselect</name>
+                    <role>chipselect</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>av_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>av_read_n</name>
+                    <role>read_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>av_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>av_write_n</name>
+                    <role>write_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>av_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>av_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>1</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>NATIVE</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>2</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+            <cmsisInfo>
+                <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_jtag_uart&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;8&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+      &lt;registers&gt;
+        &lt;register&gt;     
+         &lt;name&gt;DATA&lt;/name&gt;  
+         &lt;displayName&gt;Data&lt;/displayName&gt;
+         &lt;description&gt;Embedded software accesses the read and write FIFOs via the data register. A read from the data register returns the first character from the FIFO (if one is available) in the DATA field. Reading also returns information about the number of characters remaining in the FIFO in the RAVAIL field. A write to the data register stores the value of the DATA field in the write FIFO. If the write FIFO is full, the character is lost.&lt;/description&gt;
+         &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;data&lt;/name&gt;
+           &lt;description&gt;The value to transfer to/from the JTAG core. When writing, the DATA field holds a character to be written to the write FIFO. When reading, the DATA field holds a character read from the read FIFO.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;8&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;rvalid&lt;/name&gt;
+           &lt;description&gt;Indicates whether the DATA field is valid. If RVALID=1, the DATA field is valid, otherwise DATA is undefined.&lt;/description&gt;
+            &lt;bitOffset&gt;0xf&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ravail&lt;/name&gt;
+           &lt;description&gt;The number of characters remaining in the read FIFO (after the current read).&lt;/description&gt;
+            &lt;bitOffset&gt;0x10&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;16&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;CONTROL&lt;/name&gt;  
+         &lt;displayName&gt;Control&lt;/displayName&gt;
+         &lt;description&gt;Embedded software controls the JTAG UART core's interrupt generation and reads status information via the control register. A read from the control register returns the status of the read and write FIFOs. Writes to the register can be used to enable/disable interrupts, or clear the AC bit.&lt;/description&gt;
+         &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;re&lt;/name&gt;
+            &lt;description&gt;Interrupt-enable bit for read interrupts.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;we&lt;/name&gt;
+            &lt;description&gt;Interrupt-enable bit for write interrupts&lt;/description&gt;
+            &lt;bitOffset&gt;0x1&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ri&lt;/name&gt;
+            &lt;description&gt;Indicates that the read interrupt is pending.&lt;/description&gt;
+            &lt;bitOffset&gt;0x8&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;wi&lt;/name&gt;
+            &lt;description&gt;Indicates that the write interrupt is pending.&lt;/description&gt;
+            &lt;bitOffset&gt;0x9&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;ac&lt;/name&gt;
+            &lt;description&gt;Indicates that there has been JTAG activity since the bit was cleared. Writing 1 to AC clears it to 0.&lt;/description&gt;
+            &lt;bitOffset&gt;0xa&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+           &lt;field&gt;&lt;name&gt;wspace&lt;/name&gt;
+            &lt;description&gt;The number of spaces available in the write FIFO&lt;/description&gt;
+            &lt;bitOffset&gt;0x10&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;16&lt;/bitWidth&gt;
+            &lt;access&gt;read-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt;            
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                <addressGroup></addressGroup>
+                <cmsisVars/>
+            </cmsisInfo>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>irq</name>
+            <type>interrupt</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>av_irq</name>
+                    <role>irq</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                        <value>board_jtag_uart_0.avalon_jtag_slave</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedReceiverOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToReceiver</key>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>rst_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>avalon_jtag_slave</key>
+            <value>
+                <connectionPointName>avalon_jtag_slave</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='avalon_jtag_slave' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="avalon_jtag_slave" altera:internal="jtag_uart_0.avalon_jtag_slave" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="av_address" altera:internal="av_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_chipselect" altera:internal="av_chipselect"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_read_n" altera:internal="av_read_n"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_readdata" altera:internal="av_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_waitrequest" altera:internal="av_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_write_n" altera:internal="av_write_n"></altera:port_mapping>
+        <altera:port_mapping altera:name="av_writedata" altera:internal="av_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="jtag_uart_0.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="irq" altera:internal="jtag_uart_0.irq" altera:type="interrupt" altera:dir="end">
+        <altera:port_mapping altera:name="av_irq" altera:internal="av_irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="jtag_uart_0.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="rst_n" altera:internal="rst_n"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk.ip
new file mode 100644
index 0000000000000000000000000000000000000000..dba55b8c32e125e66ce56890ee90c92b8cc01f5f
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk.ip
@@ -0,0 +1,506 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Altera Corporation</spirit:vendor>
+  <spirit:library>board_kernel_clk</spirit:library>
+  <spirit:name>board_kernel_clk</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_out</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedDirectClock</spirit:name>
+          <spirit:displayName>Associated direct clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectClock">clk_in</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">400000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRateKnown</spirit:name>
+          <spirit:displayName>Clock rate known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_in</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>in_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">400000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">clk</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_in_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">reset</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n_out</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedDirectReset</spirit:name>
+          <spirit:displayName>Associated direct reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectReset">clk_in_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedResetSinks</spirit:name>
+          <spirit:displayName>Associated reset sinks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedResetSinks">clk_in_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>clock_source</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>in_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_out</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n_out</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Altera Corporation</spirit:vendor>
+      <spirit:library>board_kernel_clk</spirit:library>
+      <spirit:name>clock_source</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockFrequency</spirit:name>
+          <spirit:displayName>Clock frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockFrequency">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockFrequencyKnown</spirit:name>
+          <spirit:displayName>Clock frequency is known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockFrequencyKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>inputClockFrequency</spirit:name>
+          <spirit:displayName>inputClockFrequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="inputClockFrequency">400000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetSynchronousEdges</spirit:name>
+          <spirit:displayName>Reset synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="resetSynchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>clk_out</name>
+                    <role>clk</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedDirectClock</key>
+                        <value>clk_in</value>
+                    </entry>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>400000000</value>
+                    </entry>
+                    <entry>
+                        <key>clockRateKnown</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_in</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>in_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>clk</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>400000000</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_in_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>reset</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk_reset</name>
+            <type>reset</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>reset_n_out</name>
+                    <role>reset_n</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedDirectReset</key>
+                        <value>clk_in_reset</value>
+                    </entry>
+                    <entry>
+                        <key>associatedResetSinks</key>
+                        <value>clk_in_reset</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>400000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>clk_in</key>
+            <value>
+                <connectionPointName>clk_in</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>400000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="board_kernel_clk.clk" altera:type="clock" altera:dir="start">
+        <altera:port_mapping altera:name="clk_out" altera:internal="clk_out"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_in" altera:internal="board_kernel_clk.clk_in" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="in_clk" altera:internal="in_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_in_reset" altera:internal="board_kernel_clk.clk_in_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_n" altera:internal="reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_reset" altera:internal="board_kernel_clk.clk_reset" altera:type="reset" altera:dir="start">
+        <altera:port_mapping altera:name="reset_n_out" altera:internal="reset_n_out"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk_gen.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk_gen.ip
new file mode 100644
index 0000000000000000000000000000000000000000..0e780eb4ad31ab98ad2b9ce4067b1a0a2a208636
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_clk_gen.ip
@@ -0,0 +1,1452 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>author</spirit:vendor>
+  <spirit:library>board_kernel_clk_gen</spirit:library>
+  <spirit:name>board_kernel_clk_gen</spirit:name>
+  <spirit:version>16.1</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">50000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">clk</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ctrl</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdatavalid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_readdatavalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>burstcount</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_burstcount</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>debugaccess</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_debugaccess</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedDirectClock</spirit:name>
+          <spirit:displayName>Associated direct clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">400000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRateKnown</spirit:name>
+          <spirit:displayName>Clock rate known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk2x</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk2x_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedDirectClock</spirit:name>
+          <spirit:displayName>Associated direct clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">800000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRateKnown</spirit:name>
+          <spirit:displayName>Clock rate known</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_pll_locked</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_pll_locked_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_pll_refclk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_pll_refclk_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">reset</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>acl_kernel_clk_a10</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_readdatavalid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_burstcount</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>11</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_debugaccess</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk2x_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_pll_locked_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_pll_refclk_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>author</spirit:vendor>
+      <spirit:library>board_kernel_clk_gen</spirit:library>
+      <spirit:name>acl_kernel_clk_a10</spirit:name>
+      <spirit:version>16.1</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>REF_CLK_RATE</spirit:name>
+          <spirit:displayName>REF_CLK_RATE</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="REF_CLK_RATE">100.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>KERNEL_TARGET_CLOCK_RATE</spirit:name>
+          <spirit:displayName>KERNEL_TARGET_CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="KERNEL_TARGET_CLOCK_RATE">400.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE_FAMILY</spirit:name>
+          <spirit:displayName>Auto DEVICE_FAMILY</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_FAMILY">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE</spirit:name>
+          <spirit:displayName>Auto DEVICE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE_SPEEDGRADE</spirit:name>
+          <spirit:displayName>Auto DEVICE_SPEEDGRADE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_SPEEDGRADE">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>clk</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>50000000</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ctrl</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>ctrl_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_readdatavalid</name>
+                    <role>readdatavalid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_burstcount</name>
+                    <role>burstcount</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>12</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_debugaccess</name>
+                    <role>debugaccess</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>SYMBOLS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>4</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_clk</name>
+            <type>clock</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk_clk</name>
+                    <role>clk</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedDirectClock</key>
+                    </entry>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>400000000</value>
+                    </entry>
+                    <entry>
+                        <key>clockRateKnown</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_clk2x</name>
+            <type>clock</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk2x_clk</name>
+                    <role>clk</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedDirectClock</key>
+                    </entry>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>800000000</value>
+                    </entry>
+                    <entry>
+                        <key>clockRateKnown</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_pll_locked</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_pll_locked_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_pll_refclk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_pll_refclk_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>ui.blockdiagram.direction</key>
+                        <value>input</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>100000000</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>reset</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>ctrl</key>
+            <value>
+                <connectionPointName>ctrl</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='ctrl' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>kernel_clk</key>
+            <value>
+                <connectionPointName>kernel_clk</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>400000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>kernel_clk2x</key>
+            <value>
+                <connectionPointName>kernel_clk2x</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>800000000</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="board_kernel_clk_gen.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk_clk" altera:internal="clk_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ctrl" altera:internal="board_kernel_clk_gen.ctrl" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="ctrl_address" altera:internal="ctrl_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_burstcount" altera:internal="ctrl_burstcount"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_byteenable" altera:internal="ctrl_byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_debugaccess" altera:internal="ctrl_debugaccess"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_read" altera:internal="ctrl_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_readdata" altera:internal="ctrl_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_readdatavalid" altera:internal="ctrl_readdatavalid"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_waitrequest" altera:internal="ctrl_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_write" altera:internal="ctrl_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_writedata" altera:internal="ctrl_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_clk" altera:internal="board_kernel_clk_gen.kernel_clk" altera:type="clock" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_clk_clk" altera:internal="kernel_clk_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_clk2x" altera:internal="board_kernel_clk_gen.kernel_clk2x" altera:type="clock" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_clk2x_clk" altera:internal="kernel_clk2x_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_pll_locked" altera:internal="board_kernel_clk_gen.kernel_pll_locked" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_pll_locked_export" altera:internal="kernel_pll_locked_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_pll_refclk" altera:internal="board_kernel_clk_gen.kernel_pll_refclk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_pll_refclk_clk" altera:internal="kernel_pll_refclk_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="board_kernel_clk_gen.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_reset_n" altera:internal="reset_reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>true</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_interface.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_interface.ip
new file mode 100644
index 0000000000000000000000000000000000000000..6f2892cf648b2341ea464d402a526beb3eb1e65c
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_kernel_interface.ip
@@ -0,0 +1,2314 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>author</spirit:vendor>
+  <spirit:library>board_kernel_interface</spirit:library>
+  <spirit:name>board_kernel_interface</spirit:name>
+  <spirit:version>15.1</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>acl_bsp_memorg_host0x018</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>mode</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>acl_bsp_memorg_host0x018_mode</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">clk</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>ctrl</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdatavalid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_readdatavalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>burstcount</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_burstcount</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>debugaccess</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>ctrl_debugaccess</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">16384</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_cra</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdatavalid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_readdatavalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>burstcount</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_burstcount</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>debugaccess</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_cra_debugaccess</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>adaptsTo</spirit:name>
+          <spirit:displayName>Adapts to</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="adaptsTo"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dBSBigEndian</spirit:name>
+          <spirit:displayName>dBS big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="dBSBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamReads</spirit:name>
+          <spirit:displayName>Use flow control for read transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamReads">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>doStreamWrites</spirit:name>
+          <spirit:displayName>Use flow control for write transfers</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="doStreamWrites">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isAsynchronous</spirit:name>
+          <spirit:displayName>Is asynchronous</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isAsynchronous">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Is big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isReadable</spirit:name>
+          <spirit:displayName>Is readable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isReadable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isWriteable</spirit:name>
+          <spirit:displayName>Is writeable</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isWriteable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxAddressWidth</spirit:name>
+          <spirit:displayName>Maximum address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxAddressWidth">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_irq_from_kernel</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_irq_from_kernel_irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqMap</spirit:name>
+          <spirit:displayName>IRQ Map</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqMap"><![CDATA[<map><mapping port='0' sender='sender0_irq' /></map>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">INDIVIDUAL_REQUESTS</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_irq_to_host</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_irq_to_host_irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedReceiverOffset</spirit:name>
+          <spirit:displayName>Bridged receiver offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToReceiver</spirit:name>
+          <spirit:displayName>Bridges to receiver</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToReceiver">board_kernel_interface.kernel_irq_from_kernel</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_reset_reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedDirectReset</spirit:name>
+          <spirit:displayName>Associated direct reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedResetSinks</spirit:name>
+          <spirit:displayName>Associated reset sinks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset,reset,sw_reset_in</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>qsys.ui.export_name</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="qsys.ui.export_name">reset</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>sw_reset_export</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>sw_reset_export_reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedDirectReset</spirit:name>
+          <spirit:displayName>Associated direct reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedDirectReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedResetSinks</spirit:name>
+          <spirit:displayName>Associated reset sinks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset,sw_reset_in</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>sw_reset_in</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>sw_reset_in_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>kernel_interface</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>acl_bsp_memorg_host0x018_mode</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>1</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_readdatavalid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_burstcount</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>13</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>ctrl_debugaccess</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>63</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_readdatavalid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_burstcount</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>63</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>29</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>7</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_cra_debugaccess</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_irq_from_kernel_irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_irq_to_host_irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_reset_reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>sw_reset_export_reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>sw_reset_in_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>author</spirit:vendor>
+      <spirit:library>board_kernel_interface</spirit:library>
+      <spirit:name>kernel_interface</spirit:name>
+      <spirit:version>15.1</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>NUM_GLOBAL_MEMS</spirit:name>
+          <spirit:displayName>Number of global memory systems</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="NUM_GLOBAL_MEMS">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENABLE_ROM_RECONFIGURE</spirit:name>
+          <spirit:displayName>Enable sys description rom PR</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENABLE_ROM_RECONFIGURE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE_FAMILY</spirit:name>
+          <spirit:displayName>Auto DEVICE_FAMILY</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_FAMILY">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE</spirit:name>
+          <spirit:displayName>Auto DEVICE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_DEVICE_SPEEDGRADE</spirit:name>
+          <spirit:displayName>Auto DEVICE_SPEEDGRADE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_SPEEDGRADE">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>acl_bsp_memorg_host0x018</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>acl_bsp_memorg_host0x018_mode</name>
+                    <role>mode</role>
+                    <direction>Output</direction>
+                    <width>2</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>clk</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>100000000</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>ctrl</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>ctrl_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_readdatavalid</name>
+                    <role>readdatavalid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_burstcount</name>
+                    <role>burstcount</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>14</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>ctrl_debugaccess</name>
+                    <role>debugaccess</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>16384</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>SYMBOLS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_cra</name>
+            <type>avalon</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_cra_waitrequest</name>
+                    <role>waitrequest</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_readdata</name>
+                    <role>readdata</role>
+                    <direction>Input</direction>
+                    <width>64</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_readdatavalid</name>
+                    <role>readdatavalid</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_burstcount</name>
+                    <role>burstcount</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_writedata</name>
+                    <role>writedata</role>
+                    <direction>Output</direction>
+                    <width>64</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_address</name>
+                    <role>address</role>
+                    <direction>Output</direction>
+                    <width>30</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_write</name>
+                    <role>write</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_read</name>
+                    <role>read</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Output</direction>
+                    <width>8</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_cra_debugaccess</name>
+                    <role>debugaccess</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>adaptsTo</key>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>SYMBOLS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>dBSBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamReads</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>doStreamWrites</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isAsynchronous</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isReadable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isWriteable</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxAddressWidth</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_irq_from_kernel</name>
+            <type>interrupt</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_irq_from_kernel_irq</name>
+                    <role>irq</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>irqMap</key>
+                        <value>&lt;map&gt;&lt;mapping port='0' sender='sender0_irq' /&gt;&lt;/map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>INDIVIDUAL_REQUESTS</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_irq_to_host</name>
+            <type>interrupt</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_irq_to_host_irq</name>
+                    <role>irq</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedReceiverOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToReceiver</key>
+                        <value>board_kernel_interface.kernel_irq_from_kernel</value>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_reset</name>
+            <type>reset</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_reset_reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedDirectReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>associatedResetSinks</key>
+                        <value>reset,reset,sw_reset_in</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>qsys.ui.export_name</key>
+                        <value>reset</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>sw_reset_export</name>
+            <type>reset</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>sw_reset_export_reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedDirectReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>associatedResetSinks</key>
+                        <value>reset,sw_reset_in</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>sw_reset_in</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>sw_reset_in_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>ctrl</key>
+            <value>
+                <connectionPointName>ctrl</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='ctrl' start='0x0' end='0x4000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>14</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="acl_bsp_memorg_host0x018" altera:internal="board_kernel_interface.acl_bsp_memorg_host0x018" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="acl_bsp_memorg_host0x018_mode" altera:internal="acl_bsp_memorg_host0x018_mode"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="board_kernel_interface.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk_clk" altera:internal="clk_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="ctrl" altera:internal="board_kernel_interface.ctrl" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="ctrl_address" altera:internal="ctrl_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_burstcount" altera:internal="ctrl_burstcount"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_byteenable" altera:internal="ctrl_byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_debugaccess" altera:internal="ctrl_debugaccess"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_read" altera:internal="ctrl_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_readdata" altera:internal="ctrl_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_readdatavalid" altera:internal="ctrl_readdatavalid"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_waitrequest" altera:internal="ctrl_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_write" altera:internal="ctrl_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="ctrl_writedata" altera:internal="ctrl_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_clk" altera:internal="board_kernel_interface.kernel_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_clk_clk" altera:internal="kernel_clk_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_cra" altera:internal="board_kernel_interface.kernel_cra" altera:type="avalon" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_cra_address" altera:internal="kernel_cra_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_burstcount" altera:internal="kernel_cra_burstcount"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_byteenable" altera:internal="kernel_cra_byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_debugaccess" altera:internal="kernel_cra_debugaccess"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_read" altera:internal="kernel_cra_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_readdata" altera:internal="kernel_cra_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_readdatavalid" altera:internal="kernel_cra_readdatavalid"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_waitrequest" altera:internal="kernel_cra_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_write" altera:internal="kernel_cra_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_cra_writedata" altera:internal="kernel_cra_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_irq_from_kernel" altera:internal="board_kernel_interface.kernel_irq_from_kernel" altera:type="interrupt" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_irq_from_kernel_irq" altera:internal="kernel_irq_from_kernel_irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_irq_to_host" altera:internal="board_kernel_interface.kernel_irq_to_host" altera:type="interrupt" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_irq_to_host_irq" altera:internal="kernel_irq_to_host_irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_reset" altera:internal="board_kernel_interface.kernel_reset" altera:type="reset" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_reset_reset_n" altera:internal="kernel_reset_reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="board_kernel_interface.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_reset_n" altera:internal="reset_reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="sw_reset_export" altera:internal="board_kernel_interface.sw_reset_export" altera:type="reset" altera:dir="start">
+        <altera:port_mapping altera:name="sw_reset_export_reset_n" altera:internal="sw_reset_export_reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="sw_reset_in" altera:internal="board_kernel_interface.sw_reset_in" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="sw_reset_in_reset" altera:internal="sw_reset_in_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>true</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory.ip
new file mode 100644
index 0000000000000000000000000000000000000000..dfc961a6567ccd3db5fc3e5e419fc9c16d89a274
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory.ip
@@ -0,0 +1,1223 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_onchip_memory</spirit:library>
+  <spirit:name>board_onchip_memory</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>s1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clken</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clken</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">1</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_avalon_onchip_memory2</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>6</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clken</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>chipselect</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>255</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>255</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_req</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_onchip_memory</spirit:library>
+      <spirit:name>altera_avalon_onchip_memory2</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>allowInSystemMemoryContentEditor</spirit:name>
+          <spirit:displayName>Enable In-System Memory Content Editor feature</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="allowInSystemMemoryContentEditor">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>blockType</spirit:name>
+          <spirit:displayName>Block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="blockType">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataWidth</spirit:name>
+          <spirit:displayName>Slave S1 Data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataWidth">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataWidth2</spirit:name>
+          <spirit:displayName>Slave S2 Data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataWidth2">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dualPort</spirit:name>
+          <spirit:displayName>Dual-port access</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="dualPort">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enableDiffWidth</spirit:name>
+          <spirit:displayName>Enable different width for Dual-port access</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enableDiffWidth">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_enableDiffWidth</spirit:name>
+          <spirit:displayName>derived_enableDiffWidth</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_enableDiffWidth">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>initMemContent</spirit:name>
+          <spirit:displayName>Initialize memory content</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="initMemContent">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>initializationFileName</spirit:name>
+          <spirit:displayName>User created initialization file</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="initializationFileName">onchip_mem.hex</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enPRInitMode</spirit:name>
+          <spirit:displayName>Enable Partial Reconfiguration Initialization Mode</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enPRInitMode">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instanceID</spirit:name>
+          <spirit:displayName>Instance ID</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instanceID">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>memorySize</spirit:name>
+          <spirit:displayName>Total memory size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="memorySize">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readDuringWriteMode</spirit:name>
+          <spirit:displayName>Read During Write Mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="readDuringWriteMode">DONT_CARE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simAllowMRAMContentsFile</spirit:name>
+          <spirit:displayName>Allow MRAM contents file for simulation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="simAllowMRAMContentsFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simMemInitOnlyFilename</spirit:name>
+          <spirit:displayName>Simulation meminit only has filename</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="simMemInitOnlyFilename">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>singleClockOperation</spirit:name>
+          <spirit:displayName>Single clock operation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="singleClockOperation">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_singleClockOperation</spirit:name>
+          <spirit:displayName>derived_singleClockOperation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_singleClockOperation">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>slave1Latency</spirit:name>
+          <spirit:displayName>Slave s1 Latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="slave1Latency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>slave2Latency</spirit:name>
+          <spirit:displayName>Slave s2 Latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="slave2Latency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useNonDefaultInitFile</spirit:name>
+          <spirit:displayName>Enable non-default initialization file</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useNonDefaultInitFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>copyInitFile</spirit:name>
+          <spirit:displayName>		Copy non-default initialization file to generated folder</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="copyInitFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useShallowMemBlocks</spirit:name>
+          <spirit:displayName>Minimize memory block usage (may impact fmax)</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useShallowMemBlocks">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writable</spirit:name>
+          <spirit:displayName>Type</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="writable">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ecc_enabled</spirit:name>
+          <spirit:displayName>Extend the data width to support ECC bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="ecc_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetrequest_enabled</spirit:name>
+          <spirit:displayName>Reset Request</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="resetrequest_enabled">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>autoInitializationFileName</spirit:name>
+          <spirit:displayName>autoInitializationFileName</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="autoInitializationFileName">board_onchip_memory_board_onchip_memory</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>deviceFamily</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFeatures</spirit:name>
+          <spirit:displayName>deviceFeatures</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFeatures">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_addr_width</spirit:name>
+          <spirit:displayName>Slave 1 address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_addr_width">7</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_addr_width2</spirit:name>
+          <spirit:displayName>Slave 2 address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_addr_width2">7</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_data_width</spirit:name>
+          <spirit:displayName>Slave 1 data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_data_width">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_data_width2</spirit:name>
+          <spirit:displayName>Slave 2 data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_data_width2">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_gui_ram_block_type</spirit:name>
+          <spirit:displayName>derived_gui_ram_block_type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_gui_ram_block_type">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_is_hardcopy</spirit:name>
+          <spirit:displayName>derived_is_hardcopy</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_is_hardcopy">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_init_file_name</spirit:name>
+          <spirit:displayName>derived_init_file_name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_init_file_name">board_onchip_memory_board_onchip_memory.hex</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CONTENTS_INFO</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CONTENTS_INFO">""</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DUAL_PORT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DUAL_PORT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INIT_CONTENTS_FILE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INIT_CONTENTS_FILE">board_onchip_memory_board_onchip_memory</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INIT_MEM_CONTENT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INIT_MEM_CONTENT">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INSTANCE_ID</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INSTANCE_ID">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.RAM_BLOCK_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.RAM_BLOCK_TYPE">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.READ_DURING_WRITE_MODE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.READ_DURING_WRITE_MODE">DONT_CARE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SINGLE_CLOCK_OP</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SINGLE_CLOCK_OP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SIZE_MULTIPLE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SIZE_MULTIPLE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SIZE_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SIZE_VALUE">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.WRITABLE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.WRITABLE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR">SIM_DIR</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.GENERATE_DAT_SYM</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.GENERATE_DAT_SYM">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.GENERATE_HEX</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.GENERATE_HEX">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.HAS_BYTE_LANE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.HAS_BYTE_LANE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.HEX_INSTALL_DIR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.HEX_INSTALL_DIR">QPF_DIR</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.MEM_INIT_FILENAME</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.MEM_INIT_FILENAME">board_onchip_memory_board_onchip_memory</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>postgeneration.simulation.init_file.param_name</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="postgeneration.simulation.init_file.param_name">INIT_FILE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>postgeneration.simulation.init_file.type</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="postgeneration.simulation.init_file.type">MEM_INIT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk1</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset1</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>reset_req</name>
+                    <role>reset_req</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk1</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>s1</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>7</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>clken</name>
+                    <role>clken</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>chipselect</name>
+                    <role>chipselect</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>256</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>256</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk1</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset1</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>s1</key>
+            <value>
+                <connectionPointName>s1</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x1000' datawidth='256' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>256</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk1" altera:internal="board_onchip_memory.clk1" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk2" altera:internal="board_onchip_memory.clk2"></altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset1" altera:internal="board_onchip_memory.reset1" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset" altera:internal="reset"></altera:port_mapping>
+        <altera:port_mapping altera:name="reset_req" altera:internal="reset_req"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset2" altera:internal="board_onchip_memory.reset2"></altera:interface_mapping>
+      <altera:interface_mapping altera:name="s1" altera:internal="board_onchip_memory.s1" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="address" altera:internal="address"></altera:port_mapping>
+        <altera:port_mapping altera:name="byteenable" altera:internal="byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="chipselect" altera:internal="chipselect"></altera:port_mapping>
+        <altera:port_mapping altera:name="clken" altera:internal="clken"></altera:port_mapping>
+        <altera:port_mapping altera:name="readdata" altera:internal="readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="write" altera:internal="write"></altera:port_mapping>
+        <altera:port_mapping altera:name="writedata" altera:internal="writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="s2" altera:internal="board_onchip_memory.s2"></altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory2_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory2_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..5c40ec69ac44b10f9a83fb26da144f63e9f3d8df
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_onchip_memory2_0.ip
@@ -0,0 +1,1220 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_onchip_memory2_0</spirit:library>
+  <spirit:name>onchip_memory2_0</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_req</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>s1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clken</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clken</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>byteenable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">131072</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">131072</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">1</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_avalon_onchip_memory2</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>14</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clken</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>chipselect</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>byteenable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_req</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_onchip_memory2_0</spirit:library>
+      <spirit:name>altera_avalon_onchip_memory2</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>allowInSystemMemoryContentEditor</spirit:name>
+          <spirit:displayName>Enable In-System Memory Content Editor feature</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="allowInSystemMemoryContentEditor">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>blockType</spirit:name>
+          <spirit:displayName>Block type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="blockType">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataWidth</spirit:name>
+          <spirit:displayName>Slave S1 Data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataWidth">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataWidth2</spirit:name>
+          <spirit:displayName>Slave S2 Data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataWidth2">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dualPort</spirit:name>
+          <spirit:displayName>Dual-port access</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="dualPort">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enableDiffWidth</spirit:name>
+          <spirit:displayName>Enable different width for Dual-port access</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enableDiffWidth">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_enableDiffWidth</spirit:name>
+          <spirit:displayName>derived_enableDiffWidth</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_enableDiffWidth">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>initMemContent</spirit:name>
+          <spirit:displayName>Initialize memory content</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="initMemContent">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>initializationFileName</spirit:name>
+          <spirit:displayName>User created initialization file</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="initializationFileName">onchip_memory2_0.hex</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enPRInitMode</spirit:name>
+          <spirit:displayName>Enable Partial Reconfiguration Initialization Mode</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="enPRInitMode">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>instanceID</spirit:name>
+          <spirit:displayName>Instance ID</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="instanceID">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>memorySize</spirit:name>
+          <spirit:displayName>Total memory size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="memorySize">131072</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readDuringWriteMode</spirit:name>
+          <spirit:displayName>Read During Write Mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="readDuringWriteMode">DONT_CARE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simAllowMRAMContentsFile</spirit:name>
+          <spirit:displayName>Allow MRAM contents file for simulation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="simAllowMRAMContentsFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simMemInitOnlyFilename</spirit:name>
+          <spirit:displayName>Simulation meminit only has filename</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="simMemInitOnlyFilename">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>singleClockOperation</spirit:name>
+          <spirit:displayName>Single clock operation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="singleClockOperation">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_singleClockOperation</spirit:name>
+          <spirit:displayName>derived_singleClockOperation</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_singleClockOperation">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>slave1Latency</spirit:name>
+          <spirit:displayName>Slave s1 Latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="slave1Latency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>slave2Latency</spirit:name>
+          <spirit:displayName>Slave s2 Latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="slave2Latency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useNonDefaultInitFile</spirit:name>
+          <spirit:displayName>Enable non-default initialization file</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useNonDefaultInitFile">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>copyInitFile</spirit:name>
+          <spirit:displayName>		Copy non-default initialization file to generated folder</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="copyInitFile">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>useShallowMemBlocks</spirit:name>
+          <spirit:displayName>Minimize memory block usage (may impact fmax)</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="useShallowMemBlocks">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writable</spirit:name>
+          <spirit:displayName>Type</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="writable">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ecc_enabled</spirit:name>
+          <spirit:displayName>Extend the data width to support ECC bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="ecc_enabled">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetrequest_enabled</spirit:name>
+          <spirit:displayName>Reset Request</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="resetrequest_enabled">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>autoInitializationFileName</spirit:name>
+          <spirit:displayName>autoInitializationFileName</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="autoInitializationFileName">board_onchip_memory2_0_onchip_memory2_0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>deviceFamily</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFeatures</spirit:name>
+          <spirit:displayName>deviceFeatures</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFeatures">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ALLOW_DIFF_SUFFIX_MIGRATION 0 ASSERT_TIMING_ROUTING_DELAYS_HAS_ALL_EXPECTED_DATA 0 ASSERT_TIMING_ROUTING_DELAYS_NO_AUTOFILL 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DISABLE_CRC_ERROR_DETECTION 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_HIGH_SPEED_HSSI 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BCM_PIN_BASED_AIOT_SUPPORT 0 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIER_PARTIAL_RECONFIG_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_BLOCK 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MISSING_PAD_INFO 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QHD_INCREMENTAL_TIMING_CLOSURE_SUPPORT 1 HAS_QHD_IP_REUSE_INTEGRATION_SUPPORT 1 HAS_QHD_PARTITIONS_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_REVC_IO 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMPLIFIED_PARTIAL_RECONFIG_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SIP_TILE_SUPPORT 0 HAS_SPEED_GRADE_OFFSET 1 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_DQS_IN_BUFFER_REDUCTION 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_REVE_SILICON 0 IS_SDM_LITE 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LUTRAM_DATA_IN_FF_MUST_BE_HIPI 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MAC_NEGATE_SUPPORT_DISABLED 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_CLOCK_REGION 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PCF 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 PINTABLE_OPTIONAL 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_PW0 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_MIN_CORNER_DMF_GENERATION 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_TIMING_CLOSURE_CORNERS 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORT_UIB 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 U2B2_SUPPORT_NOT_READY 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DETAILED_REDTAX_WITH_DSPF_ROUTING_MODELS 0 USES_DEV 1 USES_DSPF_ROUTING_MODELS 0 USES_DSP_FROM_PREVIOUS_FAMILY 0 USES_ESTIMATED_TIMING 0 USES_EXTRACTION_CORNERS_WITH_DSPF_ROUTING_MODELS 0 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PARASITIC_LOADS_WITH_DSPF_ROUTING_MODELS 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_RAM_FROM_PREVIOUS_FAMILY 0 USES_SECOND_GENERATION_PART_INFO 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_TIMING_ROUTING_DELAYS 0 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SDM_CONFIGURATION 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WORKS_AROUND_MISSING_RED_FLAGS_IN_DSPF_ROUTING_MODELS 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_addr_width</spirit:name>
+          <spirit:displayName>Slave 1 address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_addr_width">15</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_addr_width2</spirit:name>
+          <spirit:displayName>Slave 2 address width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_addr_width2">15</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_data_width</spirit:name>
+          <spirit:displayName>Slave 1 data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_data_width">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_set_data_width2</spirit:name>
+          <spirit:displayName>Slave 2 data width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="derived_set_data_width2">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_gui_ram_block_type</spirit:name>
+          <spirit:displayName>derived_gui_ram_block_type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_gui_ram_block_type">Automatic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_is_hardcopy</spirit:name>
+          <spirit:displayName>derived_is_hardcopy</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_is_hardcopy">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_init_file_name</spirit:name>
+          <spirit:displayName>derived_init_file_name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_init_file_name">onchip_memory2_0.hex</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CONTENTS_INFO</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CONTENTS_INFO">""</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DUAL_PORT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DUAL_PORT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.GUI_RAM_BLOCK_TYPE">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INIT_CONTENTS_FILE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INIT_CONTENTS_FILE">onchip_memory2_0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INIT_MEM_CONTENT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INIT_MEM_CONTENT">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.INSTANCE_ID</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.INSTANCE_ID">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.NON_DEFAULT_INIT_FILE_ENABLED">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.RAM_BLOCK_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.RAM_BLOCK_TYPE">AUTO</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.READ_DURING_WRITE_MODE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.READ_DURING_WRITE_MODE">DONT_CARE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SINGLE_CLOCK_OP</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SINGLE_CLOCK_OP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SIZE_MULTIPLE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SIZE_MULTIPLE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SIZE_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SIZE_VALUE">131072</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.WRITABLE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.WRITABLE">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR">SIM_DIR</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.GENERATE_DAT_SYM</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.GENERATE_DAT_SYM">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.GENERATE_HEX</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.GENERATE_HEX">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.HAS_BYTE_LANE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.HAS_BYTE_LANE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.HEX_INSTALL_DIR</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.HEX_INSTALL_DIR">QPF_DIR</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.memoryInfo.MEM_INIT_FILENAME</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.memoryInfo.MEM_INIT_FILENAME">onchip_memory2_0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>postgeneration.simulation.init_file.param_name</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="postgeneration.simulation.init_file.param_name">INIT_FILE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>postgeneration.simulation.init_file.type</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="postgeneration.simulation.init_file.type">MEM_INIT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk1</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset1</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>reset_req</name>
+                    <role>reset_req</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk1</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>s1</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>15</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>clken</name>
+                    <role>clken</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>chipselect</name>
+                    <role>chipselect</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>byteenable</name>
+                    <role>byteenable</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>131072</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk1</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset1</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>131072</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>s1</key>
+            <value>
+                <connectionPointName>s1</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x20000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>17</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk1" altera:internal="onchip_memory2_0.clk1" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset1" altera:internal="onchip_memory2_0.reset1" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset" altera:internal="reset"></altera:port_mapping>
+        <altera:port_mapping altera:name="reset_req" altera:internal="reset_req"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="s1" altera:internal="onchip_memory2_0.s1" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="address" altera:internal="address"></altera:port_mapping>
+        <altera:port_mapping altera:name="byteenable" altera:internal="byteenable"></altera:port_mapping>
+        <altera:port_mapping altera:name="chipselect" altera:internal="chipselect"></altera:port_mapping>
+        <altera:port_mapping altera:name="clken" altera:internal="clken"></altera:port_mapping>
+        <altera:port_mapping altera:name="readdata" altera:internal="readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="write" altera:internal="write"></altera:port_mapping>
+        <altera:port_mapping altera:name="writedata" altera:internal="writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_pps.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_pps.ip
new file mode 100644
index 0000000000000000000000000000000000000000..5150e24ff3bf77713d88b3db4f11f6e1081508da
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_pps.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_pio_pps</spirit:library>
+  <spirit:name>pio_pps</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_pio_pps</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="pio_pps.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="pio_pps.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="pio_pps.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="pio_pps.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="pio_pps.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="pio_pps.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="pio_pps.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="pio_pps.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="pio_pps.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="pio_pps.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_system_info.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_system_info.ip
new file mode 100644
index 0000000000000000000000000000000000000000..9739da62e728f46a20ffc6d625b7f0fa6848cadd
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_system_info.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_pio_system_info</spirit:library>
+  <spirit:name>pio_system_info</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">128</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>4</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>4</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_pio_system_info</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>5</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>5</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>128</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>7</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="pio_system_info.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="pio_system_info.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="pio_system_info.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="pio_system_info.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="pio_system_info.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="pio_system_info.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="pio_system_info.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="pio_system_info.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="pio_system_info.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="pio_system_info.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_wdi.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_wdi.ip
new file mode 100644
index 0000000000000000000000000000000000000000..e626b71e90b22e89abcc592d981bd8eed4aa10d2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_pio_wdi.ip
@@ -0,0 +1,1253 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_pio_wdi</spirit:library>
+  <spirit:name>pio_wdi</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>external_connection</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>out_port</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>s1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>write_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">NATIVE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_avalon_pio</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>1</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>write_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>chipselect</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>out_port</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_pio_wdi</spirit:library>
+      <spirit:name>altera_avalon_pio</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>bitClearingEdgeCapReg</spirit:name>
+          <spirit:displayName>Enable bit-clearing for edge capture register</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="bitClearingEdgeCapReg">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitModifyingOutReg</spirit:name>
+          <spirit:displayName>Enable individual bit setting/clearing</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="bitModifyingOutReg">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>captureEdge</spirit:name>
+          <spirit:displayName>Synchronously capture</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="captureEdge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>direction</spirit:name>
+          <spirit:displayName>Direction</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="direction">Output</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>edgeType</spirit:name>
+          <spirit:displayName>Edge Type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="edgeType">RISING</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generateIRQ</spirit:name>
+          <spirit:displayName>Generate IRQ</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="generateIRQ">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqType</spirit:name>
+          <spirit:displayName>IRQ Type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqType">LEVEL</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetValue</spirit:name>
+          <spirit:displayName>Output Port Reset Value</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="resetValue">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simDoTestBenchWiring</spirit:name>
+          <spirit:displayName>Hardwire PIO inputs in test bench</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="simDoTestBenchWiring">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>simDrivenValue</spirit:name>
+          <spirit:displayName>Drive inputs to field.</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="simDrivenValue">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>width</spirit:name>
+          <spirit:displayName>Width (1-32 bits)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="width">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>clockRate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_has_tri</spirit:name>
+          <spirit:displayName>derived_has_tri</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_has_tri">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_has_out</spirit:name>
+          <spirit:displayName>derived_has_out</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_has_out">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_has_in</spirit:name>
+          <spirit:displayName>derived_has_in</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_has_in">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_do_test_bench_wiring</spirit:name>
+          <spirit:displayName>derived_do_test_bench_wiring</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_do_test_bench_wiring">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_capture</spirit:name>
+          <spirit:displayName>derived_capture</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_capture">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_edge_type</spirit:name>
+          <spirit:displayName>derived_edge_type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_edge_type">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_irq_type</spirit:name>
+          <spirit:displayName>derived_irq_type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="derived_irq_type">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>derived_has_irq</spirit:name>
+          <spirit:displayName>derived_has_irq</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="derived_has_irq">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.CAPTURE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.CAPTURE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DATA_WIDTH</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DATA_WIDTH">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DO_TEST_BENCH_WIRING">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.DRIVEN_SIM_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.DRIVEN_SIM_VALUE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.EDGE_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.EDGE_TYPE">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FREQ</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FREQ">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_IN</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_IN">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_OUT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_OUT">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.HAS_TRI</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.HAS_TRI">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.IRQ_TYPE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.IRQ_TYPE">NONE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.RESET_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.RESET_VALUE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.compatible</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.compatible">altr,pio-1.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.group</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.group">gpio</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.name</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.name">pio</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.altr,gpio-bank-width</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.altr,gpio-bank-width">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.params.resetvalue</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.params.resetvalue">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.vendor</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.vendor">altr</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>external_connection</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>out_port</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>s1</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>2</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>write_n</name>
+                    <role>write_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>chipselect</name>
+                    <role>chipselect</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>NATIVE</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+            <cmsisInfo>
+                <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_pio&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;32&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+      &lt;registers&gt;
+        &lt;register&gt;     
+         &lt;name&gt;DATA&lt;/name&gt;  
+         &lt;displayName&gt;Data&lt;/displayName&gt;
+         &lt;description&gt;Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).&lt;/description&gt;
+         &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;data&lt;/name&gt;
+           &lt;description&gt;Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;DIRECTION&lt;/name&gt;  
+         &lt;displayName&gt;Direction&lt;/displayName&gt;
+         &lt;description&gt;The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.&lt;/description&gt;
+         &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;direction&lt;/name&gt;
+            &lt;description&gt;Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;IRQ_MASK&lt;/name&gt;  
+         &lt;displayName&gt;Interrupt mask&lt;/displayName&gt;
+         &lt;description&gt;Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.&lt;/description&gt;
+         &lt;addressOffset&gt;0x8&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;interruptmask&lt;/name&gt;
+            &lt;description&gt;IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;EDGE_CAP&lt;/name&gt;  
+         &lt;displayName&gt;Edge capture&lt;/displayName&gt;
+         &lt;description&gt;Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.&lt;/description&gt;
+         &lt;addressOffset&gt;0xc&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;read-write&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;edgecapture&lt;/name&gt;
+            &lt;description&gt;Edge detection for each input port.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;
+         &lt;name&gt;SET_BIT&lt;/name&gt;  
+         &lt;displayName&gt;Outset&lt;/displayName&gt;
+         &lt;description&gt;You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.&lt;/description&gt;
+         &lt;addressOffset&gt;0x10&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;write-only&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;outset&lt;/name&gt;
+            &lt;description&gt;Specifies which bit of the output port to set.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;write-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt; 
+        &lt;register&gt;     
+         &lt;name&gt;CLEAR_BITS&lt;/name&gt;  
+         &lt;displayName&gt;Outclear&lt;/displayName&gt;
+         &lt;description&gt;You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.&lt;/description&gt;
+         &lt;addressOffset&gt;0x14&lt;/addressOffset&gt;
+         &lt;size&gt;32&lt;/size&gt;
+         &lt;access&gt;write-only&lt;/access&gt;
+         &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+         &lt;resetMask&gt;0xffffffff&lt;/resetMask&gt; 
+         &lt;fields&gt;
+           &lt;field&gt;&lt;name&gt;outclear&lt;/name&gt;
+            &lt;description&gt;Specifies which output bit to clear.&lt;/description&gt;
+            &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+            &lt;bitWidth&gt;32&lt;/bitWidth&gt;
+            &lt;access&gt;write-only&lt;/access&gt;
+        &lt;/field&gt;
+       &lt;/fields&gt;
+     &lt;/register&gt;            
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                <addressGroup></addressGroup>
+                <cmsisVars/>
+            </cmsisInfo>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>s1</key>
+            <value>
+                <connectionPointName>s1</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x10' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>4</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="pio_wdi.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="external_connection" altera:internal="pio_wdi.external_connection" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="out_port" altera:internal="out_port"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="pio_wdi.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_n" altera:internal="reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="s1" altera:internal="pio_wdi.s1" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="address" altera:internal="address"></altera:port_mapping>
+        <altera:port_mapping altera:name="chipselect" altera:internal="chipselect"></altera:port_mapping>
+        <altera:port_mapping altera:name="readdata" altera:internal="readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="write_n" altera:internal="write_n"></altera:port_mapping>
+        <altera:port_mapping altera:name="writedata" altera:internal="writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_ctrl.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_ctrl.ip
new file mode 100644
index 0000000000000000000000000000000000000000..f9d3809f5f4d2ed2011632fe669310312bdec4df
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_ctrl.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_dpmm_ctrl</spirit:library>
+  <spirit:name>reg_dpmm_ctrl</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_dpmm_ctrl</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_dpmm_ctrl.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_dpmm_ctrl.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_dpmm_ctrl.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_dpmm_ctrl.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_dpmm_ctrl.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_dpmm_ctrl.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_dpmm_ctrl.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_dpmm_ctrl.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_dpmm_ctrl.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_dpmm_ctrl.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_data.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_data.ip
new file mode 100644
index 0000000000000000000000000000000000000000..05a08065bf1112758dbe1ec61db566531e0add44
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_dpmm_data.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_dpmm_data</spirit:library>
+  <spirit:name>reg_dpmm_data</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_dpmm_data</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_dpmm_data.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_dpmm_data.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_dpmm_data.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_dpmm_data.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_dpmm_data.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_dpmm_data.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_dpmm_data.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_dpmm_data.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_dpmm_data.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_dpmm_data.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_epcs.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_epcs.ip
new file mode 100644
index 0000000000000000000000000000000000000000..23e38fe95d6723e3a98fe050792a8248c2ca9b03
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_epcs.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_epcs</spirit:library>
+  <spirit:name>reg_epcs</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_epcs</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>5</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_epcs.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_epcs.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_epcs.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_epcs.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_epcs.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_epcs.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_epcs.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_epcs.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_epcs.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_epcs.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_temp_sens.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_temp_sens.ip
new file mode 100644
index 0000000000000000000000000000000000000000..8911def0c295ea9b5a396bae0e58465ff52e43d5
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_temp_sens.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_fpga_temp_sens</spirit:library>
+  <spirit:name>reg_fpga_temp_sens</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_fpga_temp_sens</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>5</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_fpga_temp_sens.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_fpga_temp_sens.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_fpga_temp_sens.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_fpga_temp_sens.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_fpga_temp_sens.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_fpga_temp_sens.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_fpga_temp_sens.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_fpga_temp_sens.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_fpga_temp_sens.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_fpga_temp_sens.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_voltage_sens.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_voltage_sens.ip
new file mode 100644
index 0000000000000000000000000000000000000000..6df124b39d37e89c0e831272fd2d44391cf0d265
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_fpga_voltage_sens.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_fpga_voltage_sens</spirit:library>
+  <spirit:name>reg_fpga_voltage_sens</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_fpga_voltage_sens</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>64</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x40' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>6</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_fpga_voltage_sens.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_fpga_voltage_sens.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_fpga_voltage_sens.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_fpga_voltage_sens.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_fpga_voltage_sens.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_fpga_voltage_sens.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_fpga_voltage_sens.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_fpga_voltage_sens.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_fpga_voltage_sens.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_fpga_voltage_sens.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_ctrl.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_ctrl.ip
new file mode 100644
index 0000000000000000000000000000000000000000..c708f117ff8d7f4293cd6a16947eb69a8c3a3750
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_ctrl.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_mmdp_ctrl</spirit:library>
+  <spirit:name>reg_mmdp_ctrl</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_mmdp_ctrl</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_mmdp_ctrl.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_mmdp_ctrl.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_mmdp_ctrl.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_mmdp_ctrl.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_mmdp_ctrl.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_mmdp_ctrl.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_mmdp_ctrl.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_mmdp_ctrl.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_mmdp_ctrl.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_mmdp_ctrl.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_data.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_data.ip
new file mode 100644
index 0000000000000000000000000000000000000000..f365f066b1fedf88ad1494ed7d8985a688141c64
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_mmdp_data.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_mmdp_data</spirit:library>
+  <spirit:name>reg_mmdp_data</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_mmdp_data</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_mmdp_data.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_mmdp_data.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_mmdp_data.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_mmdp_data.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_mmdp_data.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_mmdp_data.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_mmdp_data.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_mmdp_data.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_mmdp_data.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_mmdp_data.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_remu.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_remu.ip
new file mode 100644
index 0000000000000000000000000000000000000000..738cc7b980d61ce63a33b6265b83abddc9850ce9
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_remu.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_remu</spirit:library>
+  <spirit:name>reg_remu</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_remu</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>32</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x20' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>5</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_remu.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_remu.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_remu.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_remu.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_remu.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_remu.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_remu.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_remu.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_remu.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_remu.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_pmbus.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_pmbus.ip
new file mode 100644
index 0000000000000000000000000000000000000000..4c4c1988809759ef7e528a2f673c7845cfa74c91
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_pmbus.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_unb_pmbus</spirit:library>
+  <spirit:name>reg_unb_pmbus</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>5</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>5</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_unb_pmbus</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">6</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>6</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>6</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>256</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_unb_pmbus.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_unb_pmbus.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_unb_pmbus.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_unb_pmbus.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_unb_pmbus.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_unb_pmbus.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_unb_pmbus.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_unb_pmbus.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_unb_pmbus.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_unb_pmbus.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_sens.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_sens.ip
new file mode 100644
index 0000000000000000000000000000000000000000..394f0c73d30233ba13d4734935c12c4743d2832f
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_unb_sens.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_unb_sens</spirit:library>
+  <spirit:name>reg_unb_sens</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">256</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>5</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>5</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_unb_sens</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">6</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>6</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>6</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>256</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_unb_sens.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_unb_sens.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_unb_sens.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_unb_sens.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_unb_sens.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_unb_sens.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_unb_sens.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_unb_sens.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_unb_sens.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_unb_sens.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_wdi.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_wdi.ip
new file mode 100644
index 0000000000000000000000000000000000000000..1cc81eb3faec782c2baa59229580d11a467a9ce1
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_reg_wdi.ip
@@ -0,0 +1,1439 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_reg_wdi</spirit:library>
+  <spirit:name>reg_wdi</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_reg_wdi</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>3</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="reg_wdi.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="reg_wdi.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="reg_wdi.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="reg_wdi.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="reg_wdi.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="reg_wdi.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="reg_wdi.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="reg_wdi.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="reg_wdi.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="reg_wdi.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_rom_system_info.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_rom_system_info.ip
new file mode 100644
index 0000000000000000000000000000000000000000..c6a7ae660277d33c6e549f17b464be03ce98dd1d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_rom_system_info.ip
@@ -0,0 +1,1447 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>ASTRON</spirit:vendor>
+  <spirit:library>board_rom_system_info</spirit:library>
+  <spirit:name>rom_system_info</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_address_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_clk_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>mem</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>avs_mem_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">4096</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">system_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_read_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_readdata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_reset_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>system_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>csi_system_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">system</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_write_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>export</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>coe_writedata_export</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>avs_common_mm</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>csi_system_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>csi_system_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>avs_mem_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_reset_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_clk_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_address_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>9</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_write_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_writedata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_read_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>coe_readdata_export</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>ASTRON</spirit:vendor>
+      <spirit:library>board_rom_system_info</spirit:library>
+      <spirit:name>avs_common_mm</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>g_adr_w</spirit:name>
+          <spirit:displayName>g_adr_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_adr_w">10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>g_dat_w</spirit:name>
+          <spirit:displayName>g_dat_w</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="g_dat_w">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AUTO_SYSTEM_CLOCK_RATE</spirit:name>
+          <spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="AUTO_SYSTEM_CLOCK_RATE">100000000</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>address</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_address_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>clk</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_clk_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>mem</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>avs_mem_address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>10</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_write</name>
+                    <role>write</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_read</name>
+                    <role>read</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>avs_mem_readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>DYNAMIC</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>4096</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>system_reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>read</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_read_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>readdata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_readdata_export</name>
+                    <role>export</role>
+                    <direction>Input</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_reset_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>system_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>csi_system_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>system</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>write</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_write_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>writedata</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>coe_writedata_export</name>
+                    <role>export</role>
+                    <direction>Output</direction>
+                    <width>32</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>mem</key>
+            <value>
+                <connectionPointName>mem</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x1000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>12</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>32</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+        <entry>
+            <key>system</key>
+            <value>
+                <connectionPointName>system</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="address" altera:internal="rom_system_info.address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk" altera:internal="rom_system_info.clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="mem" altera:internal="rom_system_info.mem" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="read" altera:internal="rom_system_info.read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="readdata" altera:internal="rom_system_info.readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="rom_system_info.reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system" altera:internal="rom_system_info.system" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="system_reset" altera:internal="rom_system_info.system_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="write" altera:internal="rom_system_info.write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="writedata" altera:internal="rom_system_info.writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_10GbE.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_10GbE.ip
new file mode 100644
index 0000000000000000000000000000000000000000..278aec03c9d63fab81dbc622548d474c91e01fe2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_10GbE.ip
@@ -0,0 +1,1112 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Altera Corporation</spirit:vendor>
+  <spirit:library>board_ta2_unb2b_10GbE</spirit:library>
+  <spirit:name>board_ta2_unb2b_10GbE</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>config_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>config_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_snk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_src</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>refclk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_ref_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_serial_data</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>conduit</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_serial_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_status</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_status</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_status</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_serial_data</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>conduit</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_serial_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>ta2_unb2b_10GbE</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>kernel_snk_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>71</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>71</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_ref_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_serial_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_serial_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>config_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_status</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Altera Corporation</spirit:vendor>
+      <spirit:library>board_ta2_unb2b_10GbE</spirit:library>
+      <spirit:name>ta2_unb2b_10GbE</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters></spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>config_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>config_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_snk</name>
+            <type>avalon_streaming</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_snk_data</name>
+                    <role>data</role>
+                    <direction>Input</direction>
+                    <width>72</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_ready</name>
+                    <role>ready</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_valid</name>
+                    <role>valid</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_src</name>
+            <type>avalon_streaming</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_src_data</name>
+                    <role>data</role>
+                    <direction>Output</direction>
+                    <width>72</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_ready</name>
+                    <role>ready</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_valid</name>
+                    <role>valid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>refclk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk_ref_r</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>rx_serial_data</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>rx_serial_r</name>
+                    <role>conduit</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>rx_status</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>rx_status</name>
+                    <role>rx_status</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tx_serial_data</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>tx_serial_r</name>
+                    <role>conduit</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos/>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="config_reset" altera:internal="board_ta2_unb2b_10GbE.config_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="config_reset" altera:internal="config_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_clk" altera:internal="board_ta2_unb2b_10GbE.kernel_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_clk" altera:internal="kernel_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_reset" altera:internal="board_ta2_unb2b_10GbE.kernel_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_reset" altera:internal="kernel_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_snk" altera:internal="board_ta2_unb2b_10GbE.kernel_snk" altera:type="avalon_streaming" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_snk_data" altera:internal="kernel_snk_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_ready" altera:internal="kernel_snk_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_valid" altera:internal="kernel_snk_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_src" altera:internal="board_ta2_unb2b_10GbE.kernel_src" altera:type="avalon_streaming" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_src_data" altera:internal="kernel_src_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_ready" altera:internal="kernel_src_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_valid" altera:internal="kernel_src_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="refclk" altera:internal="board_ta2_unb2b_10GbE.refclk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk_ref_r" altera:internal="clk_ref_r"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_serial_data" altera:internal="board_ta2_unb2b_10GbE.rx_serial_data" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_serial_r" altera:internal="rx_serial_r"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_status" altera:internal="board_ta2_unb2b_10GbE.rx_status" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_status" altera:internal="rx_status"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_serial_data" altera:internal="board_ta2_unb2b_10GbE.tx_serial_data" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_serial_r" altera:internal="tx_serial_r"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_1GbE_mc.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_1GbE_mc.ip
new file mode 100644
index 0000000000000000000000000000000000000000..c5df677de7de0ed003fda56bd16c6ef0650aac4e
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_1GbE_mc.ip
@@ -0,0 +1,1702 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Altera Corporation</spirit:vendor>
+  <spirit:library>board_ta2_unb2b_1GbE_mc</spirit:library>
+  <spirit:name>board_ta2_unb2b_1GbE_mc</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_snk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_src</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>st_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>st_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>st_rst</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>st_rst</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">st_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>udp_rx_snk_in</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_siso_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_sosi_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>empty</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_sosi_empty</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>endofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_sosi_eop</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>startofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_sosi_sop</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_sosi_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">st_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">st_rst</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>udp_rx_snk_in_xon</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>xon</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_rx_siso_xon</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">st_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">st_rst</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>udp_tx_src_out</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_siso_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_sosi_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>empty</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_sosi_empty</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>endofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_sosi_eop</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>startofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_sosi_sop</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_sosi_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">st_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">st_rst</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>udp_tx_src_out_xon</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>xon</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>udp_tx_siso_xon</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">st_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">st_rst</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>ta2_unb2b_1GbE_mc</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>kernel_snk_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>39</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>39</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>st_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>st_rst</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_siso_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_sosi_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>39</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_sosi_empty</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>1</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_sosi_eop</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_sosi_sop</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_sosi_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_siso_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_sosi_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>39</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_sosi_empty</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>1</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_sosi_eop</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_sosi_sop</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_sosi_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_tx_siso_xon</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>udp_rx_siso_xon</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Altera Corporation</spirit:vendor>
+      <spirit:library>board_ta2_unb2b_1GbE_mc</spirit:library>
+      <spirit:name>ta2_unb2b_1GbE_mc</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters></spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>kernel_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_snk</name>
+            <type>avalon_streaming</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_snk_data</name>
+                    <role>data</role>
+                    <direction>Input</direction>
+                    <width>40</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_ready</name>
+                    <role>ready</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_valid</name>
+                    <role>valid</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_src</name>
+            <type>avalon_streaming</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_src_data</name>
+                    <role>data</role>
+                    <direction>Output</direction>
+                    <width>40</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_ready</name>
+                    <role>ready</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_valid</name>
+                    <role>valid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>st_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>st_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>st_rst</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>st_rst</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>st_clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>udp_rx_snk_in</name>
+            <type>avalon_streaming</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>udp_rx_siso_ready</name>
+                    <role>ready</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_rx_sosi_data</name>
+                    <role>data</role>
+                    <direction>Input</direction>
+                    <width>40</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>udp_rx_sosi_empty</name>
+                    <role>empty</role>
+                    <direction>Input</direction>
+                    <width>2</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>udp_rx_sosi_eop</name>
+                    <role>endofpacket</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_rx_sosi_sop</name>
+                    <role>startofpacket</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_rx_sosi_valid</name>
+                    <role>valid</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>st_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>st_rst</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>udp_rx_snk_in_xon</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>udp_rx_siso_xon</name>
+                    <role>xon</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>st_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>st_rst</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>udp_tx_src_out</name>
+            <type>avalon_streaming</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>udp_tx_siso_ready</name>
+                    <role>ready</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_tx_sosi_data</name>
+                    <role>data</role>
+                    <direction>Output</direction>
+                    <width>40</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>udp_tx_sosi_empty</name>
+                    <role>empty</role>
+                    <direction>Output</direction>
+                    <width>2</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>udp_tx_sosi_eop</name>
+                    <role>endofpacket</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_tx_sosi_sop</name>
+                    <role>startofpacket</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>udp_tx_sosi_valid</name>
+                    <role>valid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>st_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>st_rst</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>udp_tx_src_out_xon</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>udp_tx_siso_xon</name>
+                    <role>xon</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>st_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>st_rst</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos/>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="kernel_clk" altera:internal="board_ta2_unb2b_1GbE_mc.kernel_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_clk" altera:internal="kernel_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_reset" altera:internal="board_ta2_unb2b_1GbE_mc.kernel_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_reset" altera:internal="kernel_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_snk" altera:internal="board_ta2_unb2b_1GbE_mc.kernel_snk" altera:type="avalon_streaming" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_snk_data" altera:internal="kernel_snk_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_ready" altera:internal="kernel_snk_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_valid" altera:internal="kernel_snk_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_src" altera:internal="board_ta2_unb2b_1GbE_mc.kernel_src" altera:type="avalon_streaming" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_src_data" altera:internal="kernel_src_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_ready" altera:internal="kernel_src_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_valid" altera:internal="kernel_src_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="st_clk" altera:internal="board_ta2_unb2b_1GbE_mc.st_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="st_clk" altera:internal="st_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="st_rst" altera:internal="board_ta2_unb2b_1GbE_mc.st_rst" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="st_rst" altera:internal="st_rst"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="udp_rx_snk_in" altera:internal="board_ta2_unb2b_1GbE_mc.udp_rx_snk_in" altera:type="avalon_streaming" altera:dir="end">
+        <altera:port_mapping altera:name="udp_rx_siso_ready" altera:internal="udp_rx_siso_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_rx_sosi_data" altera:internal="udp_rx_sosi_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_rx_sosi_empty" altera:internal="udp_rx_sosi_empty"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_rx_sosi_eop" altera:internal="udp_rx_sosi_eop"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_rx_sosi_sop" altera:internal="udp_rx_sosi_sop"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_rx_sosi_valid" altera:internal="udp_rx_sosi_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="udp_rx_snk_in_xon" altera:internal="board_ta2_unb2b_1GbE_mc.udp_rx_snk_in_xon" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="udp_rx_siso_xon" altera:internal="udp_rx_siso_xon"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="udp_tx_src_out" altera:internal="board_ta2_unb2b_1GbE_mc.udp_tx_src_out" altera:type="avalon_streaming" altera:dir="start">
+        <altera:port_mapping altera:name="udp_tx_siso_ready" altera:internal="udp_tx_siso_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_tx_sosi_data" altera:internal="udp_tx_sosi_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_tx_sosi_empty" altera:internal="udp_tx_sosi_empty"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_tx_sosi_eop" altera:internal="udp_tx_sosi_eop"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_tx_sosi_sop" altera:internal="udp_tx_sosi_sop"></altera:port_mapping>
+        <altera:port_mapping altera:name="udp_tx_sosi_valid" altera:internal="udp_tx_sosi_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="udp_tx_src_out_xon" altera:internal="board_ta2_unb2b_1GbE_mc.udp_tx_src_out_xon" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="udp_tx_siso_xon" altera:internal="udp_tx_siso_xon"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>true</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_40GbE.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_40GbE.ip
new file mode 100644
index 0000000000000000000000000000000000000000..137c3b32e9b6e19596ad6ead9a982385ac6354e1
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_ta2_unb2b_40GbE.ip
@@ -0,0 +1,1201 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Altera Corporation</spirit:vendor>
+  <spirit:library>board_ta2_unb2b_40GbE</spirit:library>
+  <spirit:name>board_ta2_unb2b_40GbE</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>config_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>config_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>config_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>config_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">config_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_snk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_snk_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>kernel_src</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>kernel_src_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">kernel_clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">kernel_reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>beatsPerCycle</spirit:name>
+          <spirit:displayName>Beats Per Cycle</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dataBitsPerSymbol</spirit:name>
+          <spirit:displayName>Data bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>emptyWithinPacket</spirit:name>
+          <spirit:displayName>emptyWithinPacket</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>errorDescriptor</spirit:name>
+          <spirit:displayName>Error descriptor</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>firstSymbolInHighOrderBits</spirit:name>
+          <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>highOrderSymbolAtMSB</spirit:name>
+          <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maxChannel</spirit:name>
+          <spirit:displayName>Maximum channel</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>packetDescription</spirit:name>
+          <spirit:displayName>Packet description </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyAllowance</spirit:name>
+          <spirit:displayName>Ready allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readyLatency</spirit:name>
+          <spirit:displayName>Ready latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>symbolsPerBeat</spirit:name>
+          <spirit:displayName>Symbols per beat  </spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>refclk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_ref_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_serial_data</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>conduit</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_serial_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_status</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_status</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_status</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_serial_data</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>conduit</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_serial_r</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>ta2_unb2b_40GbE</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>kernel_snk_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>263</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_snk_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>263</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_src_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>config_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_ref_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_serial_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_serial_r</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>config_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>kernel_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_status</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Altera Corporation</spirit:vendor>
+      <spirit:library>board_ta2_unb2b_40GbE</spirit:library>
+      <spirit:name>ta2_unb2b_40GbE</spirit:name>
+      <spirit:version>1.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters></spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>config_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>config_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>config_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>config_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>config_clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_reset</name>
+                    <role>reset</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_snk</name>
+            <type>avalon_streaming</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>kernel_snk_data</name>
+                    <role>data</role>
+                    <direction>Input</direction>
+                    <width>264</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_ready</name>
+                    <role>ready</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_snk_valid</name>
+                    <role>valid</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>kernel_src</name>
+            <type>avalon_streaming</type>
+            <isStart>true</isStart>
+            <ports>
+                <port>
+                    <name>kernel_src_data</name>
+                    <role>data</role>
+                    <direction>Output</direction>
+                    <width>264</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_ready</name>
+                    <role>ready</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>kernel_src_valid</name>
+                    <role>valid</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>kernel_clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>kernel_reset</value>
+                    </entry>
+                    <entry>
+                        <key>beatsPerCycle</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>dataBitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>emptyWithinPacket</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>errorDescriptor</key>
+                    </entry>
+                    <entry>
+                        <key>firstSymbolInHighOrderBits</key>
+                        <value>true</value>
+                    </entry>
+                    <entry>
+                        <key>highOrderSymbolAtMSB</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maxChannel</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>packetDescription</key>
+                        <value></value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readyAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readyLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>symbolsPerBeat</key>
+                        <value>1</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>refclk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk_ref_r</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>rx_serial_data</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>rx_serial_r</name>
+                    <role>conduit</role>
+                    <direction>Input</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>rx_status</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>rx_status</name>
+                    <role>rx_status</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>tx_serial_data</name>
+            <type>conduit</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>tx_serial_r</name>
+                    <role>conduit</role>
+                    <direction>Output</direction>
+                    <width>4</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos/>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="config_clk" altera:internal="board_ta2_unb2b_40GbE.config_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="config_clk" altera:internal="config_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="config_reset" altera:internal="board_ta2_unb2b_40GbE.config_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="config_reset" altera:internal="config_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_clk" altera:internal="board_ta2_unb2b_40GbE.kernel_clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_clk" altera:internal="kernel_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_reset" altera:internal="board_ta2_unb2b_40GbE.kernel_reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_reset" altera:internal="kernel_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_snk" altera:internal="board_ta2_unb2b_40GbE.kernel_snk" altera:type="avalon_streaming" altera:dir="end">
+        <altera:port_mapping altera:name="kernel_snk_data" altera:internal="kernel_snk_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_ready" altera:internal="kernel_snk_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_snk_valid" altera:internal="kernel_snk_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="kernel_src" altera:internal="board_ta2_unb2b_40GbE.kernel_src" altera:type="avalon_streaming" altera:dir="start">
+        <altera:port_mapping altera:name="kernel_src_data" altera:internal="kernel_src_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_ready" altera:internal="kernel_src_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="kernel_src_valid" altera:internal="kernel_src_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="refclk" altera:internal="board_ta2_unb2b_40GbE.refclk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk_ref_r" altera:internal="clk_ref_r"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_serial_data" altera:internal="board_ta2_unb2b_40GbE.rx_serial_data" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_serial_r" altera:internal="rx_serial_r"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_status" altera:internal="board_ta2_unb2b_40GbE.rx_status" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_status" altera:internal="rx_status"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_serial_data" altera:internal="board_ta2_unb2b_40GbE.tx_serial_data" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_serial_r" altera:internal="tx_serial_r"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_timer_0.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_timer_0.ip
new file mode 100644
index 0000000000000000000000000000000000000000..560be12ba8a200ab677434847c2d83c62427d7b8
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_timer_0.ip
@@ -0,0 +1,1353 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>board_timer_0</spirit:library>
+  <spirit:name>timer_0</spirit:name>
+  <spirit:version>18.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>irq</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>irq</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedAddressablePoint</spirit:name>
+          <spirit:displayName>Associated addressable interface</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">board_timer_0.s1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedReceiverOffset</spirit:name>
+          <spirit:displayName>Bridged receiver offset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToReceiver</spirit:name>
+          <spirit:displayName>Bridges to receiver</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>irqScheme</spirit:name>
+          <spirit:displayName>Interrupt scheme</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>synchronousEdges</spirit:name>
+          <spirit:displayName>Synchronous edges</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>s1</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>chipselect</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>write_n</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>write_n</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>addressAlignment</spirit:name>
+          <spirit:displayName>Slave addressing</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressAlignment">NATIVE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressGroup</spirit:name>
+          <spirit:displayName>Address group</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressSpan</spirit:name>
+          <spirit:displayName>Address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>addressUnits</spirit:name>
+          <spirit:displayName>Address units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>alwaysBurstMaxBurst</spirit:name>
+          <spirit:displayName>Always burst maximum burst</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>Associated clock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>Associated reset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset">reset</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bitsPerSymbol</spirit:name>
+          <spirit:displayName>Bits per symbol</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgedAddressOffset</spirit:name>
+          <spirit:displayName>Bridged Address Offset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bridgesToMaster</spirit:name>
+          <spirit:displayName>Bridges to master</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
+          <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>burstcountUnits</spirit:name>
+          <spirit:displayName>Burstcount units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>constantBurstBehavior</spirit:name>
+          <spirit:displayName>Constant burst behavior</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>explicitAddressSpan</spirit:name>
+          <spirit:displayName>Explicit address span</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>holdTime</spirit:name>
+          <spirit:displayName>Hold</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>interleaveBursts</spirit:name>
+          <spirit:displayName>Interleave bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isBigEndian</spirit:name>
+          <spirit:displayName>Big endian</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isFlash</spirit:name>
+          <spirit:displayName>Flash memory</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isMemoryDevice</spirit:name>
+          <spirit:displayName>Memory device</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>isNonVolatileStorage</spirit:name>
+          <spirit:displayName>Non-volatile storage</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>linewrapBursts</spirit:name>
+          <spirit:displayName>Linewrap bursts</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingReadTransactions</spirit:name>
+          <spirit:displayName>Maximum pending read transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>maximumPendingWriteTransactions</spirit:name>
+          <spirit:displayName>Maximum pending write transactions</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumReadLatency</spirit:name>
+          <spirit:displayName>minimumReadLatency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumResponseLatency</spirit:name>
+          <spirit:displayName>Minimum response latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>minimumUninterruptedRunLength</spirit:name>
+          <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>printableDevice</spirit:name>
+          <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readLatency</spirit:name>
+          <spirit:displayName>Read latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitStates</spirit:name>
+          <spirit:displayName>Read wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>readWaitTime</spirit:name>
+          <spirit:displayName>Read wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerIncomingSignals</spirit:name>
+          <spirit:displayName>Register incoming signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>registerOutgoingSignals</spirit:name>
+          <spirit:displayName>Register outgoing signals</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>setupTime</spirit:name>
+          <spirit:displayName>Setup</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timingUnits</spirit:name>
+          <spirit:displayName>Timing units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>transparentBridge</spirit:name>
+          <spirit:displayName>Transparent bridge</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>waitrequestAllowance</spirit:name>
+          <spirit:displayName>Waitrequest allowance</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>wellBehavedWaitrequest</spirit:name>
+          <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeLatency</spirit:name>
+          <spirit:displayName>Write latency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitStates</spirit:name>
+          <spirit:displayName>Write wait states</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>writeWaitTime</spirit:name>
+          <spirit:displayName>Write wait</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
+            </spirit:parameter>
+            <spirit:parameter>
+              <spirit:name>embeddedsw.configuration.isTimerDevice</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isTimerDevice">1</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_avalon_timer</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>15</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>15</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>chipselect</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>write_n</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irq</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>board_timer_0</spirit:library>
+      <spirit:name>altera_avalon_timer</spirit:name>
+      <spirit:version>18.0</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>alwaysRun</spirit:name>
+          <spirit:displayName>No Start/Stop control bits</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="alwaysRun">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>counterSize</spirit:name>
+          <spirit:displayName>Counter Size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="counterSize">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>fixedPeriod</spirit:name>
+          <spirit:displayName>Fixed period</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="fixedPeriod">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>period</spirit:name>
+          <spirit:displayName>Period</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="period">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>periodUnits</spirit:name>
+          <spirit:displayName>Units</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="periodUnits">MSEC</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>resetOutput</spirit:name>
+          <spirit:displayName>System reset on timeout (Watchdog)</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="resetOutput">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>snapshot</spirit:name>
+          <spirit:displayName>Readable snapshot</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="snapshot">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timeoutPulseOutput</spirit:name>
+          <spirit:displayName>Timeout pulse (1 clock wide)</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="timeoutPulseOutput">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemFrequency</spirit:name>
+          <spirit:displayName>systemFrequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemFrequency">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>watchdogPulse</spirit:name>
+          <spirit:displayName>Watchdog Timer Pulse Length</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="watchdogPulse">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>timerPreset</spirit:name>
+          <spirit:displayName>Presets</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="timerPreset">SIMPLE_PERIODIC_INTERRUPT</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>periodUnitsString</spirit:name>
+          <spirit:displayName>periodUnitsString</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="periodUnitsString">ms</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>valueInSecond</spirit:name>
+          <spirit:displayName>valueInSecond</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="valueInSecond">0.001</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>loadValue</spirit:name>
+          <spirit:displayName>loadValue</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="loadValue">99999</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mult</spirit:name>
+          <spirit:displayName>mult</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="mult">0.001</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ticksPerSec</spirit:name>
+          <spirit:displayName>ticksPerSec</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="ticksPerSec">1000.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>slave_address_width</spirit:name>
+          <spirit:displayName>slave_address_width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="slave_address_width">3</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_assignments>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.ALWAYS_RUN</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.ALWAYS_RUN">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.COUNTER_SIZE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.COUNTER_SIZE">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FIXED_PERIOD</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FIXED_PERIOD">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.FREQ</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.FREQ">100000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.LOAD_VALUE</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.LOAD_VALUE">99999</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.MULT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.MULT">0.001</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.PERIOD</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.PERIOD">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.PERIOD_UNITS</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.PERIOD_UNITS">ms</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.RESET_OUTPUT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.RESET_OUTPUT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.SNAPSHOT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.SNAPSHOT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.TICKS_PER_SEC</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.TICKS_PER_SEC">1000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.CMacro.TIMEOUT_PULSE_OUTPUT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>embeddedsw.dts.vendor</spirit:name>
+          <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.vendor">altr</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_assignments>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
+    <interfaces>
+        <interface>
+            <name>clk</name>
+            <type>clock</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>clk</name>
+                    <role>clk</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>clockRate</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>externallyDriven</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>ptfSchematicName</key>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>irq</name>
+            <type>interrupt</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>irq</name>
+                    <role>irq</role>
+                    <direction>Output</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedAddressablePoint</key>
+                        <value>board_timer_0.s1</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedReceiverOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToReceiver</key>
+                    </entry>
+                    <entry>
+                        <key>irqScheme</key>
+                        <value>NONE</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>reset</name>
+            <type>reset</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>reset_n</name>
+                    <role>reset_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap/>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>synchronousEdges</key>
+                        <value>DEASSERT</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+        </interface>
+        <interface>
+            <name>s1</name>
+            <type>avalon</type>
+            <isStart>false</isStart>
+            <ports>
+                <port>
+                    <name>address</name>
+                    <role>address</role>
+                    <direction>Input</direction>
+                    <width>3</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>writedata</name>
+                    <role>writedata</role>
+                    <direction>Input</direction>
+                    <width>16</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>readdata</name>
+                    <role>readdata</role>
+                    <direction>Output</direction>
+                    <width>16</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+                </port>
+                <port>
+                    <name>chipselect</name>
+                    <role>chipselect</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+                <port>
+                    <name>write_n</name>
+                    <role>write_n</role>
+                    <direction>Input</direction>
+                    <width>1</width>
+                    <lowerBound>0</lowerBound>
+                    <vhdlType>STD_LOGIC</vhdlType>
+                </port>
+            </ports>
+            <assignments>
+                <assignmentValueMap>
+                    <entry>
+                        <key>embeddedsw.configuration.isFlash</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isMemoryDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isPrintableDevice</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>embeddedsw.configuration.isTimerDevice</key>
+                        <value>1</value>
+                    </entry>
+                </assignmentValueMap>
+            </assignments>
+            <parameters>
+                <parameterValueMap>
+                    <entry>
+                        <key>addressAlignment</key>
+                        <value>NATIVE</value>
+                    </entry>
+                    <entry>
+                        <key>addressGroup</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>addressSpan</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>addressUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>alwaysBurstMaxBurst</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>associatedClock</key>
+                        <value>clk</value>
+                    </entry>
+                    <entry>
+                        <key>associatedReset</key>
+                        <value>reset</value>
+                    </entry>
+                    <entry>
+                        <key>bitsPerSymbol</key>
+                        <value>8</value>
+                    </entry>
+                    <entry>
+                        <key>bridgedAddressOffset</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>bridgesToMaster</key>
+                    </entry>
+                    <entry>
+                        <key>burstOnBurstBoundariesOnly</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>burstcountUnits</key>
+                        <value>WORDS</value>
+                    </entry>
+                    <entry>
+                        <key>constantBurstBehavior</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>explicitAddressSpan</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>holdTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>interleaveBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isBigEndian</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isFlash</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isMemoryDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>isNonVolatileStorage</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>linewrapBursts</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingReadTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>maximumPendingWriteTransactions</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>minimumReadLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumResponseLatency</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>minimumUninterruptedRunLength</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>prSafe</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>printableDevice</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>readLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitStates</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>readWaitTime</key>
+                        <value>1</value>
+                    </entry>
+                    <entry>
+                        <key>registerIncomingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>registerOutgoingSignals</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>setupTime</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>timingUnits</key>
+                        <value>Cycles</value>
+                    </entry>
+                    <entry>
+                        <key>transparentBridge</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>waitrequestAllowance</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>wellBehavedWaitrequest</key>
+                        <value>false</value>
+                    </entry>
+                    <entry>
+                        <key>writeLatency</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitStates</key>
+                        <value>0</value>
+                    </entry>
+                    <entry>
+                        <key>writeWaitTime</key>
+                        <value>0</value>
+                    </entry>
+                </parameterValueMap>
+            </parameters>
+            <cmsisInfo>
+                <cmsisSrcFileContents>&lt;?xml version="1.0" encoding="utf-8"?&gt;    
+&lt;device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" &gt;
+  &lt;peripherals&gt;
+   &lt;peripheral&gt;
+      &lt;name&gt;altera_avalon_timer&lt;/name&gt;&lt;baseAddress&gt;0x00000000&lt;/baseAddress&gt; 
+      &lt;addressBlock&gt;
+        &lt;offset&gt;0x0&lt;/offset&gt;
+        &lt;size&gt;16&lt;/size&gt;
+        &lt;usage&gt;registers&lt;/usage&gt;
+      &lt;/addressBlock&gt;
+       &lt;registers&gt;
+         &lt;register&gt;     
+          &lt;name&gt;status&lt;/name&gt;  
+          &lt;displayName&gt;Status&lt;/displayName&gt;
+          &lt;description&gt;The status register has two defined bits. TO (timeout), RUN&lt;/description&gt;
+          &lt;addressOffset&gt;0x0&lt;/addressOffset&gt;
+          &lt;size&gt;16&lt;/size&gt;
+          &lt;access&gt;read-write&lt;/access&gt;
+          &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+          &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+          &lt;fields&gt;
+            &lt;field&gt;&lt;name&gt;TO&lt;/name&gt;
+            &lt;description&gt;The TO (timeout) bit is set to 1 when the internal counter reaches zero. Once set by a timeout event, the TO bit stays set until explicitly cleared by a master peripheral. Write zero to the status register to clear the TO bit.&lt;/description&gt;
+             &lt;bitOffset&gt;0x0&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+             &lt;access&gt;read-only&lt;/access&gt;
+             &lt;readAction&gt;clear&lt;/readAction&gt;
+            &lt;/field&gt;
+            &lt;field&gt;&lt;name&gt;RUN&lt;/name&gt;
+            &lt;description&gt;The RUN bit reads as 1 when the internal counter is running; otherwise this bit reads as 0. The RUN bit is not changed by
+ a write operation to the status register.&lt;/description&gt;
+             &lt;bitOffset&gt;1&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+             &lt;access&gt;read-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+             &lt;name&gt;Reserved&lt;/name&gt;
+             &lt;description&gt;Reserved&lt;/description&gt;
+             &lt;bitOffset&gt;2&lt;/bitOffset&gt;
+             &lt;bitWidth&gt;14&lt;/bitWidth&gt;
+             &lt;access&gt;read-write&lt;/access&gt;
+             &lt;parameters&gt;
+                 &lt;parameter&gt;
+                 &lt;name&gt;Reserved&lt;/name&gt;
+                 &lt;value&gt;true&lt;/value&gt;
+                 &lt;/parameter&gt;
+             &lt;/parameters&gt;
+            &lt;/field&gt;
+          &lt;/fields&gt;
+        &lt;/register&gt; 
+        &lt;register&gt;
+            &lt;name&gt;control&lt;/name&gt;
+            &lt;description&gt;The control register has four defined bits. ITO (Timeout Interrupt), CONT (continue), START, STOP&lt;/description&gt;
+            &lt;addressOffset&gt;0x1&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;reset&gt;
+                &lt;value&gt;0x0&lt;/value&gt;
+            &lt;/reset&gt;
+            &lt;field&gt;
+                &lt;name&gt;ITO&lt;/name&gt;
+                &lt;description&gt;If the ITO bit is 1, the interval timer core generates an IRQ when the status register's TO bit is 1. When the ITO bit is 0, the timer does not generate IRQs.&lt;/description&gt;
+                &lt;bitOffset&gt;0&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;CONT&lt;/name&gt;
+                &lt;description&gt;The CONT (continuous) bit determines how the internal counter behaves when it reaches zero. If the CONT bit is 1, the counter runs continuously until it is stopped by the STOP bit. If CONT is 0, the counter stops after it reaches zero. When the counter reaches zero, it reloads with the value stored in the period registers, regardless of the CONT bit.&lt;/description&gt;
+                &lt;bitOffset&gt;1&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;START&lt;/name&gt;
+                &lt;description&gt;Writing a 1 to the START bit starts the internal counter running (counting down). The START bit is an event bit that enables the counter when a write operation is performed. If the timer is stopped, writing a 1 to the START bit causes the timer to restart counting from the number currently stored in its counter. If the timer is already running, writing a 1 to START has no effect. Writing 0 to the START bit has no effect.&lt;/description&gt;
+                &lt;bitOffset&gt;2&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;write-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;STOP&lt;/name&gt;
+                &lt;description&gt;Writing a 1 to the STOP bit stops the internal counter. The STOP bit is an event bit that causes the counter to stop when a write operation is performed. If the timer is already stopped, writing a 1 to STOP has no effect. Writing a 0 to the stop bit has no effect. If the timer hardware is configured with Start/Stop control bits off, writing the STOP bit has no effect.&lt;/description&gt;
+                &lt;bitOffset&gt;3&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;1&lt;/bitWidth&gt;
+                &lt;access&gt;write-only&lt;/access&gt;
+            &lt;/field&gt;
+            &lt;field&gt;
+                &lt;name&gt;Reserved&lt;/name&gt;
+                &lt;description&gt;Reserved&lt;/description&gt;
+                &lt;bitOffset&gt;4&lt;/bitOffset&gt;
+                &lt;bitWidth&gt;12&lt;/bitWidth&gt;
+                &lt;access&gt;read-write&lt;/access&gt;
+                &lt;parameters&gt;
+                    &lt;parameter&gt;
+                    &lt;name&gt;Reserved&lt;/name&gt;
+                    &lt;value&gt;true&lt;/value&gt;
+                    &lt;/parameter&gt;
+                &lt;/parameters&gt;
+            &lt;/field&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_name_0}&lt;/name&gt;
+            &lt;description&gt;The period_n registers together store the timeout period value when a write operation to one of the period_n register or the internal counter reaches 0. The timer's actual period is one cycle greater than the value stored in the period_n registers because the counter assumes the value zero for one clock cycle. Writing to one of the period_n registers stops the internal counter, except when the hardware is configured with Start/Stop control bits off. If Start/Stop control bits is off, writing either register does not stop the counter. When the hardware is configured with Writeable period disabled, writing to one of the period_n registers causes the counter to reset to the fixed Timeout Period specified at system generation time.&lt;/description&gt;
+            &lt;addressOffset&gt;0x2&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_name_0_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_name_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x3&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_name_1_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_snap_0}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x4&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_snap_0_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${period_snap_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x5&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;${period_snap_1_reset_value}&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_0}&lt;/name&gt;
+            &lt;description&gt;A master peripheral may request a coherent snapshot of the current internal counter by performing a write operation (write-data ignored) to one of the snap_n registers. When a write occurs, the value of the counter is copied to snap_n registers. The snapshot occurs whether or not the counter is running. Requesting a snapshot does not change the internal counter's operation.&lt;/description&gt;
+            &lt;addressOffset&gt;0x6&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_1}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x7&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_2}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x8&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+        &lt;register&gt;
+            &lt;name&gt;${snap_3}&lt;/name&gt;
+            &lt;description&gt;&lt;/description&gt;
+            &lt;addressOffset&gt;0x9&lt;/addressOffset&gt;
+            &lt;size&gt;16&lt;/size&gt;
+            &lt;access&gt;read-write&lt;/access&gt;
+            &lt;resetValue&gt;0x0&lt;/resetValue&gt;
+            &lt;resetMask&gt;0xffff&lt;/resetMask&gt;
+        &lt;/register&gt;
+    &lt;/registers&gt;
+   &lt;/peripheral&gt;
+  &lt;/peripherals&gt;
+&lt;/device&gt; </cmsisSrcFileContents>
+                <addressGroup></addressGroup>
+                <cmsisVars>
+                    <entry>
+                        <key>period_name_1_reset_value</key>
+                        <value>0x1</value>
+                    </entry>
+                    <entry>
+                        <key>snap_0</key>
+                        <value>Reserved</value>
+                    </entry>
+                    <entry>
+                        <key>period_name_0_reset_value</key>
+                        <value>0x869f</value>
+                    </entry>
+                    <entry>
+                        <key>snap_2</key>
+                        <value>Reserved</value>
+                    </entry>
+                    <entry>
+                        <key>snap_1</key>
+                        <value>Reserved</value>
+                    </entry>
+                    <entry>
+                        <key>snap_3</key>
+                        <value>Reserved</value>
+                    </entry>
+                    <entry>
+                        <key>period_name_0</key>
+                        <value>periodl</value>
+                    </entry>
+                    <entry>
+                        <key>period_name_1</key>
+                        <value>periodh</value>
+                    </entry>
+                    <entry>
+                        <key>period_snap_1</key>
+                        <value>snaph</value>
+                    </entry>
+                    <entry>
+                        <key>period_snap_1_reset_value</key>
+                        <value>0x0</value>
+                    </entry>
+                    <entry>
+                        <key>period_snap_0_reset_value</key>
+                        <value>0x0</value>
+                    </entry>
+                    <entry>
+                        <key>period_snap_0</key>
+                        <value>snapl</value>
+                    </entry>
+                </cmsisVars>
+            </cmsisInfo>
+        </interface>
+    </interfaces>
+</boundaryDefinition>]]></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos>
+        <entry>
+            <key>clk</key>
+            <value>
+                <connectionPointName>clk</connectionPointName>
+                <suppliedSystemInfos>
+                    <entry>
+                        <key>CLOCK_RATE</key>
+                        <value>100000000</value>
+                    </entry>
+                </suppliedSystemInfos>
+                <consumedSystemInfos/>
+            </value>
+        </entry>
+        <entry>
+            <key>s1</key>
+            <value>
+                <connectionPointName>s1</connectionPointName>
+                <suppliedSystemInfos/>
+                <consumedSystemInfos>
+                    <entry>
+                        <key>ADDRESS_MAP</key>
+                        <value>&lt;address-map&gt;&lt;slave name='s1' start='0x0' end='0x20' datawidth='16' /&gt;&lt;/address-map&gt;</value>
+                    </entry>
+                    <entry>
+                        <key>ADDRESS_WIDTH</key>
+                        <value>5</value>
+                    </entry>
+                    <entry>
+                        <key>MAX_SLAVE_DATA_WIDTH</key>
+                        <value>16</value>
+                    </entry>
+                </consumedSystemInfos>
+            </value>
+        </entry>
+    </connPtSystemInfos>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="clk" altera:internal="timer_0.clk" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="irq" altera:internal="timer_0.irq" altera:type="interrupt" altera:dir="end">
+        <altera:port_mapping altera:name="irq" altera:internal="irq"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset" altera:internal="timer_0.reset" altera:type="reset" altera:dir="end">
+        <altera:port_mapping altera:name="reset_n" altera:internal="reset_n"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="s1" altera:internal="timer_0.s1" altera:type="avalon" altera:dir="end">
+        <altera:port_mapping altera:name="address" altera:internal="address"></altera:port_mapping>
+        <altera:port_mapping altera:name="chipselect" altera:internal="chipselect"></altera:port_mapping>
+        <altera:port_mapping altera:name="readdata" altera:internal="readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="write_n" altera:internal="write_n"></altera:port_mapping>
+        <altera:port_mapping altera:name="writedata" altera:internal="writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/freeze_wrapper.v b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/freeze_wrapper.v
new file mode 100755
index 0000000000000000000000000000000000000000..d8fa194c871c7c96990da151eb64c7b57273390e
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/freeze_wrapper.v
@@ -0,0 +1,226 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+module freeze_wrapper(
+
+  //input           freeze,
+
+  //////// board ports //////////
+  input           board_kernel_clk_clk,
+  input           board_kernel_clk2x_clk,
+  input           board_kernel_reset_reset_n,
+  output [0:0]    board_kernel_irq_irq,
+  //input [30:0]    board_acl_internal_snoop_data,
+  //input           board_acl_internal_snoop_valid,
+  //output          board_acl_internal_snoop_ready,
+  output          board_kernel_cra_waitrequest,
+  output [63:0]   board_kernel_cra_readdata,
+  output          board_kernel_cra_readdatavalid,
+  input [0:0]     board_kernel_cra_burstcount,
+  input [63:0]    board_kernel_cra_writedata,
+  input [29:0]    board_kernel_cra_address,
+  input           board_kernel_cra_write,
+  input           board_kernel_cra_read,
+  input [7:0]     board_kernel_cra_byteenable,
+  input           board_kernel_cra_debugaccess,
+
+
+  input  wire [39:0]  board_kernel_stream_src_1GbE_data,
+  input  wire         board_kernel_stream_src_1GbE_valid,
+  output wire         board_kernel_stream_src_1GbE_ready,
+  output wire [39:0]  board_kernel_stream_snk_1GbE_data,
+  output wire         board_kernel_stream_snk_1GbE_valid,
+  input  wire         board_kernel_stream_snk_1GbE_ready,
+
+  input  wire [71:0]  board_kernel_stream_src_10GbE_data,
+  input  wire         board_kernel_stream_src_10GbE_valid,
+  output wire         board_kernel_stream_src_10GbE_ready,
+  output wire [71:0]  board_kernel_stream_snk_10GbE_data,
+  output wire         board_kernel_stream_snk_10GbE_valid,
+  input  wire         board_kernel_stream_snk_10GbE_ready,
+  
+  input  wire [263:0] board_kernel_stream_src_40GbE_data,
+  input  wire         board_kernel_stream_src_40GbE_valid,
+  output wire         board_kernel_stream_src_40GbE_ready,
+  output wire [263:0] board_kernel_stream_snk_40GbE_data,
+  output wire         board_kernel_stream_snk_40GbE_valid,
+  input  wire         board_kernel_stream_snk_40GbE_ready,
+
+  output [6:0]     board_kernel_register_mem_address,                
+  output           board_kernel_register_mem_clken,      
+  output           board_kernel_register_mem_chipselect, 
+  output           board_kernel_register_mem_write,      
+  input  [255:0]    board_kernel_register_mem_readdata,   
+  output [255:0]    board_kernel_register_mem_writedata,  
+  output [31:0]     board_kernel_register_mem_byteenable 
+
+  //input           board_kernel_mem0_waitrequest,
+  //input [511:0]   board_kernel_mem0_readdata,
+  //input           board_kernel_mem0_readdatavalid,
+  //output [4:0]    board_kernel_mem0_burstcount,
+  //output [511:0]  board_kernel_mem0_writedata,
+  //output [30:0]   board_kernel_mem0_address,
+  //output          board_kernel_mem0_write,
+  //output          board_kernel_mem0_read,
+  //output [63:0]   board_kernel_mem0_byteenable,
+  //output          board_kernel_mem0_debugaccess
+);
+
+//reg  [7:0]        kernel_reset_count;                          // counter to release RESETn and FREEZE in the proper sequence
+//reg  [2:0]        freeze_kernel_clk;                           // metastability hardening to being FREEZE signal onto the kernel clock
+//reg               kernel_system_clock_reset_reset_reset_n;     // RESETn signal must be held de-asserted during PR, then assert when PR is done
+//reg               pr_freeze_reg;                               // internal copy of the FREEZE signal, held asserted longer than the input FREEZE signal to allow PR region to be reset
+//
+//// control signals out of the Kernel that must be held inactive during PR (controlled by the FREEZE signal)
+//wire              kernel_system_kernel_irq_irq;
+//wire              kernel_system_cc_snoop_ready;
+//wire              kernel_system_kernel_cra_waitrequest;
+//wire              kernel_system_kernel_cra_readdatavalid;
+//wire              kernel_system_kernel_mem0_read;
+//wire              kernel_system_kernel_mem0_write;
+//
+//
+//// capture the freeze signal onto the kernel clock domain
+//always @( posedge board_kernel_clk_clk or negedge board_kernel_reset_reset_n)  
+//begin
+//   if ( board_kernel_reset_reset_n == 1'b0 ) begin
+//      freeze_kernel_clk[0] <= 1'b0;
+//      freeze_kernel_clk[1] <= 1'b0;
+//      freeze_kernel_clk[2] <= 1'b0;
+//   end else begin
+//      freeze_kernel_clk[0] <= freeze;
+//      freeze_kernel_clk[1] <= freeze_kernel_clk[0];
+//      freeze_kernel_clk[2] <= freeze_kernel_clk[1];
+//   end
+//end
+//
+//// circuitry to implement freeze/reset requirements on the GLOBAL kernel RESETn signal
+//// During PR (when freeze input is asserted), hold RESETn HIGH
+//// After PR is done, continue to hold control outputs from this block in the frozen (inactive) state while RESETn is driven low
+//// Finally, release the internal freeze signal and then release the kernel RESETn signal
+//always @( posedge board_kernel_clk_clk or negedge board_kernel_reset_reset_n )
+//begin
+//   if ( board_kernel_reset_reset_n == 1'b0 ) begin
+//      kernel_reset_count <= 8'h00;
+//      kernel_system_clock_reset_reset_reset_n <= 1'b0;
+//      pr_freeze_reg       <= 1'b0;
+//   end else begin
+//
+//      if ( freeze_kernel_clk[2] == 1'b1 ) begin
+//         kernel_reset_count <= 8'h00;
+//      end else if (kernel_reset_count != 8'hFF) begin
+//         kernel_reset_count <= kernel_reset_count + 1'b1;
+//      end else begin
+//         kernel_reset_count <= kernel_reset_count;
+//      end
+//      
+//      if ( (freeze_kernel_clk[2] == 1'b1) || (kernel_reset_count == 8'hFF) ) begin
+//         kernel_system_clock_reset_reset_reset_n <= 1'b1;
+//      end else if ( kernel_reset_count >= 8'h40 ) begin
+//         kernel_system_clock_reset_reset_reset_n <= 1'b0;
+//      end
+//      
+//      if ( freeze_kernel_clk[2] == 1'b1 || (!kernel_reset_count[7] && pr_freeze_reg) ) begin
+//          pr_freeze_reg       <= 1'b1;
+//      end else begin
+//          pr_freeze_reg       <= 1'b0;
+//      end
+//
+//   end
+//end
+//         
+//      
+//
+//// hold all control outputs from the Kernel region inactive during PR
+//// Signals in the PR region will toggle at random during PR, we must protect external circuitry from being corrupted
+//assign board_kernel_irq_irq            = pr_freeze_reg ?   1'b0:kernel_system_kernel_irq_irq;
+//assign board_acl_internal_snoop_ready  = pr_freeze_reg ?   1'b0:kernel_system_cc_snoop_ready;
+//assign board_kernel_cra_waitrequest    = pr_freeze_reg ?   1'b1:kernel_system_kernel_cra_waitrequest;
+//assign board_kernel_cra_readdatavalid  = pr_freeze_reg ?   1'b0:kernel_system_kernel_cra_readdatavalid;
+//assign board_kernel_mem0_read          = pr_freeze_reg ?   1'b0:kernel_system_kernel_mem0_read;
+//assign board_kernel_mem0_write         = pr_freeze_reg ?   1'b0:kernel_system_kernel_mem0_write;
+//assign board_kernel_mem0_debugaccess   = 1'b0;     // not used
+//
+//=======================================================
+//  pr_region instantiation
+//=======================================================
+pr_region pr_region_inst
+(
+  .clock_reset_clk(board_kernel_clk_clk),
+  .clock_reset2x_clk(board_kernel_clk2x_clk),
+  .clock_reset_reset_reset_n(board_kernel_reset_reset_n),
+//  .clock_reset_reset_reset_n(kernel_system_clock_reset_reset_reset_n),
+  .kernel_irq_irq(board_kernel_irq_irq),
+//  .kernel_irq_irq(kernel_system_kernel_irq_irq),
+//  .cc_snoop_clk_clk(board_kernel_clk_clk),
+//  .cc_snoop_data(board_acl_internal_snoop_data),
+//  .cc_snoop_valid(board_acl_internal_snoop_valid),
+//  .cc_snoop_ready(kernel_system_cc_snoop_ready),
+//  .kernel_cra_waitrequest(kernel_system_kernel_cra_waitrequest),
+  .kernel_cra_waitrequest(board_kernel_cra_waitrequest),
+  .kernel_cra_readdata(board_kernel_cra_readdata),
+//  .kernel_cra_readdatavalid(kernel_system_kernel_cra_readdatavalid),
+  .kernel_cra_readdatavalid(board_kernel_cra_readdatavalid),
+  .kernel_cra_burstcount(board_kernel_cra_burstcount),
+  .kernel_cra_writedata(board_kernel_cra_writedata),
+  .kernel_cra_address(board_kernel_cra_address),
+  .kernel_cra_write(board_kernel_cra_write),
+  .kernel_cra_read(board_kernel_cra_read),
+  .kernel_cra_byteenable(board_kernel_cra_byteenable),
+  .kernel_cra_debugaccess(board_kernel_cra_debugaccess),
+
+
+
+  .kernel_stream_src_40GbE_data(board_kernel_stream_src_40GbE_data),
+  .kernel_stream_src_40GbE_ready(board_kernel_stream_src_40GbE_ready),
+  .kernel_stream_src_40GbE_valid(board_kernel_stream_src_40GbE_valid),
+  .kernel_stream_snk_40GbE_data(board_kernel_stream_snk_40GbE_data),
+  .kernel_stream_snk_40GbE_ready(board_kernel_stream_snk_40GbE_ready),
+  .kernel_stream_snk_40GbE_valid(board_kernel_stream_snk_40GbE_valid),
+  .kernel_stream_src_10GbE_data(board_kernel_stream_src_10GbE_data),
+  .kernel_stream_src_10GbE_ready(board_kernel_stream_src_10GbE_ready),
+  .kernel_stream_src_10GbE_valid(board_kernel_stream_src_10GbE_valid),
+  .kernel_stream_snk_10GbE_data(board_kernel_stream_snk_10GbE_data),
+  .kernel_stream_snk_10GbE_ready(board_kernel_stream_snk_10GbE_ready),
+  .kernel_stream_snk_10GbE_valid(board_kernel_stream_snk_10GbE_valid),
+  .kernel_stream_src_1GbE_data(board_kernel_stream_src_1GbE_data),
+  .kernel_stream_src_1GbE_ready(board_kernel_stream_src_1GbE_ready),
+  .kernel_stream_src_1GbE_valid(board_kernel_stream_src_1GbE_valid),
+  .kernel_stream_snk_1GbE_data(board_kernel_stream_snk_1GbE_data),
+  .kernel_stream_snk_1GbE_ready(board_kernel_stream_snk_1GbE_ready),
+  .kernel_stream_snk_1GbE_valid(board_kernel_stream_snk_1GbE_valid),
+
+  .kernel_register_mem_address(board_kernel_register_mem_address),  
+  .kernel_register_mem_clken(board_kernel_register_mem_clken),  
+  .kernel_register_mem_chipselect(board_kernel_register_mem_chipselect),  
+  .kernel_register_mem_write(board_kernel_register_mem_write),  
+  .kernel_register_mem_readdata(board_kernel_register_mem_readdata),  
+  .kernel_register_mem_writedata(board_kernel_register_mem_writedata),  
+  .kernel_register_mem_byteenable(board_kernel_register_mem_byteenable)  
+
+//  .kernel_mem0_address(board_kernel_mem0_address),
+//  .kernel_mem0_read(kernel_system_kernel_mem0_read),
+//  .kernel_mem0_write(kernel_system_kernel_mem0_write),
+//  .kernel_mem0_burstcount(board_kernel_mem0_burstcount),
+//  .kernel_mem0_writedata(board_kernel_mem0_writedata),
+//  .kernel_mem0_byteenable(board_kernel_mem0_byteenable),
+//  .kernel_mem0_readdata(board_kernel_mem0_readdata),
+//  .kernel_mem0_waitrequest(board_kernel_mem0_waitrequest),
+//  .kernel_mem0_readdatavalid(board_kernel_mem0_readdatavalid)
+);
+
+endmodule
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/pr_region.v b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/pr_region.v
new file mode 100755
index 0000000000000000000000000000000000000000..9a927d5707bf19c4be90894b9e1bd9b4cdfa1307
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/pr_region.v
@@ -0,0 +1,206 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+module pr_region (
+//  input  wire [30:0]  cc_snoop_data,
+//  input  wire         cc_snoop_valid,
+//  output wire         cc_snoop_ready,
+//  input  wire         cc_snoop_clk_clk,
+  input  wire         clock_reset_clk,
+  input  wire         clock_reset2x_clk,
+  input  wire         clock_reset_reset_reset_n,
+  output wire         kernel_cra_waitrequest,
+  output wire [63:0]  kernel_cra_readdata,
+  output wire         kernel_cra_readdatavalid,
+  input  wire [0:0]   kernel_cra_burstcount,
+  input  wire [63:0]  kernel_cra_writedata,
+  input  wire [29:0]  kernel_cra_address,
+  input  wire         kernel_cra_write,
+  input  wire         kernel_cra_read,
+  input  wire [7:0]   kernel_cra_byteenable,
+  input  wire         kernel_cra_debugaccess,
+  output wire         kernel_irq_irq,
+
+  output  wire [6:0]   kernel_register_mem_address,                
+  output  wire         kernel_register_mem_clken,      
+  output  wire         kernel_register_mem_chipselect, 
+  output  wire         kernel_register_mem_write,      
+  input   wire [255:0]  kernel_register_mem_readdata,   
+  output  wire [255:0]  kernel_register_mem_writedata,  
+  output  wire [31:0]   kernel_register_mem_byteenable, 
+
+  input  wire [39:0]  kernel_stream_src_1GbE_data,
+  input  wire         kernel_stream_src_1GbE_valid,
+  output wire         kernel_stream_src_1GbE_ready,
+  output wire [39:0]  kernel_stream_snk_1GbE_data,
+  output wire         kernel_stream_snk_1GbE_valid,
+  input  wire         kernel_stream_snk_1GbE_ready,
+
+  input  wire [71:0]  kernel_stream_src_10GbE_data,
+  input  wire         kernel_stream_src_10GbE_valid,
+  output wire         kernel_stream_src_10GbE_ready,
+  output wire [71:0]  kernel_stream_snk_10GbE_data,
+  output wire         kernel_stream_snk_10GbE_valid,
+  input  wire         kernel_stream_snk_10GbE_ready,
+
+  input  wire [263:0] kernel_stream_src_40GbE_data,
+  input  wire         kernel_stream_src_40GbE_valid,
+  output wire         kernel_stream_src_40GbE_ready,
+  output wire [263:0] kernel_stream_snk_40GbE_data,
+  output wire         kernel_stream_snk_40GbE_valid,
+  input  wire         kernel_stream_snk_40GbE_ready
+
+
+//  input  wire         kernel_mem0_waitrequest,
+//  input  wire [511:0] kernel_mem0_readdata,
+//  input  wire         kernel_mem0_readdatavalid,
+//  output wire [4:0]   kernel_mem0_burstcount,
+//  output wire [511:0] kernel_mem0_writedata,
+//  output wire [30:0]  kernel_mem0_address,
+//  output wire         kernel_mem0_write,
+//  output wire         kernel_mem0_read,
+//  output wire [63:0]  kernel_mem0_byteenable
+);
+
+//  wire          pipelined_kernel_mem0_s0_waitrequest;
+//  wire  [511:0] pipelined_kernel_mem0_s0_readdata;
+//  wire          pipelined_kernel_mem0_s0_readdatavalid;
+//  wire    [4:0] pipelined_kernel_mem0_s0_burstcount;
+//  wire  [511:0] pipelined_kernel_mem0_s0_writedata;
+//  wire   [30:0] pipelined_kernel_mem0_s0_address;
+//  wire          pipelined_kernel_mem0_s0_write;
+//  wire          pipelined_kernel_mem0_s0_read;
+//  wire   [63:0] pipelined_kernel_mem0_s0_byteenable;
+//
+
+  wire [11:0] kernel_system_register_mem_address;
+  wire        kernel_system_register_mem_write;
+  wire        kernel_system_register_mem_read;
+  reg         kernel_system_register_mem_readdatavalid;
+  
+  assign kernel_register_mem_address = kernel_system_register_mem_address[11:5];
+  assign kernel_register_mem_chipselect = 1'b1;
+  assign kernel_register_mem_clken = kernel_system_register_mem_write|kernel_system_register_mem_read;
+  assign kernel_register_mem_write = kernel_system_register_mem_write;
+  
+  always @( posedge clock_reset_clk or negedge clock_reset_reset_reset_n )
+  begin
+    if (clock_reset_reset_reset_n  == 1'b0 ) begin
+      kernel_system_register_mem_readdatavalid <= 1'b0;
+    end else begin
+       kernel_system_register_mem_readdatavalid <= kernel_system_register_mem_read;
+    end
+  end
+//
+////=======================================================
+////  kernel_mem pipeline stage instantiation
+////=======================================================
+//kernel_mem_mm_bridge_0 kernel_mem_inst(
+//  .clk(clock_reset_clk), 
+//  .m0_waitrequest(kernel_mem0_waitrequest),
+//  .m0_readdata(kernel_mem0_readdata),
+//  .m0_readdatavalid(kernel_mem0_readdatavalid),
+//  .m0_burstcount(kernel_mem0_burstcount),
+//  .m0_writedata(kernel_mem0_writedata),
+//  .m0_address(kernel_mem0_address),
+//  .m0_write(kernel_mem0_write),
+//  .m0_read(kernel_mem0_read),
+//  .m0_byteenable(kernel_mem0_byteenable),
+//  .reset(~clock_reset_reset_reset_n),
+//  .s0_waitrequest(pipelined_kernel_mem0_s0_waitrequest),
+//  .s0_readdata(pipelined_kernel_mem0_s0_readdata),
+//  .s0_readdatavalid(pipelined_kernel_mem0_s0_readdatavalid),
+//  .s0_burstcount(pipelined_kernel_mem0_s0_burstcount),
+//  .s0_writedata(pipelined_kernel_mem0_s0_writedata),
+//  .s0_address(pipelined_kernel_mem0_s0_address),
+//  .s0_write(pipelined_kernel_mem0_s0_write),
+//  .s0_read(pipelined_kernel_mem0_s0_read),
+//  .s0_byteenable(pipelined_kernel_mem0_s0_byteenable)
+//);
+
+//=======================================================
+//  kernel_system instantiation
+//=======================================================
+kernel_system kernel_system_inst
+(
+  // kernel_system ports
+  .clock_reset_clk(clock_reset_clk),
+  .clock_reset2x_clk(clock_reset2x_clk),
+  .clock_reset_reset_reset_n(clock_reset_reset_reset_n),
+  .kernel_irq_irq(kernel_irq_irq),
+  .cc_snoop_clk_clk(clock_reset_clk),
+//  .cc_snoop_data(cc_snoop_data),
+//  .cc_snoop_valid(cc_snoop_valid),
+//  .cc_snoop_ready(cc_snoop_ready),
+  .kernel_cra_waitrequest(kernel_cra_waitrequest),
+  .kernel_cra_readdata(kernel_cra_readdata),
+  .kernel_cra_readdatavalid(kernel_cra_readdatavalid),
+  .kernel_cra_burstcount(kernel_cra_burstcount),
+  .kernel_cra_writedata(kernel_cra_writedata),
+  .kernel_cra_address(kernel_cra_address),
+  .kernel_cra_write(kernel_cra_write),
+  .kernel_cra_read(kernel_cra_read),
+  .kernel_cra_byteenable(kernel_cra_byteenable),
+  .kernel_cra_debugaccess(kernel_cra_debugaccess),
+
+  .kernel_register_mem_read(kernel_system_register_mem_read),
+  .kernel_register_mem_write(kernel_system_register_mem_write),
+  .kernel_register_mem_address(kernel_system_register_mem_address),
+  .kernel_register_mem_writedata(kernel_register_mem_writedata),
+  .kernel_register_mem_byteenable(kernel_register_mem_byteenable),
+  .kernel_register_mem_readdata(kernel_register_mem_readdata),
+  .kernel_register_mem_readdatavalid(kernel_system_register_mem_readdatavalid),
+
+
+  .kernel_input_40GbE_data(kernel_stream_src_40GbE_data),
+  .kernel_input_40GbE_ready(kernel_stream_src_40GbE_ready),
+  .kernel_input_40GbE_valid(kernel_stream_src_40GbE_valid),
+
+  .kernel_output_40GbE_data(kernel_stream_snk_40GbE_data),
+  .kernel_output_40GbE_ready(kernel_stream_snk_40GbE_ready),
+  .kernel_output_40GbE_valid(kernel_stream_snk_40GbE_valid),
+
+
+  .kernel_input_10GbE_data(kernel_stream_src_10GbE_data),
+  .kernel_input_10GbE_ready(kernel_stream_src_10GbE_ready),
+  .kernel_input_10GbE_valid(kernel_stream_src_10GbE_valid),
+
+  .kernel_output_10GbE_data(kernel_stream_snk_10GbE_data),
+  .kernel_output_10GbE_ready(kernel_stream_snk_10GbE_ready),
+  .kernel_output_10GbE_valid(kernel_stream_snk_10GbE_valid),
+
+
+  .kernel_input_1GbE_data(kernel_stream_src_1GbE_data),
+  .kernel_input_1GbE_ready(kernel_stream_src_1GbE_ready),
+  .kernel_input_1GbE_valid(kernel_stream_src_1GbE_valid),
+
+  .kernel_output_1GbE_data(kernel_stream_snk_1GbE_data),
+  .kernel_output_1GbE_ready(kernel_stream_snk_1GbE_ready),
+  .kernel_output_1GbE_valid(kernel_stream_snk_1GbE_valid)
+
+//  .kernel_mem0_address(pipelined_kernel_mem0_s0_address),
+//  .kernel_mem0_read(pipelined_kernel_mem0_s0_read),
+//  .kernel_mem0_write(pipelined_kernel_mem0_s0_write),
+//  .kernel_mem0_burstcount(pipelined_kernel_mem0_s0_burstcount),
+//  .kernel_mem0_writedata(pipelined_kernel_mem0_s0_writedata),
+//  .kernel_mem0_byteenable(pipelined_kernel_mem0_s0_byteenable),
+//  .kernel_mem0_readdata(pipelined_kernel_mem0_s0_readdata),
+//  .kernel_mem0_waitrequest(pipelined_kernel_mem0_s0_waitrequest),
+//  .kernel_mem0_readdatavalid(pipelined_kernel_mem0_s0_readdatavalid)
+);
+
+endmodule
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/hdllib.cfg b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..aab4d4bca08d4666073e50956523f37c68a37f7a
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/hdllib.cfg
@@ -0,0 +1,49 @@
+hdl_lib_name = ta2_unb2b_10GbE
+hdl_library_clause_name = ta2_unb2b_10GbE_lib
+hdl_lib_uses_synth = common technology dp tech_pll tech_eth_10g tech_mac_10g 
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+hdl_lib_include_ip = 
+                     # Comment all IP that is not used in this design
+                     # 10GbE
+                     ip_arria10_e1sg_mac_10g
+                     ip_arria10_e1sg_pll_xgmii_mac_clocks
+                     ip_arria10_e1sg_transceiver_pll_10g
+                     
+                     ip_arria10_e1sg_phy_10gbase_r
+                     #ip_arria10_e1sg_phy_10gbase_r_4
+                     #ip_arria10_e1sg_phy_10gbase_r_12
+                     #ip_arria10_e1sg_phy_10gbase_r_24
+                     #ip_arria10_e1sg_phy_10gbase_r_48
+                     
+                     ip_arria10_e1sg_transceiver_reset_controller_1
+                     #ip_arria10_e1sg_transceiver_reset_controller_4
+                     #ip_arria10_e1sg_transceiver_reset_controller_12
+                     #ip_arria10_e1sg_transceiver_reset_controller_24
+                     #ip_arria10_e1sg_transceiver_reset_controller_48
+
+synth_files =
+  ta2_unb2b_10GbE.vhd
+test_bench_files =     
+
+regression_test_vhdl = 
+    
+[modelsim_project_file]
+
+[quartus_project_file]
+synth_top_level_entity =
+
+quartus_copy_files =
+
+quartus_qsf_files =
+    $RADIOHDL/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.qsf
+
+quartus_sdc_files =
+    $RADIOHDL/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
+
+quartus_tcl_files =
+    
+
+quartus_vhdl_files = 
+
+quartus_qip_files =
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..dc445ef7c50de4c5c103da743dba49e403c0846b
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
@@ -0,0 +1,45 @@
+post_message "Running ta2_unb2b_10GbE script"
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
+#============================================================
+# Files and basic settings
+#============================================================
+
+# Local HDL files
+set_global_assignment -name VHDL_FILE ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd
+
+# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_40GbE.qsf in RadioHDL build directory. 
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_pll_xgmii_mac_clocks/ip_arria10_e1sg_pll_xgmii_mac_clocks_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mac_10g/ip_arria10_e1sg_mac_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mac_10g/tech_mac_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_transceiver/tech_transceiver_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_phy_10gbase_r/ip_arria10_e1sg_phy_10gbase_r_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_transceiver_pll_10g/ip_arria10_e1sg_transceiver_pll_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_transceiver_reset_controller_1/ip_arria10_e1sg_transceiver_reset_controller_1_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_10gbase_r/tech_10gbase_r_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_eth_10g/ip_arria10_e1sg_eth_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_eth_10g/tech_eth_10g_lib.qip"
+
+
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..5bde0464e46edc69ff967603b54234076eb4476d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd
@@ -0,0 +1,378 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Reinier van der Walle
+-- Purpose:
+-- . Provide 10G ethernet I/O interface (BSP) for OpenCL kernel on Arria10
+-- Description:
+-- . This core consists of:
+--   . An Intel/Altera 10G Low Latency MAC instance
+--   . SOP/EOP insertion (kernel channel only carries data and valid)
+--   . Dual clock FIFO 
+--     . Clock domain transition between kernel_clk and clk_txmac
+--     . Buffers full Ethernet packet (10G MAC requires uninterrupted packet)
+--   . Clock (PLL) / reset generation
+-- . Details:
+--   . This core was developed for use on the Uniboard2b.
+--   .
+--   . The data field of the ST-avalon interface is also used to provide
+--   . SOP, EOP and empty meta-data. The implementation of this is shown below.
+--   +-----------+---------+--------------------------------------------------------+
+--   | Bit range | Name    | Description                                            |
+--   +-----------+---------+--------------------------------------------------------+
+--   | [0:63]    | payload | Packet payload                                         |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 64        | sop     | Start of packet signal                                 |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 65        | eop     | End of packet signal                                   |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 66:68     | -       | reserved bits                                          |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 69:71     | empty   | On EOP, this field indicates how many bytes are unused |
+--   +-----------+---------+--------------------------------------------------------+
+LIBRARY IEEE, common_lib, dp_lib, tech_pll_lib, technology_lib, tech_eth_10g_lib, tech_mac_10g_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE common_lib.common_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE common_lib.common_interface_layers_pkg.ALL;
+USE tech_mac_10g_lib.tech_mac_10g_component_pkg.ALL;
+
+ENTITY ta2_unb2b_10GbE IS       
+  PORT (      
+    --config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 10G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC; -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC; -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(71 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(71 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+END ta2_unb2b_10GbE;
+
+
+ARCHITECTURE str OF ta2_unb2b_10GbE IS
+
+  CONSTANT c_sim                           : BOOLEAN := FALSE;
+
+  CONSTANT c_nof_streams_qsfp              : NATURAL := 1;
+
+  CONSTANT c_tx_fifo_fill                  : NATURAL := 1125; -- Largest frame is 9000 bytes = 1125
+  CONSTANT c_tx_fifo_size                  : NATURAL := 2048; 
+  CONSTANT c_rx_fifo_size                  : NATURAL := 256; -- should be large enough
+
+  SIGNAL tr_ref_clk_312                    : STD_LOGIC;
+  SIGNAL tr_ref_clk_156                    : STD_LOGIC;
+  SIGNAL tr_ref_rst_156                    : STD_LOGIC;
+  
+  SIGNAL unb2_board_front_io_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
+  SIGNAL unb2_board_front_io_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+  
+  SIGNAL eth_ref_clk_644                   : STD_LOGIC;
+  SIGNAL eth_ref_clk_312                   : STD_LOGIC;
+  SIGNAL eth_ref_clk_156                   : STD_LOGIC;
+  SIGNAL eth_ref_rst_156                   : STD_LOGIC;
+  
+  SIGNAL eth_tx_clk_arr                    : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+  SIGNAL eth_tx_rst_arr                    : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+  SIGNAL eth_rx_clk_arr                    : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+  SIGNAL eth_rx_rst_arr                    : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+
+  SIGNAL dp_latency_adapter_tx_src_out     : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_tx_src_in      : t_dp_siso;
+
+  SIGNAL dp_latency_adapter_tx_snk_in      : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_tx_snk_out     : t_dp_siso;
+
+  SIGNAL dp_fifo_fill_tx_src_out_arr       : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0); 
+  SIGNAL dp_fifo_fill_tx_src_in_arr        : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0);
+
+  SIGNAL mac_10g_src_out_arr               : t_dp_sosi_arr(c_nof_streams_qsfp-1 DOWNTO 0); 
+  SIGNAL mac_10g_src_in_arr                : t_dp_siso_arr(c_nof_streams_qsfp-1 DOWNTO 0);
+
+  SIGNAL dp_fifo_dc_rx_src_out             : t_dp_sosi; 
+  SIGNAL dp_fifo_dc_rx_src_in              : t_dp_siso;
+
+  SIGNAL dp_latency_adapter_rx_src_out     : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_rx_src_in      : t_dp_siso;
+
+  SIGNAL dp_xonoff_src_out                 : t_dp_sosi;
+  SIGNAL dp_xonoff_src_in                  : t_dp_siso;
+BEGIN
+
+  --------
+  -- PLL
+  --------
+  u_tech_pll_xgmii_mac_clocks : ENTITY tech_pll_lib.tech_pll_xgmii_mac_clocks
+  GENERIC MAP (
+    g_technology => c_tech_arria10_e1sg
+  )
+  PORT MAP (
+    refclk_644 => clk_ref_r,
+    rst_in     => config_reset,
+    clk_156    => tr_ref_clk_156,
+    clk_312    => tr_ref_clk_312,
+    rst_156    => tr_ref_rst_156,
+    rst_312    => OPEN
+  );
+
+
+  ---------------------------------------------------------------------------------------
+  -- Clocks and reset
+  ---------------------------------------------------------------------------------------
+
+  -- Apply the clocks from top level down such that they have their rising_edge() aligned without any delta-delay
+  u_tech_eth_10g_clocks : ENTITY tech_eth_10g_lib.tech_eth_10g_clocks
+  GENERIC MAP (
+    g_technology     => c_tech_arria10_e1sg,
+    g_nof_channels   => c_nof_streams_qsfp
+  )
+  PORT MAP (
+    -- Input clocks
+    -- . Reference
+    tr_ref_clk_644    => clk_ref_r,
+    tr_ref_clk_312    => tr_ref_clk_312,
+    tr_ref_clk_156    => tr_ref_clk_156,
+    tr_ref_rst_156    => tr_ref_rst_156,
+    
+    
+    -- Output clocks
+    -- . Reference
+    eth_ref_clk_644   => eth_ref_clk_644,
+    eth_ref_clk_312   => eth_ref_clk_312,
+    eth_ref_clk_156   => eth_ref_clk_156,
+    eth_ref_rst_156   => eth_ref_rst_156,
+    
+    -- . Data
+    eth_tx_clk_arr    => eth_tx_clk_arr,
+    eth_tx_rst_arr    => eth_tx_rst_arr,
+    
+    eth_rx_clk_arr    => eth_rx_clk_arr,
+    eth_rx_rst_arr    => eth_rx_rst_arr
+  );  
+ 
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_tx_bytes: FOR I IN 0 TO 7 GENERATE
+    dp_latency_adapter_tx_snk_in.data(8*(8-I) -1  DOWNTO 8*(7-I)) <= kernel_snk_data(8*(I+1) -1 DOWNTO 8*I);
+  END GENERATE;
+
+  -- Assign correct data fields to control signals.
+  dp_latency_adapter_tx_snk_in.sop <= kernel_snk_data(64);
+  dp_latency_adapter_tx_snk_in.eop <= kernel_snk_data(65);
+  dp_latency_adapter_tx_snk_in.empty(2 DOWNTO 0) <= kernel_snk_data(71 DOWNTO 69);
+
+  dp_latency_adapter_tx_snk_in.valid <= kernel_snk_valid;
+  kernel_snk_ready <= dp_latency_adapter_tx_snk_out.ready; -- Flow control towards source (kernel)
+
+  rx_status <= dp_latency_adapter_tx_snk_out.xon;
+
+  tx_serial_r <= unb2_board_front_io_serial_tx_arr(0);
+  unb2_board_front_io_serial_rx_arr(0) <= rx_serial_r;
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=0 (OpenCL kernel) to RL=1 (Downstream).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_tx : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 0,
+    g_out_latency => 1 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_latency_adapter_tx_snk_in, 
+    snk_out   => dp_latency_adapter_tx_snk_out, 
+
+    src_out   => dp_latency_adapter_tx_src_out, 
+    src_in    => dp_latency_adapter_tx_src_in 
+  );
+  
+    
+  -----------------------------------------------------------------------------
+  -- RX XON frame control
+  -----------------------------------------------------------------------------
+
+  u_dp_xonoff : ENTITY dp_lib.dp_xonoff
+  PORT MAP (
+    rst      => kernel_reset,
+    clk      => kernel_clk,
+         
+    in_siso  => dp_latency_adapter_tx_src_in,      
+    in_sosi  => dp_latency_adapter_tx_src_out,
+    
+    out_siso => dp_xonoff_src_in,
+    out_sosi => dp_xonoff_src_out    
+  );   
+ 
+
+  ---------------------------------------------------------------------------------------
+  -- FIFO FILL with fill level/eop trigger so we can deliver packets to the MAC fast enough
+  ---------------------------------------------------------------------------------------
+
+  u_dp_fifo_fill_tx_eop : ENTITY dp_lib.dp_fifo_fill_eop
+  GENERIC MAP (
+    g_technology     => c_tech_arria10_e1sg,
+    g_use_dual_clock => TRUE,
+    g_data_w         => c_xgmii_data_w,
+    g_empty_w        => c_tech_mac_10g_empty_w,
+    g_use_empty      => TRUE,
+    g_fifo_fill      => c_tx_fifo_fill,
+    g_fifo_size      => c_tx_fifo_size
+  )
+  PORT MAP (
+    wr_rst      => kernel_reset, 
+    wr_clk      => kernel_clk, 
+    rd_rst      => eth_tx_rst_arr(0),
+    rd_clk      => eth_tx_clk_arr(0),
+
+    snk_out     => dp_xonoff_src_in,
+    snk_in      => dp_xonoff_src_out,
+
+    src_in      => dp_fifo_fill_tx_src_in_arr(0), 
+    src_out     => dp_fifo_fill_tx_src_out_arr(0) 
+  );
+
+
+  ---------------------------------------------------------------------------------------
+  -- ETH MAC + PHY
+  ---------------------------------------------------------------------------------------
+
+  u_tech_eth_10g : ENTITY tech_eth_10g_lib.tech_eth_10g
+  GENERIC MAP (
+    g_technology          => c_tech_arria10_e1sg,
+    g_sim                 => c_sim,
+    g_sim_level           => 1,  -- 0 = use IP; 1 = use fast serdes model
+    g_nof_channels        => c_nof_streams_qsfp,
+    g_direction           => "TX_RX",
+    g_pre_header_padding  => FALSE
+  )
+  PORT MAP (
+    -- Transceiver PLL reference clock
+    tr_ref_clk_644   => eth_ref_clk_644,   -- 644.531250 MHz for 10GBASE-R
+    tr_ref_clk_312   => eth_ref_clk_312,   -- 312.5      MHz for 10GBASE-R
+    tr_ref_clk_156   => eth_ref_clk_156,   -- 156.25     MHz for 10GBASE-R or for XAUI
+    tr_ref_rst_156   => eth_ref_rst_156,   --                for 10GBASE-R or for XAUI
+    
+    -- MM
+    mm_clk           => '0',
+    mm_rst           => '0',
+  
+    -- ST
+    tx_snk_in_arr    => dp_fifo_fill_tx_src_out_arr,      -- 64 bit data @ 156 MHz
+    tx_snk_out_arr   => dp_fifo_fill_tx_src_in_arr,
+    
+    rx_src_out_arr   => mac_10g_src_out_arr,              -- 64 bit data @ 156 MHz
+    rx_src_in_arr    => mac_10g_src_in_arr,
+    
+    -- PHY serial IO
+    -- . 10GBASE-R (single lane)
+    serial_tx_arr    => unb2_board_front_io_serial_tx_arr,
+    serial_rx_arr    => unb2_board_front_io_serial_rx_arr
+  );
+
+
+
+  ---------------------------------------------------------------------------------------
+  -- RX FIFO: rx_clk -> dp_clk
+  ---------------------------------------------------------------------------------------
+
+  u_dp_fifo_dc_rx : ENTITY dp_lib.dp_fifo_dc
+  GENERIC MAP (
+    g_technology  => c_tech_arria10_e1sg,
+    g_data_w      => c_xgmii_data_w,
+    g_empty_w     => c_tech_mac_10g_empty_w,
+    g_use_empty   => TRUE,
+    g_fifo_size   => c_rx_fifo_size
+  )
+  PORT MAP (
+    wr_rst      => eth_rx_rst_arr(0),
+    wr_clk      => eth_rx_clk_arr(0),
+    rd_rst      => kernel_reset,
+    rd_clk      => kernel_clk,
+  
+    snk_out     => mac_10g_src_in_arr(0),
+    snk_in      => mac_10g_src_out_arr(0),
+  
+    src_in      => dp_fifo_dc_rx_src_in, 
+    src_out     => dp_fifo_dc_rx_src_out
+  );   
+
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=1 (Upstream) to RL=0 (OpenCL kernel).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_rx : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 1,
+    g_out_latency => 0 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_fifo_dc_rx_src_out, 
+    snk_out   => dp_fifo_dc_rx_src_in, 
+
+    src_out   => dp_latency_adapter_rx_src_out, 
+    src_in    => dp_latency_adapter_rx_src_in 
+  );
+      
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_rx_bytes: FOR I IN 0 TO 7 GENERATE
+    kernel_src_data(8*(8-I) -1  DOWNTO 8*(7-I)) <= dp_latency_adapter_rx_src_out.data(8*(I+1) -1 DOWNTO 8*I);
+  END GENERATE;
+
+  -- Assign control signals to correct data fields.
+  kernel_src_data(64) <= dp_latency_adapter_rx_src_out.sop;
+  kernel_src_data(65) <= dp_latency_adapter_rx_src_out.eop;
+  kernel_src_data(71 DOWNTO 69) <= dp_latency_adapter_rx_src_out.empty(2 DOWNTO 0);
+  
+
+  kernel_src_valid <= dp_latency_adapter_rx_src_out.valid;
+  dp_latency_adapter_rx_src_in.ready <= kernel_src_ready;
+  dp_latency_adapter_rx_src_in.xon <= '1';
+
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..072933051d7ad7c7c27a27b81aa053ee01f584ac
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl
@@ -0,0 +1,200 @@
+# TCL File Generated by Component Editor 18.0
+# Mon Jan 13 11:25:28 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_10GbE "ta2_unb2b_10GbE" v1.0
+#  2020.01.13.11:25:28
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_10GbE
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_10GbE
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_10GbE
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_10GbE_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_10GbE_ip_wrapper.vhd VHDL PATH ta2_unb2b_10GbE_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 72
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 72
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+# 
+# connection point refclk
+# 
+add_interface refclk clock end
+set_interface_property refclk ENABLED true
+set_interface_property refclk EXPORT_OF ""
+set_interface_property refclk PORT_NAME_MAP ""
+set_interface_property refclk CMSIS_SVD_VARIABLES ""
+set_interface_property refclk SVD_ADDRESS_GROUP ""
+
+add_interface_port refclk clk_ref_r clk Input 1
+
+
+# 
+# connection point rx_serial_data
+# 
+add_interface rx_serial_data conduit end
+set_interface_property rx_serial_data associatedClock ""
+set_interface_property rx_serial_data associatedReset ""
+set_interface_property rx_serial_data ENABLED true
+set_interface_property rx_serial_data EXPORT_OF ""
+set_interface_property rx_serial_data PORT_NAME_MAP ""
+set_interface_property rx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property rx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_serial_data rx_serial_r conduit Input 1
+
+
+# 
+# connection point tx_serial_data
+# 
+add_interface tx_serial_data conduit end
+set_interface_property tx_serial_data associatedClock ""
+set_interface_property tx_serial_data associatedReset ""
+set_interface_property tx_serial_data ENABLED true
+set_interface_property tx_serial_data EXPORT_OF ""
+set_interface_property tx_serial_data PORT_NAME_MAP ""
+set_interface_property tx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property tx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port tx_serial_data tx_serial_r conduit Output 1
+
+
+# 
+# connection point config_reset
+# 
+add_interface config_reset reset end
+set_interface_property config_reset associatedClock ""
+set_interface_property config_reset synchronousEdges NONE
+set_interface_property config_reset ENABLED true
+set_interface_property config_reset EXPORT_OF ""
+set_interface_property config_reset PORT_NAME_MAP ""
+set_interface_property config_reset CMSIS_SVD_VARIABLES ""
+set_interface_property config_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port config_reset config_reset reset Input 1
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
+# 
+# connection point rx_status
+# 
+add_interface rx_status conduit end
+set_interface_property rx_status associatedClock ""
+set_interface_property rx_status associatedReset ""
+set_interface_property rx_status ENABLED true
+set_interface_property rx_status EXPORT_OF ""
+set_interface_property rx_status PORT_NAME_MAP ""
+set_interface_property rx_status CMSIS_SVD_VARIABLES ""
+set_interface_property rx_status SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_status rx_status rx_status Output 1
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl~ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl~
new file mode 100644
index 0000000000000000000000000000000000000000..ea4cf697bb2be70bd74b118f3e48c34e5c501cc5
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_hw.tcl~
@@ -0,0 +1,200 @@
+# TCL File Generated by Component Editor 18.0
+# Mon Jan 13 09:28:21 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_10GbE "ta2_unb2b_10GbE" v1.0
+#  2020.01.13.09:28:21
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_10GbE
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_10GbE
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_10GbE
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_10GbE_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_10GbE_ip_wrapper.vhd VHDL PATH ta2_unb2b_10GbE_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 72
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 72
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+# 
+# connection point refclk
+# 
+add_interface refclk clock end
+set_interface_property refclk ENABLED true
+set_interface_property refclk EXPORT_OF ""
+set_interface_property refclk PORT_NAME_MAP ""
+set_interface_property refclk CMSIS_SVD_VARIABLES ""
+set_interface_property refclk SVD_ADDRESS_GROUP ""
+
+add_interface_port refclk clk_ref_r clk Input 1
+
+
+# 
+# connection point rx_serial_data
+# 
+add_interface rx_serial_data conduit end
+set_interface_property rx_serial_data associatedClock ""
+set_interface_property rx_serial_data associatedReset ""
+set_interface_property rx_serial_data ENABLED true
+set_interface_property rx_serial_data EXPORT_OF ""
+set_interface_property rx_serial_data PORT_NAME_MAP ""
+set_interface_property rx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property rx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_serial_data rx_serial_r conduit Input 1
+
+
+# 
+# connection point tx_serial_data
+# 
+add_interface tx_serial_data conduit end
+set_interface_property tx_serial_data associatedClock ""
+set_interface_property tx_serial_data associatedReset ""
+set_interface_property tx_serial_data ENABLED true
+set_interface_property tx_serial_data EXPORT_OF ""
+set_interface_property tx_serial_data PORT_NAME_MAP ""
+set_interface_property tx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property tx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port tx_serial_data tx_serial_r conduit Output 1
+
+
+# 
+# connection point config_reset
+# 
+add_interface config_reset reset end
+set_interface_property config_reset associatedClock ""
+set_interface_property config_reset synchronousEdges NONE
+set_interface_property config_reset ENABLED true
+set_interface_property config_reset EXPORT_OF ""
+set_interface_property config_reset PORT_NAME_MAP ""
+set_interface_property config_reset CMSIS_SVD_VARIABLES ""
+set_interface_property config_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port config_reset config_reset reset Input 1
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
+# 
+# connection point rx_status
+# 
+add_interface rx_status conduit end
+set_interface_property rx_status associatedClock ""
+set_interface_property rx_status associatedReset ""
+set_interface_property rx_status ENABLED true
+set_interface_property rx_status EXPORT_OF ""
+set_interface_property rx_status PORT_NAME_MAP ""
+set_interface_property rx_status CMSIS_SVD_VARIABLES ""
+set_interface_property rx_status SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_status rx_status rx_status Output 1
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_ip_wrapper.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_ip_wrapper.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..b2c09951e8034f0b8f2c32d431e902b227e38c12
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE_ip_wrapper.vhd
@@ -0,0 +1,114 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Reinier van der Walle
+-- Purpose:
+-- . Instantiates ta2_unb2b_10GbE component 
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+
+ENTITY ta2_unb2b_10GbE_ip_wrapper IS       
+  PORT (      
+    --config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 10G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC; -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC; -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(71 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(71 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+END ta2_unb2b_10GbE_ip_wrapper;
+
+
+ARCHITECTURE str OF ta2_unb2b_10GbE_ip_wrapper IS
+  ----------------------------------------------------------------------------
+  -- ta2_unb2b_10GbE Component
+  ----------------------------------------------------------------------------
+  COMPONENT ta2_unb2b_10GbE IS
+  PORT (
+    --config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 10G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC; -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC; -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(71 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(71 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+  END COMPONENT ta2_unb2b_10GbE;
+
+BEGIN
+
+  u_ta2_unb2b_10GbE : ta2_unb2b_10GbE 
+    PORT MAP (
+      --config_clk       => config_clk,
+      config_reset     => config_reset,     
+                                           
+      clk_ref_r        => clk_ref_r,        
+                                           
+      tx_serial_r      => tx_serial_r,     
+      rx_serial_r      => rx_serial_r,      
+                                           
+      kernel_clk       => kernel_clk,       
+      kernel_reset     => kernel_reset,     
+                                           
+      kernel_src_data  => kernel_src_data,  
+      kernel_src_valid => kernel_src_valid, 
+      kernel_src_ready => kernel_src_ready, 
+                                           
+      kernel_snk_data  => kernel_snk_data,  
+      kernel_snk_valid => kernel_snk_valid, 
+      kernel_snk_ready => kernel_snk_ready, 
+  
+      rx_status        => rx_status
+
+    );
+
+
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/hdllib.cfg b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..61d7f3d33a336ae60d9b5742b75df21e0daa3402
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/hdllib.cfg
@@ -0,0 +1,31 @@
+hdl_lib_name = ta2_unb2b_1GbE_mc
+hdl_library_clause_name = ta2_unb2b_1GbE_mc_lib
+hdl_lib_uses_synth = common technology dp  
+hdl_lib_uses_sim = 
+hdl_lib_technology = ip_arria10_e1sg
+
+synth_files =
+  ta2_unb2b_1GbE_mc.vhd
+test_bench_files =     
+
+regression_test_vhdl = 
+    
+[modelsim_project_file]
+
+[quartus_project_file]
+synth_top_level_entity =
+
+quartus_copy_files =
+
+quartus_qsf_files =
+    $RADIOHDL/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.qsf
+
+quartus_sdc_files =
+    $RADIOHDL/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
+
+quartus_tcl_files =
+    
+
+quartus_vhdl_files = 
+
+quartus_qip_files =
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..a0b708e6678092449dd17dfc0988ba4ec88b26b0
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
@@ -0,0 +1,31 @@
+post_message "Running ta2_unb2b_1GbE_mc script"
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
+#============================================================
+# Files and basic settings
+#============================================================
+
+# Local HDL files
+set_global_assignment -name VHDL_FILE ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
+
+# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_1GbE_mc.qsf in RadioHDL build directory. 
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..048f57b0dcd2cbdc2d9c870312cd1fc3f58249fc
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
@@ -0,0 +1,286 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Reinier van der Walle
+-- Purpose:
+-- . Provide 1G ethernet I/O interface (BSP) for OpenCL kernel on Arria10
+-- Description:
+-- . This core consists of glue logic between the OpenCL kernel IO channel and dp sosi/siso interface to ctrl_unb2b_board:
+-- . Details:
+--   . This core was developed for use on the Uniboard2b.
+--   .
+--   . The data field of the ST-avalon interface is also used to provide
+--   . SOP, EOP and empty meta-data. The implementation of this is shown below.
+--   +-----------+---------+--------------------------------------------------------+
+--   | Bit range | Name    | Description                                            |
+--   +-----------+---------+--------------------------------------------------------+
+--   | [0:31]    | payload | Packet payload                                         |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 32        | sop     | Start of packet signal                                 |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 33        | eop     | End of packet signal                                   |
+--   +-----------+---------+--------------------------------------------------------+
+--   | [34:37]   | -       | reserved bits                                          |
+--   +-----------+---------+--------------------------------------------------------+
+--   | [38:39]   | empty   | On EOP, this field indicates how many bytes are unused |
+--   +-----------+---------+--------------------------------------------------------+
+LIBRARY IEEE, common_lib, dp_lib, technology_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE common_lib.common_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE common_lib.common_interface_layers_pkg.ALL;
+
+ENTITY ta2_unb2b_1GbE_mc IS       
+  PORT (      
+    st_clk             : IN STD_LOGIC;
+    st_rst             : IN STD_LOGIC;
+
+    -- eth1g UDP streaming ports
+    udp_tx_sosi_data   : OUT STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0);
+    udp_tx_sosi_valid  : OUT STD_LOGIC;
+    udp_tx_sosi_sop    : OUT STD_LOGIC;
+    udp_tx_sosi_eop    : OUT STD_LOGIC;
+    udp_tx_sosi_empty  : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_tx_siso_ready  : IN  STD_LOGIC;  
+    udp_tx_siso_xon    : IN  STD_LOGIC; 
+ 
+    udp_rx_sosi_data   : IN  STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0);
+    udp_rx_sosi_valid  : IN  STD_LOGIC;
+    udp_rx_sosi_sop    : IN  STD_LOGIC;
+    udp_rx_sosi_eop    : IN  STD_LOGIC;
+    udp_rx_sosi_empty  : IN  STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_rx_siso_ready  : OUT STD_LOGIC;  
+    udp_rx_siso_xon    : OUT STD_LOGIC;  
+
+    kernel_clk         : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset       : IN  STD_LOGIC;
+
+    kernel_src_data    : OUT STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid   : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready   : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data    : IN  STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid   : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready   : OUT STD_LOGIC   -- Flow control towards kernel
+
+  );
+END ta2_unb2b_1GbE_mc;
+
+
+ARCHITECTURE str OF ta2_unb2b_1GbE_mc IS
+
+  CONSTANT c_sim                           : BOOLEAN := FALSE;
+  CONSTANT c_empty_w                       : NATURAL := 2;
+  CONSTANT c_tx_fifo_size                  : NATURAL := 10; -- Can be small as flow control is enabled
+  CONSTANT c_rx_fifo_size                  : NATURAL := 10; -- Can be small as flow control is enabled
+
+  SIGNAL dp_latency_adapter_tx_src_out     : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_tx_src_in      : t_dp_siso;
+
+  SIGNAL dp_latency_adapter_tx_snk_in      : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_tx_snk_out     : t_dp_siso;
+
+  SIGNAL dp_fifo_dc_rx_src_out             : t_dp_sosi; 
+  SIGNAL dp_fifo_dc_rx_src_in              : t_dp_siso;
+
+  SIGNAL dp_latency_adapter_rx_src_out     : t_dp_sosi; 
+  SIGNAL dp_latency_adapter_rx_src_in      : t_dp_siso;
+
+  SIGNAL dp_xonoff_src_out                 : t_dp_sosi;
+  SIGNAL dp_xonoff_src_in                  : t_dp_siso;
+
+  SIGNAL udp_tx_sosi                       : t_dp_sosi;
+  SIGNAL udp_tx_siso                       : t_dp_siso;
+  SIGNAL udp_rx_sosi                       : t_dp_sosi;
+  SIGNAL udp_rx_siso                       : t_dp_siso;
+
+BEGIN
+
+  udp_tx_sosi_data  <= udp_tx_sosi.data(39 DOWNTO 0); 
+  udp_tx_sosi_valid <= udp_tx_sosi.valid; 
+  udp_tx_sosi_sop   <= udp_tx_sosi.sop; 
+  udp_tx_sosi_eop   <= udp_tx_sosi.eop; 
+  udp_tx_sosi_empty <= udp_tx_sosi.empty(1 DOWNTO 0);
+ 
+  udp_tx_siso.ready <= udp_tx_siso_ready;
+  udp_tx_siso.xon   <= udp_tx_siso_xon;
+
+  udp_rx_sosi.data(39 DOWNTO 0)  <= udp_rx_sosi_data;
+  udp_rx_sosi.valid <= udp_rx_sosi_valid;
+  udp_rx_sosi.sop   <= udp_rx_sosi_sop;
+  udp_rx_sosi.eop   <= udp_rx_sosi_eop;
+  udp_rx_sosi.empty(1 DOWNTO 0) <= udp_rx_sosi_empty;
+
+  udp_rx_siso_ready <= udp_rx_siso.ready; 
+  udp_rx_siso_xon   <= udp_rx_siso.xon;
+ 
+-------------------------------------------------------
+ -- Mapping Data from OpenCL kernel to 1GbE Interface --
+  -------------------------------------------------------
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_tx_bytes: FOR I IN 0 TO 3 GENERATE
+    dp_latency_adapter_tx_snk_in.data(c_byte_w*(4-I) -1  DOWNTO c_byte_w*(3-I)) <= kernel_snk_data(c_byte_w*(I+1) -1 DOWNTO c_byte_w*I);
+  END GENERATE;
+
+  -- Assign correct data fields to control signals.
+  dp_latency_adapter_tx_snk_in.sop <= kernel_snk_data(32);
+  dp_latency_adapter_tx_snk_in.eop <= kernel_snk_data(33);
+  dp_latency_adapter_tx_snk_in.empty(1 DOWNTO 0) <= kernel_snk_data(39 DOWNTO 38);
+
+  dp_latency_adapter_tx_snk_in.valid <= kernel_snk_valid;
+  kernel_snk_ready <= dp_latency_adapter_tx_snk_out.ready; -- Flow control towards source (kernel)
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=0 (OpenCL kernel) to RL=1 (Downstream).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_tx : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 0,
+    g_out_latency => 1 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_latency_adapter_tx_snk_in, 
+    snk_out   => dp_latency_adapter_tx_snk_out, 
+
+    src_out   => dp_latency_adapter_tx_src_out, 
+    src_in    => dp_latency_adapter_tx_src_in 
+  );
+  
+    
+  -----------------------------------------------------------------------------
+  -- TX XON frame control
+  -----------------------------------------------------------------------------
+
+  u_dp_xonoff : ENTITY dp_lib.dp_xonoff
+  PORT MAP (
+    rst      => kernel_reset,
+    clk      => kernel_clk,
+         
+    in_siso  => dp_latency_adapter_tx_src_in,      
+    in_sosi  => dp_latency_adapter_tx_src_out,
+    
+    out_siso => dp_xonoff_src_in,
+    out_sosi => dp_xonoff_src_out    
+  );   
+ 
+  -----------------------------------------------------------------------------
+  -- TX dual clock FIFO
+  -----------------------------------------------------------------------------
+
+    u_dp_fifo_dc_tx : ENTITY dp_lib.dp_fifo_dc
+    GENERIC MAP (
+      g_technology  => c_tech_arria10_e1sg,
+      g_data_w      => c_word_w,
+      g_empty_w     => c_empty_w,
+      g_use_empty   => TRUE,
+      g_fifo_size   => c_tx_fifo_size
+    )
+    PORT MAP (
+      wr_rst      => kernel_reset,
+      wr_clk      => kernel_clk,
+      rd_rst      => st_rst,
+      rd_clk      => st_clk,
+  
+      snk_out     => dp_xonoff_src_in,
+      snk_in      => dp_xonoff_src_out,
+  
+      src_in      => udp_tx_siso, 
+      src_out     => udp_tx_sosi
+    );   
+
+-------------------------------------------------------
+ -- Mapping Data from 1GbE Interface to OpenCL kernel --
+  -------------------------------------------------------
+  -----------------------------------------------------------------------------
+  -- TX dual clock FIFO
+  -----------------------------------------------------------------------------
+
+    u_dp_fifo_dc_rx : ENTITY dp_lib.dp_fifo_dc
+    GENERIC MAP (
+      g_technology  => c_tech_arria10_e1sg,
+      g_data_w      => c_word_w,
+      g_empty_w     => c_empty_w,
+      g_use_empty   => TRUE,
+      g_fifo_size   => c_rx_fifo_size
+    )
+    PORT MAP (
+      wr_rst      => st_rst,
+      wr_clk      => st_clk,
+      rd_rst      => kernel_reset,
+      rd_clk      => kernel_clk,
+  
+      snk_out     => udp_rx_siso,
+      snk_in      => udp_rx_sosi,
+  
+      src_in      => dp_fifo_dc_rx_src_in, 
+      src_out     => dp_fifo_dc_rx_src_out
+    );  
+ 
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=1 (Upstream) to RL=0 (OpenCL kernel).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_rx : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 1,
+    g_out_latency => 0 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_fifo_dc_rx_src_out, 
+    snk_out   => dp_fifo_dc_rx_src_in, 
+
+    src_out   => dp_latency_adapter_rx_src_out, 
+    src_in    => dp_latency_adapter_rx_src_in 
+  );
+      
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_rx_bytes: FOR I IN 0 TO 3 GENERATE
+    kernel_src_data(c_byte_w*(4-I) -1  DOWNTO c_byte_w*(3-I)) <= dp_latency_adapter_rx_src_out.data(c_byte_w*(I+1) -1 DOWNTO c_byte_w*I);
+  END GENERATE;
+
+  -- Assign control signals to correct data fields.
+  kernel_src_data(32) <= dp_latency_adapter_rx_src_out.sop;
+  kernel_src_data(33) <= dp_latency_adapter_rx_src_out.eop;
+  kernel_src_data(39 DOWNTO 38) <= dp_latency_adapter_rx_src_out.empty(1 DOWNTO 0);
+  
+
+  kernel_src_valid <= dp_latency_adapter_rx_src_out.valid;
+  dp_latency_adapter_rx_src_in.ready <= kernel_src_ready;
+  dp_latency_adapter_rx_src_in.xon <= '1';
+
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..417432eba6a2e00eea7ff3c4fb679c5005d46db5
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl
@@ -0,0 +1,237 @@
+# TCL File Generated by Component Editor 18.0
+# Tue Jan 28 08:39:40 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_1GbE_mc "ta2_unb2b_1GbE_mc" v1.0
+#  2020.01.28.08:39:40
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_1GbE_mc
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_1GbE_mc
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_1GbE_mc
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_1GbE_mc_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_1GbE_mc_ip_wrapper.vhd VHDL PATH ta2_unb2b_1GbE_mc_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 40
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 40
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
+# 
+# connection point st_clk
+# 
+add_interface st_clk clock end
+set_interface_property st_clk ENABLED true
+set_interface_property st_clk EXPORT_OF ""
+set_interface_property st_clk PORT_NAME_MAP ""
+set_interface_property st_clk CMSIS_SVD_VARIABLES ""
+set_interface_property st_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port st_clk st_clk clk Input 1
+
+
+# 
+# connection point st_rst
+# 
+add_interface st_rst reset end
+set_interface_property st_rst associatedClock st_clk
+set_interface_property st_rst synchronousEdges DEASSERT
+set_interface_property st_rst ENABLED true
+set_interface_property st_rst EXPORT_OF ""
+set_interface_property st_rst PORT_NAME_MAP ""
+set_interface_property st_rst CMSIS_SVD_VARIABLES ""
+set_interface_property st_rst SVD_ADDRESS_GROUP ""
+
+add_interface_port st_rst st_rst reset Input 1
+
+
+# 
+# connection point udp_rx_snk_in
+# 
+add_interface udp_rx_snk_in avalon_streaming end
+set_interface_property udp_rx_snk_in associatedClock st_clk
+set_interface_property udp_rx_snk_in associatedReset st_rst
+set_interface_property udp_rx_snk_in dataBitsPerSymbol 8
+set_interface_property udp_rx_snk_in errorDescriptor ""
+set_interface_property udp_rx_snk_in firstSymbolInHighOrderBits true
+set_interface_property udp_rx_snk_in maxChannel 0
+set_interface_property udp_rx_snk_in readyAllowance 0
+set_interface_property udp_rx_snk_in readyLatency 0
+set_interface_property udp_rx_snk_in ENABLED true
+set_interface_property udp_rx_snk_in EXPORT_OF ""
+set_interface_property udp_rx_snk_in PORT_NAME_MAP ""
+set_interface_property udp_rx_snk_in CMSIS_SVD_VARIABLES ""
+set_interface_property udp_rx_snk_in SVD_ADDRESS_GROUP ""
+
+add_interface_port udp_rx_snk_in udp_rx_siso_ready ready Output 1
+add_interface_port udp_rx_snk_in udp_rx_sosi_data data Input 40
+add_interface_port udp_rx_snk_in udp_rx_sosi_empty empty Input 2
+add_interface_port udp_rx_snk_in udp_rx_sosi_eop endofpacket Input 1
+add_interface_port udp_rx_snk_in udp_rx_sosi_sop startofpacket Input 1
+add_interface_port udp_rx_snk_in udp_rx_sosi_valid valid Input 1
+
+
+# 
+# connection point udp_tx_src_out
+# 
+add_interface udp_tx_src_out avalon_streaming start
+set_interface_property udp_tx_src_out associatedClock st_clk
+set_interface_property udp_tx_src_out associatedReset st_rst
+set_interface_property udp_tx_src_out dataBitsPerSymbol 8
+set_interface_property udp_tx_src_out errorDescriptor ""
+set_interface_property udp_tx_src_out firstSymbolInHighOrderBits true
+set_interface_property udp_tx_src_out maxChannel 0
+set_interface_property udp_tx_src_out readyAllowance 0
+set_interface_property udp_tx_src_out readyLatency 0
+set_interface_property udp_tx_src_out ENABLED true
+set_interface_property udp_tx_src_out EXPORT_OF ""
+set_interface_property udp_tx_src_out PORT_NAME_MAP ""
+set_interface_property udp_tx_src_out CMSIS_SVD_VARIABLES ""
+set_interface_property udp_tx_src_out SVD_ADDRESS_GROUP ""
+
+add_interface_port udp_tx_src_out udp_tx_siso_ready ready Input 1
+add_interface_port udp_tx_src_out udp_tx_sosi_data data Output 40
+add_interface_port udp_tx_src_out udp_tx_sosi_empty empty Output 2
+add_interface_port udp_tx_src_out udp_tx_sosi_eop endofpacket Output 1
+add_interface_port udp_tx_src_out udp_tx_sosi_sop startofpacket Output 1
+add_interface_port udp_tx_src_out udp_tx_sosi_valid valid Output 1
+
+
+# 
+# connection point udp_tx_src_out_xon
+# 
+add_interface udp_tx_src_out_xon conduit end
+set_interface_property udp_tx_src_out_xon associatedClock st_clk
+set_interface_property udp_tx_src_out_xon associatedReset st_rst
+set_interface_property udp_tx_src_out_xon ENABLED true
+set_interface_property udp_tx_src_out_xon EXPORT_OF ""
+set_interface_property udp_tx_src_out_xon PORT_NAME_MAP ""
+set_interface_property udp_tx_src_out_xon CMSIS_SVD_VARIABLES ""
+set_interface_property udp_tx_src_out_xon SVD_ADDRESS_GROUP ""
+
+add_interface_port udp_tx_src_out_xon udp_tx_siso_xon xon Input 1
+
+
+# 
+# connection point udp_rx_snk_in_xon
+# 
+add_interface udp_rx_snk_in_xon conduit end
+set_interface_property udp_rx_snk_in_xon associatedClock st_clk
+set_interface_property udp_rx_snk_in_xon associatedReset st_rst
+set_interface_property udp_rx_snk_in_xon ENABLED true
+set_interface_property udp_rx_snk_in_xon EXPORT_OF ""
+set_interface_property udp_rx_snk_in_xon PORT_NAME_MAP ""
+set_interface_property udp_rx_snk_in_xon CMSIS_SVD_VARIABLES ""
+set_interface_property udp_rx_snk_in_xon SVD_ADDRESS_GROUP ""
+
+add_interface_port udp_rx_snk_in_xon udp_rx_siso_xon xon Output 1
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl~ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl~
new file mode 100644
index 0000000000000000000000000000000000000000..f7ae62d8af5205352700c419360d3fd73d70ed09
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_hw.tcl~
@@ -0,0 +1,129 @@
+# TCL File Generated by Component Editor 18.0
+# Mon Jan 13 11:25:28 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_1GbE_mc "ta2_unb2b_1GbE_mc" v1.0
+#  2020.01.13.11:25:28
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_1GbE_mc
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_1GbE_mc
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_1GbE_mc
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_1GbE_mc_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_1GbE_mc_ip_wrapper.vhd VHDL PATH ta2_unb2b_1GbE_mc_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 40
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 40
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_ip_wrapper.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_ip_wrapper.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..e2864d15cac46b957f2daaac1a6a3ac7561ccc5c
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc_ip_wrapper.vhd
@@ -0,0 +1,137 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Reinier van der Walle
+-- Purpose:
+-- . Instantiates ta2_unb2b_1GbE_mc component 
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+
+ENTITY ta2_unb2b_1GbE_mc_ip_wrapper IS       
+  PORT (      
+    st_clk             : IN STD_LOGIC;
+    st_rst             : IN STD_LOGIC;
+
+    -- eth1g UDP streaming ports
+    udp_tx_sosi_data   : OUT STD_LOGIC_VECTOR(39 DOWNTO 0);
+    udp_tx_sosi_valid  : OUT STD_LOGIC;
+    udp_tx_sosi_sop    : OUT STD_LOGIC;
+    udp_tx_sosi_eop    : OUT STD_LOGIC;
+    udp_tx_sosi_empty  : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_tx_siso_ready  : IN  STD_LOGIC;  
+    udp_tx_siso_xon    : IN  STD_LOGIC; 
+ 
+    udp_rx_sosi_data   : IN  STD_LOGIC_VECTOR(39 DOWNTO 0);
+    udp_rx_sosi_valid  : IN  STD_LOGIC;
+    udp_rx_sosi_sop    : IN  STD_LOGIC;
+    udp_rx_sosi_eop    : IN  STD_LOGIC;
+    udp_rx_sosi_empty  : IN  STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_rx_siso_ready  : OUT STD_LOGIC;  
+    udp_rx_siso_xon    : OUT STD_LOGIC; 
+ 
+    kernel_clk         : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset       : IN  STD_LOGIC;
+
+    kernel_src_data    : OUT STD_LOGIC_VECTOR(39 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid   : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready   : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data    : IN  STD_LOGIC_VECTOR(39 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid   : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready   : OUT STD_LOGIC   -- Flow control towards kernel
+  );
+END ta2_unb2b_1GbE_mc_ip_wrapper;
+
+
+ARCHITECTURE str OF ta2_unb2b_1GbE_mc_ip_wrapper IS
+  ----------------------------------------------------------------------------
+  -- ta2_unb2b_1GbE_mc Component
+  ----------------------------------------------------------------------------
+  COMPONENT ta2_unb2b_1GbE_mc IS
+  PORT (
+    st_clk             : IN STD_LOGIC;
+    st_rst             : IN STD_LOGIC;
+
+    -- eth1g UDP streaming ports
+    udp_tx_sosi_data   : OUT STD_LOGIC_VECTOR(39 DOWNTO 0);
+    udp_tx_sosi_valid  : OUT STD_LOGIC;
+    udp_tx_sosi_sop    : OUT STD_LOGIC;
+    udp_tx_sosi_eop    : OUT STD_LOGIC;
+    udp_tx_sosi_empty  : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_tx_siso_ready  : IN  STD_LOGIC;  
+    udp_tx_siso_xon    : IN  STD_LOGIC; 
+ 
+    udp_rx_sosi_data   : IN  STD_LOGIC_VECTOR(39 DOWNTO 0);
+    udp_rx_sosi_valid  : IN  STD_LOGIC;
+    udp_rx_sosi_sop    : IN  STD_LOGIC;
+    udp_rx_sosi_eop    : IN  STD_LOGIC;
+    udp_rx_sosi_empty  : IN  STD_LOGIC_VECTOR(1 DOWNTO 0);
+    udp_rx_siso_ready  : OUT STD_LOGIC;  
+    udp_rx_siso_xon    : OUT STD_LOGIC;  
+
+    kernel_clk         : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset       : IN  STD_LOGIC;
+
+    kernel_src_data    : OUT STD_LOGIC_VECTOR(39 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid   : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready   : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data    : IN  STD_LOGIC_VECTOR(39 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid   : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready   : OUT STD_LOGIC   -- Flow control towards kernel
+  );
+  END COMPONENT ta2_unb2b_1GbE_mc;
+
+BEGIN
+
+  u_ta2_unb2b_1GbE_mc : ta2_unb2b_1GbE_mc 
+    PORT MAP (
+      st_clk             => st_clk,
+      st_rst             => st_rst,    
+
+      udp_tx_sosi_data   => udp_tx_sosi_data,
+      udp_tx_sosi_valid  => udp_tx_sosi_valid,
+      udp_tx_sosi_sop    => udp_tx_sosi_sop,
+      udp_tx_sosi_eop    => udp_tx_sosi_eop,
+      udp_tx_sosi_empty  => udp_tx_sosi_empty,
+      udp_tx_siso_ready  => udp_tx_siso_ready,
+      udp_tx_siso_xon    => udp_tx_siso_xon,
+                                             
+      udp_rx_sosi_data   => udp_rx_sosi_data,
+      udp_rx_sosi_valid  => udp_rx_sosi_valid,
+      udp_rx_sosi_sop    => udp_rx_sosi_sop,
+      udp_rx_sosi_eop    => udp_rx_sosi_eop,
+      udp_rx_sosi_empty  => udp_rx_sosi_empty,
+      udp_rx_siso_ready  => udp_rx_siso_ready,
+      udp_rx_siso_xon    => udp_rx_siso_xon,
+ 
+      kernel_clk         => kernel_clk,
+      kernel_reset       => kernel_reset,
+      kernel_src_data    => kernel_src_data ,
+      kernel_src_valid   => kernel_src_valid,
+      kernel_src_ready   => kernel_src_ready,
+      kernel_snk_data    => kernel_snk_data,
+      kernel_snk_valid   => kernel_snk_valid,
+      kernel_snk_ready   => kernel_snk_ready 
+    );
+
+END str;
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_atx_pll.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_atx_pll.ip
new file mode 100644
index 0000000000000000000000000000000000000000..50068b4c17aa779ab26a7a406441c804af20a88e
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_atx_pll.ip
@@ -0,0 +1,1836 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>arria10_40g_atx_pll</spirit:library>
+  <spirit:name>xcvr_atx_pll_a10_0</spirit:name>
+  <spirit:version>17.1</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>pll_cal_busy</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>pll_cal_busy</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pll_cal_busy</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>pll_locked</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>pll_locked</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pll_locked</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>pll_powerdown</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>pll_powerdown</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pll_powerdown</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>pll_refclk0</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>pll_refclk0</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>externallyDriven</spirit:name>
+          <spirit:displayName>Externally driven</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ptfSchematicName</spirit:name>
+          <spirit:displayName>PTF schematic name</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_serial_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="hssi_serial_clock" spirit:version="17.1"></spirit:busType>
+      <spirit:master></spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_serial_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>clockRate</spirit:name>
+          <spirit:displayName>Clock rate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>altera_xcvr_atx_pll_a10</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>pll_powerdown</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>pll_refclk0</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_serial_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>pll_locked</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>pll_cal_busy</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>arria10_40g_atx_pll</spirit:library>
+      <spirit:name>altera_xcvr_atx_pll_a10</spirit:name>
+      <spirit:version>17.1</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>rcfg_debug</spirit:name>
+          <spirit:displayName>rcfg_debug</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_debug">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_pll_reconfig</spirit:name>
+          <spirit:displayName>Enable dynamic reconfiguration</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_pll_reconfig">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_advanced_avmm_options</spirit:name>
+          <spirit:displayName>enable_advanced_avmm_options</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_advanced_avmm_options">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_jtag_enable</spirit:name>
+          <spirit:displayName>Enable Altera Debug Master Endpoint</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_jtag_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_separate_avmm_busy</spirit:name>
+          <spirit:displayName>Separate reconfig_waitrequest from the status of AVMM arbitration with PreSICE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_separate_avmm_busy">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_enable_avmm_busy_port</spirit:name>
+          <spirit:displayName>Enable avmm_busy port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_enable_avmm_busy_port">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_capability_reg_enable</spirit:name>
+          <spirit:displayName>Enable capability registers</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_capability_reg_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_user_identifier</spirit:name>
+          <spirit:displayName>Set user-defined IP identifier</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_user_identifier">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_csr_soft_logic_enable</spirit:name>
+          <spirit:displayName>Enable control and status registers</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_csr_soft_logic_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dbg_embedded_debug_enable</spirit:name>
+          <spirit:displayName>dbg_embedded_debug_enable</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dbg_embedded_debug_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dbg_capability_reg_enable</spirit:name>
+          <spirit:displayName>dbg_capability_reg_enable</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dbg_capability_reg_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dbg_user_identifier</spirit:name>
+          <spirit:displayName>dbg_user_identifier</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dbg_user_identifier">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dbg_stat_soft_logic_enable</spirit:name>
+          <spirit:displayName>dbg_stat_soft_logic_enable</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dbg_stat_soft_logic_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dbg_ctrl_soft_logic_enable</spirit:name>
+          <spirit:displayName>dbg_ctrl_soft_logic_enable</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="dbg_ctrl_soft_logic_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_file_prefix</spirit:name>
+          <spirit:displayName>Configuration file prefix</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_file_prefix">altera_xcvr_atx_pll_a10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_sv_file_enable</spirit:name>
+          <spirit:displayName>Generate SystemVerilog package file</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_sv_file_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_h_file_enable</spirit:name>
+          <spirit:displayName>Generate C header file</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_h_file_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_txt_file_enable</spirit:name>
+          <spirit:displayName>Generate text file</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_txt_file_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_mif_file_enable</spirit:name>
+          <spirit:displayName>Generate MIF (Memory Initialize File)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_mif_file_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_multi_enable</spirit:name>
+          <spirit:displayName>Enable multiple reconfiguration profiles</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_multi_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_rcfg_emb_strm_enable</spirit:name>
+          <spirit:displayName>Enable embedded reconfiguration streamer</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_rcfg_emb_strm_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_emb_strm_enable</spirit:name>
+          <spirit:displayName>rcfg_emb_strm_enable</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_emb_strm_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_reduced_files_enable</spirit:name>
+          <spirit:displayName>Generate reduced reconfiguration files</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_reduced_files_enable">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_cnt</spirit:name>
+          <spirit:displayName>Number of reconfiguration profiles</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_profile_cnt">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_select</spirit:name>
+          <spirit:displayName>Store current configuration to profile:</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="rcfg_profile_select">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data0</spirit:name>
+          <spirit:displayName>rcfg_profile_data0</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data0"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data1</spirit:name>
+          <spirit:displayName>rcfg_profile_data1</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data1"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data2</spirit:name>
+          <spirit:displayName>rcfg_profile_data2</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data2"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data3</spirit:name>
+          <spirit:displayName>rcfg_profile_data3</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data3"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data4</spirit:name>
+          <spirit:displayName>rcfg_profile_data4</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data4"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data5</spirit:name>
+          <spirit:displayName>rcfg_profile_data5</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data5"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data6</spirit:name>
+          <spirit:displayName>rcfg_profile_data6</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data6"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_profile_data7</spirit:name>
+          <spirit:displayName>rcfg_profile_data7</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_profile_data7"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_params</spirit:name>
+          <spirit:displayName>rcfg_params</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_params">rcfg_debug,enable_pll_reconfig,rcfg_jtag_enable,rcfg_separate_avmm_busy,rcfg_enable_avmm_busy_port,set_capability_reg_enable,set_user_identifier,set_csr_soft_logic_enable,enable_pld_atx_cal_busy_port,support_mode,prot_mode,bw_sel,refclk_cnt,refclk_index,primary_pll_buffer,enable_8G_path,enable_16G_path,enable_pcie_clk,enable_cascade_out,enable_hip_cal_done_port,set_hip_cal_en,set_output_clock_frequency,set_auto_reference_clock_frequency,set_manual_reference_clock_frequency,set_fref_clock_frequency,set_m_counter,set_ref_clk_div,set_l_counter,set_l_cascade_counter,set_l_cascade_predivider,set_k_counter,enable_mcgb,mcgb_div,enable_hfreq_clk,enable_mcgb_pcie_clksw,mcgb_aux_clkin_cnt,enable_bonding_clks,enable_fb_comp_bonding,pma_width,enable_pld_mcgb_cal_busy_port</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_labels</spirit:name>
+          <spirit:displayName>IP Parameters</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_labels">rcfg_debug,Enable dynamic reconfiguration,Enable Altera Debug Master Endpoint,Separate reconfig_waitrequest from the status of AVMM arbitration with PreSICE,Enable avmm_busy port,Enable capability registers,Set user-defined IP identifier,Enable control and status registers,enable_pld_atx_cal_busy_port,Support mode,Protocol mode,Bandwidth,Number of PLL reference clocks,Selected reference clock source,Primary PLL clock output buffer,Enable PLL GX clock output port,Enable PLL GT clock output port,Enable PCIe clock output port,Enable cascade clock output port,Enable calibration status ports for HIP,Enable PCIe hard IP calibration,PLL output frequency,PLL integer reference clock frequency,PLL fractional reference clock frequency,PLL fractional reference clock frequency,Multiply factor (M-Counter),Divide factor (N-Counter),Divide factor (L-Counter),Divide factor (L-Cascade Counter),predivide factor (L-Cascade Predivider),Fractional multiply factor (K),Include Master Clock Generation Block,Clock division factor,Enable x6/xN non-bonded high-speed clock output port,Enable PCIe clock switch interface,Number of auxiliary MCGB clock input ports.,Enable bonding clock output ports,Enable feedback compensation bonding,PMA interface width,enable_pld_mcgb_cal_busy_port</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals0</spirit:name>
+          <spirit:displayName>Profile 0</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals0"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals1</spirit:name>
+          <spirit:displayName>Profile 1</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals1"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals2</spirit:name>
+          <spirit:displayName>Profile 2</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals2"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals3</spirit:name>
+          <spirit:displayName>Profile 3</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals3"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals4</spirit:name>
+          <spirit:displayName>Profile 4</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals4"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals5</spirit:name>
+          <spirit:displayName>Profile 5</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals5"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals6</spirit:name>
+          <spirit:displayName>Profile 6</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals6"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>rcfg_param_vals7</spirit:name>
+          <spirit:displayName>Profile 7</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="rcfg_param_vals7"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_powerdown_mode</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_powerdown_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_powerdown_mode">powerup</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch0_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch0_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_lc_scratch0_src">scratch0_src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch1_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch1_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_lc_scratch1_src">scratch1_src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch2_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch2_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_lc_scratch2_src">scratch2_src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch3_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch3_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_lc_scratch3_src">scratch3_src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch4_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_lc_scratch4_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_lc_scratch4_src">scratch4_src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xmux_refclk_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xmux_refclk_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xmux_refclk_src">src_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_iqclk_sel</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_iqclk_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_iqclk_sel">power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch0_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch0_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch0_src">scratch0_power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch1_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch1_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch1_src">scratch1_power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch2_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch2_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch2_src">scratch2_power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch3_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch3_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch3_src">scratch3_power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch4_src</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch4_src</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_xpm_iqref_mux_scratch4_src">scratch4_power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_refclk_select</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_refclk_select</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_refclk_select">ref_iqclk0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_silicon_rev</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_silicon_rev</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_silicon_rev">20nm5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_inclk0_logical_to_physical_mapping</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_inclk0_logical_to_physical_mapping</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_inclk0_logical_to_physical_mapping">ref_iqclk0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_inclk1_logical_to_physical_mapping</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_inclk1_logical_to_physical_mapping</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_inclk1_logical_to_physical_mapping">power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_inclk2_logical_to_physical_mapping</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_inclk2_logical_to_physical_mapping</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_inclk2_logical_to_physical_mapping">power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_inclk3_logical_to_physical_mapping</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_inclk3_logical_to_physical_mapping</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_inclk3_logical_to_physical_mapping">power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_lc_refclk_select_mux_inclk4_logical_to_physical_mapping</spirit:name>
+          <spirit:displayName>hssi_pma_lc_refclk_select_mux_inclk4_logical_to_physical_mapping</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_lc_refclk_select_mux_inclk4_logical_to_physical_mapping">power_down</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_silicon_rev</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_silicon_rev</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_silicon_rev">20nm5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_clk_divider</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_clk_divider</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_clk_divider">div2_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_core_clk_lvpecl</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_core_clk_lvpecl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_core_clk_lvpecl">core_clk_lvpecl_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_enable_lvpecl</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_enable_lvpecl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_enable_lvpecl">lvpecl_enable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_optimal</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_optimal</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_optimal">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_powerdown_mode</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_powerdown_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_powerdown_mode">powerup</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_sel_pldclk</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_sel_pldclk</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_sel_pldclk">iqclk_sel_lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_sup_mode</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_sup_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_sup_mode">user_mode</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_term_tristate</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_term_tristate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_term_tristate">tristate_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_vcm_pup</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_vcm_pup</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_vcm_pup">pup_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_clkbuf_sel</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_clkbuf_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_clkbuf_sel">high_vcm</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_refclk_divider_iostandard</spirit:name>
+          <spirit:displayName>hssi_refclk_divider_iostandard</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_refclk_divider_iostandard">lvpecl</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_silicon_rev</spirit:name>
+          <spirit:displayName>atx_pll_silicon_rev</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_silicon_rev">20nm5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_is_cascaded_pll</spirit:name>
+          <spirit:displayName>atx_pll_is_cascaded_pll</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_is_cascaded_pll">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cgb_div</spirit:name>
+          <spirit:displayName>atx_pll_cgb_div</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_cgb_div">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_pma_width</spirit:name>
+          <spirit:displayName>atx_pll_pma_width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_pma_width">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lc_atb</spirit:name>
+          <spirit:displayName>atx_pll_lc_atb</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lc_atb">atb_selectdisable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cp_compensation_enable</spirit:name>
+          <spirit:displayName>atx_pll_cp_compensation_enable</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cp_compensation_enable">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cp_current_setting</spirit:name>
+          <spirit:displayName>atx_pll_cp_current_setting</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cp_current_setting">cp_current_setting23</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cp_testmode</spirit:name>
+          <spirit:displayName>atx_pll_cp_testmode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cp_testmode">cp_normal</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cp_lf_3rd_pole_freq</spirit:name>
+          <spirit:displayName>atx_pll_cp_lf_3rd_pole_freq</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cp_lf_3rd_pole_freq">lf_3rd_pole_setting1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lf_cbig_size</spirit:name>
+          <spirit:displayName>atx_pll_lf_cbig_size</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lf_cbig_size">lf_cbig_setting4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cp_lf_order</spirit:name>
+          <spirit:displayName>atx_pll_cp_lf_order</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cp_lf_order">lf_3rd_order</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lf_resistance</spirit:name>
+          <spirit:displayName>atx_pll_lf_resistance</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lf_resistance">lf_setting1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lf_ripplecap</spirit:name>
+          <spirit:displayName>atx_pll_lf_ripplecap</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lf_ripplecap">lf_ripple_cap_0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cal_status</spirit:name>
+          <spirit:displayName>atx_pll_cal_status</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cal_status">cal_in_progress</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_bonding</spirit:name>
+          <spirit:displayName>atx_pll_bonding</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_bonding">pll_bonding</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_expected_lc_boost_voltage</spirit:name>
+          <spirit:displayName>atx_pll_expected_lc_boost_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_expected_lc_boost_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_power_rail_et</spirit:name>
+          <spirit:displayName>atx_pll_power_rail_et</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_power_rail_et">950</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_lc_vreg_boost_scratch</spirit:name>
+          <spirit:displayName>atx_pll_dprio_lc_vreg_boost_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_lc_vreg_boost_scratch">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_lc_vreg1_boost_scratch</spirit:name>
+          <spirit:displayName>atx_pll_dprio_lc_vreg1_boost_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_lc_vreg1_boost_scratch">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_clk_vreg_boost_scratch</spirit:name>
+          <spirit:displayName>atx_pll_dprio_clk_vreg_boost_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_clk_vreg_boost_scratch">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_mcgb_vreg_boost_scratch</spirit:name>
+          <spirit:displayName>atx_pll_dprio_mcgb_vreg_boost_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_mcgb_vreg_boost_scratch">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_vreg_boost_step_size</spirit:name>
+          <spirit:displayName>atx_pll_dprio_vreg_boost_step_size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_vreg_boost_step_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_vreg1_boost_step_size</spirit:name>
+          <spirit:displayName>atx_pll_dprio_vreg1_boost_step_size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_vreg1_boost_step_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_clk_vreg_boost_step_size</spirit:name>
+          <spirit:displayName>atx_pll_dprio_clk_vreg_boost_step_size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_clk_vreg_boost_step_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_mcgb_vreg_boost_step_size</spirit:name>
+          <spirit:displayName>atx_pll_dprio_mcgb_vreg_boost_step_size</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_mcgb_vreg_boost_step_size">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_lc_vreg_boost_expected_voltage</spirit:name>
+          <spirit:displayName>atx_pll_dprio_lc_vreg_boost_expected_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_lc_vreg_boost_expected_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_lc_vreg1_boost_expected_voltage</spirit:name>
+          <spirit:displayName>atx_pll_dprio_lc_vreg1_boost_expected_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_lc_vreg1_boost_expected_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_clk_vreg_boost_expected_voltage</spirit:name>
+          <spirit:displayName>atx_pll_dprio_clk_vreg_boost_expected_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_clk_vreg_boost_expected_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dprio_mcgb_vreg_boost_expected_voltage</spirit:name>
+          <spirit:displayName>atx_pll_dprio_mcgb_vreg_boost_expected_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_dprio_mcgb_vreg_boost_expected_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_clk_high_perf_voltage</spirit:name>
+          <spirit:displayName>atx_pll_clk_high_perf_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_clk_high_perf_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_clk_mid_power_voltage</spirit:name>
+          <spirit:displayName>atx_pll_clk_mid_power_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_clk_mid_power_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_clk_low_power_voltage</spirit:name>
+          <spirit:displayName>atx_pll_clk_low_power_voltage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_clk_low_power_voltage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_tank_sel</spirit:name>
+          <spirit:displayName>atx_pll_tank_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_tank_sel">lctank1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_tank_band</spirit:name>
+          <spirit:displayName>atx_pll_tank_band</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_tank_band">lc_band4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_tank_voltage_coarse</spirit:name>
+          <spirit:displayName>atx_pll_tank_voltage_coarse</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_tank_voltage_coarse">vreg_setting_coarse0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_tank_voltage_fine</spirit:name>
+          <spirit:displayName>atx_pll_tank_voltage_fine</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_tank_voltage_fine">vreg_setting5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_output_regulator_supply</spirit:name>
+          <spirit:displayName>atx_pll_output_regulator_supply</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_output_regulator_supply">vreg1v_setting0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_overrange_voltage</spirit:name>
+          <spirit:displayName>atx_pll_overrange_voltage</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_overrange_voltage">over_setting0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_underrange_voltage</spirit:name>
+          <spirit:displayName>atx_pll_underrange_voltage</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_underrange_voltage">under_setting4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_fb_select</spirit:name>
+          <spirit:displayName>atx_pll_fb_select</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_fb_select">direct_fb</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_d2a_voltage</spirit:name>
+          <spirit:displayName>atx_pll_d2a_voltage</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_d2a_voltage">d2a_setting_4</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_mode</spirit:name>
+          <spirit:displayName>atx_pll_dsm_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_mode">dsm_mode_integer</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_out_sel</spirit:name>
+          <spirit:displayName>atx_pll_dsm_out_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_out_sel">pll_dsm_disable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_ecn_bypass</spirit:name>
+          <spirit:displayName>atx_pll_dsm_ecn_bypass</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_ecn_bypass">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_ecn_test_en</spirit:name>
+          <spirit:displayName>atx_pll_dsm_ecn_test_en</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_ecn_test_en">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_fractional_division</spirit:name>
+          <spirit:displayName>K counter (valid in fractional mode)</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_fractional_division">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_dsm_fractional_value_ready</spirit:name>
+          <spirit:displayName>atx_pll_dsm_fractional_value_ready</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_dsm_fractional_value_ready">pll_k_ready</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_enable_lc_calibration</spirit:name>
+          <spirit:displayName>atx_pll_enable_lc_calibration</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_enable_lc_calibration">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_enable_lc_vreg_calibration</spirit:name>
+          <spirit:displayName>atx_pll_enable_lc_vreg_calibration</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_enable_lc_vreg_calibration">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_iqclk_mux_sel</spirit:name>
+          <spirit:displayName>atx_pll_iqclk_mux_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_iqclk_mux_sel">iqtxrxclk0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_vco_bypass_enable</spirit:name>
+          <spirit:displayName>atx_pll_vco_bypass_enable</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_vco_bypass_enable">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_l_counter</spirit:name>
+          <spirit:displayName>L counter (valid in non-cascade mode)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_l_counter">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_l_counter_enable</spirit:name>
+          <spirit:displayName>atx_pll_l_counter_enable</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_l_counter_enable">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_cascadeclk_test</spirit:name>
+          <spirit:displayName>atx_pll_cascadeclk_test</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_cascadeclk_test">cascadetest_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_hclk_divide</spirit:name>
+          <spirit:displayName>atx_pll_hclk_divide</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_hclk_divide">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_enable_hclk</spirit:name>
+          <spirit:displayName>atx_pll_enable_hclk</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_enable_hclk">hclk_disabled</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_m_counter</spirit:name>
+          <spirit:displayName>M counter</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_m_counter">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_ref_clk_div</spirit:name>
+          <spirit:displayName>N counter</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_ref_clk_div">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_bandwidth_range_high</spirit:name>
+          <spirit:displayName>atx_pll_bandwidth_range_high</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_bandwidth_range_high">0 hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_bandwidth_range_low</spirit:name>
+          <spirit:displayName>atx_pll_bandwidth_range_low</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_bandwidth_range_low">0 hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_bw_sel</spirit:name>
+          <spirit:displayName>atx_pll_bw_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_bw_sel">medium</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_calibration_mode</spirit:name>
+          <spirit:displayName>atx_pll_calibration_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_calibration_mode">cal_off</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_datarate</spirit:name>
+          <spirit:displayName>Datarate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_datarate">10312500000 bps</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_device_variant</spirit:name>
+          <spirit:displayName>atx_pll_device_variant</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_device_variant">device1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_pfd</spirit:name>
+          <spirit:displayName>atx_pll_f_max_pfd</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_pfd">350000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_ref</spirit:name>
+          <spirit:displayName>atx_pll_f_max_ref</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_ref">800000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_tank_0</spirit:name>
+          <spirit:displayName>atx_pll_f_max_tank_0</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_tank_0">8800000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_tank_1</spirit:name>
+          <spirit:displayName>atx_pll_f_max_tank_1</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_tank_1">11400000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_tank_2</spirit:name>
+          <spirit:displayName>atx_pll_f_max_tank_2</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_tank_2">14400000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_vco</spirit:name>
+          <spirit:displayName>atx_pll_f_max_vco</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_vco">14400000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_x1</spirit:name>
+          <spirit:displayName>atx_pll_f_max_x1</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_x1">8700000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_pfd</spirit:name>
+          <spirit:displayName>atx_pll_f_min_pfd</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_pfd">61440000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_ref</spirit:name>
+          <spirit:displayName>atx_pll_f_min_ref</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_ref">61440000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_tank_0</spirit:name>
+          <spirit:displayName>atx_pll_f_min_tank_0</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_tank_0">6500000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_tank_1</spirit:name>
+          <spirit:displayName>atx_pll_f_min_tank_1</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_tank_1">8800000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_tank_2</spirit:name>
+          <spirit:displayName>atx_pll_f_min_tank_2</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_tank_2">11400000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_min_vco</spirit:name>
+          <spirit:displayName>atx_pll_f_min_vco</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_min_vco">7200000000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_initial_settings</spirit:name>
+          <spirit:displayName>atx_pll_initial_settings</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_initial_settings">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_l_counter_scratch</spirit:name>
+          <spirit:displayName>atx_pll_l_counter_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_l_counter_scratch">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lc_mode</spirit:name>
+          <spirit:displayName>atx_pll_lc_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lc_mode">lccmu_normal</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_n_counter_scratch</spirit:name>
+          <spirit:displayName>atx_pll_n_counter_scratch</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_n_counter_scratch">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_output_clock_frequency</spirit:name>
+          <spirit:displayName>atx_pll_output_clock_frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_output_clock_frequency">5156250000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_power_mode</spirit:name>
+          <spirit:displayName>atx_pll_power_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_power_mode">low_power</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_powerdown_mode</spirit:name>
+          <spirit:displayName>atx_pll_powerdown_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_powerdown_mode">powerup</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_prot_mode</spirit:name>
+          <spirit:displayName>atx_pll_prot_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_prot_mode">basic_tx</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_reference_clock_frequency</spirit:name>
+          <spirit:displayName>atx_pll_reference_clock_frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_reference_clock_frequency">644531250 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_side</spirit:name>
+          <spirit:displayName>atx_pll_side</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_side">side_unknown</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_pm_speed_grade</spirit:name>
+          <spirit:displayName>atx_pll_pm_speed_grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_pm_speed_grade">e3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_sup_mode</spirit:name>
+          <spirit:displayName>atx_pll_sup_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_sup_mode">user_mode</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_top_or_bottom</spirit:name>
+          <spirit:displayName>atx_pll_top_or_bottom</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_top_or_bottom">tb_unknown</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_vccdreg_clk</spirit:name>
+          <spirit:displayName>atx_pll_vccdreg_clk</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_vccdreg_clk">vreg_clk5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_vccdreg_fb</spirit:name>
+          <spirit:displayName>atx_pll_vccdreg_fb</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_vccdreg_fb">vreg_fb8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_vccdreg_fw</spirit:name>
+          <spirit:displayName>atx_pll_vccdreg_fw</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_vccdreg_fw">vreg_fw5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_regulator_bypass</spirit:name>
+          <spirit:displayName>atx_pll_regulator_bypass</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_regulator_bypass">reg_enable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_vco_freq</spirit:name>
+          <spirit:displayName>VCO Frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_vco_freq">10312500000 Hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_vco_fractional</spirit:name>
+          <spirit:displayName>atx_pll_f_max_vco_fractional</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_vco_fractional">0 hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_pfd_fractional</spirit:name>
+          <spirit:displayName>atx_pll_f_max_pfd_fractional</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_pfd_fractional">0 hz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_min_fractional_percentage</spirit:name>
+          <spirit:displayName>atx_pll_min_fractional_percentage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_min_fractional_percentage">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_max_fractional_percentage</spirit:name>
+          <spirit:displayName>atx_pll_max_fractional_percentage</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_max_fractional_percentage">100</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_analog_mode</spirit:name>
+          <spirit:displayName>atx_pll_analog_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_analog_mode">user_custom</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_is_otn</spirit:name>
+          <spirit:displayName>atx_pll_is_otn</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_is_otn">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_is_sdi</spirit:name>
+          <spirit:displayName>atx_pll_is_sdi</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_is_sdi">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_primary_use</spirit:name>
+          <spirit:displayName>atx_pll_primary_use</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_primary_use">hssi_x1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_fpll_refclk_selection</spirit:name>
+          <spirit:displayName>L cascade predivider/VCO divider(valid in cascade mode) </spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_fpll_refclk_selection">select_vco_output</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lc_to_fpll_l_counter_scratch</spirit:name>
+          <spirit:displayName>L cascade counter (valid in cascade mode)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="atx_pll_lc_to_fpll_l_counter_scratch">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_lc_to_fpll_l_counter</spirit:name>
+          <spirit:displayName>atx_pll_lc_to_fpll_l_counter</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_lc_to_fpll_l_counter">lcounter_setting0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_pfd_delay_compensation</spirit:name>
+          <spirit:displayName>atx_pll_pfd_delay_compensation</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_pfd_delay_compensation">normal_delay</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_xcpvco_xchgpmplf_cp_current_boost</spirit:name>
+          <spirit:displayName>atx_pll_xcpvco_xchgpmplf_cp_current_boost</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_xcpvco_xchgpmplf_cp_current_boost">normal_setting</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_f_max_lcnt_fpll_cascading</spirit:name>
+          <spirit:displayName>atx_pll_f_max_lcnt_fpll_cascading</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_f_max_lcnt_fpll_cascading">1200000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_pfd_pulse_width</spirit:name>
+          <spirit:displayName>atx_pll_pfd_pulse_width</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_pfd_pulse_width">pulse_width_setting0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_enable_idle_atx_pll_support</spirit:name>
+          <spirit:displayName>atx_pll_enable_idle_atx_pll_support</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_enable_idle_atx_pll_support">idle_none</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_advanced_options</spirit:name>
+          <spirit:displayName>enable_advanced_options</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_advanced_options">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_hip_options</spirit:name>
+          <spirit:displayName>enable_hip_options</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_hip_options">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_manual_configuration</spirit:name>
+          <spirit:displayName>enable_manual_configuration</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_manual_configuration">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generate_docs</spirit:name>
+          <spirit:displayName>Generate parameter documentation file</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generate_docs">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generate_add_hdl_instance_example</spirit:name>
+          <spirit:displayName>Generate '_hw.tcl' 'add_hdl_instance' example file</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generate_add_hdl_instance_example">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>device_family</spirit:name>
+          <spirit:displayName>device_family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device_family">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115N3F40E2SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>base_device</spirit:name>
+          <spirit:displayName>base_device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="base_device">NIGHTFURY5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>test_mode</spirit:name>
+          <spirit:displayName>Enable Test Mode</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="test_mode">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_pld_atx_cal_busy_port</spirit:name>
+          <spirit:displayName>enable_pld_atx_cal_busy_port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_pld_atx_cal_busy_port">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_debug_ports_parameters</spirit:name>
+          <spirit:displayName><![CDATA[Enable debug ports & parameters]]></spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_debug_ports_parameters">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>support_mode</spirit:name>
+          <spirit:displayName>Support mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="support_mode">user_mode</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>message_level</spirit:name>
+          <spirit:displayName>Message level for rule violations</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="message_level">error</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>pma_speedgrade</spirit:name>
+          <spirit:displayName>pma_speedgrade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="pma_speedgrade">e3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>device_revision</spirit:name>
+          <spirit:displayName>device_revision</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device_revision">20nm5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prot_mode</spirit:name>
+          <spirit:displayName>Protocol mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="prot_mode">Basic</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prot_mode_fnl</spirit:name>
+          <spirit:displayName>prot_mode_fnl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="prot_mode_fnl">basic_tx</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>primary_use</spirit:name>
+          <spirit:displayName>primary_use</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="primary_use">hssi_x1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bw_sel</spirit:name>
+          <spirit:displayName>Bandwidth</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bw_sel">medium</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>refclk_cnt</spirit:name>
+          <spirit:displayName>Number of PLL reference clocks</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="refclk_cnt">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>refclk_index</spirit:name>
+          <spirit:displayName>Selected reference clock source</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="refclk_index">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>silicon_rev</spirit:name>
+          <spirit:displayName>Silicon revision ES</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="silicon_rev">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>fb_select_fnl</spirit:name>
+          <spirit:displayName>fb_select_fnl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="fb_select_fnl">direct_fb</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>primary_pll_buffer</spirit:name>
+          <spirit:displayName>Primary PLL clock output buffer</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="primary_pll_buffer">GX clock output buffer</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_8G_buffer_fnl</spirit:name>
+          <spirit:displayName>enable_8G_buffer_fnl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="enable_8G_buffer_fnl">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_16G_buffer_fnl</spirit:name>
+          <spirit:displayName>enable_16G_buffer_fnl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="enable_16G_buffer_fnl">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_8G_path</spirit:name>
+          <spirit:displayName>Enable PLL GX clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_8G_path">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_16G_path</spirit:name>
+          <spirit:displayName>Enable PLL GT clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_16G_path">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_pcie_clk</spirit:name>
+          <spirit:displayName>Enable PCIe clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_pcie_clk">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_cascade_out</spirit:name>
+          <spirit:displayName>Enable cascade clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_cascade_out">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_atx_to_fpll_cascade_out</spirit:name>
+          <spirit:displayName>Enable ATX to FPLL cascade clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_atx_to_fpll_cascade_out">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_hip_cal_done_port</spirit:name>
+          <spirit:displayName>Enable calibration status ports for HIP</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_hip_cal_done_port">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_hip_cal_en</spirit:name>
+          <spirit:displayName>Enable PCIe hard IP calibration</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_hip_cal_en">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hip_cal_en</spirit:name>
+          <spirit:displayName>hip_cal_en</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hip_cal_en">disable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>dsm_mode</spirit:name>
+          <spirit:displayName>dsm_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="dsm_mode">dsm_mode_integer</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_output_clock_frequency</spirit:name>
+          <spirit:displayName>PLL output frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="set_output_clock_frequency">5156.25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>output_clock_datarate</spirit:name>
+          <spirit:displayName>PLL output datarate</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="output_clock_datarate">10312.5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>output_clock_frequency</spirit:name>
+          <spirit:displayName>PLL output frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="output_clock_frequency">5156.25 MHz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>vco_freq</spirit:name>
+          <spirit:displayName>vco_freq</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="vco_freq">10312.5 MHz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>datarate</spirit:name>
+          <spirit:displayName>datarate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="datarate">10312.5 Mbps</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_fractional</spirit:name>
+          <spirit:displayName>enable_fractional</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_fractional">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_auto_reference_clock_frequency</spirit:name>
+          <spirit:displayName>PLL integer reference clock frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="set_auto_reference_clock_frequency">644.53125</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_manual_reference_clock_frequency</spirit:name>
+          <spirit:displayName>PLL fractional reference clock frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="set_manual_reference_clock_frequency">200.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>reference_clock_frequency_fnl</spirit:name>
+          <spirit:displayName>reference_clock_frequency_fnl</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="reference_clock_frequency_fnl">644.531250 MHz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_fref_clock_frequency</spirit:name>
+          <spirit:displayName>PLL fractional reference clock frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="set_fref_clock_frequency">156.25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>feedback_clock_frequency_fnl</spirit:name>
+          <spirit:displayName>External feedback frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="feedback_clock_frequency_fnl">156.25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>select_manual_config</spirit:name>
+          <spirit:displayName>Configure counters manually</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="select_manual_config">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>m_counter</spirit:name>
+          <spirit:displayName>Multiply factor (M-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="m_counter">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>effective_m_counter</spirit:name>
+          <spirit:displayName>Effective M-Counter</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="effective_m_counter">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_m_counter</spirit:name>
+          <spirit:displayName>Multiply factor (M-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_m_counter">24</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ref_clk_div</spirit:name>
+          <spirit:displayName>Divide factor (N-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ref_clk_div">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_ref_clk_div</spirit:name>
+          <spirit:displayName>Divide factor (N-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_ref_clk_div">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>l_counter</spirit:name>
+          <spirit:displayName>Divide factor (L-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="l_counter">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_l_counter</spirit:name>
+          <spirit:displayName>Divide factor (L-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_l_counter">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>l_cascade_counter</spirit:name>
+          <spirit:displayName>Divide factor (L-Cascade-Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="l_cascade_counter">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_l_cascade_counter</spirit:name>
+          <spirit:displayName>Divide factor (L-Cascade Counter)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_l_cascade_counter">15</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>l_cascade_predivider</spirit:name>
+          <spirit:displayName>Divide factor (L-Cascade-Predivider)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="l_cascade_predivider">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_l_cascade_predivider</spirit:name>
+          <spirit:displayName>predivide factor (L-Cascade Predivider)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_l_cascade_predivider">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>k_counter</spirit:name>
+          <spirit:displayName>Fractional multiply factor (K)</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="k_counter">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_k_counter</spirit:name>
+          <spirit:displayName>Fractional multiply factor (K)</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="set_k_counter">2000000000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>auto_list</spirit:name>
+          <spirit:displayName>auto_list</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="auto_list">62.123494 {m 83 effective_m 83 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 62.881098 {m 82 effective_m 82 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 63.657407 {m 81 effective_m 81 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 64.453125 {m 80 effective_m 80 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 65.268987 {m 79 effective_m 79 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 66.105769 {m 78 effective_m 78 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 66.964286 {m 77 effective_m 77 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 67.845395 {m 76 effective_m 76 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 68.750000 {m 75 effective_m 75 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 69.679054 {m 74 effective_m 74 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 70.633562 {m 73 effective_m 73 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 71.614583 {m 72 effective_m 72 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 72.623239 {m 71 effective_m 71 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 73.660714 {m 70 effective_m 70 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 74.728261 {m 69 effective_m 69 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 75.827206 {m 68 effective_m 68 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 76.958955 {m 67 effective_m 67 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 78.125000 {m 66 effective_m 66 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 79.326923 {m 65 effective_m 65 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 80.566406 {m 64 effective_m 64 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 81.845238 {m 63 effective_m 63 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 83.165323 {m 62 effective_m 62 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 84.528689 {m 61 effective_m 61 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 85.937500 {m 60 effective_m 60 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 87.394068 {m 59 effective_m 59 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 88.900862 {m 58 effective_m 58 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 90.460526 {m 57 effective_m 57 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 92.075893 {m 56 effective_m 56 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 93.750000 {m 55 effective_m 55 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 95.486111 {m 54 effective_m 54 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 97.287736 {m 53 effective_m 53 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 99.158654 {m 52 effective_m 52 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 101.102941 {m 51 effective_m 51 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 103.125000 {m 50 effective_m 50 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 105.229592 {m 49 effective_m 49 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 107.421875 {m 48 effective_m 48 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 109.707447 {m 47 effective_m 47 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 112.092391 {m 46 effective_m 46 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 114.583333 {m 45 effective_m 45 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 117.187500 {m 44 effective_m 44 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 119.912791 {m 43 effective_m 43 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 122.767857 {m 42 effective_m 42 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 124.246988 {m 83 effective_m 83 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 125.762195 {m 41 effective_m 41 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 127.314815 {m 81 effective_m 81 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 128.906250 {m 40 effective_m 40 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 130.537975 {m 79 effective_m 79 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 132.211538 {m 39 effective_m 39 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 133.928571 {m 77 effective_m 77 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 135.690789 {m 38 effective_m 38 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 137.500000 {m 75 effective_m 75 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 139.358108 {m 37 effective_m 37 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 141.267123 {m 73 effective_m 73 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 143.229167 {m 36 effective_m 36 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 145.246479 {m 71 effective_m 71 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 147.321429 {m 35 effective_m 35 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 149.456522 {m 69 effective_m 69 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 151.654412 {m 34 effective_m 34 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 153.917910 {m 67 effective_m 67 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 156.250000 {m 33 effective_m 33 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 158.653846 {m 65 effective_m 65 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 161.132812 {m 32 effective_m 32 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 163.690476 {m 63 effective_m 63 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 166.330645 {m 31 effective_m 31 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 169.057377 {m 61 effective_m 61 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 171.875000 {m 30 effective_m 30 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 174.788136 {m 59 effective_m 59 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 177.801724 {m 29 effective_m 29 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 180.921053 {m 57 effective_m 57 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 184.151786 {m 28 effective_m 28 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 187.500000 {m 55 effective_m 55 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 190.972222 {m 27 effective_m 27 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 194.575472 {m 53 effective_m 53 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 198.317308 {m 26 effective_m 26 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 202.205882 {m 51 effective_m 51 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 206.250000 {m 25 effective_m 25 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 210.459184 {m 49 effective_m 49 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 214.843750 {m 24 effective_m 24 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 219.414894 {m 47 effective_m 47 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 224.184783 {m 23 effective_m 23 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 229.166667 {m 45 effective_m 45 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 234.375000 {m 22 effective_m 22 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 239.825581 {m 43 effective_m 43 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 245.535714 {m 21 effective_m 21 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 248.493976 {m 83 effective_m 83 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 251.524390 {m 41 effective_m 41 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 254.629630 {m 81 effective_m 81 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 257.812500 {m 20 effective_m 20 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 261.075949 {m 79 effective_m 79 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 264.423077 {m 39 effective_m 39 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 267.857143 {m 77 effective_m 77 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 271.381579 {m 19 effective_m 19 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 275.000000 {m 75 effective_m 75 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 278.716216 {m 37 effective_m 37 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 282.534247 {m 73 effective_m 73 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 286.458333 {m 18 effective_m 18 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 290.492958 {m 71 effective_m 71 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 294.642857 {m 35 effective_m 35 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 298.913043 {m 69 effective_m 69 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 303.308824 {m 17 effective_m 17 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 307.835821 {m 67 effective_m 67 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 312.500000 {m 33 effective_m 33 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 317.307692 {m 65 effective_m 65 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 322.265625 {m 16 effective_m 16 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 327.380952 {m 63 effective_m 63 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 332.661290 {m 31 effective_m 31 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 338.114754 {m 61 effective_m 61 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 343.750000 {m 15 effective_m 15 n 1 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 349.576271 {m 59 effective_m 59 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 355.603448 {m 29 effective_m 29 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 361.842105 {m 57 effective_m 57 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 368.303571 {m 28 effective_m 28 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 375.000000 {m 55 effective_m 55 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 381.944444 {m 27 effective_m 27 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 389.150943 {m 53 effective_m 53 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 396.634615 {m 26 effective_m 26 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 404.411765 {m 51 effective_m 51 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 412.500000 {m 25 effective_m 25 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 420.918367 {m 49 effective_m 49 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 429.687500 {m 24 effective_m 24 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 438.829787 {m 47 effective_m 47 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 448.369565 {m 23 effective_m 23 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 458.333333 {m 45 effective_m 45 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 468.750000 {m 22 effective_m 22 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 479.651163 {m 43 effective_m 43 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 491.071429 {m 21 effective_m 21 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 496.987952 {m 83 effective_m 83 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 503.048780 {m 41 effective_m 41 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 509.259259 {m 81 effective_m 81 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 515.625000 {m 20 effective_m 20 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 522.151899 {m 79 effective_m 79 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 528.846154 {m 39 effective_m 39 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 535.714286 {m 77 effective_m 77 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 542.763158 {m 19 effective_m 19 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 550.000000 {m 75 effective_m 75 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 557.432432 {m 37 effective_m 37 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 565.068493 {m 73 effective_m 73 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 572.916667 {m 18 effective_m 18 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 580.985915 {m 71 effective_m 71 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 589.285714 {m 35 effective_m 35 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 597.826087 {m 69 effective_m 69 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 606.617647 {m 17 effective_m 17 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 615.671642 {m 67 effective_m 67 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 625.000000 {m 33 effective_m 33 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 634.615385 {m 65 effective_m 65 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 644.531250 {m 16 effective_m 16 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 654.761905 {m 63 effective_m 63 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 665.322581 {m 31 effective_m 31 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 676.229508 {m 61 effective_m 61 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 687.500000 {m 15 effective_m 15 n 2 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 699.152542 {m 59 effective_m 59 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 711.206897 {m 29 effective_m 29 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 723.684211 {m 57 effective_m 57 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 736.607143 {m 28 effective_m 28 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 750.000000 {m 55 effective_m 55 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 763.888889 {m 27 effective_m 27 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 778.301887 {m 53 effective_m 53 n 8 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0} 793.269231 {m 26 effective_m 26 n 4 l 2 l_cascade 1 l_cascade_predivider 1 k 1 tank_sel lctank2 tank_band lc_band0}</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>manual_list</spirit:name>
+          <spirit:displayName>manual_list</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="manual_list"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>pll_setting</spirit:name>
+          <spirit:displayName>pll_setting</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="pll_setting">refclk {644.531250 MHz} m_cnt 16 n_cnt 2 l_cnt 2 k_cnt 1 l_cascade 1 l_cascade_predivider 1 outclk {5156.25 MHz}</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_fb_comp_bonding_fnl</spirit:name>
+          <spirit:displayName>enable_fb_comp_bonding_fnl</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_fb_comp_bonding_fnl">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>check_output_ports_pll</spirit:name>
+          <spirit:displayName>check_output_ports_pll</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="check_output_ports_pll">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>iqclk_mux_sel</spirit:name>
+          <spirit:displayName>iqclk_mux_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="iqclk_mux_sel">iqtxrxclk0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>set_altera_xcvr_atx_pll_a10_calibration_en</spirit:name>
+          <spirit:displayName>Enable calibration</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="set_altera_xcvr_atx_pll_a10_calibration_en">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>calibration_en</spirit:name>
+          <spirit:displayName>calibration_en</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="calibration_en">enable</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_analog_resets</spirit:name>
+          <spirit:displayName>Enable pll_powerdown and mcgb_rst connections</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_analog_resets">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_ext_lockdetect_ports</spirit:name>
+          <spirit:displayName>Enable clklow and fref ports</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_ext_lockdetect_ports">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>is_c10</spirit:name>
+          <spirit:displayName>is_c10</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="is_c10">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>atx_pll_bonding_mode</spirit:name>
+          <spirit:displayName>atx_pll_bonding_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="atx_pll_bonding_mode">cpri_bonding</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lc_refclk_select</spirit:name>
+          <spirit:displayName>lc_refclk_select</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="lc_refclk_select">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_mcgb</spirit:name>
+          <spirit:displayName>Include Master Clock Generation Block</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_mcgb">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_div</spirit:name>
+          <spirit:displayName>Clock division factor</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mcgb_div">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_div_fnl</spirit:name>
+          <spirit:displayName>mcgb_div_fnl</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mcgb_div_fnl">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_hfreq_clk</spirit:name>
+          <spirit:displayName>Enable x6/xN non-bonded high-speed clock output port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_hfreq_clk">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_mcgb_pcie_clksw</spirit:name>
+          <spirit:displayName>Enable PCIe clock switch interface</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_mcgb_pcie_clksw">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_aux_clkin_cnt</spirit:name>
+          <spirit:displayName>Number of auxiliary MCGB clock input ports.</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mcgb_aux_clkin_cnt">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_in_clk_freq</spirit:name>
+          <spirit:displayName>MCGB input clock frequency</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="mcgb_in_clk_freq">5156.25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_out_datarate</spirit:name>
+          <spirit:displayName>MCGB output data rate</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="mcgb_out_datarate">10312.5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_bonding_clks</spirit:name>
+          <spirit:displayName>Enable bonding clock output ports</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_bonding_clks">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_fb_comp_bonding</spirit:name>
+          <spirit:displayName>Enable feedback compensation bonding</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_fb_comp_bonding">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mcgb_enable_iqtxrxclk</spirit:name>
+          <spirit:displayName>mcgb_enable_iqtxrxclk</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="mcgb_enable_iqtxrxclk">disable_iqtxrxclk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>pma_width</spirit:name>
+          <spirit:displayName>PMA interface width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="pma_width">64</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_mcgb_debug_ports_parameters</spirit:name>
+          <spirit:displayName>enable_mcgb_debug_ports_parameters</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_mcgb_debug_ports_parameters">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>enable_pld_mcgb_cal_busy_port</spirit:name>
+          <spirit:displayName>enable_pld_mcgb_cal_busy_port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="enable_pld_mcgb_cal_busy_port">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>check_output_ports_mcgb</spirit:name>
+          <spirit:displayName>check_output_ports_mcgb</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="check_output_ports_mcgb">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>is_protocol_PCIe</spirit:name>
+          <spirit:displayName>is_protocol_PCIe</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="is_protocol_PCIe">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mapped_output_clock_frequency</spirit:name>
+          <spirit:displayName>mapped_output_clock_frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="mapped_output_clock_frequency">5156.25 MHz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mapped_primary_pll_buffer</spirit:name>
+          <spirit:displayName>mapped_primary_pll_buffer</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="mapped_primary_pll_buffer">GX clock output buffer</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>mapped_hip_cal_done_port</spirit:name>
+          <spirit:displayName>mapped_hip_cal_done_port</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="mapped_hip_cal_done_port">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_prot_mode</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_prot_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_prot_mode">basic_tx</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_silicon_rev</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_silicon_rev</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_silicon_rev">20nm5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_x1_div_m_sel</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_x1_div_m_sel</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_x1_div_m_sel">divbypass</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_cgb_enable_iqtxrxclk</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_cgb_enable_iqtxrxclk</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_cgb_enable_iqtxrxclk">disable_iqtxrxclk</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_ser_mode</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_ser_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_ser_mode">sixty_four_bit</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_datarate</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_datarate</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_datarate">10312500000 bps</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_cgb_power_down</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_cgb_power_down</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_cgb_power_down">normal_cgb</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_observe_cgb_clocks</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_observe_cgb_clocks</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_observe_cgb_clocks">observe_nothing</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_op_mode</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_op_mode</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_op_mode">enabled</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_tx_ucontrol_reset_pcie</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_tx_ucontrol_reset_pcie</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_tx_ucontrol_reset_pcie">pcscorehip_controls_mcgb</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_vccdreg_output</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_vccdreg_output</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_vccdreg_output">vccdreg_nominal</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_input_select</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_input_select</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_input_select">lcpll_top</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hssi_pma_cgb_master_input_select_gen3</spirit:name>
+          <spirit:displayName>hssi_pma_cgb_master_input_select_gen3</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="hssi_pma_cgb_master_input_select_gen3">unused</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>gui_parameter_list</spirit:name>
+          <spirit:displayName>Parameter Names</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="gui_parameter_list">K counter (valid in fractional mode),L counter (valid in non-cascade mode),M counter,N counter,L cascade predivider/VCO divider(valid in cascade mode) ,L cascade counter (valid in cascade mode),PLL output frequency,vco_freq,datarate</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>gui_parameter_values</spirit:name>
+          <spirit:displayName>Parameter Values</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="gui_parameter_values">1,2,16,2,select_vco_output,1,5156.25 MHz,10312.5 MHz,10312.5 Mbps</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115N3F40E2SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+   element xcvr_atx_pll_a10_0
+   {
+      datum _sortIndex
+      {
+         value = "0";
+         type = "int";
+      }
+   }
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos/>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="pll_cal_busy" altera:internal="xcvr_atx_pll_a10_0.pll_cal_busy" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="pll_cal_busy" altera:internal="pll_cal_busy"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="pll_locked" altera:internal="xcvr_atx_pll_a10_0.pll_locked" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="pll_locked" altera:internal="pll_locked"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="pll_powerdown" altera:internal="xcvr_atx_pll_a10_0.pll_powerdown" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="pll_powerdown" altera:internal="pll_powerdown"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="pll_refclk0" altera:internal="xcvr_atx_pll_a10_0.pll_refclk0" altera:type="clock" altera:dir="end">
+        <altera:port_mapping altera:name="pll_refclk0" altera:internal="pll_refclk0"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_serial_clk" altera:internal="xcvr_atx_pll_a10_0.tx_serial_clk" altera:type="hssi_serial_clock" altera:dir="start">
+        <altera:port_mapping altera:name="tx_serial_clk" altera:internal="tx_serial_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_mac.ip b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_mac.ip
new file mode 100644
index 0000000000000000000000000000000000000000..119773639bb528e90897c094931984affc6b255b
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/arria10_40g_mac.ip
@@ -0,0 +1,3604 @@
+<?xml version="1.0" ?>
+<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
+  <spirit:vendor>Intel Corporation</spirit:vendor>
+  <spirit:library>arria10_40g_mac</spirit:library>
+  <spirit:name>alt_eth_ultra_40_0</spirit:name>
+  <spirit:version>17.1</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>avalon_st_rx</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_error</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_error</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_status</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_status</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_startofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_startofpacket</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_endofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_endofpacket</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_empty</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_empty</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_fcs_error</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_fcs_error</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_rx_fcs_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_rx_fcs_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>avalon_st_tx</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_startofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_startofpacket</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_endofpacket</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_endofpacket</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_empty</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_empty</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_data</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_data</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>l4_tx_error</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>l4_tx_error</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_ref</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk_ref</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_ref</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_rxmac</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk_rxmac</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_rxmac</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_status</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk_status</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_status</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>clk_txmac</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>clk_txmac</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>clk_txmac</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_address</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_address</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_address</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_read</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_readdata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_reset</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_reset</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_reset</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_waitrequest</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_write</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reconfig_writedata</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reconfig_writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reconfig_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset_async</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_async</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_async</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>reset_status</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>reset_status</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>reset_status</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_pcs_ready</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_pcs_ready</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_pcs_ready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_serial</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_serial</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_serial</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>rx_stats</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_octetsOK</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_octetsOK</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_octetsOK_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_octetsOK_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_runt</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_runt</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_64</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_64</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_127</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_127</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_255</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_255</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_511</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_511</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_1023</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_1023</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_1518</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_1518</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_max</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_max</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_over</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_over</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_mcast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_mcast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_mcast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_mcast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_bcast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_bcast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_bcast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_bcast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_ucast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_ucast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_ucast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_ucast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_mcast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_mcast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_bcast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_bcast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_ucast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_ucast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_pause</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_pause</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_fcs_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_fcs_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_fragment</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_fragment</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_jabber</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_jabber</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_sizeok_fcserr</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_sizeok_fcserr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_pause_ctrl_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_pause_ctrl_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_mcast_ctrl_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_mcast_ctrl_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_bcast_ctrl_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_bcast_ctrl_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>rx_inc_ucast_ctrl_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>rx_inc_ucast_ctrl_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>status_avmm</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_write</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_write</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_read</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_read</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_addr</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_addr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_writedata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_writedata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_readdata</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_readdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_readdata_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_readdata_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_waitrequest</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_waitrequest</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>status_read_timeout</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>status_read_timeout</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_lanes_stable</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_lanes_stable</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_lanes_stable</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_pll_locked</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_pll_locked</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_pll_locked</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_serial</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_serial</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_serial</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_serial_clk</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_serial_clk</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_serial_clk</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+    <spirit:busInterface>
+      <spirit:name>tx_stats</spirit:name>
+      <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="17.1"></spirit:busType>
+      <spirit:slave></spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_octetsOK</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_octetsOK</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_octetsOK_valid</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_octetsOK_valid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_64</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_64</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_127</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_127</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_255</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_255</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_511</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_511</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_1023</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_1023</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_1518</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_1518</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_max</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_max</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_over</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_over</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_mcast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_mcast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_mcast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_mcast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_bcast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_bcast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_bcast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_bcast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_ucast_data_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_ucast_data_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_ucast_data_ok</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_ucast_data_ok</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_mcast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_mcast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_bcast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_bcast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_ucast_ctrl</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_ucast_ctrl</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_pause</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_pause</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_fcs_err</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_fcs_err</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_fragment</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_fragment</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_jabber</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_jabber</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>tx_inc_sizeok_fcserr</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>tx_inc_sizeok_fcserr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>associatedClock</spirit:name>
+          <spirit:displayName>associatedClock</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>associatedReset</spirit:name>
+          <spirit:displayName>associatedReset</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>prSafe</spirit:name>
+          <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+      <spirit:vendorExtensions>
+        <altera:altera_assignments>
+          <spirit:parameters>
+            <spirit:parameter>
+              <spirit:name>ui.blockdiagram.direction</spirit:name>
+              <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
+            </spirit:parameter>
+          </spirit:parameters>
+        </altera:altera_assignments>
+      </spirit:vendorExtensions>
+    </spirit:busInterface>
+  </spirit:busInterfaces>
+  <spirit:model>
+    <spirit:views>
+      <spirit:view>
+        <spirit:name>QUARTUS_SYNTH</spirit:name>
+        <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
+        <spirit:modelName>alt_eth_ultra_40</spirit:modelName>
+        <spirit:fileSetRef>
+          <spirit:localName>QUARTUS_SYNTH</spirit:localName>
+        </spirit:fileSetRef>
+      </spirit:view>
+    </spirit:views>
+    <spirit:ports>
+      <spirit:port>
+        <spirit:name>clk_ref</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_async</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_serial</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_serial</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_status</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reset_status</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_addr</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>15</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_readdata_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>status_read_timeout</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_txmac</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_lanes_stable</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_pcs_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>clk_rxmac</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_octetsOK</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>15</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_octetsOK_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_runt</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_64</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_127</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_255</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_511</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_1023</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_1518</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_max</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_over</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_mcast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_mcast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_bcast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_bcast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_ucast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_ucast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_mcast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_bcast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_ucast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_pause</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_fcs_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_fragment</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_jabber</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_sizeok_fcserr</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_pause_ctrl_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_mcast_ctrl_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_bcast_ctrl_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>rx_inc_ucast_ctrl_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_octetsOK</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>15</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_octetsOK_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_64</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_127</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_255</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_511</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_1023</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_1518</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_max</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_over</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_mcast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_mcast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_bcast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_bcast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_ucast_data_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_ucast_data_ok</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_mcast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_bcast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_ucast_ctrl</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_pause</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_fcs_err</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_fragment</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_jabber</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_inc_sizeok_fcserr</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_reset</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_write</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_read</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_address</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>11</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_writedata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_readdata</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>31</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>reconfig_waitrequest</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_serial_clk</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>3</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>tx_pll_locked</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_startofpacket</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_endofpacket</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_ready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_empty</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>4</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>255</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_tx_error</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_error</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>5</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_status</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>2</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_startofpacket</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_endofpacket</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_data</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>255</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_empty</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left>0</spirit:left>
+            <spirit:right>4</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_fcs_error</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>l4_rx_fcs_valid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>STD_LOGIC</spirit:typeName>
+              <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:vendorExtensions>
+    <altera:entity_info>
+      <spirit:vendor>Intel Corporation</spirit:vendor>
+      <spirit:library>arria10_40g_mac</spirit:library>
+      <spirit:name>alt_eth_ultra_40</spirit:name>
+      <spirit:version>17.1</spirit:version>
+    </altera:entity_info>
+    <altera:altera_module_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>DEVICE_FAMILY</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="DEVICE_FAMILY">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>part_trait_bd</spirit:name>
+          <spirit:displayName>part_trait_bd</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="part_trait_bd">NIGHTFURY5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>DEVICE</spirit:name>
+          <spirit:displayName>DEVICE</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="DEVICE">10AX115N3F40E2SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SHOW_DEBUG_TAB</spirit:name>
+          <spirit:displayName>SHOW_DEBUG_TAB</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="SHOW_DEBUG_TAB">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENABLE_ALL_ED</spirit:name>
+          <spirit:displayName>ENABLE_ALL_ED</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="ENABLE_ALL_ED">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>OVERRIDE_PART_NUM</spirit:name>
+          <spirit:displayName>Override example design part number</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="OVERRIDE_PART_NUM">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ES_DEVICE</spirit:name>
+          <spirit:displayName>ES_DEVICE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ES_DEVICE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PR_MODE</spirit:name>
+          <spirit:displayName>PR_MODE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PR_MODE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SPEED_CONFIG</spirit:name>
+          <spirit:displayName>Protocol speed</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="SPEED_CONFIG">40 GbE</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_AVALON</spirit:name>
+          <spirit:displayName>Data interface</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_AVALON">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_CAUI4</spirit:name>
+          <spirit:displayName>Enable CAUI4 PCS</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_CAUI4">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_CAUI4_DISABLED</spirit:name>
+          <spirit:displayName>Enable CAUI4 PCS</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_CAUI4_DISABLED">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_C4_RSFEC</spirit:name>
+          <spirit:displayName>Enable RS-FEC for CAUI4</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_C4_RSFEC">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_SYNC_E</spirit:name>
+          <spirit:displayName>Enable SyncE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_SYNC_E">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PHY_PLL</spirit:name>
+          <spirit:displayName>PHY PLL type</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="PHY_PLL">ATX</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PHY_REFCLK</spirit:name>
+          <spirit:displayName>PHY reference frequency</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PHY_REFCLK">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>REF_CLK_FREQ_10G</spirit:name>
+          <spirit:displayName>PHY reference frequency</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="REF_CLK_FREQ_10G">644.53125 MHz</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ADME_ENABLE</spirit:name>
+          <spirit:displayName>Enable Altera Debug Master Endpoint (ADME)</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ADME_ENABLE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ODI_UNHIDE</spirit:name>
+          <spirit:displayName>ODI_UNHIDE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ODI_UNHIDE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ODI_ENABLE</spirit:name>
+          <spirit:displayName>Enable ODI(On Die Instrumentation) acceleration logic</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ODI_ENABLE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ODI_ENABLE_effective</spirit:name>
+          <spirit:displayName>ODI_ENABLE_effective</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ODI_ENABLE_effective">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>EXT_TX_PLL</spirit:name>
+          <spirit:displayName>Use external TX MAC PLL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="EXT_TX_PLL">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_PAUSE_TYPE</spirit:name>
+          <spirit:displayName>Flow control mode</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_PAUSE_TYPE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>DISP_FCBITS</spirit:name>
+          <spirit:displayName>Number of PFC queues</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="DISP_FCBITS">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_AVG_IPG</spirit:name>
+          <spirit:displayName>Average interpacket gap</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_AVG_IPG">12</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_PTP</spirit:name>
+          <spirit:displayName>Enable 1588 PTP</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_PTP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_96B_PTP</spirit:name>
+          <spirit:displayName>Enable 96b Time of Day Format</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_96B_PTP">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_64B_PTP</spirit:name>
+          <spirit:displayName>Enable 64b Time of Day Format</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_64B_PTP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PTP_FP_WIDTH</spirit:name>
+          <spirit:displayName>Timestamp fingerprint width:</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PTP_FP_WIDTH">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENA_CUSTOM_PTP</spirit:name>
+          <spirit:displayName>Enable 1588 PTP custom interface</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENA_CUSTOM_PTP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_LINK_FAULT</spirit:name>
+          <spirit:displayName>Enable link fault generation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_LINK_FAULT">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_TXCRC_INS</spirit:name>
+          <spirit:displayName>Enable TX CRC insertion</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_TXCRC_INS">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_MAC_DIC</spirit:name>
+          <spirit:displayName>Enable deficit idle counter</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_MAC_DIC">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_PREAMBLE_PASS</spirit:name>
+          <spirit:displayName>Enable preamble passthrough</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_PREAMBLE_PASS">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_ALIGN_FCSEOP</spirit:name>
+          <spirit:displayName>Enable alignment EOP on FCS word</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_ALIGN_FCSEOP">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_MAC_TXSTATS</spirit:name>
+          <spirit:displayName>Enable TX statistics</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_MAC_TXSTATS">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_MAC_RXSTATS</spirit:name>
+          <spirit:displayName>Enable RX statistics</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_MAC_RXSTATS">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNOPT_STRICT_SOP</spirit:name>
+          <spirit:displayName>Enable Strict SFD check</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNOPT_STRICT_SOP">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>FCBITS</spirit:name>
+          <spirit:displayName>FCBITS</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="FCBITS">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>FASTSIM</spirit:name>
+          <spirit:displayName>FASTSIM</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="FASTSIM">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>TIMING_MODE</spirit:name>
+          <spirit:displayName>TIMING_MODE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="TIMING_MODE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>RST_CNTR</spirit:name>
+          <spirit:displayName>RST_CNTR</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="RST_CNTR">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AM_CNT_BITS</spirit:name>
+          <spirit:displayName>AM_CNT_BITS</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AM_CNT_BITS">14</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SIM_FAKE_JTAG</spirit:name>
+          <spirit:displayName>SIM_FAKE_JTAG</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SIM_FAKE_JTAG">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>CREATE_TX_SKEW</spirit:name>
+          <spirit:displayName>CREATE_TX_SKEW</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="CREATE_TX_SKEW">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>TARGET_CHIP</spirit:name>
+          <spirit:displayName>TARGET_CHIP</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="TARGET_CHIP">5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>IS_100G</spirit:name>
+          <spirit:displayName>IS_100G</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="IS_100G">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>NOT_CAUI4</spirit:name>
+          <spirit:displayName>NOT_CAUI4</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="NOT_CAUI4">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>COMPATIBLE_PORTS</spirit:name>
+          <spirit:displayName>COMPATIBLE_PORTS</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="COMPATIBLE_PORTS">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENA_KR4_gui</spirit:name>
+          <spirit:displayName>Enable KR4</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENA_KR4_gui">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENA_KR4_OFF</spirit:name>
+          <spirit:displayName>Enable KR4</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENA_KR4_OFF">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENA_KR4</spirit:name>
+          <spirit:displayName>ENA_KR4</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENA_KR4">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>UNHIDE_ADV</spirit:name>
+          <spirit:displayName>UNHIDE_ADV</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="UNHIDE_ADV">false</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_SEQ</spirit:name>
+          <spirit:displayName>Enable KR4 Reconfiguration</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_SEQ">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>STATUS_CLK_MHZ</spirit:name>
+          <spirit:displayName>Status clock rate</spirit:displayName>
+          <spirit:value spirit:format="float" spirit:id="STATUS_CLK_MHZ">100.0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>STATUS_CLK_KHZ</spirit:name>
+          <spirit:displayName>STATUS_CLK_KHZ</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="STATUS_CLK_KHZ">100000</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_FEC</spirit:name>
+          <spirit:displayName>Include FEC sublayer</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_FEC">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_AN_gui</spirit:name>
+          <spirit:displayName>Enable Auto-Negotiation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_AN_gui">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_AN</spirit:name>
+          <spirit:displayName>Enable Auto-Negotiation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_AN">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_LT_gui</spirit:name>
+          <spirit:displayName>Enable Link Training</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_LT_gui">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>SYNTH_LT</spirit:name>
+          <spirit:displayName>Enable Link Training</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="SYNTH_LT">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>LINK_TIMER_KR</spirit:name>
+          <spirit:displayName>Link fail inhibit time for 40Gb Ethernet</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="LINK_TIMER_KR">504</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>BERWIDTH_gui</spirit:name>
+          <spirit:displayName>Maximum bit error count</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="BERWIDTH_gui">511</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>BERWIDTH</spirit:name>
+          <spirit:displayName>Bit error counter width</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="BERWIDTH">9</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>TRNWTWIDTH_gui</spirit:name>
+          <spirit:displayName>Number of frames to send before sending actual data</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="TRNWTWIDTH_gui">127</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>TRNWTWIDTH</spirit:name>
+          <spirit:displayName>TRNWTWIDTH</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="TRNWTWIDTH">7</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>MAINTAPWIDTH</spirit:name>
+          <spirit:displayName>MAINTAPWIDTH</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="MAINTAPWIDTH">5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>POSTTAPWIDTH</spirit:name>
+          <spirit:displayName>POSTTAPWIDTH</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="POSTTAPWIDTH">6</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PRETAPWIDTH</spirit:name>
+          <spirit:displayName>PRETAPWIDTH</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PRETAPWIDTH">5</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>VMAXRULE</spirit:name>
+          <spirit:displayName>VMAXRULE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="VMAXRULE">30</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>VMINRULE</spirit:name>
+          <spirit:displayName>VMINRULE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="VMINRULE">6</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>VODMINRULE</spirit:name>
+          <spirit:displayName>VODMINRULE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="VODMINRULE">14</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>VPOSTRULE</spirit:name>
+          <spirit:displayName>VPOSTRULE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="VPOSTRULE">25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>VPRERULE</spirit:name>
+          <spirit:displayName>VPRERULE</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="VPRERULE">16</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PREMAINVAL</spirit:name>
+          <spirit:displayName>PREMAINVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PREMAINVAL">30</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PREPOSTVAL</spirit:name>
+          <spirit:displayName>PREPOSTVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PREPOSTVAL">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PREPREVAL</spirit:name>
+          <spirit:displayName>PREPREVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="PREPREVAL">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>INITMAINVAL</spirit:name>
+          <spirit:displayName>INITMAINVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="INITMAINVAL">25</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>INITPOSTVAL</spirit:name>
+          <spirit:displayName>INITPOSTVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="INITPOSTVAL">13</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>INITPREVAL</spirit:name>
+          <spirit:displayName>INITPREVAL</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="INITPREVAL">3</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>USE_DEBUG_CPU</spirit:name>
+          <spirit:displayName>Use debug CPU</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="USE_DEBUG_CPU">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_GIGE</spirit:name>
+          <spirit:displayName>1000 BASE-KX Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_GIGE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_XAUI</spirit:name>
+          <spirit:displayName>10GBASE-KX4 Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_XAUI">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_BASER</spirit:name>
+          <spirit:displayName>10GBASE-KR Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_BASER">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_40GBP</spirit:name>
+          <spirit:displayName>40GBASE-KR4 Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_40GBP">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_40GCR</spirit:name>
+          <spirit:displayName>Enable 40GBASE-CR4 Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_40GCR">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_100G</spirit:name>
+          <spirit:displayName>100GBASE-CR10 Technology Ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_100G">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_CHAN</spirit:name>
+          <spirit:displayName>Auto-Negotiation Master</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_CHAN">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_PAUSE</spirit:name>
+          <spirit:displayName>Pause ability</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_PAUSE">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_PAUSE_C0</spirit:name>
+          <spirit:displayName>Pause ability-C0</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_PAUSE_C0">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_PAUSE_C1</spirit:name>
+          <spirit:displayName>Pause ability-C1</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_PAUSE_C1">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_TECH</spirit:name>
+          <spirit:displayName>AN_TECH</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_TECH">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>AN_SELECTOR</spirit:name>
+          <spirit:displayName>Selector field</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="AN_SELECTOR">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>CAPABLE_FEC</spirit:name>
+          <spirit:displayName>Set FEC_Ability bit on power up or reset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="CAPABLE_FEC">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>ENABLE_FEC</spirit:name>
+          <spirit:displayName>Set FEC_Enable bit on power up or reset</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="ENABLE_FEC">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>EXAMPLE_DESIGN</spirit:name>
+          <spirit:displayName>Select design</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="EXAMPLE_DESIGN">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>GEN_SIMULATION</spirit:name>
+          <spirit:displayName>Simulation</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="GEN_SIMULATION">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>GEN_SYNTH</spirit:name>
+          <spirit:displayName>Synthesis</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="GEN_SYNTH">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>DEV_BOARD</spirit:name>
+          <spirit:displayName>Select board</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="DEV_BOARD">1</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>HDL_FORMAT</spirit:name>
+          <spirit:displayName>Generate File Format</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="HDL_FORMAT">0</spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_module_parameters>
+    <altera:altera_system_parameters>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>device</spirit:name>
+          <spirit:displayName>Device</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="device">10AX115N3F40E2SG</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceFamily</spirit:name>
+          <spirit:displayName>Device family</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>deviceSpeedGrade</spirit:name>
+          <spirit:displayName>Device Speed Grade</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">2</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>generationId</spirit:name>
+          <spirit:displayName>Generation Id</spirit:displayName>
+          <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>bonusData</spirit:name>
+          <spirit:displayName>bonusData</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="bonusData">bonusData 
+{
+   element alt_eth_ultra_40_0
+   {
+      datum _sortIndex
+      {
+         value = "0";
+         type = "int";
+      }
+   }
+}
+</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>hideFromIPCatalog</spirit:name>
+          <spirit:displayName>Hide from IP Catalog</spirit:displayName>
+          <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>lockedInterfaceDefinition</spirit:name>
+          <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"></spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>systemInfos</spirit:name>
+          <spirit:displayName>systemInfos</spirit:displayName>
+          <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
+    <connPtSystemInfos/>
+</systemInfosDefinition>]]></spirit:value>
+        </spirit:parameter>
+      </spirit:parameters>
+    </altera:altera_system_parameters>
+    <altera:altera_interface_boundary>
+      <altera:interface_mapping altera:name="avalon_st_rx" altera:internal="alt_eth_ultra_40_0.avalon_st_rx" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="l4_rx_data" altera:internal="l4_rx_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_empty" altera:internal="l4_rx_empty"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_endofpacket" altera:internal="l4_rx_endofpacket"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_error" altera:internal="l4_rx_error"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_fcs_error" altera:internal="l4_rx_fcs_error"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_fcs_valid" altera:internal="l4_rx_fcs_valid"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_startofpacket" altera:internal="l4_rx_startofpacket"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_status" altera:internal="l4_rx_status"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_rx_valid" altera:internal="l4_rx_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="avalon_st_tx" altera:internal="alt_eth_ultra_40_0.avalon_st_tx" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="l4_tx_data" altera:internal="l4_tx_data"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_empty" altera:internal="l4_tx_empty"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_endofpacket" altera:internal="l4_tx_endofpacket"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_error" altera:internal="l4_tx_error"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_ready" altera:internal="l4_tx_ready"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_startofpacket" altera:internal="l4_tx_startofpacket"></altera:port_mapping>
+        <altera:port_mapping altera:name="l4_tx_valid" altera:internal="l4_tx_valid"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_ref" altera:internal="alt_eth_ultra_40_0.clk_ref" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="clk_ref" altera:internal="clk_ref"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_rxmac" altera:internal="alt_eth_ultra_40_0.clk_rxmac" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="clk_rxmac" altera:internal="clk_rxmac"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_status" altera:internal="alt_eth_ultra_40_0.clk_status" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="clk_status" altera:internal="clk_status"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_txmac" altera:internal="alt_eth_ultra_40_0.clk_txmac" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="clk_txmac" altera:internal="clk_txmac"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="clk_txmac_in" altera:internal="alt_eth_ultra_40_0.clk_txmac_in"></altera:interface_mapping>
+      <altera:interface_mapping altera:name="custom_st_rx" altera:internal="alt_eth_ultra_40_0.custom_st_rx"></altera:interface_mapping>
+      <altera:interface_mapping altera:name="custom_st_tx" altera:internal="alt_eth_ultra_40_0.custom_st_tx"></altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_address" altera:internal="alt_eth_ultra_40_0.reconfig_address" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_address" altera:internal="reconfig_address"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_clk" altera:internal="alt_eth_ultra_40_0.reconfig_clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_clk" altera:internal="reconfig_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_read" altera:internal="alt_eth_ultra_40_0.reconfig_read" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_read" altera:internal="reconfig_read"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_readdata" altera:internal="alt_eth_ultra_40_0.reconfig_readdata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_readdata" altera:internal="reconfig_readdata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_reset" altera:internal="alt_eth_ultra_40_0.reconfig_reset" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_reset" altera:internal="reconfig_reset"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_waitrequest" altera:internal="alt_eth_ultra_40_0.reconfig_waitrequest" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_waitrequest" altera:internal="reconfig_waitrequest"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_write" altera:internal="alt_eth_ultra_40_0.reconfig_write" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_write" altera:internal="reconfig_write"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reconfig_writedata" altera:internal="alt_eth_ultra_40_0.reconfig_writedata" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reconfig_writedata" altera:internal="reconfig_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset_async" altera:internal="alt_eth_ultra_40_0.reset_async" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reset_async" altera:internal="reset_async"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="reset_status" altera:internal="alt_eth_ultra_40_0.reset_status" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="reset_status" altera:internal="reset_status"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_pcs_ready" altera:internal="alt_eth_ultra_40_0.rx_pcs_ready" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_pcs_ready" altera:internal="rx_pcs_ready"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_serial" altera:internal="alt_eth_ultra_40_0.rx_serial" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_serial" altera:internal="rx_serial"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="rx_stats" altera:internal="alt_eth_ultra_40_0.rx_stats" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="rx_inc_1023" altera:internal="rx_inc_1023"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_127" altera:internal="rx_inc_127"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_1518" altera:internal="rx_inc_1518"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_255" altera:internal="rx_inc_255"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_511" altera:internal="rx_inc_511"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_64" altera:internal="rx_inc_64"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_bcast_ctrl" altera:internal="rx_inc_bcast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_bcast_ctrl_err" altera:internal="rx_inc_bcast_ctrl_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_bcast_data_err" altera:internal="rx_inc_bcast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_bcast_data_ok" altera:internal="rx_inc_bcast_data_ok"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_fcs_err" altera:internal="rx_inc_fcs_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_fragment" altera:internal="rx_inc_fragment"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_jabber" altera:internal="rx_inc_jabber"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_max" altera:internal="rx_inc_max"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_mcast_ctrl" altera:internal="rx_inc_mcast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_mcast_ctrl_err" altera:internal="rx_inc_mcast_ctrl_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_mcast_data_err" altera:internal="rx_inc_mcast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_mcast_data_ok" altera:internal="rx_inc_mcast_data_ok"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_octetsOK" altera:internal="rx_inc_octetsOK"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_octetsOK_valid" altera:internal="rx_inc_octetsOK_valid"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_over" altera:internal="rx_inc_over"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_pause" altera:internal="rx_inc_pause"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_pause_ctrl_err" altera:internal="rx_inc_pause_ctrl_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_runt" altera:internal="rx_inc_runt"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_sizeok_fcserr" altera:internal="rx_inc_sizeok_fcserr"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_ucast_ctrl" altera:internal="rx_inc_ucast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_ucast_ctrl_err" altera:internal="rx_inc_ucast_ctrl_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_ucast_data_err" altera:internal="rx_inc_ucast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="rx_inc_ucast_data_ok" altera:internal="rx_inc_ucast_data_ok"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="status_avmm" altera:internal="alt_eth_ultra_40_0.status_avmm" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="status_addr" altera:internal="status_addr"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_read" altera:internal="status_read"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_read_timeout" altera:internal="status_read_timeout"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_readdata" altera:internal="status_readdata"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_readdata_valid" altera:internal="status_readdata_valid"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_waitrequest" altera:internal="status_waitrequest"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_write" altera:internal="status_write"></altera:port_mapping>
+        <altera:port_mapping altera:name="status_writedata" altera:internal="status_writedata"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_lanes_stable" altera:internal="alt_eth_ultra_40_0.tx_lanes_stable" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_lanes_stable" altera:internal="tx_lanes_stable"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_pll_locked" altera:internal="alt_eth_ultra_40_0.tx_pll_locked" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_pll_locked" altera:internal="tx_pll_locked"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_serial" altera:internal="alt_eth_ultra_40_0.tx_serial" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_serial" altera:internal="tx_serial"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_serial_clk" altera:internal="alt_eth_ultra_40_0.tx_serial_clk" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_serial_clk" altera:internal="tx_serial_clk"></altera:port_mapping>
+      </altera:interface_mapping>
+      <altera:interface_mapping altera:name="tx_stats" altera:internal="alt_eth_ultra_40_0.tx_stats" altera:type="conduit" altera:dir="end">
+        <altera:port_mapping altera:name="tx_inc_1023" altera:internal="tx_inc_1023"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_127" altera:internal="tx_inc_127"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_1518" altera:internal="tx_inc_1518"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_255" altera:internal="tx_inc_255"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_511" altera:internal="tx_inc_511"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_64" altera:internal="tx_inc_64"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_bcast_ctrl" altera:internal="tx_inc_bcast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_bcast_data_err" altera:internal="tx_inc_bcast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_bcast_data_ok" altera:internal="tx_inc_bcast_data_ok"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_fcs_err" altera:internal="tx_inc_fcs_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_fragment" altera:internal="tx_inc_fragment"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_jabber" altera:internal="tx_inc_jabber"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_max" altera:internal="tx_inc_max"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_mcast_ctrl" altera:internal="tx_inc_mcast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_mcast_data_err" altera:internal="tx_inc_mcast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_mcast_data_ok" altera:internal="tx_inc_mcast_data_ok"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_octetsOK" altera:internal="tx_inc_octetsOK"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_octetsOK_valid" altera:internal="tx_inc_octetsOK_valid"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_over" altera:internal="tx_inc_over"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_pause" altera:internal="tx_inc_pause"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_sizeok_fcserr" altera:internal="tx_inc_sizeok_fcserr"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_ucast_ctrl" altera:internal="tx_inc_ucast_ctrl"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_ucast_data_err" altera:internal="tx_inc_ucast_data_err"></altera:port_mapping>
+        <altera:port_mapping altera:name="tx_inc_ucast_data_ok" altera:internal="tx_inc_ucast_data_ok"></altera:port_mapping>
+      </altera:interface_mapping>
+    </altera:altera_interface_boundary>
+    <altera:altera_has_warnings>false</altera:altera_has_warnings>
+    <altera:altera_has_errors>false</altera:altera_has_errors>
+  </spirit:vendorExtensions>
+</spirit:component>
\ No newline at end of file
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..9745011213d9e1a0b9541f59cb895324454f3864
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
@@ -0,0 +1,34 @@
+post_message "Running ta2_unb2b_40GbE script"
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
+#============================================================
+# Files and basic settings
+#============================================================
+
+# Local HDL files
+set_global_assignment -name VHDL_FILE ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.vhd
+
+# IP files
+set_global_assignment -name IP_FILE ip/ta2_unb2b_40GbE/arria10_40g_mac.ip
+set_global_assignment -name IP_FILE ip/ta2_unb2b_40GbE/arria10_40g_atx_pll.ip
+
+# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_40GbE.qsf in RadioHDL build directory. 
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..83f88511933ac8ca1ce3f23600a6d8b1f5aba987
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.vhd
@@ -0,0 +1,616 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Daniel van der Schuur
+-- . Reinier van der Walle
+-- Purpose:
+-- . Provide 40G ethernet I/O interface (BSP) for OpenCL kernel on Arria10
+-- Description:
+-- . This core consists of:
+--   . An Intel/Altera 40G Low Latency MAC instance
+--   . SOP/EOP insertion (kernel channel only carries data and valid)
+--   . Dual clock FIFO 
+--     . Clock domain transition between kernel_clk and clk_txmac
+--     . Buffers full Ethernet packet (40G MAC requires uninterrupted packet)
+--   . Clock (PLL) / reset generation
+-- . Details:
+--   . This core was developed for use on the Uniboard2b.
+--   .
+--   . The data field of the ST-avalon interface is also used to provide
+--   . SOP, EOP and empty meta-data. The implementation of this is shown below.
+--   +-----------+---------+--------------------------------------------------------+
+--   | Bit range | Name    | Description                                            |
+--   +-----------+---------+--------------------------------------------------------+
+--   | [0:255]   | payload | Packet payload                                         |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 256       | sop     | Start of packet signal                                 |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 257       | eop     | End of packet signal                                   |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 258       | -       | reserved bit                                           |
+--   +-----------+---------+--------------------------------------------------------+
+--   | 259:263   | empty   | On EOP, this field indicates how many bytes are unused |
+--   +-----------+---------+--------------------------------------------------------+
+LIBRARY IEEE, common_lib, dp_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE common_lib.common_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL; 
+
+ENTITY ta2_unb2b_40GbE IS       
+  PORT (      
+    config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 40G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(263 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(263 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+END ta2_unb2b_40GbE;
+
+
+ARCHITECTURE str OF ta2_unb2b_40GbE IS
+
+  CONSTANT c_max_packet_size : NATURAL := 128; -- 128 * 256 bits words
+  CONSTANT c_tx_fifo_fill    : NATURAL := 282; -- Largest frame is 9000 bytes = 1125
+  CONSTANT c_tx_fifo_size    : NATURAL := 512; 
+  CONSTANT c_rx_fifo_size    : NATURAL := 64; -- should be large enough
+
+
+  CONSTANT c_data_w : NATURAL := 256;
+  ----------------------------------------------------------------------------
+  -- Reset signals
+  ----------------------------------------------------------------------------
+  SIGNAL rst_txmac  : STD_LOGIC;
+  SIGNAL rst_rxmac  : STD_LOGIC;
+
+  ----------------------------------------------------------------------------
+  -- dp_xonoff 
+  ----------------------------------------------------------------------------
+  SIGNAL dp_xonoff_src_out  : t_dp_sosi;
+  SIGNAL dp_xonoff_src_in   : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter tx a
+  ----------------------------------------------------------------------------
+  SIGNAL dp_latency_adapter_tx_a_src_out : t_dp_sosi;
+  SIGNAL dp_latency_adapter_tx_a_src_in  : t_dp_siso;
+  SIGNAL dp_latency_adapter_tx_a_snk_in  : t_dp_sosi;
+  SIGNAL dp_latency_adapter_tx_a_snk_out : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter tx b
+  ----------------------------------------------------------------------------
+  SIGNAL dp_latency_adapter_tx_b_src_out : t_dp_sosi;
+  SIGNAL dp_latency_adapter_tx_b_src_in  : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter rx
+  ----------------------------------------------------------------------------
+  SIGNAL dp_latency_adapter_rx_src_out : t_dp_sosi;
+  SIGNAL dp_latency_adapter_rx_src_in  : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- TX FIFO
+  ----------------------------------------------------------------------------
+  SIGNAL dp_fifo_fill_eop_src_out : t_dp_sosi;
+  SIGNAL dp_fifo_fill_eop_src_in  : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- 40G MAC IP
+  ----------------------------------------------------------------------------
+  SIGNAL serial_clk : STD_LOGIC;
+  SIGNAL serial_clk_arr : STD_LOGIC_VECTOR(3 DOWNTO 0);
+
+  SIGNAL pll_locked : STD_LOGIC;
+
+  SIGNAL tx_lanes_stable : STD_LOGIC;
+  SIGNAL rx_pcs_ready : STD_LOGIC;
+
+  SIGNAL clk_txmac : STD_LOGIC;    -- MAC + PCS clock - at least 312.5Mhz
+  SIGNAL clk_rxmac : STD_LOGIC;    -- MAC + PCS clock - at least 312.5Mhz
+
+  SIGNAL l4_tx_data : STD_LOGIC_VECTOR(255 DOWNTO 0);
+  SIGNAL l4_tx_empty : STD_LOGIC_VECTOR(4 DOWNTO 0);
+  SIGNAL l4_tx_endofpacket : STD_LOGIC;
+  SIGNAL l4_tx_ready : STD_LOGIC;
+  SIGNAL l4_tx_startofpacket : STD_LOGIC;
+  SIGNAL l4_tx_valid : STD_LOGIC;
+  SIGNAL l4_rx_data : STD_LOGIC_VECTOR(255 DOWNTO 0);
+  SIGNAL l4_rx_empty : STD_LOGIC_VECTOR(4 DOWNTO 0);
+  SIGNAL l4_rx_endofpacket : STD_LOGIC;
+  SIGNAL l4_rx_startofpacket : STD_LOGIC;
+  SIGNAL l4_rx_valid : STD_LOGIC;
+
+  ----------------------------------------------------------------------------
+  -- RX FIFO
+  ----------------------------------------------------------------------------
+  SIGNAL dp_fifo_dc_snk_in  : t_dp_sosi;
+
+  SIGNAL dp_fifo_dc_src_out : t_dp_sosi;
+  SIGNAL dp_fifo_dc_src_in  : t_dp_siso;
+
+  ----------------------------------------------------------------------------
+  -- ATX PLL Component
+  ----------------------------------------------------------------------------
+  COMPONENT arria10_40g_atx_pll IS
+  PORT (
+    pll_cal_busy  : OUT STD_LOGIC;        -- pll_cal_busy
+    pll_locked    : OUT STD_LOGIC;        -- pll_locked
+    pll_powerdown : IN  STD_LOGIC := 'X'; -- pll_powerdown
+    pll_refclk0   : IN  STD_LOGIC := 'X'; -- clk
+    tx_serial_clk : OUT STD_LOGIC         -- clk
+  );
+  END COMPONENT arria10_40g_atx_pll;
+
+  ----------------------------------------------------------------------------
+  -- 40G ETH IP Component
+  ----------------------------------------------------------------------------
+  COMPONENT arria10_40g_mac IS
+  PORT (
+    l4_rx_error           : OUT STD_LOGIC_VECTOR(5 DOWNTO 0);                      -- l4_rx_error
+    l4_rx_status          : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);                      -- l4_rx_status
+    l4_rx_valid           : OUT STD_LOGIC;                                         -- l4_rx_valid
+    l4_rx_startofpacket   : OUT STD_LOGIC;                                         -- l4_rx_startofpacket
+    l4_rx_endofpacket     : OUT STD_LOGIC;                                         -- l4_rx_endofpacket
+    l4_rx_data            : OUT STD_LOGIC_VECTOR(255 DOWNTO 0);                    -- l4_rx_data
+    l4_rx_empty           : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);                      -- l4_rx_empty
+    l4_rx_fcs_error       : OUT STD_LOGIC;                                         -- l4_rx_fcs_error
+    l4_rx_fcs_valid       : OUT STD_LOGIC;                                         -- l4_rx_fcs_valid
+    l4_tx_startofpacket   : IN  STD_LOGIC                      := 'X';             -- l4_tx_startofpacket
+    l4_tx_endofpacket     : IN  STD_LOGIC                      := 'X';             -- l4_tx_endofpacket
+    l4_tx_valid           : IN  STD_LOGIC                      := 'X';             -- l4_tx_valid
+    l4_tx_ready           : OUT STD_LOGIC;                                         -- l4_tx_ready
+    l4_tx_empty           : IN  STD_LOGIC_VECTOR(4 DOWNTO 0)   := (OTHERS => 'X'); -- l4_tx_empty
+    l4_tx_data            : IN  STD_LOGIC_VECTOR(255 DOWNTO 0) := (OTHERS => 'X'); -- l4_tx_data
+    l4_tx_error           : IN  STD_LOGIC                      := 'X';             -- l4_tx_error
+    clk_ref               : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- clk_ref
+    clk_rxmac             : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- clk_rxmac
+    clk_status            : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- clk_status
+    clk_txmac             : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- clk_txmac
+    reconfig_address      : IN  STD_LOGIC_VECTOR(11 DOWNTO 0)  := (OTHERS => 'X'); -- reconfig_address
+    reconfig_clk          : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reconfig_clk
+    reconfig_read         : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reconfig_read
+    reconfig_readdata     : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);                     -- reconfig_readdata
+    reconfig_reset        : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reconfig_reset
+    reconfig_waitrequest  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- reconfig_waitrequest
+    reconfig_write        : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reconfig_write
+    reconfig_writedata    : IN  STD_LOGIC_VECTOR(31 DOWNTO 0)  := (OTHERS => 'X'); -- reconfig_writedata
+    reset_async           : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reset_async
+    reset_status          : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- reset_status
+    rx_pcs_ready          : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_pcs_ready
+    rx_serial             : IN  STD_LOGIC_VECTOR(3 DOWNTO 0)   := (OTHERS => 'X'); -- rx_serial
+    rx_inc_octetsOK       : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);                     -- rx_inc_octetsOK
+    rx_inc_octetsOK_valid : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_octetsOK_valid
+    rx_inc_runt           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_runt
+    rx_inc_64             : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_64
+    rx_inc_127            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_127
+    rx_inc_255            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_255
+    rx_inc_511            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_511
+    rx_inc_1023           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_1023
+    rx_inc_1518           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_1518
+    rx_inc_max            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_max
+    rx_inc_over           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_over
+    rx_inc_mcast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_mcast_data_err
+    rx_inc_mcast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_mcast_data_ok
+    rx_inc_bcast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_bcast_data_err
+    rx_inc_bcast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_bcast_data_ok
+    rx_inc_ucast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_ucast_data_err
+    rx_inc_ucast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_ucast_data_ok
+    rx_inc_mcast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_mcast_ctrl
+    rx_inc_bcast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_bcast_ctrl
+    rx_inc_ucast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_ucast_ctrl
+    rx_inc_pause          : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_pause
+    rx_inc_fcs_err        : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_fcs_err
+    rx_inc_fragment       : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_fragment
+    rx_inc_jabber         : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_jabber
+    rx_inc_sizeok_fcserr  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_sizeok_fcserr
+    rx_inc_pause_ctrl_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_pause_ctrl_err
+    rx_inc_mcast_ctrl_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_mcast_ctrl_err
+    rx_inc_bcast_ctrl_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_bcast_ctrl_err
+    rx_inc_ucast_ctrl_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- rx_inc_ucast_ctrl_err
+    status_write          : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- status_write
+    status_read           : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- status_read
+    status_addr           : IN  STD_LOGIC_VECTOR(15 DOWNTO 0)  := (OTHERS => 'X'); -- status_addr
+    status_writedata      : IN  STD_LOGIC_VECTOR(31 DOWNTO 0)  := (OTHERS => 'X'); -- status_writedata
+    status_readdata       : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);                     -- status_readdata
+    status_readdata_valid : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- status_readdata_valid
+    status_waitrequest    : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- status_waitrequest
+    status_read_timeout   : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- status_read_timeout
+    tx_lanes_stable       : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_lanes_stable
+    tx_pll_locked         : IN  STD_LOGIC_VECTOR(0 DOWNTO 0)   := (OTHERS => 'X'); -- tx_pll_locked
+    tx_serial             : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);                      -- tx_serial
+    tx_serial_clk         : IN  STD_LOGIC_VECTOR(3 DOWNTO 0)   := (OTHERS => 'X'); -- tx_serial_clk
+    tx_inc_octetsOK       : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);                     -- tx_inc_octetsOK
+    tx_inc_octetsOK_valid : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_octetsOK_valid
+    tx_inc_64             : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_64
+    tx_inc_127            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_127
+    tx_inc_255            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_255
+    tx_inc_511            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_511
+    tx_inc_1023           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_1023
+    tx_inc_1518           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_1518
+    tx_inc_max            : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_max
+    tx_inc_over           : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_over
+    tx_inc_mcast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_mcast_data_err
+    tx_inc_mcast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_mcast_data_ok
+    tx_inc_bcast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_bcast_data_err
+    tx_inc_bcast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_bcast_data_ok
+    tx_inc_ucast_data_err : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_ucast_data_err
+    tx_inc_ucast_data_ok  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_ucast_data_ok
+    tx_inc_mcast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_mcast_ctrl
+    tx_inc_bcast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_bcast_ctrl
+    tx_inc_ucast_ctrl     : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_ucast_ctrl
+    tx_inc_pause          : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_pause
+    tx_inc_fcs_err        : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_fcs_err
+    tx_inc_fragment       : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_fragment
+    tx_inc_jabber         : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);                      -- tx_inc_jabber
+    tx_inc_sizeok_fcserr  : OUT STD_LOGIC_VECTOR(0 DOWNTO 0)                       -- tx_inc_sizeok_fcserr
+  );
+  END COMPONENT arria10_40g_mac;
+
+
+
+BEGIN
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_tx_bytes: FOR I IN 0 TO 31 GENERATE
+    dp_latency_adapter_tx_a_snk_in.data(8*(32-I) -1  DOWNTO 8*(31-I)) <= kernel_snk_data(8*(I+1) -1 DOWNTO 8*I);
+  END GENERATE;
+
+  -- Assign correct data fields to control signals.
+  dp_latency_adapter_tx_a_snk_in.sop <= kernel_snk_data(256);
+  dp_latency_adapter_tx_a_snk_in.eop <= kernel_snk_data(257);
+  dp_latency_adapter_tx_a_snk_in.empty(4 DOWNTO 0) <= kernel_snk_data(263 DOWNTO 259);
+
+  dp_latency_adapter_tx_a_snk_in.valid <= kernel_snk_valid;
+  kernel_snk_ready <= dp_latency_adapter_tx_a_snk_out.ready; -- Flow control towards source (kernel)
+
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=0 (OpenCL kernel) to RL=1 (downstream).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_tx_a : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 0,
+    g_out_latency => 1 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_latency_adapter_tx_a_snk_in,
+    snk_out   => dp_latency_adapter_tx_a_snk_out,
+
+    src_out   => dp_latency_adapter_tx_a_src_out,
+    src_in    => dp_latency_adapter_tx_a_src_in
+  );
+  
+  ----------------------------------------------------------------------------
+  -- dp_xonoff: discard all TX frames until 40G MAC TX side is ready
+  ----------------------------------------------------------------------------
+  u_dp_xonoff : ENTITY dp_lib.dp_xonoff
+  PORT MAP (
+    clk           => kernel_clk,
+    rst           => kernel_reset,
+
+    in_sosi       => dp_latency_adapter_tx_a_src_out,
+    in_siso       => dp_latency_adapter_tx_a_src_in,
+
+    out_sosi      => dp_xonoff_src_out,
+    out_siso      => dp_xonoff_src_in  -- flush control via out_siso.xon
+  );
+
+  ----------------------------------------------------------------------------
+  -- TX FIFO
+  ----------------------------------------------------------------------------
+  u_dp_fifo_fill_eop : ENTITY dp_lib.dp_fifo_fill_eop
+  GENERIC MAP (
+    g_data_w         => c_data_w,
+    g_use_dual_clock => TRUE,
+    g_empty_w        => 8,
+    g_use_empty      => TRUE,
+    g_use_bsn        => FALSE,
+    g_bsn_w          => 64,
+    g_use_channel    => FALSE,
+    g_use_sync       => FALSE,
+    g_fifo_size      => c_tx_fifo_size,
+    g_fifo_fill      => c_tx_fifo_fill
+ )
+  PORT MAP (
+    wr_clk  => kernel_clk,
+    wr_rst  => kernel_reset,
+
+    rd_clk  => clk_txmac,
+    rd_rst  => rst_txmac,
+
+    snk_in  => dp_xonoff_src_out,
+    snk_out => dp_xonoff_src_in,
+
+    src_out => dp_fifo_fill_eop_src_out,
+    src_in  => dp_fifo_fill_eop_src_in
+  );
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=1 (upstream) to RL=0 (MAC TX interface).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_tx_b : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 1,
+    g_out_latency => 0 
+  )
+  PORT MAP (
+    clk       => clk_txmac,
+    rst       => rst_txmac,
+
+    snk_in    => dp_fifo_fill_eop_src_out,
+    snk_out   => dp_fifo_fill_eop_src_in,
+
+    src_out   => dp_latency_adapter_tx_b_src_out,
+    src_in    => dp_latency_adapter_tx_b_src_in
+  );
+
+  ----------------------------------------------------------------------------
+  -- 40G MAC IP
+  ----------------------------------------------------------------------------
+  l4_tx_data          <= dp_latency_adapter_tx_b_src_out.data(c_data_w-1 DOWNTO 0);
+  l4_tx_valid         <= dp_latency_adapter_tx_b_src_out.valid;
+  l4_tx_empty         <= dp_latency_adapter_tx_b_src_out.empty(4 DOWNTO 0);
+  l4_tx_startofpacket <= dp_latency_adapter_tx_b_src_out.sop;
+  l4_tx_endofpacket   <= dp_latency_adapter_tx_b_src_out.eop;
+
+  dp_latency_adapter_tx_b_src_in.ready <= l4_tx_ready;
+  dp_latency_adapter_tx_b_src_in.xon   <= tx_lanes_stable;
+
+  u_arria10_40g_mac : arria10_40g_mac 
+    PORT MAP (
+       reset_async(0)         => config_reset,
+       clk_txmac(0)           => clk_txmac,    -- MAC + PCS clock - at least 312.5Mhz
+       clk_rxmac(0)           => clk_rxmac,    -- MAC + PCS clock - at least 312.5Mhz
+       clk_ref(0)             => clk_ref_r,
+       rx_pcs_ready(0)        => rx_pcs_ready,
+
+       tx_serial_clk          => serial_clk_arr,
+       tx_pll_locked(0)       => pll_locked,
+
+       clk_status(0)          => config_clk,
+       reset_status(0)        => config_reset,
+       status_addr            => (OTHERS=>'0'),
+       status_read            => (OTHERS=>'0'),
+       status_write           => (OTHERS=>'0'),
+       status_writedata       => (OTHERS=>'0'),
+--       status_readdata        => status_readdata_eth,
+--       status_read_timeout    => status_read_timeout,
+--       status_readdata_valid  => status_readdata_valid_eth,
+    
+       reconfig_clk(0)        => config_clk,
+       reconfig_reset(0)      => config_reset,
+       reconfig_write         => (OTHERS=>'0'),
+       reconfig_read          => (OTHERS=>'0'),
+       reconfig_address       => (OTHERS=>'0'),
+       reconfig_writedata     => (OTHERS=>'0'),
+--       reconfig_readdata      => reco_readdata[31:0],
+--       reconfig_waitrequest   => reco_waitrequest,
+       
+       l4_tx_data             => l4_tx_data,
+       l4_tx_empty            => l4_tx_empty,
+       l4_tx_startofpacket    => l4_tx_startofpacket,
+       l4_tx_endofpacket      => l4_tx_endofpacket,
+       l4_tx_ready            => l4_tx_ready,
+       l4_tx_valid            => l4_tx_valid,
+       l4_tx_error            => '0',
+       
+       l4_rx_data             => l4_rx_data,
+       l4_rx_empty            => l4_rx_empty,
+       l4_rx_startofpacket    => l4_rx_startofpacket,
+       l4_rx_endofpacket      => l4_rx_endofpacket,
+--       l4_rx_error            => ,
+       l4_rx_valid            => l4_rx_valid,
+
+--        l4_rx_status                  (),
+--        l4_rx_fcs_error               (),
+--        l4_rx_fcs_valid               (),
+--        rx_inc_octetsOK               (),
+--        rx_inc_octetsOK_valid         (),
+--        rx_inc_runt                   (),
+--        rx_inc_64                     (),
+--        rx_inc_127                    (),
+--        rx_inc_255                    (),
+--        rx_inc_511                    (),
+--        rx_inc_1023                   (),
+--        rx_inc_1518                   (),
+--        rx_inc_max                    (),
+--        rx_inc_over                   (),
+--        rx_inc_mcast_data_err         (),
+--        rx_inc_mcast_data_ok          (),
+--        rx_inc_bcast_data_err         (),
+--        rx_inc_bcast_data_ok          (),
+--        rx_inc_ucast_data_err         (),
+--        rx_inc_ucast_data_ok          (),
+--        rx_inc_mcast_ctrl             (),
+--        rx_inc_bcast_ctrl             (),
+--        rx_inc_ucast_ctrl             (),
+--        rx_inc_pause                  (),
+--        rx_inc_fcs_err                (),
+--        rx_inc_fragment               (),
+--        rx_inc_jabber                 (),
+--        rx_inc_sizeok_fcserr          (),
+--        rx_inc_pause_ctrl_err         (),
+--        rx_inc_mcast_ctrl_err         (),
+--        rx_inc_bcast_ctrl_err         (),
+--        rx_inc_ucast_ctrl_err         (),
+--        status_waitrequest            (),
+       tx_lanes_stable(0)     => tx_lanes_stable,
+--        tx_inc_octetsOK               (),
+--        tx_inc_octetsOK_valid         (),
+--        tx_inc_64                     (),
+--        tx_inc_127                    (),
+--        tx_inc_255                    (),
+--        tx_inc_511                    (),
+--        tx_inc_1023                   (),
+--        tx_inc_1518                   (),
+--        tx_inc_max                    (),
+--        tx_inc_over                   (),
+--        tx_inc_mcast_data_err         (),
+--        tx_inc_mcast_data_ok          (),
+--        tx_inc_bcast_data_err         (),
+--        tx_inc_bcast_data_ok          (),
+--        tx_inc_ucast_data_err         (),
+--        tx_inc_ucast_data_ok          (),
+--        tx_inc_mcast_ctrl             (),
+--        tx_inc_bcast_ctrl             (),
+--        tx_inc_ucast_ctrl             (),
+--        tx_inc_pause                  (),
+--        tx_inc_fcs_err                (),
+--        tx_inc_fragment               (),
+--        tx_inc_jabber                 (),
+--        tx_inc_sizeok_fcserr          (),
+
+       tx_serial              => tx_serial_r,
+       rx_serial              => rx_serial_r
+    );
+
+
+  -- No latency adapter needed as the RX MAC does not have a ready input
+  ----------------------------------------------------------------------------
+  -- RX FIFO
+  ----------------------------------------------------------------------------
+  rst_rxmac <= NOT rx_pcs_ready;
+  rx_status <= rx_pcs_ready;
+
+  dp_fifo_dc_snk_in.data(c_data_w-1 DOWNTO 0) <= l4_rx_data;
+  dp_fifo_dc_snk_in.valid              <= l4_rx_valid;
+  dp_fifo_dc_snk_in.sop                <= l4_rx_startofpacket;
+  dp_fifo_dc_snk_in.eop                <= l4_rx_endofpacket;
+  dp_fifo_dc_snk_in.empty(4 DOWNTO 0)  <= l4_rx_empty;
+
+  u_dp_fifo_dc : ENTITY dp_lib.dp_fifo_dc
+  GENERIC MAP (
+    g_data_w         => c_data_w,
+    g_empty_w        => 8,
+    g_use_empty      => TRUE,
+    g_use_bsn        => FALSE,
+    g_bsn_w          => 64,
+    g_use_channel    => FALSE,
+    g_use_sync       => FALSE,
+    g_fifo_size      => c_rx_fifo_size
+ )
+  PORT MAP (
+    wr_clk  => clk_rxmac,
+    wr_rst  => rst_rxmac,
+
+    rd_clk  => kernel_clk,
+    rd_rst  => kernel_reset,
+
+    snk_in  => dp_fifo_dc_snk_in,
+    snk_out => OPEN,
+
+    src_out => dp_fifo_dc_src_out,
+    src_in  => dp_fifo_dc_src_in
+  );
+
+
+  ----------------------------------------------------------------------------
+  -- Latency adapter: adapt RL=1 (dp_fifo_dc) to RL=0 (OpenCL kernel).
+  ----------------------------------------------------------------------------
+  u_dp_latency_adapter_rx : ENTITY dp_lib.dp_latency_adapter
+  GENERIC MAP (
+    g_in_latency  => 1,
+    g_out_latency => 0 
+  )
+  PORT MAP (
+    clk       => kernel_clk,
+    rst       => kernel_reset,
+
+    snk_in    => dp_fifo_dc_src_out,
+    snk_out   => dp_fifo_dc_src_in,
+
+    src_out   => dp_latency_adapter_rx_src_out,
+    src_in    => dp_latency_adapter_rx_src_in
+  );
+
+  ----------------------------------------------------------------------------
+  -- Data mapping 
+  ----------------------------------------------------------------------------
+  -- Reverse byte order
+  gen_rx_bytes: FOR I IN 0 TO 31 GENERATE
+    kernel_src_data(8*(32-I) -1  DOWNTO 8*(31-I)) <= dp_latency_adapter_rx_src_out.data(8*(I+1) -1 DOWNTO 8*I);
+  END GENERATE;
+
+  -- Assign control signals to correct data fields.
+  kernel_src_data(256) <= dp_latency_adapter_rx_src_out.sop;
+  kernel_src_data(257) <= dp_latency_adapter_rx_src_out.eop;
+  kernel_src_data(263 DOWNTO 259) <= dp_latency_adapter_rx_src_out.empty(4 DOWNTO 0);
+  
+
+  kernel_src_valid <= dp_latency_adapter_rx_src_out.valid;
+  dp_latency_adapter_rx_src_in.ready <= kernel_src_ready;
+  dp_latency_adapter_rx_src_in.xon <= '1';
+
+  -------------------------------------------------------------------------------
+  -- PLL for clock generation
+  -------------------------------------------------------------------------------
+  u_arria10_40g_atx_pll : arria10_40g_atx_pll
+  port map (
+    pll_cal_busy  => OPEN,
+    pll_locked    => pll_locked,
+    pll_powerdown => config_reset,
+    pll_refclk0   => clk_ref_r,
+    tx_serial_clk => serial_clk
+  );
+
+  gen_serial_clk_arr : FOR i IN 0 TO 3 GENERATE
+    serial_clk_arr(i) <= serial_clk;
+  END GENERATE;
+
+  -------------------------------------------------------------------------------
+  -- Reset signal generation
+  -------------------------------------------------------------------------------
+
+  u_common_areset_txmac : ENTITY common_lib.common_areset
+  GENERIC MAP (
+    g_rst_level => '1',
+    g_delay_len => 3
+  )
+  PORT MAP (
+    in_rst    => kernel_reset,
+    clk       => clk_txmac,
+    out_rst   => rst_txmac
+  );
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..255db44967490e52c662c30bd7a3ddd147f66720
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl
@@ -0,0 +1,213 @@
+# TCL File Generated by Component Editor 18.0
+# Fri Jan 10 16:11:08 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_40GbE "ta2_unb2b_40GbE" v1.0
+#  2020.01.10.16:11:08
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_40GbE
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_40GbE
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_40GbE
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_40GbE_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_40GbE_ip_wrapper.vhd VHDL PATH ta2_unb2b_40GbE_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 264
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 264
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point config_clk
+# 
+add_interface config_clk clock end
+set_interface_property config_clk ENABLED true
+set_interface_property config_clk EXPORT_OF ""
+set_interface_property config_clk PORT_NAME_MAP ""
+set_interface_property config_clk CMSIS_SVD_VARIABLES ""
+set_interface_property config_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port config_clk config_clk clk Input 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+# 
+# connection point refclk
+# 
+add_interface refclk clock end
+set_interface_property refclk ENABLED true
+set_interface_property refclk EXPORT_OF ""
+set_interface_property refclk PORT_NAME_MAP ""
+set_interface_property refclk CMSIS_SVD_VARIABLES ""
+set_interface_property refclk SVD_ADDRESS_GROUP ""
+
+add_interface_port refclk clk_ref_r clk Input 1
+
+
+# 
+# connection point rx_serial_data
+# 
+add_interface rx_serial_data conduit end
+set_interface_property rx_serial_data associatedClock ""
+set_interface_property rx_serial_data associatedReset ""
+set_interface_property rx_serial_data ENABLED true
+set_interface_property rx_serial_data EXPORT_OF ""
+set_interface_property rx_serial_data PORT_NAME_MAP ""
+set_interface_property rx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property rx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_serial_data rx_serial_r conduit Input 4
+
+
+# 
+# connection point tx_serial_data
+# 
+add_interface tx_serial_data conduit end
+set_interface_property tx_serial_data associatedClock ""
+set_interface_property tx_serial_data associatedReset ""
+set_interface_property tx_serial_data ENABLED true
+set_interface_property tx_serial_data EXPORT_OF ""
+set_interface_property tx_serial_data PORT_NAME_MAP ""
+set_interface_property tx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property tx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port tx_serial_data tx_serial_r conduit Output 4
+
+
+# 
+# connection point config_reset
+# 
+add_interface config_reset reset end
+set_interface_property config_reset associatedClock config_clk
+set_interface_property config_reset synchronousEdges DEASSERT
+set_interface_property config_reset ENABLED true
+set_interface_property config_reset EXPORT_OF ""
+set_interface_property config_reset PORT_NAME_MAP ""
+set_interface_property config_reset CMSIS_SVD_VARIABLES ""
+set_interface_property config_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port config_reset config_reset reset Input 1
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
+# 
+# connection point rx_status
+# 
+add_interface rx_status conduit end
+set_interface_property rx_status associatedClock ""
+set_interface_property rx_status associatedReset ""
+set_interface_property rx_status ENABLED true
+set_interface_property rx_status EXPORT_OF ""
+set_interface_property rx_status PORT_NAME_MAP ""
+set_interface_property rx_status CMSIS_SVD_VARIABLES ""
+set_interface_property rx_status SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_status rx_status rx_status Output 1
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl~ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl~
new file mode 100644
index 0000000000000000000000000000000000000000..169117a331eac1ca345c42d509fd27d289c490c8
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_hw.tcl~
@@ -0,0 +1,213 @@
+# TCL File Generated by Component Editor 18.0
+# Fri Jan 10 15:53:26 CET 2020
+# DO NOT MODIFY
+
+
+# 
+# ta2_unb2b_40GbE "ta2_unb2b_40GbE" v1.0
+#  2020.01.10.15:53:26
+# 
+# 
+
+# 
+# request TCL package from ACDS 18.0
+# 
+package require -exact qsys 18.0
+
+
+# 
+# module ta2_unb2b_40GbE
+# 
+set_module_property DESCRIPTION ""
+set_module_property NAME ta2_unb2b_40GbE
+set_module_property VERSION 1.0
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property AUTHOR ""
+set_module_property DISPLAY_NAME ta2_unb2b_40GbE
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+# 
+# file sets
+# 
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL ta2_unb2b_40GbE_ip_wrapper
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file ta2_unb2b_40GbE_ip_wrapper.vhd VHDL PATH ta2_unb2b_40GbE_ip_wrapper.vhd TOP_LEVEL_FILE
+
+
+# 
+# parameters
+# 
+
+
+# 
+# display items
+# 
+
+
+# 
+# connection point kernel_snk
+# 
+add_interface kernel_snk avalon_streaming end
+set_interface_property kernel_snk associatedClock kernel_clk
+set_interface_property kernel_snk associatedReset kernel_reset
+set_interface_property kernel_snk dataBitsPerSymbol 8
+set_interface_property kernel_snk errorDescriptor ""
+set_interface_property kernel_snk firstSymbolInHighOrderBits true
+set_interface_property kernel_snk maxChannel 0
+set_interface_property kernel_snk readyAllowance 0
+set_interface_property kernel_snk readyLatency 0
+set_interface_property kernel_snk ENABLED true
+set_interface_property kernel_snk EXPORT_OF ""
+set_interface_property kernel_snk PORT_NAME_MAP ""
+set_interface_property kernel_snk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_snk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_snk kernel_snk_data data Input 264
+add_interface_port kernel_snk kernel_snk_ready ready Output 1
+add_interface_port kernel_snk kernel_snk_valid valid Input 1
+
+
+# 
+# connection point kernel_src
+# 
+add_interface kernel_src avalon_streaming start
+set_interface_property kernel_src associatedClock kernel_clk
+set_interface_property kernel_src associatedReset kernel_reset
+set_interface_property kernel_src dataBitsPerSymbol 8
+set_interface_property kernel_src errorDescriptor ""
+set_interface_property kernel_src firstSymbolInHighOrderBits true
+set_interface_property kernel_src maxChannel 0
+set_interface_property kernel_src readyAllowance 0
+set_interface_property kernel_src readyLatency 0
+set_interface_property kernel_src ENABLED true
+set_interface_property kernel_src EXPORT_OF ""
+set_interface_property kernel_src PORT_NAME_MAP ""
+set_interface_property kernel_src CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_src SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_src kernel_src_data data Output 264
+add_interface_port kernel_src kernel_src_ready ready Input 1
+add_interface_port kernel_src kernel_src_valid valid Output 1
+
+
+# 
+# connection point config_clk
+# 
+add_interface config_clk clock end
+set_interface_property config_clk ENABLED true
+set_interface_property config_clk EXPORT_OF ""
+set_interface_property config_clk PORT_NAME_MAP ""
+set_interface_property config_clk CMSIS_SVD_VARIABLES ""
+set_interface_property config_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port config_clk config_clk clk Input 1
+
+
+# 
+# connection point kernel_clk
+# 
+add_interface kernel_clk clock end
+set_interface_property kernel_clk ENABLED true
+set_interface_property kernel_clk EXPORT_OF ""
+set_interface_property kernel_clk PORT_NAME_MAP ""
+set_interface_property kernel_clk CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_clk kernel_clk clk Input 1
+
+
+# 
+# connection point refclk
+# 
+add_interface refclk clock end
+set_interface_property refclk ENABLED true
+set_interface_property refclk EXPORT_OF ""
+set_interface_property refclk PORT_NAME_MAP ""
+set_interface_property refclk CMSIS_SVD_VARIABLES ""
+set_interface_property refclk SVD_ADDRESS_GROUP ""
+
+add_interface_port refclk clk_ref_r clk Input 1
+
+
+# 
+# connection point rx_serial_data
+# 
+add_interface rx_serial_data conduit end
+set_interface_property rx_serial_data associatedClock ""
+set_interface_property rx_serial_data associatedReset ""
+set_interface_property rx_serial_data ENABLED true
+set_interface_property rx_serial_data EXPORT_OF ""
+set_interface_property rx_serial_data PORT_NAME_MAP ""
+set_interface_property rx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property rx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_serial_data rx_serial_r conduit Input 4
+
+
+# 
+# connection point tx_serial_data
+# 
+add_interface tx_serial_data conduit end
+set_interface_property tx_serial_data associatedClock ""
+set_interface_property tx_serial_data associatedReset ""
+set_interface_property tx_serial_data ENABLED true
+set_interface_property tx_serial_data EXPORT_OF ""
+set_interface_property tx_serial_data PORT_NAME_MAP ""
+set_interface_property tx_serial_data CMSIS_SVD_VARIABLES ""
+set_interface_property tx_serial_data SVD_ADDRESS_GROUP ""
+
+add_interface_port tx_serial_data tx_serial_r conduit Output 4
+
+
+# 
+# connection point config_reset
+# 
+add_interface config_reset reset end
+set_interface_property config_reset associatedClock config_clk
+set_interface_property config_reset synchronousEdges DEASSERT
+set_interface_property config_reset ENABLED true
+set_interface_property config_reset EXPORT_OF ""
+set_interface_property config_reset PORT_NAME_MAP ""
+set_interface_property config_reset CMSIS_SVD_VARIABLES ""
+set_interface_property config_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port config_reset config_reset reset Input 1
+
+
+# 
+# connection point kernel_reset
+# 
+add_interface kernel_reset reset end
+set_interface_property kernel_reset associatedClock kernel_clk
+set_interface_property kernel_reset synchronousEdges DEASSERT
+set_interface_property kernel_reset ENABLED true
+set_interface_property kernel_reset EXPORT_OF ""
+set_interface_property kernel_reset PORT_NAME_MAP ""
+set_interface_property kernel_reset CMSIS_SVD_VARIABLES ""
+set_interface_property kernel_reset SVD_ADDRESS_GROUP ""
+
+add_interface_port kernel_reset kernel_reset reset Input 1
+
+
+# 
+# connection point rx_status
+# 
+add_interface rx_status conduit end
+set_interface_property rx_status associatedClock ""
+set_interface_property rx_status associatedReset ""
+set_interface_property rx_status ENABLED true
+set_interface_property rx_status EXPORT_OF ""
+set_interface_property rx_status PORT_NAME_MAP ""
+set_interface_property rx_status CMSIS_SVD_VARIABLES ""
+set_interface_property rx_status SVD_ADDRESS_GROUP ""
+
+add_interface_port rx_status rx_status rx_status Output 1
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_ip_wrapper.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_ip_wrapper.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..c6c086f03bf3f2c3bf9b62969cb2f2059608b16b
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE_ip_wrapper.vhd
@@ -0,0 +1,114 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2019
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+-- Author:
+-- . Reinier van der Walle
+-- Purpose:
+-- . Instantiates ta2_unb2b_40GbE component 
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+
+ENTITY ta2_unb2b_40GbE_ip_wrapper IS       
+  PORT (      
+    config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 40G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(263 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(263 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+END ta2_unb2b_40GbE_ip_wrapper;
+
+
+ARCHITECTURE str OF ta2_unb2b_40GbE_ip_wrapper IS
+  ----------------------------------------------------------------------------
+  -- ta2_unb2b_40GbE Component
+  ----------------------------------------------------------------------------
+  COMPONENT ta2_unb2b_40GbE IS
+  PORT (
+    config_clk       : IN  STD_LOGIC; -- 100MHz clk for reconfig block and status interface
+    config_reset     : IN  STD_LOGIC;
+
+    clk_ref_r        : IN  STD_LOGIC; -- 644.53125MHz 40G MAC reference clock
+
+    tx_serial_r      : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial TX lanes towards QSFP cage
+    rx_serial_r      : IN  STD_LOGIC_VECTOR(3 DOWNTO 0); -- Serial RX lanes from QSFP cage
+
+    kernel_clk       : IN  STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
+    kernel_reset     : IN  STD_LOGIC;
+
+    kernel_src_data  : OUT STD_LOGIC_VECTOR(263 DOWNTO 0); -- RX Data to kernel
+    kernel_src_valid : OUT STD_LOGIC; -- RX data valid signal to kernel
+    kernel_src_ready : IN  STD_LOGIC; -- Flow control from kernel
+
+    kernel_snk_data  : IN  STD_LOGIC_VECTOR(263 DOWNTO 0); -- TX Data from kernel
+    kernel_snk_valid : IN  STD_LOGIC; -- TX data valid signal from kernel
+    kernel_snk_ready : OUT STD_LOGIC;  -- Flow control towards kernel
+
+    rx_status        : OUT STD_LOGIC -- RX status
+  );
+  END COMPONENT ta2_unb2b_40GbE;
+
+BEGIN
+
+  u_ta2_unb2b_40GbE : ta2_unb2b_40GbE 
+    PORT MAP (
+      config_clk       => config_clk,
+      config_reset     => config_reset,     
+                                           
+      clk_ref_r        => clk_ref_r,        
+                                           
+      tx_serial_r      => tx_serial_r,     
+      rx_serial_r      => rx_serial_r,      
+                                           
+      kernel_clk       => kernel_clk,       
+      kernel_reset     => kernel_reset,     
+                                           
+      kernel_src_data  => kernel_src_data,  
+      kernel_src_valid => kernel_src_valid, 
+      kernel_src_ready => kernel_src_ready, 
+                                           
+      kernel_snk_data  => kernel_snk_data,  
+      kernel_snk_valid => kernel_snk_valid, 
+      kernel_snk_ready => kernel_snk_ready, 
+  
+      rx_status        => rx_status
+
+    );
+
+
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/onchip_memory2_0.hex b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/onchip_memory2_0.hex
new file mode 100644
index 0000000000000000000000000000000000000000..360ad376812bee383b286ae0fac4d97070e33877
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/onchip_memory2_0.hex
@@ -0,0 +1,4098 @@
+:020000020000FC
+:20000000004000B4084089140800683A00000000000000000000000000000000000000005D
+:20000800DEFFED04DFC00015D8400215D8800315D8C00415D9000515D9400615D98007156A
+:20001000D9C00815000B307ADA000915DA400A15DA800B15DAC00C15DB000D15DB400E15C4
+:20001800DB800F15DBC01015D9401115EBFFFF04DBC012150009313A2880004C10000326FA
+:200020002000022600200FC000000706DF401215E8BFFF17E93FFF0400201C401000021EA2
+:20002800EBFFFF04DBC01215D9401117DF401217DFC000172801707AD8400217D880031714
+:20003000D8C00417D9000517D9400617D9800717D9C00817DA000917DA400A17DA800B17F2
+:20003800DAC00C17DB000D17DB400E17DB800F17DBC01017DEC01304EF80083ADEFFF90429
+:20004000DFC00615DF000515DF0005040001883A0005313AE0BFFC15E0BFFC17E0BFFF15BD
+:20004800E03FFD1500800044E0BFFE15E0FFFF17E0BFFE171884703A10001126E0BFFD1708
+:20005000100690FA008000B41885883A10C92817E0BFFD17100890FA008000B42085883A55
+:20005800108929171009883A183EE83A0001883A0005313AE0BFFB15E0BFFB1700000706BC
+:20006000E0BFFE171085883AE0BFFE15E0BFFD1710800044E0BFFD15003FE406E0BFFF15AF
+:20006800E0BFFF17103FDE1E0001883A0001883AE037883ADFC00117DF000017DEC00204C8
+:20007000F800283ADEFFFB04DFC00415DF000315DF000304E13FFD1500BFFFC4E0BFFF153E
+:20007800E03FFE15D0A0201710000726D0A02017E0FFFF17E1BFFE17E17FFD171809883AAA
+:20008000103EE83A00000206003DA03A0005883AE037883ADFC00117DF000017DEC00204E0
+:20008800F800283A06C00134DEC00014068000B4D6A90714008000B410891F1400C000B409
+:2000900018C9681410C00326100000151080010410FFFD360022248000202600003FFF06AE
+:20009800DEFFFB04DFC00415DF000315DF00030400222CC0008000441001703A00801B446B
+:2000A00010803FCC1080201C10BFE00410801CE01000131E00801B4410803FCC1080201C13
+:2000A80010BFE00410801B6010000B1E00801B4410803FCC1080201C10BFE00410801D5843
+:2000B0001000031E008003F4109090040000060600800044000004060080FA0400000206F4
+:2000B8000081DCF410965004100F883A01800084000B883A0100C00400208B000081000435
+:2000C0000080EF3501400044010000B42108F20400207E8000215E4000208480E0BFFF156F
+:2000C80000208480E0BFFE15E0FFFE17E0BFFF171885C83A1080FA301000071E0080E03774
+:2000D0001080004C1005003A10803FCC0080E035E0BFFE17E0BFFF15D0A01D171080004CCE
+:2000D80010800058103FEE1E00209E40E0BFFD15E0BFFD1710000526E0BFFD171080008461
+:2000E0001009883A00214DC0003FE50600215AC0003FE306DEFFED04DFC01215DF001115D1
+:2000E800DF001104E13FF215E17FF115E1BFF015E1FFEF15E0BFF117E0BFF915E0BFF017F4
+:2000F000E0BFFE150000D306E0BFFFC7108009601000081EE13FFFC7E0BFF11710C0004430
+:2000F800E0FFF115E0FFF217100B883A183EE83A0000C806E0BFFE1710C00044E0FFFE153E
+:2001000010800003E0BFFFC5E0BFFFC71000C926E0BFFFC710C0192018006F1E10C0194841
+:200108001800051E10C009601800081E108018E010000E1E0000B60610C01CE018009A1E09
+:2001100010801E201000191E0000B106E13FFFC7E0BFF11710C00044E0FFF115E0FFF21795
+:20011800100B883A183EE83A0000AA06E0BFEF1710C00104E0FFEF1510800017E0BFF61514
+:20012000E0BFF61711003FCC2100201C213FE004E0BFF11710C00044E0FFF115E0FFF217CE
+:20012800100B883A183EE83A00009A06E0BFEF1710C00104E0FFEF1510800017E0BFF81512
+:20013000E0BFF11710C00044E0FFF115E0FFF217100B883A01000C04183EE83AE0BFF1171A
+:2001380010C00044E0FFF115E0FFF217100B883A01001E04183EE83AE0BFF8171000081E6A
+:20014000E0BFF11710C00044E0FFF115E0FFF217100B883A01000C04183EE83A00007D062E
+:2001480000800704E0BFFD1500000306E0BFFD1710BFFF04E0BFFD1500C003C4E0BFFD17E2
+:200150001884983A1007883AE0BFF8171884703A103FF62600001D0600C003C4E0BFFD178C
+:200158001884983A1007883AE0BFF8171886703AE0BFFD171884D83AE0BFF715E0BFF71791
+:20016000108002A81000041EE0BFF71710800C04E0BFFFC500000306E0BFF717108015C444
+:20016800E0BFFFC5E13FFFC7E0BFF11710C00044E0FFF115E0FFF217100B883A183EE83A51
+:20017000E0BFFD1710BFFF04E0BFFD15E0BFFD17103FE10E00004F06E0BFEF1710C0010479
+:20017800E0FFEF1510800017E0BFFC15E0BFF344E0BFFB15E0BFFC171000161EE0BFFB1701
+:2001800010C00044E0FFFB1500C00C0410C0000500001006E0BFFC17014002841009883A4D
+:200188000021E18010800C041009883AE0BFFB1710C00044E0FFFB152007883A10C00005E8
+:20019000E0BFFC17014002841009883A0021D900E0BFFC15E0BFFC17103FEE1E00000B0633
+:20019800E0BFFB171080000311003FCC2100201C213FE004E0BFF11710C00044E0FFF115A6
+:2001A000E0FFF217100B883A183EE83AE0BFFB1710BFFFC4E0BFFB15E0BFF344E0FFFB1749
+:2001A80018BFEF2E00001B06E0BFEF1710C00104E0FFEF1510800017E0BFFA1500000D065D
+:2001B000E0BFFA1710C00044E0FFFA151080000311003FCC2100201C213FE004E0BFF11786
+:2001B80010C00044E0FFF115E0FFF217100B883A183EE83AE0BFFA171080000310803FCC13
+:2001C0001080201C10BFE004103FED1E000001060001883AE0BFFE1710C00044E0FFFE15C2
+:2001C80010800003E0BFFFC5E0BFFFC7103F261E000001060001883AE0BFF11710C00044A4
+:2001D000E0FFF115E0FFF217100B883A0009883A183EE83AE0FFF117E0BFF9171885C83AED
+:2001D800E037883ADFC00117DF000017DEC00204F800283ADEFFFB04DF000415DF000404C8
+:2001E0002005883AE17FFC15E0BFFD0500800804E0BFFF15E0BFFD0710000E260080EF373A
+:2001E800E0BFFE15E0BFFE1710BFFFEC10000326E0BFFD070080EE3500000506E0BFFF1798
+:2001F00010BFFFC4E0BFFF15E0BFFF17103FF31E0001883A0001883AE037883ADF00001740
+:2001F800DEC00104F800283ADEFFF804DFC00415DF000315DF000304E13FFD15E140021512
+:20020000E1800315E1C00415E0800204E0BFFE15E0BFFE17100F883AE1BFFD17000B883A7D
+:20020800010000B42101DD0400203940E0BFFF15E0BFFF17E037883ADFC00117DF00001797
+:20021000DEC00504F800283ADEFFFF04DF000015D839883AD0A01817E037883ADF000017B8
+:20021800DEC00104F800283ADEFFFE04DF000115DF000104E13FFF150007883AE0BFFF175F
+:2002200010C00035E0BFFF171080010410800037D0A0181710800044D0A018150001883AD5
+:20022800E037883ADF000017DEC00104F800283ADEFFF904DFC00615DF000515DF00050475
+:20023000E13FFF15E17FFE15E1BFFD15E1FFFC15E0BFFF171080010400C001C410C0003590
+:20023800D8000015E1FFFF17018000B431821A04E17FFD17E13FFE170021F4C00001883A7C
+:20024000E037883ADFC00117DF000017DEC00204F800283ADEFFFE04DF000115DF00010462
+:20024800E13FFF1500BFFFC4E037883ADF000017DEC00104F800283ADEFFFE04DF00011540
+:20025000DF000104E13FFF1500BFFFC4E037883ADF000017DEC00104F800283ADEFFFB044C
+:20025800DF000415DF000404E13FFF15E17FFE15E1BFFD15E1FFFC1500BFFFC4E037883A02
+:20026000DF000017DEC00104F800283ADEFFFB04DF000415DF000404E13FFF15E17FFE1529
+:20026800E1BFFD15E1FFFC1500BFFFC4E037883ADF000017DEC00104F800283ADEFFFD04A7
+:20027000DF000215DF000204E13FFF15E17FFE1500BFFFC4E037883ADF000017DEC00104F8
+:20027800F800283ADEFFFB04DFC00415DF000315DF000304D0A01E171090000C109000208A
+:200280001000021E0005883A0000700600800B04E0BFFF15D0E00617E0BFFF171889883ACA
+:20028800D0E00717E0BFFF171885883A100B883A0020CBC0E0BFFE15E0BFFE17100490BA28
+:20029000E0BFFE15D0A0071710800404108000171004D63A10C03FCCD0A0071710800404AA
+:20029800108000171004D23A10BFC00C1886B03AD0A0071710800404108000171004923AAF
+:2002A00010803FEC1886B03AD0A0071710800404108000171004963A1884B03AE0BFFD1513
+:2002A800E0BFFD1710BFFFECE0BFFD15E0BFFE171080070410BFFFCCE0FFFD171884B03AB6
+:2002B000E0BFFD15E0BFFD171006D63AE0BFFD171004D23A10BFC00C1886B03AE0BFFD17FB
+:2002B8001004923A10803FEC1888B03AE0BFFD171006963AD0A007171080040420C6B03A72
+:2002C00010C00015D0A0071710800A04108000171004D63A10C03FCCD0A0071710800A043B
+:2002C800108000171004D23A10BFC00C1886B03AD0A0071710800A04108000171004923A79
+:2002D00010803FEC1886B03AD0A0071710800A04108000171004963A1884B03AE0BFFD15DD
+:2002D800E0BFFD1710BFFFCCE0BFFD15E0BFFE17108002041004943AE0FFFD171884B03A63
+:2002E000E0BFFD15E0BFFD171006D63AE0BFFD171004D23A10BFC00C1886B03AE0BFFD17CB
+:2002E8001004923A10803FEC1888B03AE0BFFD171006963AD0A0071710800A0420C6B03A3C
+:2002F00010C00015E0BFFE1710800B04E037883ADFC00117DF000017DEC00204F800283A32
+:2002F800DEFFFD04DF000215DF000204E13FFF15E17FFE15E0FFFF17E0BFFE171884703A97
+:20030000E037883ADF000017DEC00104F800283ADEFFFD04DF000215DF000204E13FFF1524
+:20030800E17FFE15E0FFFF17E0BFFE171884B03AE037883ADF000017DEC00104F800283A67
+:20031000DEFFFD04DF000215DF000204E13FFF15E17FFE15E0FFFF17E0BFFE171884F03AFE
+:20031800E037883ADF000017DEC00104F800283ADEFFFD04DF000215DF000204E13FFF150C
+:20032000E17FFE15D0A01A170084303AE0FFFF171884703AE0BFFF15D0E01A17E0BFFE1738
+:200328001886703AE0BFFF171884B03AE037883ADF000017DEC00104F800283ADEFFF50490
+:20033000DFC00A15DF000915DF000904E13FF915E17FF815E0BFF817E0BFFB15E0FFF9171F
+:2003380018800104E0BFF915E0BFF81711000104E13FF81518C0001710C00015000113067C
+:2003400000800044E0BFFC15E0BFFC17E0BFFD15E0BFF9171080001710C001E01800D71EB2
+:2003480010C002281800071E10C001A81800BB1E10C000A818006C1E108000601000231E99
+:200350000001010610C002A01800661E10C002E81800051E10C002201800E71E1080026081
+:200358001000191E0000F80610C002E01800391E10BFFFE01000F4260021C98010000626A1
+:20036000008000B41088F70410C00017E0BFF81710C0001500000506008000B41088F5046C
+:2003680010C00017E0BFF81710C00015E0BFF81710800104E0BFF815E0BFF91710800104C8
+:20037000E0BFF9150000E106E03FFD15E0BFF91710800117E0BFFF15E0BFF9171080021746
+:20037800E0BFFE15E0BFF81710C00104E13FFE17E0BFFC17D8800015E1FFFD17E1BFFF1732
+:20038000200B883A1809883A0021D3C01000041EE0BFFE170084303AE0BFFE15E03FFF1520
+:20038800E0BFF817E0FFFE1710C00015E0BFFF1710800044100490BAE0FFF8171885883A9A
+:20039000E0BFF815E0BFF91710800304E0BFF9150000BE06E0BFF91710800117E0BFFF15E0
+:20039800E0BFF91710800217E0BFFE15E0BFF9171080030410800017D0A01A15E0BFF91700
+:2003A00010800404E0BFFA15E0BFFE1701C000B439C31C04E1BFFF17E17FFA171009883AB0
+:2003A800002117C01000031EE0BFFE170084303AE0BFFE15E0BFF81710C00104E0FFF81549
+:2003B000E0FFFE1710C00015E0BFFF1710800104100490BAE0FFF9171885883AE0BFF915B1
+:2003B80000009A06E03FFC15E0BFF91710800117E0BFFF15E0BFF91710800217E0BFFE1541
+:2003C000E0BFF91710800304E0BFFA15E0BFF91710800017108000A01000041EE0BFF917C2
+:2003C80010800017108002981000091EE0FFFE17E0BFFC17D8800015E1FFFD17E1BFFF1750
+:2003D000E17FFA171809883A0021D3C010002426E0BFF91710800017108000D81000081EB7
+:2003D800E0BFFE1701C000B439C2F804E1BFFF17E17FFA171009883A002117C0100018269D
+:2003E000E0BFF91710800017108001181000081EE0BFFE1701C000B439C30404E1BFFF17E5
+:2003E800E17FFA171009883A002117C010000C26E0BFF917108000171080015810000B1EF7
+:2003F000E0BFFE1701C000B439C31004E1BFFF17E17FFA171009883A002117C01000031E89
+:2003F800E0BFFE170084303AE0BFFE15E0BFF81710C00104E0FFF815E0FFFE1710C0001549
+:20040000E0BFFF17108000C4100490BAE0FFF9171885883AE0BFF91500004C06E0BFF91779
+:2004080010800117E0BFFE15E0BFF91710800204E0BFFA15D0A00117E0FFFE17E17FFA179A
+:200410001809883A103EE83A1000031EE0BFFE170084303AE0BFFE15E0BFF81710C0010471
+:20041800E0FFF815E0FFFE1710C00015E0BFF91710804204E0BFF91500003406E0BFF917E4
+:2004200010800117E0BFFE15E0BFF81710800104E0BFFA15D0A00217E0FFFE17180B883A0F
+:20042800E13FFA17103EE83A1000071EE0BFF81710C00104E0FFF815E0FFFE1700C6303A4B
+:2004300010C0001500000806E0BFF81710C00104E0FFF815E0FFFE1710C00015E0BFF817C3
+:2004380010804004E0BFF815E0BFF91710800204E0BFF91500001506E0BFF91710800117C0
+:20044000E0BFFE15D0A00317E0FFFE171809883A103EE83A1000031EE0BFFE170084303A46
+:20044800E0BFFE15E0BFF81710C00104E0FFF815E0FFFE1710C00015E0BFF9171080020455
+:20045000E0BFF915000001060001883AE0BFF91710800017103EEA1EE0FFF817E0BFFB17CA
+:200458001885C83A1005D0BAE037883ADFC00117DF000017DEC00204F800283ADEFFF904E8
+:20046000DFC00615DF000515DF000504E13FFE15E17FFD15E1BFFC15E1FFFB15E0BFFE17E7
+:20046800108000CC1000031EE0BFFD17108000CC100015260005883A00001806E0BFFE17F4
+:2004700010800037E0BFFF15E0BFFD1710C00017E0BFFB17180B883AE13FFF17103EE83A1C
+:20047800E0BFFF15E0FFFF17E0BFFE1710C00035E0BFFE1710800104E0BFFE15E0BFFD1755
+:2004800010800104E0BFFD15E0BFFC1710FFFFC4E0FFFC15103FE91E00800044E037883AAF
+:20048800DFC00117DF000017DEC00204F800283ADEFFFE04DFC00115DF000015D839883A4E
+:20049000D0A0001710800A981000031ED120190400209140D0A00015D0A00017E037883A7E
+:20049800DFC00117DF000017DEC00204F800283ADEFFFC04DFC00315DF000215DF0002042A
+:2004A000E13FFF15E17FFE15002123001000040E008000B410852004D0A0011500000306B3
+:2004A800008000B41084E204D0A00115D0A00117E17FFE17E13FFF17103EE83AE037883A84
+:2004B000DFC00117DF000017DEC00204F800283ADEFFFC04DFC00315DF000215DF00020412
+:2004B800E13FFF15E17FFE15002123001000040E008000B410852004D0A00215000003069A
+:2004C000008000B41084F904D0A00215D0A00217E17FFE17E13FFF17103EE83AE037883A53
+:2004C800DFC00117DF000017DEC00204F800283ADEFFFD04DFC00215DF000115DF000104FC
+:2004D000E13FFF15002123001000040E008000B410852A04D0A0031500000306008000B4B6
+:2004D80010850E04D0A00315D0A00317E13FFF17103EE83AE037883ADFC00117DF0000171F
+:2004E000DEC00204F800283ADEFFFB04DFC00415DF000315DF000304E13FFF15E17FFE15E6
+:2004E800E0FFFF1700804004D8800015E1FFFE17180D883A000B883AD1201904002095C0A2
+:2004F0001000020E0005883A0000010600800044E037883ADFC00117DF000017DEC0020410
+:2004F800F800283ADEFFFC04DFC00315DF000215DF000204E13FFF15E17FFE15E0BFFE17C0
+:2005000001C04004E1BFFF17100B883AD1201904002098C01000020E0005883A00000106CF
+:2005080000800044E037883ADFC00117DF000017DEC00204F800283ADEFFFD04DFC00215F7
+:20051000DF000115DF000104E13FFF15E0BFFF17100B883AD120190400209BC01000020E83
+:200518000005883A0000010600800044E037883ADFC00117DF000017DEC00204F800283AAD
+:20052000DEFFFD04DF000215DF000204E13FFF15E17FFE150005883AE037883ADF000017C5
+:20052800DEC00104F800283ADEFFFD04DFC00215DF000115DF000104E13FFF15000B883A48
+:20053000E13FFF1700214800E037883ADFC00117DF000017DEC00204F800283ADEFFFB04AC
+:20053800DF000415DF000404E13FFC1500800044E0BFFF15E0BFFC171004D0BAE0BFFE151A
+:20054000E0BFFC17108000CC00C001041885C83AE0BFFD15E0BFFD171080011810803FCC81
+:200548001007883AE0BFFE1710C5883AE0BFFE15E0BFFD17108001201000021EE0BFFD1776
+:20055000000001060005883AE0BFFD15E0BFFE17100494BAE0FFFF171884B03AE0BFFF15C8
+:20055800E0BFFD171004943AE0FFFF171884B03AE0BFFF15E0BFFF1710800094E0BFFF1534
+:20056000E0BFFF1700802835D0201D15D0201E150005883A00802B350001883AE037883A61
+:20056800DF000017DEC00104F800283ADEFFFF04DF000015D839883A008000440080283538
+:20057000D0201D15D0201E150005883A00802B350001883AE037883ADF000017DEC001044A
+:20057800F800283ADEFFF404DFC00B15DF000A15DF000A0400800884E0BFFF1500A1823474
+:20058000E0BFFE1500802637E0BFFD1500800037108000CCE0BFFC15008000371005D0BA02
+:2005880010800FCCE0BFFB15E1FFFC1701801184E17FFB17010000B42108F90400207E80C5
+:20059000E0BFFD171000091EE0BFFB171006923AE0BFFC171887883A008298F410800044D9
+:200598001885883AD0A01B1500000806E0BFFB171006923AE0BFFD171887883AE0BFFC17DD
+:2005A0001885883A10800044D0A01B15D0A01B171006D63AD0A01B171004D23A10BFC00C43
+:2005A8001886B03AD0A01B171004923A10803FEC1886B03AD0A01B171004963A1884B03ADA
+:2005B000D0A01C15E0BFFB171006923AE0BFFC171887883A00A182341885883AE0BFFE157C
+:2005B800000B883A010000B42105E60400219E00008000371081000C1004C03A11003FCC54
+:2005C000D0A01B17D8000415D8000315D800021500C4E204D8C00115D880001501C17B8423
+:2005C800E1BFFE17E17FFF170021A280D0A01B171006D63AD0A01B171004D43A11003FCCFD
+:2005D000D0A01B171004D23A11403FCCD0A01B1710803FCCD8800015280F883A200D883A5B
+:2005D800180B883A010000B42109000400207E8000800044008028350005883A00802B35D5
+:2005E0000001883AE037883ADFC00117DF000017DEC00204F800283ADEFFF804DFC0071520
+:2005E800DF000615DF000604E13FFB15E03FFF1500802A37D0A01D1500802937D0A01E15A7
+:2005F000D0A01D171080004C108000581000711ED0A01E171080400C1080402010803FCCD8
+:2005F800E0BFFE15D0A01E171084000C1084002010803FCCE0BFFD15E0BFFE1710002126E1
+:2006000000800044E0BFFF1500A40414108000371007883A00800234108040041880171EB0
+:2006080000A40514108000371007883A00BFFFF41886703A008040341880101E00A40A14FF
+:20061000108000371007883AD0A01C1718800B1EE0BFFF1710800B34E0BFFF15E0FFFF179A
+:2006180000BFFF7410BFFFC41884703AE0BFFF15E0BFFF1710800094E0BFFF15D0201E1556
+:20062000D0201D15E0BFFD171000422600800044E0BFFF15D0A01E171080200C10802018CD
+:2006280010003A1ED0A01E171082000C108200181000361E00A40914108000371004D63A4D
+:2006300010C03FCC00A40914108000371004D23A10BFC00C1886B03A00A40914108000377C
+:200638001004923A10803FEC1886B03A00A40914108000371004963A1884B03A1004D63A69
+:20064000108002181000211E00A6001410C00B0400A4001411000B04D0A01D171004D4BAEA
+:20064800108FFFCC117FFD4400800044D880001501C00044280D883A200B883A1809883A5A
+:200650000021D3C0D0A01D171004D4BA108FFFCC10BFFFC4100494BAE0FFFF171884B03AB7
+:20065800E0BFFF15D0A01D171004D43A1004943A108000ECE0FFFF171884B03AE0BFFF157D
+:20066000E0BFFF1710800094E0BFFF15D0201E15D0201D150005883A00802A3500802A3722
+:20066800E0BFFC15E0BFFC17103FFC1ED0A01E171000051EE0BFFF17108000540080283559
+:200670000005883A00802B350001883AE037883ADFC00117DF000017DEC00204F800283A7C
+:20067800DEFFFB04DFC00415DF000315DF000304E13FFF15E17FFE15D8000015E1FFFE1768
+:20068000E1BFFF17000B883A0009883A0021F4C00001883AE037883ADFC00117DF000017EE
+:20068800DEC00204F800283ADEFFFA04DFC00515DF000415DF000404E13FFF15E17FFE153A
+:20069000E1BFFD15E1FFFC15E080041700802035E080051700802135E080061700802235B1
+:20069800E0BFFD1700802435E0BFFE1700802535E080021700802635E0800317008027357E
+:2006A0000080004400802835E1FFFC17E1BFFD17E17FFE17E13FFF170021AB400001883A78
+:2006A800E037883ADFC00117DF000017DEC00204F800283ADEFFF704DF000815DF000804EF
+:2006B000E13FFB15E17FFA15E1BFF915E1FFF81500A2441410800037E0BFFF8D00C002043E
+:2006B80000A2501410C0003500A2001410800037E0BFFF8D00A2041410800037E0BFFF8DC3
+:2006C000E0BFFB171000041E00C4500400A2001410C000350000030600C0500400A2001491
+:2006C80010C0003500A0001410800037E0BFFE1500804034108012C400E0081418800035BD
+:2006D000E0BFFA171006943AE0BFF9171004D43A1885883A1006D63AE0BFFA171008943A8A
+:2006D800E0BFF9171004D43A2085883A1004D23A10BFC00C1886B03AE0BFFA171008943AF1
+:2006E000E0BFF9171004D43A2085883A1004923A10803FEC1886B03AE0BFFA171008943A09
+:2006E800E0BFF9171004D43A2085883A1004963A1884B03AE0BFFD15E0BFF9171004943A0E
+:2006F0001006D63AE0BFF9171004943A1004D23A10BFC00C1884B03AE0BFFC15E0FFFD174F
+:2006F80000A00C1410C00035E0FFFC1700A0101410C0003500C0030400A05C1410C0003586
+:20070000E0FFF81700A0141410C0003500C03C0400A01C1410C0003500C0040400A02014AD
+:2007080010C0003500C03C0400A0241410C0003500C0040400A0281410C0003500C0020480
+:2007100000A02C1410C0003500C0020400A0301410C0003500C0020400A0341410C0003582
+:2007180000C0010400A0381410C0003500A0E81410800037E0BFFE1500A0EC14108000378F
+:20072000E0BFFE150001883AE037883ADF000017DEC00104F800283ADEFFFB04DFC00415E4
+:20072800DF000315DF0003040080FBC4E0BFFF150080EC37E0BFFE15E0BFFE1710A0002CFD
+:20073000E0BFFD15002084801007883AE0BFFF1710C5883AE0BFFF150080EC37E0BFFE15A7
+:20073800E0BFFE1710A0002CE0BFFE150080E0371080004C1005003A10803FCC0080E0356D
+:20074000E0FFFE17E0BFFD171880041E002084801007883AE0BFFF1718BFEF36E0FFFE1796
+:20074800E0BFFD171884F03AE037883ADFC00117DF000017DEC00204F800283A208000CC28
+:20075000D8C000171000101E288000CC10000E1E30000B2639C5883A18C7883A108F883AC9
+:2007580018C7883A0011883A28800037208000354200004429CB883A20C9883A41BFFA1E5A
+:2007600000800044F800283A0005883AF800283A20001C16000F883A2800020E014BC83A91
+:2007680039C0005C200D883A2900192E0080080400C000440000020610001026280005169C
+:20077000294B883A10BFFFC418C7883A293FFA3618000A260005883A31400236314DC83A30
+:2007780010C4B03A1806D07A280AD07A183FFA1E380001260085C83AF800283A0005883A49
+:20078000003FFB060109C83A01C00044003FE20600C00044003FEF0620001816000F883A8A
+:200788002005883A280013162900172E0180080400C000440000020630000B26280005166E
+:20079000294B883A31BFFFC418C7883A293FFA36180005261806D07A114001361145C83A9C
+:20079800280AD07A183FFB1E380001260085C83AF800283A014BC83A003FEB060109C83A8B
+:2007A00001C00044003FE60600C00044003FF106200D883A2900152E280014160080080496
+:2007A80000C000440000020610000E2628000516294B883A10BFFFC418C7883A293FFA369D
+:2007B000180008260005883A31400236314DC83A10C4B03A1806D07A280AD07A183FFA1EE2
+:2007B800F800283A0005883AF800283A00C00044003FF4062005883A2900122E28001116CA
+:2007C0000180080400C000440000020630000B2628000516294B883A31BFFFC418C7883A52
+:2007C800293FFA36180006261806D07A114001361145C83A280AD07A183FFB1EF800283AA7
+:2007D000F800283A00C00044003FF706DEFFF904DFC00615DF000515DF000504E13FFF15C6
+:2007D800E17FFE15E1BFFD15E1FFFC15E0800217D8800015E1FFFC17E1BFFD17E17FFE17E9
+:2007E000E13FFF1700220FC0E037883ADFC00117DF000017DEC00204F800283ADEFFF90474
+:2007E800DF000615DF000604E13FFB15E17FFA15E0BFFA17E0BFFF150005303AE0BFFE15EB
+:2007F000E0FFFE1700BFFF841884703A1001703AE0BFFE17E0BFFD1500C00044E0BFFF1794
+:2007F8001884983A1007883AD0A01F171884B03AD0A01F15D0A01F17100170FAE0BFFD17F6
+:20080000E0BFFC15E0BFFC171001703A0005883A0001883AE037883ADF000017DEC00104BF
+:20080800F800283ADEFFF904DF000615DF000604E13FFB15E17FFA15E0BFFA17E0BFFF15B7
+:200810000005303AE0BFFE15E0FFFE1700BFFF841884703A1001703AE0BFFE17E0BFFD150B
+:2008180000C00044E0BFFF171884983A0084303A1007883AD0A01F171884703AD0A01F1542
+:20082000D0A01F17100170FAE0BFFD17E0BFFC15E0BFFC171001703A0005883A0001883A3D
+:20082800E037883ADF000017DEC00104F800283ADEFFFC04DF000315DF000304E13FFE15F7
+:20083000E17FFD15000530FAE0BFFF1500C00044E0BFFD171884983A1007883AE0BFFF17A1
+:200838001884703A1004C03A10803FCCE037883ADF000017DEC00104F800283ADEFFF5040F
+:20084000DFC00A15DF000915DF000904E13FFA15E17FF915E1BFF815E1FFF71500BFFA847E
+:20084800E0BFFF15E0BFF917E0BFFE15E0BFFE17108008081000241E0005303AE0BFFC15B7
+:20085000E0FFFC1700BFFF841884703A1001703AE0BFFC17E0BFFD15E0BFFE17100890FA9A
+:20085800E0FFF817008000B42085883A10C92815E0BFFE17100890FAE0FFF717008000B46A
+:200860002085883A10C92915E0BFF81710000526E0BFFE17100B883AE13FFA170021F9C075
+:2008680000000406E0BFFE17100B883AE13FFA1700220240E0BFFF15E0BFFD17E0BFFB152B
+:20087000E0BFFB171001703AE0BFFF17E037883ADFC00117DF000017DEC00204F800283AC3
+:20087800DEFFFC04DF000315DF000304E13FFF15E17FFE15E1BFFD15E0FFFE17E0BFFF17A4
+:2008800018800C2600000806E0FFFF1718800104E0BFFF15E0BFFE1711000104E13FFE153E
+:2008880018C0001710C00015E0FFFE17E0BFFD1718BFF51E0001883AE037883ADF00001759
+:20089000DEC00104F800283ADEFFFE04DFC00115DF000015D839883A018000B431891304EA
+:20089800014000B429490704010000B42109130400221E00018000B431808904014000B430
+:2008A00029400804010000B42100080400221E00018000B431890704014000B42948F2044B
+:2008A800010000B42108F20400221E0000222F00002231000001883AE037883ADFC0011725
+:2008B000DF000017DEC00204F800283ADEFFFF04DF000015D839883A000170FA0001883A5F
+:2008B800E037883ADF000017DEC00104F800283ADEFFFF04DF000015D839883A0001883AEA
+:2008C000E037883ADF000017DEC00104F800283ADEFFFF04DF000015D839883A0001883AE2
+:2008C800E037883ADF000017DEC00104F800283ADEFFFE04DF000115DF000104E13FFF1558
+:2008D000E0BFFF1710BFFE8410C004281800191E100690BA008000B41885883A1088D9173C
+:2008D8001000683A000223A4000223A4000223B4000223B4000223B4000223A4000223AC97
+:2008E000000223B4000223A4000223A4000223B4000223A4000223AC000223B4000223B468
+:2008E800000223A400800044000003060005883A000001060005883AE037883ADF000017F6
+:2008F000DEC00104F800283A5F626E752079736F000A6425535050300000000053505031F2
+:2008F800000000006B6361626E616C7064252065646F6E20632520656425204E0000000A27
+:200900007574657373745F7069203A6564253D702E64252E252E642500000A6400000000D3
+:200908000000000000000000000000000000000000000000000000000000000000000000CF
+:200910000000000000000000000000000000002A00021270000212D000021330000223D4F7
+:20091800000223DC000090000000980000080100FFFF000001000000FFFFFFFF0000000092
+:200920000000000000000000000000000000000000000000000000000000000000000000B7
+:200928000000000000000000000000000000000000000000000000000000000000000000AF
+:200930000000000000000000000000000000000000000000000000000000000000000000A7
+:2009380000000000000000000000000000000000000000000000000000000000000000009F
+:20094000000000000000000000000000000000000000000000000000000000000000000097
+:2009480000000000000000000000000000000000000000000000000000000000000000008F
+:20095000000000000000000000000000000000000000000000000000000000000000000087
+:2009580000000000000000000000000000000000000000000000000000000000000000007F
+:20096000000000000000000000000000000000000000000000000000000000000000000077
+:2009680000000000000000000000000000000000000000000000000000000000000000006F
+:20097000000000000000000000000000000000000000000000000000000000000000000067
+:2009780000000000000000000000000000000000000000000000000000000000000000005F
+:20098000000000000000000000000000000000000000000000000000000000000000000057
+:2009880000000000000000000000000000000000000000000000000000000000000000004F
+:20099000000000000000000000000000000000000000000000000000000000000000000047
+:2009980000000000000000000000000000000000000000000000000000000000000000003F
+:2009A000000000000000000000000000000000000000000000000000000000000000000037
+:2009A80000000000000000000000000000000000000000000000000000000000000000002F
+:2009B000000000000000000000000000000000000000000000000000000000000000000027
+:2009B80000000000000000000000000000000000000000000000000000000000000000001F
+:2009C000000000000000000000000000000000000000000000000000000000000000000017
+:2009C80000000000000000000000000000000000000000000000000000000000000000000F
+:2009D000000000000000000000000000000000000000000000000000000000000000000007
+:2009D8000000000000000000000000000000000000000000000000000000000000000000FF
+:2009E0000000000000000000000000000000000000000000000000000000000000000000F7
+:2009E8000000000000000000000000000000000000000000000000000000000000000000EF
+:2009F0000000000000000000000000000000000000000000000000000000000000000000E7
+:2009F8000000000000000000000000000000000000000000000000000000000000000000DF
+:200A00000000000000000000000000000000000000000000000000000000000000000000D6
+:200A08000000000000000000000000000000000000000000000000000000000000000000CE
+:200A10000000000000000000000000000000000000000000000000000000000000000000C6
+:200A18000000000000000000000000000000000000000000000000000000000000000000BE
+:200A20000000000000000000000000000000000000000000000000000000000000000000B6
+:200A28000000000000000000000000000000000000000000000000000000000000000000AE
+:200A30000000000000000000000000000000000000000000000000000000000000000000A6
+:200A380000000000000000000000000000000000000000000000000000000000000000009E
+:200A4000000000000000000000000000000000000000000000000000000000000000000096
+:200A480000000000000000000000000000000000000000000000000000000000000000008E
+:200A5000000000000000000000000000000000000000000000000000000000000000000086
+:200A580000000000000000000000000000000000000000000000000000000000000000007E
+:200A6000000000000000000000000000000000000000000000000000000000000000000076
+:200A680000000000000000000000000000000000000000000000000000000000000000006E
+:200A7000000000000000000000000000000000000000000000000000000000000000000066
+:200A780000000000000000000000000000000000000000000000000000000000000000005E
+:200A8000000000000000000000000000000000000000000000000000000000000000000056
+:200A880000000000000000000000000000000000000000000000000000000000000000004E
+:200A9000000000000000000000000000000000000000000000000000000000000000000046
+:200A980000000000000000000000000000000000000000000000000000000000000000003E
+:200AA000000000000000000000000000000000000000000000000000000000000000000036
+:200AA80000000000000000000000000000000000000000000000000000000000000000002E
+:200AB000000000000000000000000000000000000000000000000000000000000000000026
+:200AB80000000000000000000000000000000000000000000000000000000000000000001E
+:200AC000000000000000000000000000000000000000000000000000000000000000000016
+:200AC80000000000000000000000000000000000000000000000000000000000000000000E
+:200AD000000000000000000000000000000000000000000000000000000000000000000006
+:200AD8000000000000000000000000000000000000000000000000000000000000000000FE
+:200AE0000000000000000000000000000000000000000000000000000000000000000000F6
+:200AE8000000000000000000000000000000000000000000000000000000000000000000EE
+:200AF0000000000000000000000000000000000000000000000000000000000000000000E6
+:200AF8000000000000000000000000000000000000000000000000000000000000000000DE
+:200B00000000000000000000000000000000000000000000000000000000000000000000D5
+:200B08000000000000000000000000000000000000000000000000000000000000000000CD
+:200B10000000000000000000000000000000000000000000000000000000000000000000C5
+:200B18000000000000000000000000000000000000000000000000000000000000000000BD
+:200B20000000000000000000000000000000000000000000000000000000000000000000B5
+:200B28000000000000000000000000000000000000000000000000000000000000000000AD
+:200B30000000000000000000000000000000000000000000000000000000000000000000A5
+:200B380000000000000000000000000000000000000000000000000000000000000000009D
+:200B4000000000000000000000000000000000000000000000000000000000000000000095
+:200B480000000000000000000000000000000000000000000000000000000000000000008D
+:200B5000000000000000000000000000000000000000000000000000000000000000000085
+:200B580000000000000000000000000000000000000000000000000000000000000000007D
+:200B6000000000000000000000000000000000000000000000000000000000000000000075
+:200B680000000000000000000000000000000000000000000000000000000000000000006D
+:200B7000000000000000000000000000000000000000000000000000000000000000000065
+:200B780000000000000000000000000000000000000000000000000000000000000000005D
+:200B8000000000000000000000000000000000000000000000000000000000000000000055
+:200B880000000000000000000000000000000000000000000000000000000000000000004D
+:200B9000000000000000000000000000000000000000000000000000000000000000000045
+:200B980000000000000000000000000000000000000000000000000000000000000000003D
+:200BA000000000000000000000000000000000000000000000000000000000000000000035
+:200BA80000000000000000000000000000000000000000000000000000000000000000002D
+:200BB000000000000000000000000000000000000000000000000000000000000000000025
+:200BB80000000000000000000000000000000000000000000000000000000000000000001D
+:200BC000000000000000000000000000000000000000000000000000000000000000000015
+:200BC80000000000000000000000000000000000000000000000000000000000000000000D
+:200BD000000000000000000000000000000000000000000000000000000000000000000005
+:200BD8000000000000000000000000000000000000000000000000000000000000000000FD
+:200BE0000000000000000000000000000000000000000000000000000000000000000000F5
+:200BE8000000000000000000000000000000000000000000000000000000000000000000ED
+:200BF0000000000000000000000000000000000000000000000000000000000000000000E5
+:200BF8000000000000000000000000000000000000000000000000000000000000000000DD
+:200C00000000000000000000000000000000000000000000000000000000000000000000D4
+:200C08000000000000000000000000000000000000000000000000000000000000000000CC
+:200C10000000000000000000000000000000000000000000000000000000000000000000C4
+:200C18000000000000000000000000000000000000000000000000000000000000000000BC
+:200C20000000000000000000000000000000000000000000000000000000000000000000B4
+:200C28000000000000000000000000000000000000000000000000000000000000000000AC
+:200C30000000000000000000000000000000000000000000000000000000000000000000A4
+:200C380000000000000000000000000000000000000000000000000000000000000000009C
+:200C4000000000000000000000000000000000000000000000000000000000000000000094
+:200C480000000000000000000000000000000000000000000000000000000000000000008C
+:200C5000000000000000000000000000000000000000000000000000000000000000000084
+:200C580000000000000000000000000000000000000000000000000000000000000000007C
+:200C6000000000000000000000000000000000000000000000000000000000000000000074
+:200C680000000000000000000000000000000000000000000000000000000000000000006C
+:200C7000000000000000000000000000000000000000000000000000000000000000000064
+:200C780000000000000000000000000000000000000000000000000000000000000000005C
+:200C8000000000000000000000000000000000000000000000000000000000000000000054
+:200C880000000000000000000000000000000000000000000000000000000000000000004C
+:200C9000000000000000000000000000000000000000000000000000000000000000000044
+:200C980000000000000000000000000000000000000000000000000000000000000000003C
+:200CA000000000000000000000000000000000000000000000000000000000000000000034
+:200CA80000000000000000000000000000000000000000000000000000000000000000002C
+:200CB000000000000000000000000000000000000000000000000000000000000000000024
+:200CB80000000000000000000000000000000000000000000000000000000000000000001C
+:200CC000000000000000000000000000000000000000000000000000000000000000000014
+:200CC80000000000000000000000000000000000000000000000000000000000000000000C
+:200CD000000000000000000000000000000000000000000000000000000000000000000004
+:200CD8000000000000000000000000000000000000000000000000000000000000000000FC
+:200CE0000000000000000000000000000000000000000000000000000000000000000000F4
+:200CE8000000000000000000000000000000000000000000000000000000000000000000EC
+:200CF0000000000000000000000000000000000000000000000000000000000000000000E4
+:200CF8000000000000000000000000000000000000000000000000000000000000000000DC
+:200D00000000000000000000000000000000000000000000000000000000000000000000D3
+:200D08000000000000000000000000000000000000000000000000000000000000000000CB
+:200D10000000000000000000000000000000000000000000000000000000000000000000C3
+:200D18000000000000000000000000000000000000000000000000000000000000000000BB
+:200D20000000000000000000000000000000000000000000000000000000000000000000B3
+:200D28000000000000000000000000000000000000000000000000000000000000000000AB
+:200D30000000000000000000000000000000000000000000000000000000000000000000A3
+:200D380000000000000000000000000000000000000000000000000000000000000000009B
+:200D4000000000000000000000000000000000000000000000000000000000000000000093
+:200D480000000000000000000000000000000000000000000000000000000000000000008B
+:200D5000000000000000000000000000000000000000000000000000000000000000000083
+:200D580000000000000000000000000000000000000000000000000000000000000000007B
+:200D6000000000000000000000000000000000000000000000000000000000000000000073
+:200D680000000000000000000000000000000000000000000000000000000000000000006B
+:200D7000000000000000000000000000000000000000000000000000000000000000000063
+:200D780000000000000000000000000000000000000000000000000000000000000000005B
+:200D8000000000000000000000000000000000000000000000000000000000000000000053
+:200D880000000000000000000000000000000000000000000000000000000000000000004B
+:200D9000000000000000000000000000000000000000000000000000000000000000000043
+:200D980000000000000000000000000000000000000000000000000000000000000000003B
+:200DA000000000000000000000000000000000000000000000000000000000000000000033
+:200DA80000000000000000000000000000000000000000000000000000000000000000002B
+:200DB000000000000000000000000000000000000000000000000000000000000000000023
+:200DB80000000000000000000000000000000000000000000000000000000000000000001B
+:200DC000000000000000000000000000000000000000000000000000000000000000000013
+:200DC80000000000000000000000000000000000000000000000000000000000000000000B
+:200DD000000000000000000000000000000000000000000000000000000000000000000003
+:200DD8000000000000000000000000000000000000000000000000000000000000000000FB
+:200DE0000000000000000000000000000000000000000000000000000000000000000000F3
+:200DE8000000000000000000000000000000000000000000000000000000000000000000EB
+:200DF0000000000000000000000000000000000000000000000000000000000000000000E3
+:200DF8000000000000000000000000000000000000000000000000000000000000000000DB
+:200E00000000000000000000000000000000000000000000000000000000000000000000D2
+:200E08000000000000000000000000000000000000000000000000000000000000000000CA
+:200E10000000000000000000000000000000000000000000000000000000000000000000C2
+:200E18000000000000000000000000000000000000000000000000000000000000000000BA
+:200E20000000000000000000000000000000000000000000000000000000000000000000B2
+:200E28000000000000000000000000000000000000000000000000000000000000000000AA
+:200E30000000000000000000000000000000000000000000000000000000000000000000A2
+:200E380000000000000000000000000000000000000000000000000000000000000000009A
+:200E4000000000000000000000000000000000000000000000000000000000000000000092
+:200E480000000000000000000000000000000000000000000000000000000000000000008A
+:200E5000000000000000000000000000000000000000000000000000000000000000000082
+:200E580000000000000000000000000000000000000000000000000000000000000000007A
+:200E6000000000000000000000000000000000000000000000000000000000000000000072
+:200E680000000000000000000000000000000000000000000000000000000000000000006A
+:200E7000000000000000000000000000000000000000000000000000000000000000000062
+:200E780000000000000000000000000000000000000000000000000000000000000000005A
+:200E8000000000000000000000000000000000000000000000000000000000000000000052
+:200E880000000000000000000000000000000000000000000000000000000000000000004A
+:200E9000000000000000000000000000000000000000000000000000000000000000000042
+:200E980000000000000000000000000000000000000000000000000000000000000000003A
+:200EA000000000000000000000000000000000000000000000000000000000000000000032
+:200EA80000000000000000000000000000000000000000000000000000000000000000002A
+:200EB000000000000000000000000000000000000000000000000000000000000000000022
+:200EB80000000000000000000000000000000000000000000000000000000000000000001A
+:200EC000000000000000000000000000000000000000000000000000000000000000000012
+:200EC80000000000000000000000000000000000000000000000000000000000000000000A
+:200ED000000000000000000000000000000000000000000000000000000000000000000002
+:200ED8000000000000000000000000000000000000000000000000000000000000000000FA
+:200EE0000000000000000000000000000000000000000000000000000000000000000000F2
+:200EE8000000000000000000000000000000000000000000000000000000000000000000EA
+:200EF0000000000000000000000000000000000000000000000000000000000000000000E2
+:200EF8000000000000000000000000000000000000000000000000000000000000000000DA
+:200F00000000000000000000000000000000000000000000000000000000000000000000D1
+:200F08000000000000000000000000000000000000000000000000000000000000000000C9
+:200F10000000000000000000000000000000000000000000000000000000000000000000C1
+:200F18000000000000000000000000000000000000000000000000000000000000000000B9
+:200F20000000000000000000000000000000000000000000000000000000000000000000B1
+:200F28000000000000000000000000000000000000000000000000000000000000000000A9
+:200F30000000000000000000000000000000000000000000000000000000000000000000A1
+:200F3800000000000000000000000000000000000000000000000000000000000000000099
+:200F4000000000000000000000000000000000000000000000000000000000000000000091
+:200F4800000000000000000000000000000000000000000000000000000000000000000089
+:200F5000000000000000000000000000000000000000000000000000000000000000000081
+:200F5800000000000000000000000000000000000000000000000000000000000000000079
+:200F6000000000000000000000000000000000000000000000000000000000000000000071
+:200F6800000000000000000000000000000000000000000000000000000000000000000069
+:200F7000000000000000000000000000000000000000000000000000000000000000000061
+:200F7800000000000000000000000000000000000000000000000000000000000000000059
+:200F8000000000000000000000000000000000000000000000000000000000000000000051
+:200F8800000000000000000000000000000000000000000000000000000000000000000049
+:200F9000000000000000000000000000000000000000000000000000000000000000000041
+:200F9800000000000000000000000000000000000000000000000000000000000000000039
+:200FA000000000000000000000000000000000000000000000000000000000000000000031
+:200FA800000000000000000000000000000000000000000000000000000000000000000029
+:200FB000000000000000000000000000000000000000000000000000000000000000000021
+:200FB800000000000000000000000000000000000000000000000000000000000000000019
+:200FC000000000000000000000000000000000000000000000000000000000000000000011
+:200FC800000000000000000000000000000000000000000000000000000000000000000009
+:200FD000000000000000000000000000000000000000000000000000000000000000000001
+:200FD8000000000000000000000000000000000000000000000000000000000000000000F9
+:200FE0000000000000000000000000000000000000000000000000000000000000000000F1
+:200FE8000000000000000000000000000000000000000000000000000000000000000000E9
+:200FF0000000000000000000000000000000000000000000000000000000000000000000E1
+:200FF8000000000000000000000000000000000000000000000000000000000000000000D9
+:201000000000000000000000000000000000000000000000000000000000000000000000D0
+:201008000000000000000000000000000000000000000000000000000000000000000000C8
+:201010000000000000000000000000000000000000000000000000000000000000000000C0
+:201018000000000000000000000000000000000000000000000000000000000000000000B8
+:201020000000000000000000000000000000000000000000000000000000000000000000B0
+:201028000000000000000000000000000000000000000000000000000000000000000000A8
+:201030000000000000000000000000000000000000000000000000000000000000000000A0
+:20103800000000000000000000000000000000000000000000000000000000000000000098
+:20104000000000000000000000000000000000000000000000000000000000000000000090
+:20104800000000000000000000000000000000000000000000000000000000000000000088
+:20105000000000000000000000000000000000000000000000000000000000000000000080
+:20105800000000000000000000000000000000000000000000000000000000000000000078
+:20106000000000000000000000000000000000000000000000000000000000000000000070
+:20106800000000000000000000000000000000000000000000000000000000000000000068
+:20107000000000000000000000000000000000000000000000000000000000000000000060
+:20107800000000000000000000000000000000000000000000000000000000000000000058
+:20108000000000000000000000000000000000000000000000000000000000000000000050
+:20108800000000000000000000000000000000000000000000000000000000000000000048
+:20109000000000000000000000000000000000000000000000000000000000000000000040
+:20109800000000000000000000000000000000000000000000000000000000000000000038
+:2010A000000000000000000000000000000000000000000000000000000000000000000030
+:2010A800000000000000000000000000000000000000000000000000000000000000000028
+:2010B000000000000000000000000000000000000000000000000000000000000000000020
+:2010B800000000000000000000000000000000000000000000000000000000000000000018
+:2010C000000000000000000000000000000000000000000000000000000000000000000010
+:2010C800000000000000000000000000000000000000000000000000000000000000000008
+:2010D000000000000000000000000000000000000000000000000000000000000000000000
+:2010D8000000000000000000000000000000000000000000000000000000000000000000F8
+:2010E0000000000000000000000000000000000000000000000000000000000000000000F0
+:2010E8000000000000000000000000000000000000000000000000000000000000000000E8
+:2010F0000000000000000000000000000000000000000000000000000000000000000000E0
+:2010F8000000000000000000000000000000000000000000000000000000000000000000D8
+:201100000000000000000000000000000000000000000000000000000000000000000000CF
+:201108000000000000000000000000000000000000000000000000000000000000000000C7
+:201110000000000000000000000000000000000000000000000000000000000000000000BF
+:201118000000000000000000000000000000000000000000000000000000000000000000B7
+:201120000000000000000000000000000000000000000000000000000000000000000000AF
+:201128000000000000000000000000000000000000000000000000000000000000000000A7
+:2011300000000000000000000000000000000000000000000000000000000000000000009F
+:20113800000000000000000000000000000000000000000000000000000000000000000097
+:2011400000000000000000000000000000000000000000000000000000000000000000008F
+:20114800000000000000000000000000000000000000000000000000000000000000000087
+:2011500000000000000000000000000000000000000000000000000000000000000000007F
+:20115800000000000000000000000000000000000000000000000000000000000000000077
+:2011600000000000000000000000000000000000000000000000000000000000000000006F
+:20116800000000000000000000000000000000000000000000000000000000000000000067
+:2011700000000000000000000000000000000000000000000000000000000000000000005F
+:20117800000000000000000000000000000000000000000000000000000000000000000057
+:2011800000000000000000000000000000000000000000000000000000000000000000004F
+:20118800000000000000000000000000000000000000000000000000000000000000000047
+:2011900000000000000000000000000000000000000000000000000000000000000000003F
+:20119800000000000000000000000000000000000000000000000000000000000000000037
+:2011A00000000000000000000000000000000000000000000000000000000000000000002F
+:2011A800000000000000000000000000000000000000000000000000000000000000000027
+:2011B00000000000000000000000000000000000000000000000000000000000000000001F
+:2011B800000000000000000000000000000000000000000000000000000000000000000017
+:2011C00000000000000000000000000000000000000000000000000000000000000000000F
+:2011C800000000000000000000000000000000000000000000000000000000000000000007
+:2011D0000000000000000000000000000000000000000000000000000000000000000000FF
+:2011D8000000000000000000000000000000000000000000000000000000000000000000F7
+:2011E0000000000000000000000000000000000000000000000000000000000000000000EF
+:2011E8000000000000000000000000000000000000000000000000000000000000000000E7
+:2011F0000000000000000000000000000000000000000000000000000000000000000000DF
+:2011F8000000000000000000000000000000000000000000000000000000000000000000D7
+:201200000000000000000000000000000000000000000000000000000000000000000000CE
+:201208000000000000000000000000000000000000000000000000000000000000000000C6
+:201210000000000000000000000000000000000000000000000000000000000000000000BE
+:201218000000000000000000000000000000000000000000000000000000000000000000B6
+:201220000000000000000000000000000000000000000000000000000000000000000000AE
+:201228000000000000000000000000000000000000000000000000000000000000000000A6
+:2012300000000000000000000000000000000000000000000000000000000000000000009E
+:20123800000000000000000000000000000000000000000000000000000000000000000096
+:2012400000000000000000000000000000000000000000000000000000000000000000008E
+:20124800000000000000000000000000000000000000000000000000000000000000000086
+:2012500000000000000000000000000000000000000000000000000000000000000000007E
+:20125800000000000000000000000000000000000000000000000000000000000000000076
+:2012600000000000000000000000000000000000000000000000000000000000000000006E
+:20126800000000000000000000000000000000000000000000000000000000000000000066
+:2012700000000000000000000000000000000000000000000000000000000000000000005E
+:20127800000000000000000000000000000000000000000000000000000000000000000056
+:2012800000000000000000000000000000000000000000000000000000000000000000004E
+:20128800000000000000000000000000000000000000000000000000000000000000000046
+:2012900000000000000000000000000000000000000000000000000000000000000000003E
+:20129800000000000000000000000000000000000000000000000000000000000000000036
+:2012A00000000000000000000000000000000000000000000000000000000000000000002E
+:2012A800000000000000000000000000000000000000000000000000000000000000000026
+:2012B00000000000000000000000000000000000000000000000000000000000000000001E
+:2012B800000000000000000000000000000000000000000000000000000000000000000016
+:2012C00000000000000000000000000000000000000000000000000000000000000000000E
+:2012C800000000000000000000000000000000000000000000000000000000000000000006
+:2012D0000000000000000000000000000000000000000000000000000000000000000000FE
+:2012D8000000000000000000000000000000000000000000000000000000000000000000F6
+:2012E0000000000000000000000000000000000000000000000000000000000000000000EE
+:2012E8000000000000000000000000000000000000000000000000000000000000000000E6
+:2012F0000000000000000000000000000000000000000000000000000000000000000000DE
+:2012F8000000000000000000000000000000000000000000000000000000000000000000D6
+:201300000000000000000000000000000000000000000000000000000000000000000000CD
+:201308000000000000000000000000000000000000000000000000000000000000000000C5
+:201310000000000000000000000000000000000000000000000000000000000000000000BD
+:201318000000000000000000000000000000000000000000000000000000000000000000B5
+:201320000000000000000000000000000000000000000000000000000000000000000000AD
+:201328000000000000000000000000000000000000000000000000000000000000000000A5
+:2013300000000000000000000000000000000000000000000000000000000000000000009D
+:20133800000000000000000000000000000000000000000000000000000000000000000095
+:2013400000000000000000000000000000000000000000000000000000000000000000008D
+:20134800000000000000000000000000000000000000000000000000000000000000000085
+:2013500000000000000000000000000000000000000000000000000000000000000000007D
+:20135800000000000000000000000000000000000000000000000000000000000000000075
+:2013600000000000000000000000000000000000000000000000000000000000000000006D
+:20136800000000000000000000000000000000000000000000000000000000000000000065
+:2013700000000000000000000000000000000000000000000000000000000000000000005D
+:20137800000000000000000000000000000000000000000000000000000000000000000055
+:2013800000000000000000000000000000000000000000000000000000000000000000004D
+:20138800000000000000000000000000000000000000000000000000000000000000000045
+:2013900000000000000000000000000000000000000000000000000000000000000000003D
+:20139800000000000000000000000000000000000000000000000000000000000000000035
+:2013A00000000000000000000000000000000000000000000000000000000000000000002D
+:2013A800000000000000000000000000000000000000000000000000000000000000000025
+:2013B00000000000000000000000000000000000000000000000000000000000000000001D
+:2013B800000000000000000000000000000000000000000000000000000000000000000015
+:2013C00000000000000000000000000000000000000000000000000000000000000000000D
+:2013C800000000000000000000000000000000000000000000000000000000000000000005
+:2013D0000000000000000000000000000000000000000000000000000000000000000000FD
+:2013D8000000000000000000000000000000000000000000000000000000000000000000F5
+:2013E0000000000000000000000000000000000000000000000000000000000000000000ED
+:2013E8000000000000000000000000000000000000000000000000000000000000000000E5
+:2013F0000000000000000000000000000000000000000000000000000000000000000000DD
+:2013F8000000000000000000000000000000000000000000000000000000000000000000D5
+:201400000000000000000000000000000000000000000000000000000000000000000000CC
+:201408000000000000000000000000000000000000000000000000000000000000000000C4
+:201410000000000000000000000000000000000000000000000000000000000000000000BC
+:201418000000000000000000000000000000000000000000000000000000000000000000B4
+:201420000000000000000000000000000000000000000000000000000000000000000000AC
+:201428000000000000000000000000000000000000000000000000000000000000000000A4
+:2014300000000000000000000000000000000000000000000000000000000000000000009C
+:20143800000000000000000000000000000000000000000000000000000000000000000094
+:2014400000000000000000000000000000000000000000000000000000000000000000008C
+:20144800000000000000000000000000000000000000000000000000000000000000000084
+:2014500000000000000000000000000000000000000000000000000000000000000000007C
+:20145800000000000000000000000000000000000000000000000000000000000000000074
+:2014600000000000000000000000000000000000000000000000000000000000000000006C
+:20146800000000000000000000000000000000000000000000000000000000000000000064
+:2014700000000000000000000000000000000000000000000000000000000000000000005C
+:20147800000000000000000000000000000000000000000000000000000000000000000054
+:2014800000000000000000000000000000000000000000000000000000000000000000004C
+:20148800000000000000000000000000000000000000000000000000000000000000000044
+:2014900000000000000000000000000000000000000000000000000000000000000000003C
+:20149800000000000000000000000000000000000000000000000000000000000000000034
+:2014A00000000000000000000000000000000000000000000000000000000000000000002C
+:2014A800000000000000000000000000000000000000000000000000000000000000000024
+:2014B00000000000000000000000000000000000000000000000000000000000000000001C
+:2014B800000000000000000000000000000000000000000000000000000000000000000014
+:2014C00000000000000000000000000000000000000000000000000000000000000000000C
+:2014C800000000000000000000000000000000000000000000000000000000000000000004
+:2014D0000000000000000000000000000000000000000000000000000000000000000000FC
+:2014D8000000000000000000000000000000000000000000000000000000000000000000F4
+:2014E0000000000000000000000000000000000000000000000000000000000000000000EC
+:2014E8000000000000000000000000000000000000000000000000000000000000000000E4
+:2014F0000000000000000000000000000000000000000000000000000000000000000000DC
+:2014F8000000000000000000000000000000000000000000000000000000000000000000D4
+:201500000000000000000000000000000000000000000000000000000000000000000000CB
+:201508000000000000000000000000000000000000000000000000000000000000000000C3
+:201510000000000000000000000000000000000000000000000000000000000000000000BB
+:201518000000000000000000000000000000000000000000000000000000000000000000B3
+:201520000000000000000000000000000000000000000000000000000000000000000000AB
+:201528000000000000000000000000000000000000000000000000000000000000000000A3
+:2015300000000000000000000000000000000000000000000000000000000000000000009B
+:20153800000000000000000000000000000000000000000000000000000000000000000093
+:2015400000000000000000000000000000000000000000000000000000000000000000008B
+:20154800000000000000000000000000000000000000000000000000000000000000000083
+:2015500000000000000000000000000000000000000000000000000000000000000000007B
+:20155800000000000000000000000000000000000000000000000000000000000000000073
+:2015600000000000000000000000000000000000000000000000000000000000000000006B
+:20156800000000000000000000000000000000000000000000000000000000000000000063
+:2015700000000000000000000000000000000000000000000000000000000000000000005B
+:20157800000000000000000000000000000000000000000000000000000000000000000053
+:2015800000000000000000000000000000000000000000000000000000000000000000004B
+:20158800000000000000000000000000000000000000000000000000000000000000000043
+:2015900000000000000000000000000000000000000000000000000000000000000000003B
+:20159800000000000000000000000000000000000000000000000000000000000000000033
+:2015A00000000000000000000000000000000000000000000000000000000000000000002B
+:2015A800000000000000000000000000000000000000000000000000000000000000000023
+:2015B00000000000000000000000000000000000000000000000000000000000000000001B
+:2015B800000000000000000000000000000000000000000000000000000000000000000013
+:2015C00000000000000000000000000000000000000000000000000000000000000000000B
+:2015C800000000000000000000000000000000000000000000000000000000000000000003
+:2015D0000000000000000000000000000000000000000000000000000000000000000000FB
+:2015D8000000000000000000000000000000000000000000000000000000000000000000F3
+:2015E0000000000000000000000000000000000000000000000000000000000000000000EB
+:2015E8000000000000000000000000000000000000000000000000000000000000000000E3
+:2015F0000000000000000000000000000000000000000000000000000000000000000000DB
+:2015F8000000000000000000000000000000000000000000000000000000000000000000D3
+:201600000000000000000000000000000000000000000000000000000000000000000000CA
+:201608000000000000000000000000000000000000000000000000000000000000000000C2
+:201610000000000000000000000000000000000000000000000000000000000000000000BA
+:201618000000000000000000000000000000000000000000000000000000000000000000B2
+:201620000000000000000000000000000000000000000000000000000000000000000000AA
+:201628000000000000000000000000000000000000000000000000000000000000000000A2
+:2016300000000000000000000000000000000000000000000000000000000000000000009A
+:20163800000000000000000000000000000000000000000000000000000000000000000092
+:2016400000000000000000000000000000000000000000000000000000000000000000008A
+:20164800000000000000000000000000000000000000000000000000000000000000000082
+:2016500000000000000000000000000000000000000000000000000000000000000000007A
+:20165800000000000000000000000000000000000000000000000000000000000000000072
+:2016600000000000000000000000000000000000000000000000000000000000000000006A
+:20166800000000000000000000000000000000000000000000000000000000000000000062
+:2016700000000000000000000000000000000000000000000000000000000000000000005A
+:20167800000000000000000000000000000000000000000000000000000000000000000052
+:2016800000000000000000000000000000000000000000000000000000000000000000004A
+:20168800000000000000000000000000000000000000000000000000000000000000000042
+:2016900000000000000000000000000000000000000000000000000000000000000000003A
+:20169800000000000000000000000000000000000000000000000000000000000000000032
+:2016A00000000000000000000000000000000000000000000000000000000000000000002A
+:2016A800000000000000000000000000000000000000000000000000000000000000000022
+:2016B00000000000000000000000000000000000000000000000000000000000000000001A
+:2016B800000000000000000000000000000000000000000000000000000000000000000012
+:2016C00000000000000000000000000000000000000000000000000000000000000000000A
+:2016C800000000000000000000000000000000000000000000000000000000000000000002
+:2016D0000000000000000000000000000000000000000000000000000000000000000000FA
+:2016D8000000000000000000000000000000000000000000000000000000000000000000F2
+:2016E0000000000000000000000000000000000000000000000000000000000000000000EA
+:2016E8000000000000000000000000000000000000000000000000000000000000000000E2
+:2016F0000000000000000000000000000000000000000000000000000000000000000000DA
+:2016F8000000000000000000000000000000000000000000000000000000000000000000D2
+:201700000000000000000000000000000000000000000000000000000000000000000000C9
+:201708000000000000000000000000000000000000000000000000000000000000000000C1
+:201710000000000000000000000000000000000000000000000000000000000000000000B9
+:201718000000000000000000000000000000000000000000000000000000000000000000B1
+:201720000000000000000000000000000000000000000000000000000000000000000000A9
+:201728000000000000000000000000000000000000000000000000000000000000000000A1
+:20173000000000000000000000000000000000000000000000000000000000000000000099
+:20173800000000000000000000000000000000000000000000000000000000000000000091
+:20174000000000000000000000000000000000000000000000000000000000000000000089
+:20174800000000000000000000000000000000000000000000000000000000000000000081
+:20175000000000000000000000000000000000000000000000000000000000000000000079
+:20175800000000000000000000000000000000000000000000000000000000000000000071
+:20176000000000000000000000000000000000000000000000000000000000000000000069
+:20176800000000000000000000000000000000000000000000000000000000000000000061
+:20177000000000000000000000000000000000000000000000000000000000000000000059
+:20177800000000000000000000000000000000000000000000000000000000000000000051
+:20178000000000000000000000000000000000000000000000000000000000000000000049
+:20178800000000000000000000000000000000000000000000000000000000000000000041
+:20179000000000000000000000000000000000000000000000000000000000000000000039
+:20179800000000000000000000000000000000000000000000000000000000000000000031
+:2017A000000000000000000000000000000000000000000000000000000000000000000029
+:2017A800000000000000000000000000000000000000000000000000000000000000000021
+:2017B000000000000000000000000000000000000000000000000000000000000000000019
+:2017B800000000000000000000000000000000000000000000000000000000000000000011
+:2017C000000000000000000000000000000000000000000000000000000000000000000009
+:2017C800000000000000000000000000000000000000000000000000000000000000000001
+:2017D0000000000000000000000000000000000000000000000000000000000000000000F9
+:2017D8000000000000000000000000000000000000000000000000000000000000000000F1
+:2017E0000000000000000000000000000000000000000000000000000000000000000000E9
+:2017E8000000000000000000000000000000000000000000000000000000000000000000E1
+:2017F0000000000000000000000000000000000000000000000000000000000000000000D9
+:2017F8000000000000000000000000000000000000000000000000000000000000000000D1
+:201800000000000000000000000000000000000000000000000000000000000000000000C8
+:201808000000000000000000000000000000000000000000000000000000000000000000C0
+:201810000000000000000000000000000000000000000000000000000000000000000000B8
+:201818000000000000000000000000000000000000000000000000000000000000000000B0
+:201820000000000000000000000000000000000000000000000000000000000000000000A8
+:201828000000000000000000000000000000000000000000000000000000000000000000A0
+:20183000000000000000000000000000000000000000000000000000000000000000000098
+:20183800000000000000000000000000000000000000000000000000000000000000000090
+:20184000000000000000000000000000000000000000000000000000000000000000000088
+:20184800000000000000000000000000000000000000000000000000000000000000000080
+:20185000000000000000000000000000000000000000000000000000000000000000000078
+:20185800000000000000000000000000000000000000000000000000000000000000000070
+:20186000000000000000000000000000000000000000000000000000000000000000000068
+:20186800000000000000000000000000000000000000000000000000000000000000000060
+:20187000000000000000000000000000000000000000000000000000000000000000000058
+:20187800000000000000000000000000000000000000000000000000000000000000000050
+:20188000000000000000000000000000000000000000000000000000000000000000000048
+:20188800000000000000000000000000000000000000000000000000000000000000000040
+:20189000000000000000000000000000000000000000000000000000000000000000000038
+:20189800000000000000000000000000000000000000000000000000000000000000000030
+:2018A000000000000000000000000000000000000000000000000000000000000000000028
+:2018A800000000000000000000000000000000000000000000000000000000000000000020
+:2018B000000000000000000000000000000000000000000000000000000000000000000018
+:2018B800000000000000000000000000000000000000000000000000000000000000000010
+:2018C000000000000000000000000000000000000000000000000000000000000000000008
+:2018C800000000000000000000000000000000000000000000000000000000000000000000
+:2018D0000000000000000000000000000000000000000000000000000000000000000000F8
+:2018D8000000000000000000000000000000000000000000000000000000000000000000F0
+:2018E0000000000000000000000000000000000000000000000000000000000000000000E8
+:2018E8000000000000000000000000000000000000000000000000000000000000000000E0
+:2018F0000000000000000000000000000000000000000000000000000000000000000000D8
+:2018F8000000000000000000000000000000000000000000000000000000000000000000D0
+:201900000000000000000000000000000000000000000000000000000000000000000000C7
+:201908000000000000000000000000000000000000000000000000000000000000000000BF
+:201910000000000000000000000000000000000000000000000000000000000000000000B7
+:201918000000000000000000000000000000000000000000000000000000000000000000AF
+:201920000000000000000000000000000000000000000000000000000000000000000000A7
+:2019280000000000000000000000000000000000000000000000000000000000000000009F
+:20193000000000000000000000000000000000000000000000000000000000000000000097
+:2019380000000000000000000000000000000000000000000000000000000000000000008F
+:20194000000000000000000000000000000000000000000000000000000000000000000087
+:2019480000000000000000000000000000000000000000000000000000000000000000007F
+:20195000000000000000000000000000000000000000000000000000000000000000000077
+:2019580000000000000000000000000000000000000000000000000000000000000000006F
+:20196000000000000000000000000000000000000000000000000000000000000000000067
+:2019680000000000000000000000000000000000000000000000000000000000000000005F
+:20197000000000000000000000000000000000000000000000000000000000000000000057
+:2019780000000000000000000000000000000000000000000000000000000000000000004F
+:20198000000000000000000000000000000000000000000000000000000000000000000047
+:2019880000000000000000000000000000000000000000000000000000000000000000003F
+:20199000000000000000000000000000000000000000000000000000000000000000000037
+:2019980000000000000000000000000000000000000000000000000000000000000000002F
+:2019A000000000000000000000000000000000000000000000000000000000000000000027
+:2019A80000000000000000000000000000000000000000000000000000000000000000001F
+:2019B000000000000000000000000000000000000000000000000000000000000000000017
+:2019B80000000000000000000000000000000000000000000000000000000000000000000F
+:2019C000000000000000000000000000000000000000000000000000000000000000000007
+:2019C8000000000000000000000000000000000000000000000000000000000000000000FF
+:2019D0000000000000000000000000000000000000000000000000000000000000000000F7
+:2019D8000000000000000000000000000000000000000000000000000000000000000000EF
+:2019E0000000000000000000000000000000000000000000000000000000000000000000E7
+:2019E8000000000000000000000000000000000000000000000000000000000000000000DF
+:2019F0000000000000000000000000000000000000000000000000000000000000000000D7
+:2019F8000000000000000000000000000000000000000000000000000000000000000000CF
+:201A00000000000000000000000000000000000000000000000000000000000000000000C6
+:201A08000000000000000000000000000000000000000000000000000000000000000000BE
+:201A10000000000000000000000000000000000000000000000000000000000000000000B6
+:201A18000000000000000000000000000000000000000000000000000000000000000000AE
+:201A20000000000000000000000000000000000000000000000000000000000000000000A6
+:201A280000000000000000000000000000000000000000000000000000000000000000009E
+:201A3000000000000000000000000000000000000000000000000000000000000000000096
+:201A380000000000000000000000000000000000000000000000000000000000000000008E
+:201A4000000000000000000000000000000000000000000000000000000000000000000086
+:201A480000000000000000000000000000000000000000000000000000000000000000007E
+:201A5000000000000000000000000000000000000000000000000000000000000000000076
+:201A580000000000000000000000000000000000000000000000000000000000000000006E
+:201A6000000000000000000000000000000000000000000000000000000000000000000066
+:201A680000000000000000000000000000000000000000000000000000000000000000005E
+:201A7000000000000000000000000000000000000000000000000000000000000000000056
+:201A780000000000000000000000000000000000000000000000000000000000000000004E
+:201A8000000000000000000000000000000000000000000000000000000000000000000046
+:201A880000000000000000000000000000000000000000000000000000000000000000003E
+:201A9000000000000000000000000000000000000000000000000000000000000000000036
+:201A980000000000000000000000000000000000000000000000000000000000000000002E
+:201AA000000000000000000000000000000000000000000000000000000000000000000026
+:201AA80000000000000000000000000000000000000000000000000000000000000000001E
+:201AB000000000000000000000000000000000000000000000000000000000000000000016
+:201AB80000000000000000000000000000000000000000000000000000000000000000000E
+:201AC000000000000000000000000000000000000000000000000000000000000000000006
+:201AC8000000000000000000000000000000000000000000000000000000000000000000FE
+:201AD0000000000000000000000000000000000000000000000000000000000000000000F6
+:201AD8000000000000000000000000000000000000000000000000000000000000000000EE
+:201AE0000000000000000000000000000000000000000000000000000000000000000000E6
+:201AE8000000000000000000000000000000000000000000000000000000000000000000DE
+:201AF0000000000000000000000000000000000000000000000000000000000000000000D6
+:201AF8000000000000000000000000000000000000000000000000000000000000000000CE
+:201B00000000000000000000000000000000000000000000000000000000000000000000C5
+:201B08000000000000000000000000000000000000000000000000000000000000000000BD
+:201B10000000000000000000000000000000000000000000000000000000000000000000B5
+:201B18000000000000000000000000000000000000000000000000000000000000000000AD
+:201B20000000000000000000000000000000000000000000000000000000000000000000A5
+:201B280000000000000000000000000000000000000000000000000000000000000000009D
+:201B3000000000000000000000000000000000000000000000000000000000000000000095
+:201B380000000000000000000000000000000000000000000000000000000000000000008D
+:201B4000000000000000000000000000000000000000000000000000000000000000000085
+:201B480000000000000000000000000000000000000000000000000000000000000000007D
+:201B5000000000000000000000000000000000000000000000000000000000000000000075
+:201B580000000000000000000000000000000000000000000000000000000000000000006D
+:201B6000000000000000000000000000000000000000000000000000000000000000000065
+:201B680000000000000000000000000000000000000000000000000000000000000000005D
+:201B7000000000000000000000000000000000000000000000000000000000000000000055
+:201B780000000000000000000000000000000000000000000000000000000000000000004D
+:201B8000000000000000000000000000000000000000000000000000000000000000000045
+:201B880000000000000000000000000000000000000000000000000000000000000000003D
+:201B9000000000000000000000000000000000000000000000000000000000000000000035
+:201B980000000000000000000000000000000000000000000000000000000000000000002D
+:201BA000000000000000000000000000000000000000000000000000000000000000000025
+:201BA80000000000000000000000000000000000000000000000000000000000000000001D
+:201BB000000000000000000000000000000000000000000000000000000000000000000015
+:201BB80000000000000000000000000000000000000000000000000000000000000000000D
+:201BC000000000000000000000000000000000000000000000000000000000000000000005
+:201BC8000000000000000000000000000000000000000000000000000000000000000000FD
+:201BD0000000000000000000000000000000000000000000000000000000000000000000F5
+:201BD8000000000000000000000000000000000000000000000000000000000000000000ED
+:201BE0000000000000000000000000000000000000000000000000000000000000000000E5
+:201BE8000000000000000000000000000000000000000000000000000000000000000000DD
+:201BF0000000000000000000000000000000000000000000000000000000000000000000D5
+:201BF8000000000000000000000000000000000000000000000000000000000000000000CD
+:201C00000000000000000000000000000000000000000000000000000000000000000000C4
+:201C08000000000000000000000000000000000000000000000000000000000000000000BC
+:201C10000000000000000000000000000000000000000000000000000000000000000000B4
+:201C18000000000000000000000000000000000000000000000000000000000000000000AC
+:201C20000000000000000000000000000000000000000000000000000000000000000000A4
+:201C280000000000000000000000000000000000000000000000000000000000000000009C
+:201C3000000000000000000000000000000000000000000000000000000000000000000094
+:201C380000000000000000000000000000000000000000000000000000000000000000008C
+:201C4000000000000000000000000000000000000000000000000000000000000000000084
+:201C480000000000000000000000000000000000000000000000000000000000000000007C
+:201C5000000000000000000000000000000000000000000000000000000000000000000074
+:201C580000000000000000000000000000000000000000000000000000000000000000006C
+:201C6000000000000000000000000000000000000000000000000000000000000000000064
+:201C680000000000000000000000000000000000000000000000000000000000000000005C
+:201C7000000000000000000000000000000000000000000000000000000000000000000054
+:201C780000000000000000000000000000000000000000000000000000000000000000004C
+:201C8000000000000000000000000000000000000000000000000000000000000000000044
+:201C880000000000000000000000000000000000000000000000000000000000000000003C
+:201C9000000000000000000000000000000000000000000000000000000000000000000034
+:201C980000000000000000000000000000000000000000000000000000000000000000002C
+:201CA000000000000000000000000000000000000000000000000000000000000000000024
+:201CA80000000000000000000000000000000000000000000000000000000000000000001C
+:201CB000000000000000000000000000000000000000000000000000000000000000000014
+:201CB80000000000000000000000000000000000000000000000000000000000000000000C
+:201CC000000000000000000000000000000000000000000000000000000000000000000004
+:201CC8000000000000000000000000000000000000000000000000000000000000000000FC
+:201CD0000000000000000000000000000000000000000000000000000000000000000000F4
+:201CD8000000000000000000000000000000000000000000000000000000000000000000EC
+:201CE0000000000000000000000000000000000000000000000000000000000000000000E4
+:201CE8000000000000000000000000000000000000000000000000000000000000000000DC
+:201CF0000000000000000000000000000000000000000000000000000000000000000000D4
+:201CF8000000000000000000000000000000000000000000000000000000000000000000CC
+:201D00000000000000000000000000000000000000000000000000000000000000000000C3
+:201D08000000000000000000000000000000000000000000000000000000000000000000BB
+:201D10000000000000000000000000000000000000000000000000000000000000000000B3
+:201D18000000000000000000000000000000000000000000000000000000000000000000AB
+:201D20000000000000000000000000000000000000000000000000000000000000000000A3
+:201D280000000000000000000000000000000000000000000000000000000000000000009B
+:201D3000000000000000000000000000000000000000000000000000000000000000000093
+:201D380000000000000000000000000000000000000000000000000000000000000000008B
+:201D4000000000000000000000000000000000000000000000000000000000000000000083
+:201D480000000000000000000000000000000000000000000000000000000000000000007B
+:201D5000000000000000000000000000000000000000000000000000000000000000000073
+:201D580000000000000000000000000000000000000000000000000000000000000000006B
+:201D6000000000000000000000000000000000000000000000000000000000000000000063
+:201D680000000000000000000000000000000000000000000000000000000000000000005B
+:201D7000000000000000000000000000000000000000000000000000000000000000000053
+:201D780000000000000000000000000000000000000000000000000000000000000000004B
+:201D8000000000000000000000000000000000000000000000000000000000000000000043
+:201D880000000000000000000000000000000000000000000000000000000000000000003B
+:201D9000000000000000000000000000000000000000000000000000000000000000000033
+:201D980000000000000000000000000000000000000000000000000000000000000000002B
+:201DA000000000000000000000000000000000000000000000000000000000000000000023
+:201DA80000000000000000000000000000000000000000000000000000000000000000001B
+:201DB000000000000000000000000000000000000000000000000000000000000000000013
+:201DB80000000000000000000000000000000000000000000000000000000000000000000B
+:201DC000000000000000000000000000000000000000000000000000000000000000000003
+:201DC8000000000000000000000000000000000000000000000000000000000000000000FB
+:201DD0000000000000000000000000000000000000000000000000000000000000000000F3
+:201DD8000000000000000000000000000000000000000000000000000000000000000000EB
+:201DE0000000000000000000000000000000000000000000000000000000000000000000E3
+:201DE8000000000000000000000000000000000000000000000000000000000000000000DB
+:201DF0000000000000000000000000000000000000000000000000000000000000000000D3
+:201DF8000000000000000000000000000000000000000000000000000000000000000000CB
+:201E00000000000000000000000000000000000000000000000000000000000000000000C2
+:201E08000000000000000000000000000000000000000000000000000000000000000000BA
+:201E10000000000000000000000000000000000000000000000000000000000000000000B2
+:201E18000000000000000000000000000000000000000000000000000000000000000000AA
+:201E20000000000000000000000000000000000000000000000000000000000000000000A2
+:201E280000000000000000000000000000000000000000000000000000000000000000009A
+:201E3000000000000000000000000000000000000000000000000000000000000000000092
+:201E380000000000000000000000000000000000000000000000000000000000000000008A
+:201E4000000000000000000000000000000000000000000000000000000000000000000082
+:201E480000000000000000000000000000000000000000000000000000000000000000007A
+:201E5000000000000000000000000000000000000000000000000000000000000000000072
+:201E580000000000000000000000000000000000000000000000000000000000000000006A
+:201E6000000000000000000000000000000000000000000000000000000000000000000062
+:201E680000000000000000000000000000000000000000000000000000000000000000005A
+:201E7000000000000000000000000000000000000000000000000000000000000000000052
+:201E780000000000000000000000000000000000000000000000000000000000000000004A
+:201E8000000000000000000000000000000000000000000000000000000000000000000042
+:201E880000000000000000000000000000000000000000000000000000000000000000003A
+:201E9000000000000000000000000000000000000000000000000000000000000000000032
+:201E980000000000000000000000000000000000000000000000000000000000000000002A
+:201EA000000000000000000000000000000000000000000000000000000000000000000022
+:201EA80000000000000000000000000000000000000000000000000000000000000000001A
+:201EB000000000000000000000000000000000000000000000000000000000000000000012
+:201EB80000000000000000000000000000000000000000000000000000000000000000000A
+:201EC000000000000000000000000000000000000000000000000000000000000000000002
+:201EC8000000000000000000000000000000000000000000000000000000000000000000FA
+:201ED0000000000000000000000000000000000000000000000000000000000000000000F2
+:201ED8000000000000000000000000000000000000000000000000000000000000000000EA
+:201EE0000000000000000000000000000000000000000000000000000000000000000000E2
+:201EE8000000000000000000000000000000000000000000000000000000000000000000DA
+:201EF0000000000000000000000000000000000000000000000000000000000000000000D2
+:201EF8000000000000000000000000000000000000000000000000000000000000000000CA
+:201F00000000000000000000000000000000000000000000000000000000000000000000C1
+:201F08000000000000000000000000000000000000000000000000000000000000000000B9
+:201F10000000000000000000000000000000000000000000000000000000000000000000B1
+:201F18000000000000000000000000000000000000000000000000000000000000000000A9
+:201F20000000000000000000000000000000000000000000000000000000000000000000A1
+:201F2800000000000000000000000000000000000000000000000000000000000000000099
+:201F3000000000000000000000000000000000000000000000000000000000000000000091
+:201F3800000000000000000000000000000000000000000000000000000000000000000089
+:201F4000000000000000000000000000000000000000000000000000000000000000000081
+:201F4800000000000000000000000000000000000000000000000000000000000000000079
+:201F5000000000000000000000000000000000000000000000000000000000000000000071
+:201F5800000000000000000000000000000000000000000000000000000000000000000069
+:201F6000000000000000000000000000000000000000000000000000000000000000000061
+:201F6800000000000000000000000000000000000000000000000000000000000000000059
+:201F7000000000000000000000000000000000000000000000000000000000000000000051
+:201F7800000000000000000000000000000000000000000000000000000000000000000049
+:201F8000000000000000000000000000000000000000000000000000000000000000000041
+:201F8800000000000000000000000000000000000000000000000000000000000000000039
+:201F9000000000000000000000000000000000000000000000000000000000000000000031
+:201F9800000000000000000000000000000000000000000000000000000000000000000029
+:201FA000000000000000000000000000000000000000000000000000000000000000000021
+:201FA800000000000000000000000000000000000000000000000000000000000000000019
+:201FB000000000000000000000000000000000000000000000000000000000000000000011
+:201FB800000000000000000000000000000000000000000000000000000000000000000009
+:201FC000000000000000000000000000000000000000000000000000000000000000000001
+:201FC8000000000000000000000000000000000000000000000000000000000000000000F9
+:201FD0000000000000000000000000000000000000000000000000000000000000000000F1
+:201FD8000000000000000000000000000000000000000000000000000000000000000000E9
+:201FE0000000000000000000000000000000000000000000000000000000000000000000E1
+:201FE8000000000000000000000000000000000000000000000000000000000000000000D9
+:201FF0000000000000000000000000000000000000000000000000000000000000000000D1
+:201FF8000000000000000000000000000000000000000000000000000000000000000000C9
+:202000000000000000000000000000000000000000000000000000000000000000000000C0
+:202008000000000000000000000000000000000000000000000000000000000000000000B8
+:202010000000000000000000000000000000000000000000000000000000000000000000B0
+:202018000000000000000000000000000000000000000000000000000000000000000000A8
+:202020000000000000000000000000000000000000000000000000000000000000000000A0
+:20202800000000000000000000000000000000000000000000000000000000000000000098
+:20203000000000000000000000000000000000000000000000000000000000000000000090
+:20203800000000000000000000000000000000000000000000000000000000000000000088
+:20204000000000000000000000000000000000000000000000000000000000000000000080
+:20204800000000000000000000000000000000000000000000000000000000000000000078
+:20205000000000000000000000000000000000000000000000000000000000000000000070
+:20205800000000000000000000000000000000000000000000000000000000000000000068
+:20206000000000000000000000000000000000000000000000000000000000000000000060
+:20206800000000000000000000000000000000000000000000000000000000000000000058
+:20207000000000000000000000000000000000000000000000000000000000000000000050
+:20207800000000000000000000000000000000000000000000000000000000000000000048
+:20208000000000000000000000000000000000000000000000000000000000000000000040
+:20208800000000000000000000000000000000000000000000000000000000000000000038
+:20209000000000000000000000000000000000000000000000000000000000000000000030
+:20209800000000000000000000000000000000000000000000000000000000000000000028
+:2020A000000000000000000000000000000000000000000000000000000000000000000020
+:2020A800000000000000000000000000000000000000000000000000000000000000000018
+:2020B000000000000000000000000000000000000000000000000000000000000000000010
+:2020B800000000000000000000000000000000000000000000000000000000000000000008
+:2020C000000000000000000000000000000000000000000000000000000000000000000000
+:2020C8000000000000000000000000000000000000000000000000000000000000000000F8
+:2020D0000000000000000000000000000000000000000000000000000000000000000000F0
+:2020D8000000000000000000000000000000000000000000000000000000000000000000E8
+:2020E0000000000000000000000000000000000000000000000000000000000000000000E0
+:2020E8000000000000000000000000000000000000000000000000000000000000000000D8
+:2020F0000000000000000000000000000000000000000000000000000000000000000000D0
+:2020F8000000000000000000000000000000000000000000000000000000000000000000C8
+:202100000000000000000000000000000000000000000000000000000000000000000000BF
+:202108000000000000000000000000000000000000000000000000000000000000000000B7
+:202110000000000000000000000000000000000000000000000000000000000000000000AF
+:202118000000000000000000000000000000000000000000000000000000000000000000A7
+:2021200000000000000000000000000000000000000000000000000000000000000000009F
+:20212800000000000000000000000000000000000000000000000000000000000000000097
+:2021300000000000000000000000000000000000000000000000000000000000000000008F
+:20213800000000000000000000000000000000000000000000000000000000000000000087
+:2021400000000000000000000000000000000000000000000000000000000000000000007F
+:20214800000000000000000000000000000000000000000000000000000000000000000077
+:2021500000000000000000000000000000000000000000000000000000000000000000006F
+:20215800000000000000000000000000000000000000000000000000000000000000000067
+:2021600000000000000000000000000000000000000000000000000000000000000000005F
+:20216800000000000000000000000000000000000000000000000000000000000000000057
+:2021700000000000000000000000000000000000000000000000000000000000000000004F
+:20217800000000000000000000000000000000000000000000000000000000000000000047
+:2021800000000000000000000000000000000000000000000000000000000000000000003F
+:20218800000000000000000000000000000000000000000000000000000000000000000037
+:2021900000000000000000000000000000000000000000000000000000000000000000002F
+:20219800000000000000000000000000000000000000000000000000000000000000000027
+:2021A00000000000000000000000000000000000000000000000000000000000000000001F
+:2021A800000000000000000000000000000000000000000000000000000000000000000017
+:2021B00000000000000000000000000000000000000000000000000000000000000000000F
+:2021B800000000000000000000000000000000000000000000000000000000000000000007
+:2021C0000000000000000000000000000000000000000000000000000000000000000000FF
+:2021C8000000000000000000000000000000000000000000000000000000000000000000F7
+:2021D0000000000000000000000000000000000000000000000000000000000000000000EF
+:2021D8000000000000000000000000000000000000000000000000000000000000000000E7
+:2021E0000000000000000000000000000000000000000000000000000000000000000000DF
+:2021E8000000000000000000000000000000000000000000000000000000000000000000D7
+:2021F0000000000000000000000000000000000000000000000000000000000000000000CF
+:2021F8000000000000000000000000000000000000000000000000000000000000000000C7
+:202200000000000000000000000000000000000000000000000000000000000000000000BE
+:202208000000000000000000000000000000000000000000000000000000000000000000B6
+:202210000000000000000000000000000000000000000000000000000000000000000000AE
+:202218000000000000000000000000000000000000000000000000000000000000000000A6
+:2022200000000000000000000000000000000000000000000000000000000000000000009E
+:20222800000000000000000000000000000000000000000000000000000000000000000096
+:2022300000000000000000000000000000000000000000000000000000000000000000008E
+:20223800000000000000000000000000000000000000000000000000000000000000000086
+:2022400000000000000000000000000000000000000000000000000000000000000000007E
+:20224800000000000000000000000000000000000000000000000000000000000000000076
+:2022500000000000000000000000000000000000000000000000000000000000000000006E
+:20225800000000000000000000000000000000000000000000000000000000000000000066
+:2022600000000000000000000000000000000000000000000000000000000000000000005E
+:20226800000000000000000000000000000000000000000000000000000000000000000056
+:2022700000000000000000000000000000000000000000000000000000000000000000004E
+:20227800000000000000000000000000000000000000000000000000000000000000000046
+:2022800000000000000000000000000000000000000000000000000000000000000000003E
+:20228800000000000000000000000000000000000000000000000000000000000000000036
+:2022900000000000000000000000000000000000000000000000000000000000000000002E
+:20229800000000000000000000000000000000000000000000000000000000000000000026
+:2022A00000000000000000000000000000000000000000000000000000000000000000001E
+:2022A800000000000000000000000000000000000000000000000000000000000000000016
+:2022B00000000000000000000000000000000000000000000000000000000000000000000E
+:2022B800000000000000000000000000000000000000000000000000000000000000000006
+:2022C0000000000000000000000000000000000000000000000000000000000000000000FE
+:2022C8000000000000000000000000000000000000000000000000000000000000000000F6
+:2022D0000000000000000000000000000000000000000000000000000000000000000000EE
+:2022D8000000000000000000000000000000000000000000000000000000000000000000E6
+:2022E0000000000000000000000000000000000000000000000000000000000000000000DE
+:2022E8000000000000000000000000000000000000000000000000000000000000000000D6
+:2022F0000000000000000000000000000000000000000000000000000000000000000000CE
+:2022F8000000000000000000000000000000000000000000000000000000000000000000C6
+:202300000000000000000000000000000000000000000000000000000000000000000000BD
+:202308000000000000000000000000000000000000000000000000000000000000000000B5
+:202310000000000000000000000000000000000000000000000000000000000000000000AD
+:202318000000000000000000000000000000000000000000000000000000000000000000A5
+:2023200000000000000000000000000000000000000000000000000000000000000000009D
+:20232800000000000000000000000000000000000000000000000000000000000000000095
+:2023300000000000000000000000000000000000000000000000000000000000000000008D
+:20233800000000000000000000000000000000000000000000000000000000000000000085
+:2023400000000000000000000000000000000000000000000000000000000000000000007D
+:20234800000000000000000000000000000000000000000000000000000000000000000075
+:2023500000000000000000000000000000000000000000000000000000000000000000006D
+:20235800000000000000000000000000000000000000000000000000000000000000000065
+:2023600000000000000000000000000000000000000000000000000000000000000000005D
+:20236800000000000000000000000000000000000000000000000000000000000000000055
+:2023700000000000000000000000000000000000000000000000000000000000000000004D
+:20237800000000000000000000000000000000000000000000000000000000000000000045
+:2023800000000000000000000000000000000000000000000000000000000000000000003D
+:20238800000000000000000000000000000000000000000000000000000000000000000035
+:2023900000000000000000000000000000000000000000000000000000000000000000002D
+:20239800000000000000000000000000000000000000000000000000000000000000000025
+:2023A00000000000000000000000000000000000000000000000000000000000000000001D
+:2023A800000000000000000000000000000000000000000000000000000000000000000015
+:2023B00000000000000000000000000000000000000000000000000000000000000000000D
+:2023B800000000000000000000000000000000000000000000000000000000000000000005
+:2023C0000000000000000000000000000000000000000000000000000000000000000000FD
+:2023C8000000000000000000000000000000000000000000000000000000000000000000F5
+:2023D0000000000000000000000000000000000000000000000000000000000000000000ED
+:2023D8000000000000000000000000000000000000000000000000000000000000000000E5
+:2023E0000000000000000000000000000000000000000000000000000000000000000000DD
+:2023E8000000000000000000000000000000000000000000000000000000000000000000D5
+:2023F0000000000000000000000000000000000000000000000000000000000000000000CD
+:2023F8000000000000000000000000000000000000000000000000000000000000000000C5
+:202400000000000000000000000000000000000000000000000000000000000000000000BC
+:202408000000000000000000000000000000000000000000000000000000000000000000B4
+:202410000000000000000000000000000000000000000000000000000000000000000000AC
+:202418000000000000000000000000000000000000000000000000000000000000000000A4
+:2024200000000000000000000000000000000000000000000000000000000000000000009C
+:20242800000000000000000000000000000000000000000000000000000000000000000094
+:2024300000000000000000000000000000000000000000000000000000000000000000008C
+:20243800000000000000000000000000000000000000000000000000000000000000000084
+:2024400000000000000000000000000000000000000000000000000000000000000000007C
+:20244800000000000000000000000000000000000000000000000000000000000000000074
+:2024500000000000000000000000000000000000000000000000000000000000000000006C
+:20245800000000000000000000000000000000000000000000000000000000000000000064
+:2024600000000000000000000000000000000000000000000000000000000000000000005C
+:20246800000000000000000000000000000000000000000000000000000000000000000054
+:2024700000000000000000000000000000000000000000000000000000000000000000004C
+:20247800000000000000000000000000000000000000000000000000000000000000000044
+:2024800000000000000000000000000000000000000000000000000000000000000000003C
+:20248800000000000000000000000000000000000000000000000000000000000000000034
+:2024900000000000000000000000000000000000000000000000000000000000000000002C
+:20249800000000000000000000000000000000000000000000000000000000000000000024
+:2024A00000000000000000000000000000000000000000000000000000000000000000001C
+:2024A800000000000000000000000000000000000000000000000000000000000000000014
+:2024B00000000000000000000000000000000000000000000000000000000000000000000C
+:2024B800000000000000000000000000000000000000000000000000000000000000000004
+:2024C0000000000000000000000000000000000000000000000000000000000000000000FC
+:2024C8000000000000000000000000000000000000000000000000000000000000000000F4
+:2024D0000000000000000000000000000000000000000000000000000000000000000000EC
+:2024D8000000000000000000000000000000000000000000000000000000000000000000E4
+:2024E0000000000000000000000000000000000000000000000000000000000000000000DC
+:2024E8000000000000000000000000000000000000000000000000000000000000000000D4
+:2024F0000000000000000000000000000000000000000000000000000000000000000000CC
+:2024F8000000000000000000000000000000000000000000000000000000000000000000C4
+:202500000000000000000000000000000000000000000000000000000000000000000000BB
+:202508000000000000000000000000000000000000000000000000000000000000000000B3
+:202510000000000000000000000000000000000000000000000000000000000000000000AB
+:202518000000000000000000000000000000000000000000000000000000000000000000A3
+:2025200000000000000000000000000000000000000000000000000000000000000000009B
+:20252800000000000000000000000000000000000000000000000000000000000000000093
+:2025300000000000000000000000000000000000000000000000000000000000000000008B
+:20253800000000000000000000000000000000000000000000000000000000000000000083
+:2025400000000000000000000000000000000000000000000000000000000000000000007B
+:20254800000000000000000000000000000000000000000000000000000000000000000073
+:2025500000000000000000000000000000000000000000000000000000000000000000006B
+:20255800000000000000000000000000000000000000000000000000000000000000000063
+:2025600000000000000000000000000000000000000000000000000000000000000000005B
+:20256800000000000000000000000000000000000000000000000000000000000000000053
+:2025700000000000000000000000000000000000000000000000000000000000000000004B
+:20257800000000000000000000000000000000000000000000000000000000000000000043
+:2025800000000000000000000000000000000000000000000000000000000000000000003B
+:20258800000000000000000000000000000000000000000000000000000000000000000033
+:2025900000000000000000000000000000000000000000000000000000000000000000002B
+:20259800000000000000000000000000000000000000000000000000000000000000000023
+:2025A00000000000000000000000000000000000000000000000000000000000000000001B
+:2025A800000000000000000000000000000000000000000000000000000000000000000013
+:2025B00000000000000000000000000000000000000000000000000000000000000000000B
+:2025B800000000000000000000000000000000000000000000000000000000000000000003
+:2025C0000000000000000000000000000000000000000000000000000000000000000000FB
+:2025C8000000000000000000000000000000000000000000000000000000000000000000F3
+:2025D0000000000000000000000000000000000000000000000000000000000000000000EB
+:2025D8000000000000000000000000000000000000000000000000000000000000000000E3
+:2025E0000000000000000000000000000000000000000000000000000000000000000000DB
+:2025E8000000000000000000000000000000000000000000000000000000000000000000D3
+:2025F0000000000000000000000000000000000000000000000000000000000000000000CB
+:2025F8000000000000000000000000000000000000000000000000000000000000000000C3
+:202600000000000000000000000000000000000000000000000000000000000000000000BA
+:202608000000000000000000000000000000000000000000000000000000000000000000B2
+:202610000000000000000000000000000000000000000000000000000000000000000000AA
+:202618000000000000000000000000000000000000000000000000000000000000000000A2
+:2026200000000000000000000000000000000000000000000000000000000000000000009A
+:20262800000000000000000000000000000000000000000000000000000000000000000092
+:2026300000000000000000000000000000000000000000000000000000000000000000008A
+:20263800000000000000000000000000000000000000000000000000000000000000000082
+:2026400000000000000000000000000000000000000000000000000000000000000000007A
+:20264800000000000000000000000000000000000000000000000000000000000000000072
+:2026500000000000000000000000000000000000000000000000000000000000000000006A
+:20265800000000000000000000000000000000000000000000000000000000000000000062
+:2026600000000000000000000000000000000000000000000000000000000000000000005A
+:20266800000000000000000000000000000000000000000000000000000000000000000052
+:2026700000000000000000000000000000000000000000000000000000000000000000004A
+:20267800000000000000000000000000000000000000000000000000000000000000000042
+:2026800000000000000000000000000000000000000000000000000000000000000000003A
+:20268800000000000000000000000000000000000000000000000000000000000000000032
+:2026900000000000000000000000000000000000000000000000000000000000000000002A
+:20269800000000000000000000000000000000000000000000000000000000000000000022
+:2026A00000000000000000000000000000000000000000000000000000000000000000001A
+:2026A800000000000000000000000000000000000000000000000000000000000000000012
+:2026B00000000000000000000000000000000000000000000000000000000000000000000A
+:2026B800000000000000000000000000000000000000000000000000000000000000000002
+:2026C0000000000000000000000000000000000000000000000000000000000000000000FA
+:2026C8000000000000000000000000000000000000000000000000000000000000000000F2
+:2026D0000000000000000000000000000000000000000000000000000000000000000000EA
+:2026D8000000000000000000000000000000000000000000000000000000000000000000E2
+:2026E0000000000000000000000000000000000000000000000000000000000000000000DA
+:2026E8000000000000000000000000000000000000000000000000000000000000000000D2
+:2026F0000000000000000000000000000000000000000000000000000000000000000000CA
+:2026F8000000000000000000000000000000000000000000000000000000000000000000C2
+:202700000000000000000000000000000000000000000000000000000000000000000000B9
+:202708000000000000000000000000000000000000000000000000000000000000000000B1
+:202710000000000000000000000000000000000000000000000000000000000000000000A9
+:202718000000000000000000000000000000000000000000000000000000000000000000A1
+:20272000000000000000000000000000000000000000000000000000000000000000000099
+:20272800000000000000000000000000000000000000000000000000000000000000000091
+:20273000000000000000000000000000000000000000000000000000000000000000000089
+:20273800000000000000000000000000000000000000000000000000000000000000000081
+:20274000000000000000000000000000000000000000000000000000000000000000000079
+:20274800000000000000000000000000000000000000000000000000000000000000000071
+:20275000000000000000000000000000000000000000000000000000000000000000000069
+:20275800000000000000000000000000000000000000000000000000000000000000000061
+:20276000000000000000000000000000000000000000000000000000000000000000000059
+:20276800000000000000000000000000000000000000000000000000000000000000000051
+:20277000000000000000000000000000000000000000000000000000000000000000000049
+:20277800000000000000000000000000000000000000000000000000000000000000000041
+:20278000000000000000000000000000000000000000000000000000000000000000000039
+:20278800000000000000000000000000000000000000000000000000000000000000000031
+:20279000000000000000000000000000000000000000000000000000000000000000000029
+:20279800000000000000000000000000000000000000000000000000000000000000000021
+:2027A000000000000000000000000000000000000000000000000000000000000000000019
+:2027A800000000000000000000000000000000000000000000000000000000000000000011
+:2027B000000000000000000000000000000000000000000000000000000000000000000009
+:2027B800000000000000000000000000000000000000000000000000000000000000000001
+:2027C0000000000000000000000000000000000000000000000000000000000000000000F9
+:2027C8000000000000000000000000000000000000000000000000000000000000000000F1
+:2027D0000000000000000000000000000000000000000000000000000000000000000000E9
+:2027D8000000000000000000000000000000000000000000000000000000000000000000E1
+:2027E0000000000000000000000000000000000000000000000000000000000000000000D9
+:2027E8000000000000000000000000000000000000000000000000000000000000000000D1
+:2027F0000000000000000000000000000000000000000000000000000000000000000000C9
+:2027F8000000000000000000000000000000000000000000000000000000000000000000C1
+:202800000000000000000000000000000000000000000000000000000000000000000000B8
+:202808000000000000000000000000000000000000000000000000000000000000000000B0
+:202810000000000000000000000000000000000000000000000000000000000000000000A8
+:202818000000000000000000000000000000000000000000000000000000000000000000A0
+:20282000000000000000000000000000000000000000000000000000000000000000000098
+:20282800000000000000000000000000000000000000000000000000000000000000000090
+:20283000000000000000000000000000000000000000000000000000000000000000000088
+:20283800000000000000000000000000000000000000000000000000000000000000000080
+:20284000000000000000000000000000000000000000000000000000000000000000000078
+:20284800000000000000000000000000000000000000000000000000000000000000000070
+:20285000000000000000000000000000000000000000000000000000000000000000000068
+:20285800000000000000000000000000000000000000000000000000000000000000000060
+:20286000000000000000000000000000000000000000000000000000000000000000000058
+:20286800000000000000000000000000000000000000000000000000000000000000000050
+:20287000000000000000000000000000000000000000000000000000000000000000000048
+:20287800000000000000000000000000000000000000000000000000000000000000000040
+:20288000000000000000000000000000000000000000000000000000000000000000000038
+:20288800000000000000000000000000000000000000000000000000000000000000000030
+:20289000000000000000000000000000000000000000000000000000000000000000000028
+:20289800000000000000000000000000000000000000000000000000000000000000000020
+:2028A000000000000000000000000000000000000000000000000000000000000000000018
+:2028A800000000000000000000000000000000000000000000000000000000000000000010
+:2028B000000000000000000000000000000000000000000000000000000000000000000008
+:2028B800000000000000000000000000000000000000000000000000000000000000000000
+:2028C0000000000000000000000000000000000000000000000000000000000000000000F8
+:2028C8000000000000000000000000000000000000000000000000000000000000000000F0
+:2028D0000000000000000000000000000000000000000000000000000000000000000000E8
+:2028D8000000000000000000000000000000000000000000000000000000000000000000E0
+:2028E0000000000000000000000000000000000000000000000000000000000000000000D8
+:2028E8000000000000000000000000000000000000000000000000000000000000000000D0
+:2028F0000000000000000000000000000000000000000000000000000000000000000000C8
+:2028F8000000000000000000000000000000000000000000000000000000000000000000C0
+:202900000000000000000000000000000000000000000000000000000000000000000000B7
+:202908000000000000000000000000000000000000000000000000000000000000000000AF
+:202910000000000000000000000000000000000000000000000000000000000000000000A7
+:2029180000000000000000000000000000000000000000000000000000000000000000009F
+:20292000000000000000000000000000000000000000000000000000000000000000000097
+:2029280000000000000000000000000000000000000000000000000000000000000000008F
+:20293000000000000000000000000000000000000000000000000000000000000000000087
+:2029380000000000000000000000000000000000000000000000000000000000000000007F
+:20294000000000000000000000000000000000000000000000000000000000000000000077
+:2029480000000000000000000000000000000000000000000000000000000000000000006F
+:20295000000000000000000000000000000000000000000000000000000000000000000067
+:2029580000000000000000000000000000000000000000000000000000000000000000005F
+:20296000000000000000000000000000000000000000000000000000000000000000000057
+:2029680000000000000000000000000000000000000000000000000000000000000000004F
+:20297000000000000000000000000000000000000000000000000000000000000000000047
+:2029780000000000000000000000000000000000000000000000000000000000000000003F
+:20298000000000000000000000000000000000000000000000000000000000000000000037
+:2029880000000000000000000000000000000000000000000000000000000000000000002F
+:20299000000000000000000000000000000000000000000000000000000000000000000027
+:2029980000000000000000000000000000000000000000000000000000000000000000001F
+:2029A000000000000000000000000000000000000000000000000000000000000000000017
+:2029A80000000000000000000000000000000000000000000000000000000000000000000F
+:2029B000000000000000000000000000000000000000000000000000000000000000000007
+:2029B8000000000000000000000000000000000000000000000000000000000000000000FF
+:2029C0000000000000000000000000000000000000000000000000000000000000000000F7
+:2029C8000000000000000000000000000000000000000000000000000000000000000000EF
+:2029D0000000000000000000000000000000000000000000000000000000000000000000E7
+:2029D8000000000000000000000000000000000000000000000000000000000000000000DF
+:2029E0000000000000000000000000000000000000000000000000000000000000000000D7
+:2029E8000000000000000000000000000000000000000000000000000000000000000000CF
+:2029F0000000000000000000000000000000000000000000000000000000000000000000C7
+:2029F8000000000000000000000000000000000000000000000000000000000000000000BF
+:202A00000000000000000000000000000000000000000000000000000000000000000000B6
+:202A08000000000000000000000000000000000000000000000000000000000000000000AE
+:202A10000000000000000000000000000000000000000000000000000000000000000000A6
+:202A180000000000000000000000000000000000000000000000000000000000000000009E
+:202A2000000000000000000000000000000000000000000000000000000000000000000096
+:202A280000000000000000000000000000000000000000000000000000000000000000008E
+:202A3000000000000000000000000000000000000000000000000000000000000000000086
+:202A380000000000000000000000000000000000000000000000000000000000000000007E
+:202A4000000000000000000000000000000000000000000000000000000000000000000076
+:202A480000000000000000000000000000000000000000000000000000000000000000006E
+:202A5000000000000000000000000000000000000000000000000000000000000000000066
+:202A580000000000000000000000000000000000000000000000000000000000000000005E
+:202A6000000000000000000000000000000000000000000000000000000000000000000056
+:202A680000000000000000000000000000000000000000000000000000000000000000004E
+:202A7000000000000000000000000000000000000000000000000000000000000000000046
+:202A780000000000000000000000000000000000000000000000000000000000000000003E
+:202A8000000000000000000000000000000000000000000000000000000000000000000036
+:202A880000000000000000000000000000000000000000000000000000000000000000002E
+:202A9000000000000000000000000000000000000000000000000000000000000000000026
+:202A980000000000000000000000000000000000000000000000000000000000000000001E
+:202AA000000000000000000000000000000000000000000000000000000000000000000016
+:202AA80000000000000000000000000000000000000000000000000000000000000000000E
+:202AB000000000000000000000000000000000000000000000000000000000000000000006
+:202AB8000000000000000000000000000000000000000000000000000000000000000000FE
+:202AC0000000000000000000000000000000000000000000000000000000000000000000F6
+:202AC8000000000000000000000000000000000000000000000000000000000000000000EE
+:202AD0000000000000000000000000000000000000000000000000000000000000000000E6
+:202AD8000000000000000000000000000000000000000000000000000000000000000000DE
+:202AE0000000000000000000000000000000000000000000000000000000000000000000D6
+:202AE8000000000000000000000000000000000000000000000000000000000000000000CE
+:202AF0000000000000000000000000000000000000000000000000000000000000000000C6
+:202AF8000000000000000000000000000000000000000000000000000000000000000000BE
+:202B00000000000000000000000000000000000000000000000000000000000000000000B5
+:202B08000000000000000000000000000000000000000000000000000000000000000000AD
+:202B10000000000000000000000000000000000000000000000000000000000000000000A5
+:202B180000000000000000000000000000000000000000000000000000000000000000009D
+:202B2000000000000000000000000000000000000000000000000000000000000000000095
+:202B280000000000000000000000000000000000000000000000000000000000000000008D
+:202B3000000000000000000000000000000000000000000000000000000000000000000085
+:202B380000000000000000000000000000000000000000000000000000000000000000007D
+:202B4000000000000000000000000000000000000000000000000000000000000000000075
+:202B480000000000000000000000000000000000000000000000000000000000000000006D
+:202B5000000000000000000000000000000000000000000000000000000000000000000065
+:202B580000000000000000000000000000000000000000000000000000000000000000005D
+:202B6000000000000000000000000000000000000000000000000000000000000000000055
+:202B680000000000000000000000000000000000000000000000000000000000000000004D
+:202B7000000000000000000000000000000000000000000000000000000000000000000045
+:202B780000000000000000000000000000000000000000000000000000000000000000003D
+:202B8000000000000000000000000000000000000000000000000000000000000000000035
+:202B880000000000000000000000000000000000000000000000000000000000000000002D
+:202B9000000000000000000000000000000000000000000000000000000000000000000025
+:202B980000000000000000000000000000000000000000000000000000000000000000001D
+:202BA000000000000000000000000000000000000000000000000000000000000000000015
+:202BA80000000000000000000000000000000000000000000000000000000000000000000D
+:202BB000000000000000000000000000000000000000000000000000000000000000000005
+:202BB8000000000000000000000000000000000000000000000000000000000000000000FD
+:202BC0000000000000000000000000000000000000000000000000000000000000000000F5
+:202BC8000000000000000000000000000000000000000000000000000000000000000000ED
+:202BD0000000000000000000000000000000000000000000000000000000000000000000E5
+:202BD8000000000000000000000000000000000000000000000000000000000000000000DD
+:202BE0000000000000000000000000000000000000000000000000000000000000000000D5
+:202BE8000000000000000000000000000000000000000000000000000000000000000000CD
+:202BF0000000000000000000000000000000000000000000000000000000000000000000C5
+:202BF8000000000000000000000000000000000000000000000000000000000000000000BD
+:202C00000000000000000000000000000000000000000000000000000000000000000000B4
+:202C08000000000000000000000000000000000000000000000000000000000000000000AC
+:202C10000000000000000000000000000000000000000000000000000000000000000000A4
+:202C180000000000000000000000000000000000000000000000000000000000000000009C
+:202C2000000000000000000000000000000000000000000000000000000000000000000094
+:202C280000000000000000000000000000000000000000000000000000000000000000008C
+:202C3000000000000000000000000000000000000000000000000000000000000000000084
+:202C380000000000000000000000000000000000000000000000000000000000000000007C
+:202C4000000000000000000000000000000000000000000000000000000000000000000074
+:202C480000000000000000000000000000000000000000000000000000000000000000006C
+:202C5000000000000000000000000000000000000000000000000000000000000000000064
+:202C580000000000000000000000000000000000000000000000000000000000000000005C
+:202C6000000000000000000000000000000000000000000000000000000000000000000054
+:202C680000000000000000000000000000000000000000000000000000000000000000004C
+:202C7000000000000000000000000000000000000000000000000000000000000000000044
+:202C780000000000000000000000000000000000000000000000000000000000000000003C
+:202C8000000000000000000000000000000000000000000000000000000000000000000034
+:202C880000000000000000000000000000000000000000000000000000000000000000002C
+:202C9000000000000000000000000000000000000000000000000000000000000000000024
+:202C980000000000000000000000000000000000000000000000000000000000000000001C
+:202CA000000000000000000000000000000000000000000000000000000000000000000014
+:202CA80000000000000000000000000000000000000000000000000000000000000000000C
+:202CB000000000000000000000000000000000000000000000000000000000000000000004
+:202CB8000000000000000000000000000000000000000000000000000000000000000000FC
+:202CC0000000000000000000000000000000000000000000000000000000000000000000F4
+:202CC8000000000000000000000000000000000000000000000000000000000000000000EC
+:202CD0000000000000000000000000000000000000000000000000000000000000000000E4
+:202CD8000000000000000000000000000000000000000000000000000000000000000000DC
+:202CE0000000000000000000000000000000000000000000000000000000000000000000D4
+:202CE8000000000000000000000000000000000000000000000000000000000000000000CC
+:202CF0000000000000000000000000000000000000000000000000000000000000000000C4
+:202CF8000000000000000000000000000000000000000000000000000000000000000000BC
+:202D00000000000000000000000000000000000000000000000000000000000000000000B3
+:202D08000000000000000000000000000000000000000000000000000000000000000000AB
+:202D10000000000000000000000000000000000000000000000000000000000000000000A3
+:202D180000000000000000000000000000000000000000000000000000000000000000009B
+:202D2000000000000000000000000000000000000000000000000000000000000000000093
+:202D280000000000000000000000000000000000000000000000000000000000000000008B
+:202D3000000000000000000000000000000000000000000000000000000000000000000083
+:202D380000000000000000000000000000000000000000000000000000000000000000007B
+:202D4000000000000000000000000000000000000000000000000000000000000000000073
+:202D480000000000000000000000000000000000000000000000000000000000000000006B
+:202D5000000000000000000000000000000000000000000000000000000000000000000063
+:202D580000000000000000000000000000000000000000000000000000000000000000005B
+:202D6000000000000000000000000000000000000000000000000000000000000000000053
+:202D680000000000000000000000000000000000000000000000000000000000000000004B
+:202D7000000000000000000000000000000000000000000000000000000000000000000043
+:202D780000000000000000000000000000000000000000000000000000000000000000003B
+:202D8000000000000000000000000000000000000000000000000000000000000000000033
+:202D880000000000000000000000000000000000000000000000000000000000000000002B
+:202D9000000000000000000000000000000000000000000000000000000000000000000023
+:202D980000000000000000000000000000000000000000000000000000000000000000001B
+:202DA000000000000000000000000000000000000000000000000000000000000000000013
+:202DA80000000000000000000000000000000000000000000000000000000000000000000B
+:202DB000000000000000000000000000000000000000000000000000000000000000000003
+:202DB8000000000000000000000000000000000000000000000000000000000000000000FB
+:202DC0000000000000000000000000000000000000000000000000000000000000000000F3
+:202DC8000000000000000000000000000000000000000000000000000000000000000000EB
+:202DD0000000000000000000000000000000000000000000000000000000000000000000E3
+:202DD8000000000000000000000000000000000000000000000000000000000000000000DB
+:202DE0000000000000000000000000000000000000000000000000000000000000000000D3
+:202DE8000000000000000000000000000000000000000000000000000000000000000000CB
+:202DF0000000000000000000000000000000000000000000000000000000000000000000C3
+:202DF8000000000000000000000000000000000000000000000000000000000000000000BB
+:202E00000000000000000000000000000000000000000000000000000000000000000000B2
+:202E08000000000000000000000000000000000000000000000000000000000000000000AA
+:202E10000000000000000000000000000000000000000000000000000000000000000000A2
+:202E180000000000000000000000000000000000000000000000000000000000000000009A
+:202E2000000000000000000000000000000000000000000000000000000000000000000092
+:202E280000000000000000000000000000000000000000000000000000000000000000008A
+:202E3000000000000000000000000000000000000000000000000000000000000000000082
+:202E380000000000000000000000000000000000000000000000000000000000000000007A
+:202E4000000000000000000000000000000000000000000000000000000000000000000072
+:202E480000000000000000000000000000000000000000000000000000000000000000006A
+:202E5000000000000000000000000000000000000000000000000000000000000000000062
+:202E580000000000000000000000000000000000000000000000000000000000000000005A
+:202E6000000000000000000000000000000000000000000000000000000000000000000052
+:202E680000000000000000000000000000000000000000000000000000000000000000004A
+:202E7000000000000000000000000000000000000000000000000000000000000000000042
+:202E780000000000000000000000000000000000000000000000000000000000000000003A
+:202E8000000000000000000000000000000000000000000000000000000000000000000032
+:202E880000000000000000000000000000000000000000000000000000000000000000002A
+:202E9000000000000000000000000000000000000000000000000000000000000000000022
+:202E980000000000000000000000000000000000000000000000000000000000000000001A
+:202EA000000000000000000000000000000000000000000000000000000000000000000012
+:202EA80000000000000000000000000000000000000000000000000000000000000000000A
+:202EB000000000000000000000000000000000000000000000000000000000000000000002
+:202EB8000000000000000000000000000000000000000000000000000000000000000000FA
+:202EC0000000000000000000000000000000000000000000000000000000000000000000F2
+:202EC8000000000000000000000000000000000000000000000000000000000000000000EA
+:202ED0000000000000000000000000000000000000000000000000000000000000000000E2
+:202ED8000000000000000000000000000000000000000000000000000000000000000000DA
+:202EE0000000000000000000000000000000000000000000000000000000000000000000D2
+:202EE8000000000000000000000000000000000000000000000000000000000000000000CA
+:202EF0000000000000000000000000000000000000000000000000000000000000000000C2
+:202EF8000000000000000000000000000000000000000000000000000000000000000000BA
+:202F00000000000000000000000000000000000000000000000000000000000000000000B1
+:202F08000000000000000000000000000000000000000000000000000000000000000000A9
+:202F10000000000000000000000000000000000000000000000000000000000000000000A1
+:202F1800000000000000000000000000000000000000000000000000000000000000000099
+:202F2000000000000000000000000000000000000000000000000000000000000000000091
+:202F2800000000000000000000000000000000000000000000000000000000000000000089
+:202F3000000000000000000000000000000000000000000000000000000000000000000081
+:202F3800000000000000000000000000000000000000000000000000000000000000000079
+:202F4000000000000000000000000000000000000000000000000000000000000000000071
+:202F4800000000000000000000000000000000000000000000000000000000000000000069
+:202F5000000000000000000000000000000000000000000000000000000000000000000061
+:202F5800000000000000000000000000000000000000000000000000000000000000000059
+:202F6000000000000000000000000000000000000000000000000000000000000000000051
+:202F6800000000000000000000000000000000000000000000000000000000000000000049
+:202F7000000000000000000000000000000000000000000000000000000000000000000041
+:202F7800000000000000000000000000000000000000000000000000000000000000000039
+:202F8000000000000000000000000000000000000000000000000000000000000000000031
+:202F8800000000000000000000000000000000000000000000000000000000000000000029
+:202F9000000000000000000000000000000000000000000000000000000000000000000021
+:202F9800000000000000000000000000000000000000000000000000000000000000000019
+:202FA000000000000000000000000000000000000000000000000000000000000000000011
+:202FA800000000000000000000000000000000000000000000000000000000000000000009
+:202FB000000000000000000000000000000000000000000000000000000000000000000001
+:202FB8000000000000000000000000000000000000000000000000000000000000000000F9
+:202FC0000000000000000000000000000000000000000000000000000000000000000000F1
+:202FC8000000000000000000000000000000000000000000000000000000000000000000E9
+:202FD0000000000000000000000000000000000000000000000000000000000000000000E1
+:202FD8000000000000000000000000000000000000000000000000000000000000000000D9
+:202FE0000000000000000000000000000000000000000000000000000000000000000000D1
+:202FE8000000000000000000000000000000000000000000000000000000000000000000C9
+:202FF0000000000000000000000000000000000000000000000000000000000000000000C1
+:202FF8000000000000000000000000000000000000000000000000000000000000000000B9
+:203000000000000000000000000000000000000000000000000000000000000000000000B0
+:203008000000000000000000000000000000000000000000000000000000000000000000A8
+:203010000000000000000000000000000000000000000000000000000000000000000000A0
+:20301800000000000000000000000000000000000000000000000000000000000000000098
+:20302000000000000000000000000000000000000000000000000000000000000000000090
+:20302800000000000000000000000000000000000000000000000000000000000000000088
+:20303000000000000000000000000000000000000000000000000000000000000000000080
+:20303800000000000000000000000000000000000000000000000000000000000000000078
+:20304000000000000000000000000000000000000000000000000000000000000000000070
+:20304800000000000000000000000000000000000000000000000000000000000000000068
+:20305000000000000000000000000000000000000000000000000000000000000000000060
+:20305800000000000000000000000000000000000000000000000000000000000000000058
+:20306000000000000000000000000000000000000000000000000000000000000000000050
+:20306800000000000000000000000000000000000000000000000000000000000000000048
+:20307000000000000000000000000000000000000000000000000000000000000000000040
+:20307800000000000000000000000000000000000000000000000000000000000000000038
+:20308000000000000000000000000000000000000000000000000000000000000000000030
+:20308800000000000000000000000000000000000000000000000000000000000000000028
+:20309000000000000000000000000000000000000000000000000000000000000000000020
+:20309800000000000000000000000000000000000000000000000000000000000000000018
+:2030A000000000000000000000000000000000000000000000000000000000000000000010
+:2030A800000000000000000000000000000000000000000000000000000000000000000008
+:2030B000000000000000000000000000000000000000000000000000000000000000000000
+:2030B8000000000000000000000000000000000000000000000000000000000000000000F8
+:2030C0000000000000000000000000000000000000000000000000000000000000000000F0
+:2030C8000000000000000000000000000000000000000000000000000000000000000000E8
+:2030D0000000000000000000000000000000000000000000000000000000000000000000E0
+:2030D8000000000000000000000000000000000000000000000000000000000000000000D8
+:2030E0000000000000000000000000000000000000000000000000000000000000000000D0
+:2030E8000000000000000000000000000000000000000000000000000000000000000000C8
+:2030F0000000000000000000000000000000000000000000000000000000000000000000C0
+:2030F8000000000000000000000000000000000000000000000000000000000000000000B8
+:203100000000000000000000000000000000000000000000000000000000000000000000AF
+:203108000000000000000000000000000000000000000000000000000000000000000000A7
+:2031100000000000000000000000000000000000000000000000000000000000000000009F
+:20311800000000000000000000000000000000000000000000000000000000000000000097
+:2031200000000000000000000000000000000000000000000000000000000000000000008F
+:20312800000000000000000000000000000000000000000000000000000000000000000087
+:2031300000000000000000000000000000000000000000000000000000000000000000007F
+:20313800000000000000000000000000000000000000000000000000000000000000000077
+:2031400000000000000000000000000000000000000000000000000000000000000000006F
+:20314800000000000000000000000000000000000000000000000000000000000000000067
+:2031500000000000000000000000000000000000000000000000000000000000000000005F
+:20315800000000000000000000000000000000000000000000000000000000000000000057
+:2031600000000000000000000000000000000000000000000000000000000000000000004F
+:20316800000000000000000000000000000000000000000000000000000000000000000047
+:2031700000000000000000000000000000000000000000000000000000000000000000003F
+:20317800000000000000000000000000000000000000000000000000000000000000000037
+:2031800000000000000000000000000000000000000000000000000000000000000000002F
+:20318800000000000000000000000000000000000000000000000000000000000000000027
+:2031900000000000000000000000000000000000000000000000000000000000000000001F
+:20319800000000000000000000000000000000000000000000000000000000000000000017
+:2031A00000000000000000000000000000000000000000000000000000000000000000000F
+:2031A800000000000000000000000000000000000000000000000000000000000000000007
+:2031B0000000000000000000000000000000000000000000000000000000000000000000FF
+:2031B8000000000000000000000000000000000000000000000000000000000000000000F7
+:2031C0000000000000000000000000000000000000000000000000000000000000000000EF
+:2031C8000000000000000000000000000000000000000000000000000000000000000000E7
+:2031D0000000000000000000000000000000000000000000000000000000000000000000DF
+:2031D8000000000000000000000000000000000000000000000000000000000000000000D7
+:2031E0000000000000000000000000000000000000000000000000000000000000000000CF
+:2031E8000000000000000000000000000000000000000000000000000000000000000000C7
+:2031F0000000000000000000000000000000000000000000000000000000000000000000BF
+:2031F8000000000000000000000000000000000000000000000000000000000000000000B7
+:203200000000000000000000000000000000000000000000000000000000000000000000AE
+:203208000000000000000000000000000000000000000000000000000000000000000000A6
+:2032100000000000000000000000000000000000000000000000000000000000000000009E
+:20321800000000000000000000000000000000000000000000000000000000000000000096
+:2032200000000000000000000000000000000000000000000000000000000000000000008E
+:20322800000000000000000000000000000000000000000000000000000000000000000086
+:2032300000000000000000000000000000000000000000000000000000000000000000007E
+:20323800000000000000000000000000000000000000000000000000000000000000000076
+:2032400000000000000000000000000000000000000000000000000000000000000000006E
+:20324800000000000000000000000000000000000000000000000000000000000000000066
+:2032500000000000000000000000000000000000000000000000000000000000000000005E
+:20325800000000000000000000000000000000000000000000000000000000000000000056
+:2032600000000000000000000000000000000000000000000000000000000000000000004E
+:20326800000000000000000000000000000000000000000000000000000000000000000046
+:2032700000000000000000000000000000000000000000000000000000000000000000003E
+:20327800000000000000000000000000000000000000000000000000000000000000000036
+:2032800000000000000000000000000000000000000000000000000000000000000000002E
+:20328800000000000000000000000000000000000000000000000000000000000000000026
+:2032900000000000000000000000000000000000000000000000000000000000000000001E
+:20329800000000000000000000000000000000000000000000000000000000000000000016
+:2032A00000000000000000000000000000000000000000000000000000000000000000000E
+:2032A800000000000000000000000000000000000000000000000000000000000000000006
+:2032B0000000000000000000000000000000000000000000000000000000000000000000FE
+:2032B8000000000000000000000000000000000000000000000000000000000000000000F6
+:2032C0000000000000000000000000000000000000000000000000000000000000000000EE
+:2032C8000000000000000000000000000000000000000000000000000000000000000000E6
+:2032D0000000000000000000000000000000000000000000000000000000000000000000DE
+:2032D8000000000000000000000000000000000000000000000000000000000000000000D6
+:2032E0000000000000000000000000000000000000000000000000000000000000000000CE
+:2032E8000000000000000000000000000000000000000000000000000000000000000000C6
+:2032F0000000000000000000000000000000000000000000000000000000000000000000BE
+:2032F8000000000000000000000000000000000000000000000000000000000000000000B6
+:203300000000000000000000000000000000000000000000000000000000000000000000AD
+:203308000000000000000000000000000000000000000000000000000000000000000000A5
+:2033100000000000000000000000000000000000000000000000000000000000000000009D
+:20331800000000000000000000000000000000000000000000000000000000000000000095
+:2033200000000000000000000000000000000000000000000000000000000000000000008D
+:20332800000000000000000000000000000000000000000000000000000000000000000085
+:2033300000000000000000000000000000000000000000000000000000000000000000007D
+:20333800000000000000000000000000000000000000000000000000000000000000000075
+:2033400000000000000000000000000000000000000000000000000000000000000000006D
+:20334800000000000000000000000000000000000000000000000000000000000000000065
+:2033500000000000000000000000000000000000000000000000000000000000000000005D
+:20335800000000000000000000000000000000000000000000000000000000000000000055
+:2033600000000000000000000000000000000000000000000000000000000000000000004D
+:20336800000000000000000000000000000000000000000000000000000000000000000045
+:2033700000000000000000000000000000000000000000000000000000000000000000003D
+:20337800000000000000000000000000000000000000000000000000000000000000000035
+:2033800000000000000000000000000000000000000000000000000000000000000000002D
+:20338800000000000000000000000000000000000000000000000000000000000000000025
+:2033900000000000000000000000000000000000000000000000000000000000000000001D
+:20339800000000000000000000000000000000000000000000000000000000000000000015
+:2033A00000000000000000000000000000000000000000000000000000000000000000000D
+:2033A800000000000000000000000000000000000000000000000000000000000000000005
+:2033B0000000000000000000000000000000000000000000000000000000000000000000FD
+:2033B8000000000000000000000000000000000000000000000000000000000000000000F5
+:2033C0000000000000000000000000000000000000000000000000000000000000000000ED
+:2033C8000000000000000000000000000000000000000000000000000000000000000000E5
+:2033D0000000000000000000000000000000000000000000000000000000000000000000DD
+:2033D8000000000000000000000000000000000000000000000000000000000000000000D5
+:2033E0000000000000000000000000000000000000000000000000000000000000000000CD
+:2033E8000000000000000000000000000000000000000000000000000000000000000000C5
+:2033F0000000000000000000000000000000000000000000000000000000000000000000BD
+:2033F8000000000000000000000000000000000000000000000000000000000000000000B5
+:203400000000000000000000000000000000000000000000000000000000000000000000AC
+:203408000000000000000000000000000000000000000000000000000000000000000000A4
+:2034100000000000000000000000000000000000000000000000000000000000000000009C
+:20341800000000000000000000000000000000000000000000000000000000000000000094
+:2034200000000000000000000000000000000000000000000000000000000000000000008C
+:20342800000000000000000000000000000000000000000000000000000000000000000084
+:2034300000000000000000000000000000000000000000000000000000000000000000007C
+:20343800000000000000000000000000000000000000000000000000000000000000000074
+:2034400000000000000000000000000000000000000000000000000000000000000000006C
+:20344800000000000000000000000000000000000000000000000000000000000000000064
+:2034500000000000000000000000000000000000000000000000000000000000000000005C
+:20345800000000000000000000000000000000000000000000000000000000000000000054
+:2034600000000000000000000000000000000000000000000000000000000000000000004C
+:20346800000000000000000000000000000000000000000000000000000000000000000044
+:2034700000000000000000000000000000000000000000000000000000000000000000003C
+:20347800000000000000000000000000000000000000000000000000000000000000000034
+:2034800000000000000000000000000000000000000000000000000000000000000000002C
+:20348800000000000000000000000000000000000000000000000000000000000000000024
+:2034900000000000000000000000000000000000000000000000000000000000000000001C
+:20349800000000000000000000000000000000000000000000000000000000000000000014
+:2034A00000000000000000000000000000000000000000000000000000000000000000000C
+:2034A800000000000000000000000000000000000000000000000000000000000000000004
+:2034B0000000000000000000000000000000000000000000000000000000000000000000FC
+:2034B8000000000000000000000000000000000000000000000000000000000000000000F4
+:2034C0000000000000000000000000000000000000000000000000000000000000000000EC
+:2034C8000000000000000000000000000000000000000000000000000000000000000000E4
+:2034D0000000000000000000000000000000000000000000000000000000000000000000DC
+:2034D8000000000000000000000000000000000000000000000000000000000000000000D4
+:2034E0000000000000000000000000000000000000000000000000000000000000000000CC
+:2034E8000000000000000000000000000000000000000000000000000000000000000000C4
+:2034F0000000000000000000000000000000000000000000000000000000000000000000BC
+:2034F8000000000000000000000000000000000000000000000000000000000000000000B4
+:203500000000000000000000000000000000000000000000000000000000000000000000AB
+:203508000000000000000000000000000000000000000000000000000000000000000000A3
+:2035100000000000000000000000000000000000000000000000000000000000000000009B
+:20351800000000000000000000000000000000000000000000000000000000000000000093
+:2035200000000000000000000000000000000000000000000000000000000000000000008B
+:20352800000000000000000000000000000000000000000000000000000000000000000083
+:2035300000000000000000000000000000000000000000000000000000000000000000007B
+:20353800000000000000000000000000000000000000000000000000000000000000000073
+:2035400000000000000000000000000000000000000000000000000000000000000000006B
+:20354800000000000000000000000000000000000000000000000000000000000000000063
+:2035500000000000000000000000000000000000000000000000000000000000000000005B
+:20355800000000000000000000000000000000000000000000000000000000000000000053
+:2035600000000000000000000000000000000000000000000000000000000000000000004B
+:20356800000000000000000000000000000000000000000000000000000000000000000043
+:2035700000000000000000000000000000000000000000000000000000000000000000003B
+:20357800000000000000000000000000000000000000000000000000000000000000000033
+:2035800000000000000000000000000000000000000000000000000000000000000000002B
+:20358800000000000000000000000000000000000000000000000000000000000000000023
+:2035900000000000000000000000000000000000000000000000000000000000000000001B
+:20359800000000000000000000000000000000000000000000000000000000000000000013
+:2035A00000000000000000000000000000000000000000000000000000000000000000000B
+:2035A800000000000000000000000000000000000000000000000000000000000000000003
+:2035B0000000000000000000000000000000000000000000000000000000000000000000FB
+:2035B8000000000000000000000000000000000000000000000000000000000000000000F3
+:2035C0000000000000000000000000000000000000000000000000000000000000000000EB
+:2035C8000000000000000000000000000000000000000000000000000000000000000000E3
+:2035D0000000000000000000000000000000000000000000000000000000000000000000DB
+:2035D8000000000000000000000000000000000000000000000000000000000000000000D3
+:2035E0000000000000000000000000000000000000000000000000000000000000000000CB
+:2035E8000000000000000000000000000000000000000000000000000000000000000000C3
+:2035F0000000000000000000000000000000000000000000000000000000000000000000BB
+:2035F8000000000000000000000000000000000000000000000000000000000000000000B3
+:203600000000000000000000000000000000000000000000000000000000000000000000AA
+:203608000000000000000000000000000000000000000000000000000000000000000000A2
+:2036100000000000000000000000000000000000000000000000000000000000000000009A
+:20361800000000000000000000000000000000000000000000000000000000000000000092
+:2036200000000000000000000000000000000000000000000000000000000000000000008A
+:20362800000000000000000000000000000000000000000000000000000000000000000082
+:2036300000000000000000000000000000000000000000000000000000000000000000007A
+:20363800000000000000000000000000000000000000000000000000000000000000000072
+:2036400000000000000000000000000000000000000000000000000000000000000000006A
+:20364800000000000000000000000000000000000000000000000000000000000000000062
+:2036500000000000000000000000000000000000000000000000000000000000000000005A
+:20365800000000000000000000000000000000000000000000000000000000000000000052
+:2036600000000000000000000000000000000000000000000000000000000000000000004A
+:20366800000000000000000000000000000000000000000000000000000000000000000042
+:2036700000000000000000000000000000000000000000000000000000000000000000003A
+:20367800000000000000000000000000000000000000000000000000000000000000000032
+:2036800000000000000000000000000000000000000000000000000000000000000000002A
+:20368800000000000000000000000000000000000000000000000000000000000000000022
+:2036900000000000000000000000000000000000000000000000000000000000000000001A
+:20369800000000000000000000000000000000000000000000000000000000000000000012
+:2036A00000000000000000000000000000000000000000000000000000000000000000000A
+:2036A800000000000000000000000000000000000000000000000000000000000000000002
+:2036B0000000000000000000000000000000000000000000000000000000000000000000FA
+:2036B8000000000000000000000000000000000000000000000000000000000000000000F2
+:2036C0000000000000000000000000000000000000000000000000000000000000000000EA
+:2036C8000000000000000000000000000000000000000000000000000000000000000000E2
+:2036D0000000000000000000000000000000000000000000000000000000000000000000DA
+:2036D8000000000000000000000000000000000000000000000000000000000000000000D2
+:2036E0000000000000000000000000000000000000000000000000000000000000000000CA
+:2036E8000000000000000000000000000000000000000000000000000000000000000000C2
+:2036F0000000000000000000000000000000000000000000000000000000000000000000BA
+:2036F8000000000000000000000000000000000000000000000000000000000000000000B2
+:203700000000000000000000000000000000000000000000000000000000000000000000A9
+:203708000000000000000000000000000000000000000000000000000000000000000000A1
+:20371000000000000000000000000000000000000000000000000000000000000000000099
+:20371800000000000000000000000000000000000000000000000000000000000000000091
+:20372000000000000000000000000000000000000000000000000000000000000000000089
+:20372800000000000000000000000000000000000000000000000000000000000000000081
+:20373000000000000000000000000000000000000000000000000000000000000000000079
+:20373800000000000000000000000000000000000000000000000000000000000000000071
+:20374000000000000000000000000000000000000000000000000000000000000000000069
+:20374800000000000000000000000000000000000000000000000000000000000000000061
+:20375000000000000000000000000000000000000000000000000000000000000000000059
+:20375800000000000000000000000000000000000000000000000000000000000000000051
+:20376000000000000000000000000000000000000000000000000000000000000000000049
+:20376800000000000000000000000000000000000000000000000000000000000000000041
+:20377000000000000000000000000000000000000000000000000000000000000000000039
+:20377800000000000000000000000000000000000000000000000000000000000000000031
+:20378000000000000000000000000000000000000000000000000000000000000000000029
+:20378800000000000000000000000000000000000000000000000000000000000000000021
+:20379000000000000000000000000000000000000000000000000000000000000000000019
+:20379800000000000000000000000000000000000000000000000000000000000000000011
+:2037A000000000000000000000000000000000000000000000000000000000000000000009
+:2037A800000000000000000000000000000000000000000000000000000000000000000001
+:2037B0000000000000000000000000000000000000000000000000000000000000000000F9
+:2037B8000000000000000000000000000000000000000000000000000000000000000000F1
+:2037C0000000000000000000000000000000000000000000000000000000000000000000E9
+:2037C8000000000000000000000000000000000000000000000000000000000000000000E1
+:2037D0000000000000000000000000000000000000000000000000000000000000000000D9
+:2037D8000000000000000000000000000000000000000000000000000000000000000000D1
+:2037E0000000000000000000000000000000000000000000000000000000000000000000C9
+:2037E8000000000000000000000000000000000000000000000000000000000000000000C1
+:2037F0000000000000000000000000000000000000000000000000000000000000000000B9
+:2037F8000000000000000000000000000000000000000000000000000000000000000000B1
+:203800000000000000000000000000000000000000000000000000000000000000000000A8
+:203808000000000000000000000000000000000000000000000000000000000000000000A0
+:20381000000000000000000000000000000000000000000000000000000000000000000098
+:20381800000000000000000000000000000000000000000000000000000000000000000090
+:20382000000000000000000000000000000000000000000000000000000000000000000088
+:20382800000000000000000000000000000000000000000000000000000000000000000080
+:20383000000000000000000000000000000000000000000000000000000000000000000078
+:20383800000000000000000000000000000000000000000000000000000000000000000070
+:20384000000000000000000000000000000000000000000000000000000000000000000068
+:20384800000000000000000000000000000000000000000000000000000000000000000060
+:20385000000000000000000000000000000000000000000000000000000000000000000058
+:20385800000000000000000000000000000000000000000000000000000000000000000050
+:20386000000000000000000000000000000000000000000000000000000000000000000048
+:20386800000000000000000000000000000000000000000000000000000000000000000040
+:20387000000000000000000000000000000000000000000000000000000000000000000038
+:20387800000000000000000000000000000000000000000000000000000000000000000030
+:20388000000000000000000000000000000000000000000000000000000000000000000028
+:20388800000000000000000000000000000000000000000000000000000000000000000020
+:20389000000000000000000000000000000000000000000000000000000000000000000018
+:20389800000000000000000000000000000000000000000000000000000000000000000010
+:2038A000000000000000000000000000000000000000000000000000000000000000000008
+:2038A800000000000000000000000000000000000000000000000000000000000000000000
+:2038B0000000000000000000000000000000000000000000000000000000000000000000F8
+:2038B8000000000000000000000000000000000000000000000000000000000000000000F0
+:2038C0000000000000000000000000000000000000000000000000000000000000000000E8
+:2038C8000000000000000000000000000000000000000000000000000000000000000000E0
+:2038D0000000000000000000000000000000000000000000000000000000000000000000D8
+:2038D8000000000000000000000000000000000000000000000000000000000000000000D0
+:2038E0000000000000000000000000000000000000000000000000000000000000000000C8
+:2038E8000000000000000000000000000000000000000000000000000000000000000000C0
+:2038F0000000000000000000000000000000000000000000000000000000000000000000B8
+:2038F8000000000000000000000000000000000000000000000000000000000000000000B0
+:203900000000000000000000000000000000000000000000000000000000000000000000A7
+:2039080000000000000000000000000000000000000000000000000000000000000000009F
+:20391000000000000000000000000000000000000000000000000000000000000000000097
+:2039180000000000000000000000000000000000000000000000000000000000000000008F
+:20392000000000000000000000000000000000000000000000000000000000000000000087
+:2039280000000000000000000000000000000000000000000000000000000000000000007F
+:20393000000000000000000000000000000000000000000000000000000000000000000077
+:2039380000000000000000000000000000000000000000000000000000000000000000006F
+:20394000000000000000000000000000000000000000000000000000000000000000000067
+:2039480000000000000000000000000000000000000000000000000000000000000000005F
+:20395000000000000000000000000000000000000000000000000000000000000000000057
+:2039580000000000000000000000000000000000000000000000000000000000000000004F
+:20396000000000000000000000000000000000000000000000000000000000000000000047
+:2039680000000000000000000000000000000000000000000000000000000000000000003F
+:20397000000000000000000000000000000000000000000000000000000000000000000037
+:2039780000000000000000000000000000000000000000000000000000000000000000002F
+:20398000000000000000000000000000000000000000000000000000000000000000000027
+:2039880000000000000000000000000000000000000000000000000000000000000000001F
+:20399000000000000000000000000000000000000000000000000000000000000000000017
+:2039980000000000000000000000000000000000000000000000000000000000000000000F
+:2039A000000000000000000000000000000000000000000000000000000000000000000007
+:2039A8000000000000000000000000000000000000000000000000000000000000000000FF
+:2039B0000000000000000000000000000000000000000000000000000000000000000000F7
+:2039B8000000000000000000000000000000000000000000000000000000000000000000EF
+:2039C0000000000000000000000000000000000000000000000000000000000000000000E7
+:2039C8000000000000000000000000000000000000000000000000000000000000000000DF
+:2039D0000000000000000000000000000000000000000000000000000000000000000000D7
+:2039D8000000000000000000000000000000000000000000000000000000000000000000CF
+:2039E0000000000000000000000000000000000000000000000000000000000000000000C7
+:2039E8000000000000000000000000000000000000000000000000000000000000000000BF
+:2039F0000000000000000000000000000000000000000000000000000000000000000000B7
+:2039F8000000000000000000000000000000000000000000000000000000000000000000AF
+:203A00000000000000000000000000000000000000000000000000000000000000000000A6
+:203A080000000000000000000000000000000000000000000000000000000000000000009E
+:203A1000000000000000000000000000000000000000000000000000000000000000000096
+:203A180000000000000000000000000000000000000000000000000000000000000000008E
+:203A2000000000000000000000000000000000000000000000000000000000000000000086
+:203A280000000000000000000000000000000000000000000000000000000000000000007E
+:203A3000000000000000000000000000000000000000000000000000000000000000000076
+:203A380000000000000000000000000000000000000000000000000000000000000000006E
+:203A4000000000000000000000000000000000000000000000000000000000000000000066
+:203A480000000000000000000000000000000000000000000000000000000000000000005E
+:203A5000000000000000000000000000000000000000000000000000000000000000000056
+:203A580000000000000000000000000000000000000000000000000000000000000000004E
+:203A6000000000000000000000000000000000000000000000000000000000000000000046
+:203A680000000000000000000000000000000000000000000000000000000000000000003E
+:203A7000000000000000000000000000000000000000000000000000000000000000000036
+:203A780000000000000000000000000000000000000000000000000000000000000000002E
+:203A8000000000000000000000000000000000000000000000000000000000000000000026
+:203A880000000000000000000000000000000000000000000000000000000000000000001E
+:203A9000000000000000000000000000000000000000000000000000000000000000000016
+:203A980000000000000000000000000000000000000000000000000000000000000000000E
+:203AA000000000000000000000000000000000000000000000000000000000000000000006
+:203AA8000000000000000000000000000000000000000000000000000000000000000000FE
+:203AB0000000000000000000000000000000000000000000000000000000000000000000F6
+:203AB8000000000000000000000000000000000000000000000000000000000000000000EE
+:203AC0000000000000000000000000000000000000000000000000000000000000000000E6
+:203AC8000000000000000000000000000000000000000000000000000000000000000000DE
+:203AD0000000000000000000000000000000000000000000000000000000000000000000D6
+:203AD8000000000000000000000000000000000000000000000000000000000000000000CE
+:203AE0000000000000000000000000000000000000000000000000000000000000000000C6
+:203AE8000000000000000000000000000000000000000000000000000000000000000000BE
+:203AF0000000000000000000000000000000000000000000000000000000000000000000B6
+:203AF8000000000000000000000000000000000000000000000000000000000000000000AE
+:203B00000000000000000000000000000000000000000000000000000000000000000000A5
+:203B080000000000000000000000000000000000000000000000000000000000000000009D
+:203B1000000000000000000000000000000000000000000000000000000000000000000095
+:203B180000000000000000000000000000000000000000000000000000000000000000008D
+:203B2000000000000000000000000000000000000000000000000000000000000000000085
+:203B280000000000000000000000000000000000000000000000000000000000000000007D
+:203B3000000000000000000000000000000000000000000000000000000000000000000075
+:203B380000000000000000000000000000000000000000000000000000000000000000006D
+:203B4000000000000000000000000000000000000000000000000000000000000000000065
+:203B480000000000000000000000000000000000000000000000000000000000000000005D
+:203B5000000000000000000000000000000000000000000000000000000000000000000055
+:203B580000000000000000000000000000000000000000000000000000000000000000004D
+:203B6000000000000000000000000000000000000000000000000000000000000000000045
+:203B680000000000000000000000000000000000000000000000000000000000000000003D
+:203B7000000000000000000000000000000000000000000000000000000000000000000035
+:203B780000000000000000000000000000000000000000000000000000000000000000002D
+:203B8000000000000000000000000000000000000000000000000000000000000000000025
+:203B880000000000000000000000000000000000000000000000000000000000000000001D
+:203B9000000000000000000000000000000000000000000000000000000000000000000015
+:203B980000000000000000000000000000000000000000000000000000000000000000000D
+:203BA000000000000000000000000000000000000000000000000000000000000000000005
+:203BA8000000000000000000000000000000000000000000000000000000000000000000FD
+:203BB0000000000000000000000000000000000000000000000000000000000000000000F5
+:203BB8000000000000000000000000000000000000000000000000000000000000000000ED
+:203BC0000000000000000000000000000000000000000000000000000000000000000000E5
+:203BC8000000000000000000000000000000000000000000000000000000000000000000DD
+:203BD0000000000000000000000000000000000000000000000000000000000000000000D5
+:203BD8000000000000000000000000000000000000000000000000000000000000000000CD
+:203BE0000000000000000000000000000000000000000000000000000000000000000000C5
+:203BE8000000000000000000000000000000000000000000000000000000000000000000BD
+:203BF0000000000000000000000000000000000000000000000000000000000000000000B5
+:203BF8000000000000000000000000000000000000000000000000000000000000000000AD
+:203C00000000000000000000000000000000000000000000000000000000000000000000A4
+:203C080000000000000000000000000000000000000000000000000000000000000000009C
+:203C1000000000000000000000000000000000000000000000000000000000000000000094
+:203C180000000000000000000000000000000000000000000000000000000000000000008C
+:203C2000000000000000000000000000000000000000000000000000000000000000000084
+:203C280000000000000000000000000000000000000000000000000000000000000000007C
+:203C3000000000000000000000000000000000000000000000000000000000000000000074
+:203C380000000000000000000000000000000000000000000000000000000000000000006C
+:203C4000000000000000000000000000000000000000000000000000000000000000000064
+:203C480000000000000000000000000000000000000000000000000000000000000000005C
+:203C5000000000000000000000000000000000000000000000000000000000000000000054
+:203C580000000000000000000000000000000000000000000000000000000000000000004C
+:203C6000000000000000000000000000000000000000000000000000000000000000000044
+:203C680000000000000000000000000000000000000000000000000000000000000000003C
+:203C7000000000000000000000000000000000000000000000000000000000000000000034
+:203C780000000000000000000000000000000000000000000000000000000000000000002C
+:203C8000000000000000000000000000000000000000000000000000000000000000000024
+:203C880000000000000000000000000000000000000000000000000000000000000000001C
+:203C9000000000000000000000000000000000000000000000000000000000000000000014
+:203C980000000000000000000000000000000000000000000000000000000000000000000C
+:203CA000000000000000000000000000000000000000000000000000000000000000000004
+:203CA8000000000000000000000000000000000000000000000000000000000000000000FC
+:203CB0000000000000000000000000000000000000000000000000000000000000000000F4
+:203CB8000000000000000000000000000000000000000000000000000000000000000000EC
+:203CC0000000000000000000000000000000000000000000000000000000000000000000E4
+:203CC8000000000000000000000000000000000000000000000000000000000000000000DC
+:203CD0000000000000000000000000000000000000000000000000000000000000000000D4
+:203CD8000000000000000000000000000000000000000000000000000000000000000000CC
+:203CE0000000000000000000000000000000000000000000000000000000000000000000C4
+:203CE8000000000000000000000000000000000000000000000000000000000000000000BC
+:203CF0000000000000000000000000000000000000000000000000000000000000000000B4
+:203CF8000000000000000000000000000000000000000000000000000000000000000000AC
+:203D00000000000000000000000000000000000000000000000000000000000000000000A3
+:203D080000000000000000000000000000000000000000000000000000000000000000009B
+:203D1000000000000000000000000000000000000000000000000000000000000000000093
+:203D180000000000000000000000000000000000000000000000000000000000000000008B
+:203D2000000000000000000000000000000000000000000000000000000000000000000083
+:203D280000000000000000000000000000000000000000000000000000000000000000007B
+:203D3000000000000000000000000000000000000000000000000000000000000000000073
+:203D380000000000000000000000000000000000000000000000000000000000000000006B
+:203D4000000000000000000000000000000000000000000000000000000000000000000063
+:203D480000000000000000000000000000000000000000000000000000000000000000005B
+:203D5000000000000000000000000000000000000000000000000000000000000000000053
+:203D580000000000000000000000000000000000000000000000000000000000000000004B
+:203D6000000000000000000000000000000000000000000000000000000000000000000043
+:203D680000000000000000000000000000000000000000000000000000000000000000003B
+:203D7000000000000000000000000000000000000000000000000000000000000000000033
+:203D780000000000000000000000000000000000000000000000000000000000000000002B
+:203D8000000000000000000000000000000000000000000000000000000000000000000023
+:203D880000000000000000000000000000000000000000000000000000000000000000001B
+:203D9000000000000000000000000000000000000000000000000000000000000000000013
+:203D980000000000000000000000000000000000000000000000000000000000000000000B
+:203DA000000000000000000000000000000000000000000000000000000000000000000003
+:203DA8000000000000000000000000000000000000000000000000000000000000000000FB
+:203DB0000000000000000000000000000000000000000000000000000000000000000000F3
+:203DB8000000000000000000000000000000000000000000000000000000000000000000EB
+:203DC0000000000000000000000000000000000000000000000000000000000000000000E3
+:203DC8000000000000000000000000000000000000000000000000000000000000000000DB
+:203DD0000000000000000000000000000000000000000000000000000000000000000000D3
+:203DD8000000000000000000000000000000000000000000000000000000000000000000CB
+:203DE0000000000000000000000000000000000000000000000000000000000000000000C3
+:203DE8000000000000000000000000000000000000000000000000000000000000000000BB
+:203DF0000000000000000000000000000000000000000000000000000000000000000000B3
+:203DF8000000000000000000000000000000000000000000000000000000000000000000AB
+:203E00000000000000000000000000000000000000000000000000000000000000000000A2
+:203E080000000000000000000000000000000000000000000000000000000000000000009A
+:203E1000000000000000000000000000000000000000000000000000000000000000000092
+:203E180000000000000000000000000000000000000000000000000000000000000000008A
+:203E2000000000000000000000000000000000000000000000000000000000000000000082
+:203E280000000000000000000000000000000000000000000000000000000000000000007A
+:203E3000000000000000000000000000000000000000000000000000000000000000000072
+:203E380000000000000000000000000000000000000000000000000000000000000000006A
+:203E4000000000000000000000000000000000000000000000000000000000000000000062
+:203E480000000000000000000000000000000000000000000000000000000000000000005A
+:203E5000000000000000000000000000000000000000000000000000000000000000000052
+:203E580000000000000000000000000000000000000000000000000000000000000000004A
+:203E6000000000000000000000000000000000000000000000000000000000000000000042
+:203E680000000000000000000000000000000000000000000000000000000000000000003A
+:203E7000000000000000000000000000000000000000000000000000000000000000000032
+:203E780000000000000000000000000000000000000000000000000000000000000000002A
+:203E8000000000000000000000000000000000000000000000000000000000000000000022
+:203E880000000000000000000000000000000000000000000000000000000000000000001A
+:203E9000000000000000000000000000000000000000000000000000000000000000000012
+:203E980000000000000000000000000000000000000000000000000000000000000000000A
+:203EA000000000000000000000000000000000000000000000000000000000000000000002
+:203EA8000000000000000000000000000000000000000000000000000000000000000000FA
+:203EB0000000000000000000000000000000000000000000000000000000000000000000F2
+:203EB8000000000000000000000000000000000000000000000000000000000000000000EA
+:203EC0000000000000000000000000000000000000000000000000000000000000000000E2
+:203EC8000000000000000000000000000000000000000000000000000000000000000000DA
+:203ED0000000000000000000000000000000000000000000000000000000000000000000D2
+:203ED8000000000000000000000000000000000000000000000000000000000000000000CA
+:203EE0000000000000000000000000000000000000000000000000000000000000000000C2
+:203EE8000000000000000000000000000000000000000000000000000000000000000000BA
+:203EF0000000000000000000000000000000000000000000000000000000000000000000B2
+:203EF8000000000000000000000000000000000000000000000000000000000000000000AA
+:203F00000000000000000000000000000000000000000000000000000000000000000000A1
+:203F0800000000000000000000000000000000000000000000000000000000000000000099
+:203F1000000000000000000000000000000000000000000000000000000000000000000091
+:203F1800000000000000000000000000000000000000000000000000000000000000000089
+:203F2000000000000000000000000000000000000000000000000000000000000000000081
+:203F2800000000000000000000000000000000000000000000000000000000000000000079
+:203F3000000000000000000000000000000000000000000000000000000000000000000071
+:203F3800000000000000000000000000000000000000000000000000000000000000000069
+:203F4000000000000000000000000000000000000000000000000000000000000000000061
+:203F4800000000000000000000000000000000000000000000000000000000000000000059
+:203F5000000000000000000000000000000000000000000000000000000000000000000051
+:203F5800000000000000000000000000000000000000000000000000000000000000000049
+:203F6000000000000000000000000000000000000000000000000000000000000000000041
+:203F6800000000000000000000000000000000000000000000000000000000000000000039
+:203F7000000000000000000000000000000000000000000000000000000000000000000031
+:203F7800000000000000000000000000000000000000000000000000000000000000000029
+:203F8000000000000000000000000000000000000000000000000000000000000000000021
+:203F8800000000000000000000000000000000000000000000000000000000000000000019
+:203F9000000000000000000000000000000000000000000000000000000000000000000011
+:203F9800000000000000000000000000000000000000000000000000000000000000000009
+:203FA000000000000000000000000000000000000000000000000000000000000000000001
+:203FA8000000000000000000000000000000000000000000000000000000000000000000F9
+:203FB0000000000000000000000000000000000000000000000000000000000000000000F1
+:203FB8000000000000000000000000000000000000000000000000000000000000000000E9
+:203FC0000000000000000000000000000000000000000000000000000000000000000000E1
+:203FC8000000000000000000000000000000000000000000000000000000000000000000D9
+:203FD0000000000000000000000000000000000000000000000000000000000000000000D1
+:203FD8000000000000000000000000000000000000000000000000000000000000000000C9
+:203FE0000000000000000000000000000000000000000000000000000000000000000000C1
+:203FE8000000000000000000000000000000000000000000000000000000000000000000B9
+:203FF0000000000000000000000000000000000000000000000000000000000000000000B1
+:203FF8000000000000000000000000000000000000000000000000000000000000000000A9
+:204000000000000000000000000000000000000000000000000000000000000000000000A0
+:20400800000000000000000000000000000000000000000000000000000000000000000098
+:20401000000000000000000000000000000000000000000000000000000000000000000090
+:20401800000000000000000000000000000000000000000000000000000000000000000088
+:20402000000000000000000000000000000000000000000000000000000000000000000080
+:20402800000000000000000000000000000000000000000000000000000000000000000078
+:20403000000000000000000000000000000000000000000000000000000000000000000070
+:20403800000000000000000000000000000000000000000000000000000000000000000068
+:20404000000000000000000000000000000000000000000000000000000000000000000060
+:20404800000000000000000000000000000000000000000000000000000000000000000058
+:20405000000000000000000000000000000000000000000000000000000000000000000050
+:20405800000000000000000000000000000000000000000000000000000000000000000048
+:20406000000000000000000000000000000000000000000000000000000000000000000040
+:20406800000000000000000000000000000000000000000000000000000000000000000038
+:20407000000000000000000000000000000000000000000000000000000000000000000030
+:20407800000000000000000000000000000000000000000000000000000000000000000028
+:20408000000000000000000000000000000000000000000000000000000000000000000020
+:20408800000000000000000000000000000000000000000000000000000000000000000018
+:20409000000000000000000000000000000000000000000000000000000000000000000010
+:20409800000000000000000000000000000000000000000000000000000000000000000008
+:2040A000000000000000000000000000000000000000000000000000000000000000000000
+:2040A8000000000000000000000000000000000000000000000000000000000000000000F8
+:2040B0000000000000000000000000000000000000000000000000000000000000000000F0
+:2040B8000000000000000000000000000000000000000000000000000000000000000000E8
+:2040C0000000000000000000000000000000000000000000000000000000000000000000E0
+:2040C8000000000000000000000000000000000000000000000000000000000000000000D8
+:2040D0000000000000000000000000000000000000000000000000000000000000000000D0
+:2040D8000000000000000000000000000000000000000000000000000000000000000000C8
+:2040E0000000000000000000000000000000000000000000000000000000000000000000C0
+:2040E8000000000000000000000000000000000000000000000000000000000000000000B8
+:2040F0000000000000000000000000000000000000000000000000000000000000000000B0
+:2040F8000000000000000000000000000000000000000000000000000000000000000000A8
+:2041000000000000000000000000000000000000000000000000000000000000000000009F
+:20410800000000000000000000000000000000000000000000000000000000000000000097
+:2041100000000000000000000000000000000000000000000000000000000000000000008F
+:20411800000000000000000000000000000000000000000000000000000000000000000087
+:2041200000000000000000000000000000000000000000000000000000000000000000007F
+:20412800000000000000000000000000000000000000000000000000000000000000000077
+:2041300000000000000000000000000000000000000000000000000000000000000000006F
+:20413800000000000000000000000000000000000000000000000000000000000000000067
+:2041400000000000000000000000000000000000000000000000000000000000000000005F
+:20414800000000000000000000000000000000000000000000000000000000000000000057
+:2041500000000000000000000000000000000000000000000000000000000000000000004F
+:20415800000000000000000000000000000000000000000000000000000000000000000047
+:2041600000000000000000000000000000000000000000000000000000000000000000003F
+:20416800000000000000000000000000000000000000000000000000000000000000000037
+:2041700000000000000000000000000000000000000000000000000000000000000000002F
+:20417800000000000000000000000000000000000000000000000000000000000000000027
+:2041800000000000000000000000000000000000000000000000000000000000000000001F
+:20418800000000000000000000000000000000000000000000000000000000000000000017
+:2041900000000000000000000000000000000000000000000000000000000000000000000F
+:20419800000000000000000000000000000000000000000000000000000000000000000007
+:2041A0000000000000000000000000000000000000000000000000000000000000000000FF
+:2041A8000000000000000000000000000000000000000000000000000000000000000000F7
+:2041B0000000000000000000000000000000000000000000000000000000000000000000EF
+:2041B8000000000000000000000000000000000000000000000000000000000000000000E7
+:2041C0000000000000000000000000000000000000000000000000000000000000000000DF
+:2041C8000000000000000000000000000000000000000000000000000000000000000000D7
+:2041D0000000000000000000000000000000000000000000000000000000000000000000CF
+:2041D8000000000000000000000000000000000000000000000000000000000000000000C7
+:2041E0000000000000000000000000000000000000000000000000000000000000000000BF
+:2041E8000000000000000000000000000000000000000000000000000000000000000000B7
+:2041F0000000000000000000000000000000000000000000000000000000000000000000AF
+:2041F8000000000000000000000000000000000000000000000000000000000000000000A7
+:2042000000000000000000000000000000000000000000000000000000000000000000009E
+:20420800000000000000000000000000000000000000000000000000000000000000000096
+:2042100000000000000000000000000000000000000000000000000000000000000000008E
+:20421800000000000000000000000000000000000000000000000000000000000000000086
+:2042200000000000000000000000000000000000000000000000000000000000000000007E
+:20422800000000000000000000000000000000000000000000000000000000000000000076
+:2042300000000000000000000000000000000000000000000000000000000000000000006E
+:20423800000000000000000000000000000000000000000000000000000000000000000066
+:2042400000000000000000000000000000000000000000000000000000000000000000005E
+:20424800000000000000000000000000000000000000000000000000000000000000000056
+:2042500000000000000000000000000000000000000000000000000000000000000000004E
+:20425800000000000000000000000000000000000000000000000000000000000000000046
+:2042600000000000000000000000000000000000000000000000000000000000000000003E
+:20426800000000000000000000000000000000000000000000000000000000000000000036
+:2042700000000000000000000000000000000000000000000000000000000000000000002E
+:20427800000000000000000000000000000000000000000000000000000000000000000026
+:2042800000000000000000000000000000000000000000000000000000000000000000001E
+:20428800000000000000000000000000000000000000000000000000000000000000000016
+:2042900000000000000000000000000000000000000000000000000000000000000000000E
+:20429800000000000000000000000000000000000000000000000000000000000000000006
+:2042A0000000000000000000000000000000000000000000000000000000000000000000FE
+:2042A8000000000000000000000000000000000000000000000000000000000000000000F6
+:2042B0000000000000000000000000000000000000000000000000000000000000000000EE
+:2042B8000000000000000000000000000000000000000000000000000000000000000000E6
+:2042C0000000000000000000000000000000000000000000000000000000000000000000DE
+:2042C8000000000000000000000000000000000000000000000000000000000000000000D6
+:2042D0000000000000000000000000000000000000000000000000000000000000000000CE
+:2042D8000000000000000000000000000000000000000000000000000000000000000000C6
+:2042E0000000000000000000000000000000000000000000000000000000000000000000BE
+:2042E8000000000000000000000000000000000000000000000000000000000000000000B6
+:2042F0000000000000000000000000000000000000000000000000000000000000000000AE
+:2042F8000000000000000000000000000000000000000000000000000000000000000000A6
+:2043000000000000000000000000000000000000000000000000000000000000000000009D
+:20430800000000000000000000000000000000000000000000000000000000000000000095
+:2043100000000000000000000000000000000000000000000000000000000000000000008D
+:20431800000000000000000000000000000000000000000000000000000000000000000085
+:2043200000000000000000000000000000000000000000000000000000000000000000007D
+:20432800000000000000000000000000000000000000000000000000000000000000000075
+:2043300000000000000000000000000000000000000000000000000000000000000000006D
+:20433800000000000000000000000000000000000000000000000000000000000000000065
+:2043400000000000000000000000000000000000000000000000000000000000000000005D
+:20434800000000000000000000000000000000000000000000000000000000000000000055
+:2043500000000000000000000000000000000000000000000000000000000000000000004D
+:20435800000000000000000000000000000000000000000000000000000000000000000045
+:2043600000000000000000000000000000000000000000000000000000000000000000003D
+:20436800000000000000000000000000000000000000000000000000000000000000000035
+:2043700000000000000000000000000000000000000000000000000000000000000000002D
+:20437800000000000000000000000000000000000000000000000000000000000000000025
+:2043800000000000000000000000000000000000000000000000000000000000000000001D
+:20438800000000000000000000000000000000000000000000000000000000000000000015
+:2043900000000000000000000000000000000000000000000000000000000000000000000D
+:20439800000000000000000000000000000000000000000000000000000000000000000005
+:2043A0000000000000000000000000000000000000000000000000000000000000000000FD
+:2043A8000000000000000000000000000000000000000000000000000000000000000000F5
+:2043B0000000000000000000000000000000000000000000000000000000000000000000ED
+:2043B8000000000000000000000000000000000000000000000000000000000000000000E5
+:2043C0000000000000000000000000000000000000000000000000000000000000000000DD
+:2043C8000000000000000000000000000000000000000000000000000000000000000000D5
+:2043D0000000000000000000000000000000000000000000000000000000000000000000CD
+:2043D8000000000000000000000000000000000000000000000000000000000000000000C5
+:2043E0000000000000000000000000000000000000000000000000000000000000000000BD
+:2043E8000000000000000000000000000000000000000000000000000000000000000000B5
+:2043F0000000000000000000000000000000000000000000000000000000000000000000AD
+:2043F8000000000000000000000000000000000000000000000000000000000000000000A5
+:2044000000000000000000000000000000000000000000000000000000000000000000009C
+:20440800000000000000000000000000000000000000000000000000000000000000000094
+:2044100000000000000000000000000000000000000000000000000000000000000000008C
+:20441800000000000000000000000000000000000000000000000000000000000000000084
+:2044200000000000000000000000000000000000000000000000000000000000000000007C
+:20442800000000000000000000000000000000000000000000000000000000000000000074
+:2044300000000000000000000000000000000000000000000000000000000000000000006C
+:20443800000000000000000000000000000000000000000000000000000000000000000064
+:2044400000000000000000000000000000000000000000000000000000000000000000005C
+:20444800000000000000000000000000000000000000000000000000000000000000000054
+:2044500000000000000000000000000000000000000000000000000000000000000000004C
+:20445800000000000000000000000000000000000000000000000000000000000000000044
+:2044600000000000000000000000000000000000000000000000000000000000000000003C
+:20446800000000000000000000000000000000000000000000000000000000000000000034
+:2044700000000000000000000000000000000000000000000000000000000000000000002C
+:20447800000000000000000000000000000000000000000000000000000000000000000024
+:2044800000000000000000000000000000000000000000000000000000000000000000001C
+:20448800000000000000000000000000000000000000000000000000000000000000000014
+:2044900000000000000000000000000000000000000000000000000000000000000000000C
+:20449800000000000000000000000000000000000000000000000000000000000000000004
+:2044A0000000000000000000000000000000000000000000000000000000000000000000FC
+:2044A8000000000000000000000000000000000000000000000000000000000000000000F4
+:2044B0000000000000000000000000000000000000000000000000000000000000000000EC
+:2044B8000000000000000000000000000000000000000000000000000000000000000000E4
+:2044C0000000000000000000000000000000000000000000000000000000000000000000DC
+:2044C8000000000000000000000000000000000000000000000000000000000000000000D4
+:2044D0000000000000000000000000000000000000000000000000000000000000000000CC
+:2044D8000000000000000000000000000000000000000000000000000000000000000000C4
+:2044E0000000000000000000000000000000000000000000000000000000000000000000BC
+:2044E8000000000000000000000000000000000000000000000000000000000000000000B4
+:2044F0000000000000000000000000000000000000000000000000000000000000000000AC
+:2044F8000000000000000000000000000000000000000000000000000000000000000000A4
+:2045000000000000000000000000000000000000000000000000000000000000000000009B
+:20450800000000000000000000000000000000000000000000000000000000000000000093
+:2045100000000000000000000000000000000000000000000000000000000000000000008B
+:20451800000000000000000000000000000000000000000000000000000000000000000083
+:2045200000000000000000000000000000000000000000000000000000000000000000007B
+:20452800000000000000000000000000000000000000000000000000000000000000000073
+:2045300000000000000000000000000000000000000000000000000000000000000000006B
+:20453800000000000000000000000000000000000000000000000000000000000000000063
+:2045400000000000000000000000000000000000000000000000000000000000000000005B
+:20454800000000000000000000000000000000000000000000000000000000000000000053
+:2045500000000000000000000000000000000000000000000000000000000000000000004B
+:20455800000000000000000000000000000000000000000000000000000000000000000043
+:2045600000000000000000000000000000000000000000000000000000000000000000003B
+:20456800000000000000000000000000000000000000000000000000000000000000000033
+:2045700000000000000000000000000000000000000000000000000000000000000000002B
+:20457800000000000000000000000000000000000000000000000000000000000000000023
+:2045800000000000000000000000000000000000000000000000000000000000000000001B
+:20458800000000000000000000000000000000000000000000000000000000000000000013
+:2045900000000000000000000000000000000000000000000000000000000000000000000B
+:20459800000000000000000000000000000000000000000000000000000000000000000003
+:2045A0000000000000000000000000000000000000000000000000000000000000000000FB
+:2045A8000000000000000000000000000000000000000000000000000000000000000000F3
+:2045B0000000000000000000000000000000000000000000000000000000000000000000EB
+:2045B8000000000000000000000000000000000000000000000000000000000000000000E3
+:2045C0000000000000000000000000000000000000000000000000000000000000000000DB
+:2045C8000000000000000000000000000000000000000000000000000000000000000000D3
+:2045D0000000000000000000000000000000000000000000000000000000000000000000CB
+:2045D8000000000000000000000000000000000000000000000000000000000000000000C3
+:2045E0000000000000000000000000000000000000000000000000000000000000000000BB
+:2045E8000000000000000000000000000000000000000000000000000000000000000000B3
+:2045F0000000000000000000000000000000000000000000000000000000000000000000AB
+:2045F8000000000000000000000000000000000000000000000000000000000000000000A3
+:2046000000000000000000000000000000000000000000000000000000000000000000009A
+:20460800000000000000000000000000000000000000000000000000000000000000000092
+:2046100000000000000000000000000000000000000000000000000000000000000000008A
+:20461800000000000000000000000000000000000000000000000000000000000000000082
+:2046200000000000000000000000000000000000000000000000000000000000000000007A
+:20462800000000000000000000000000000000000000000000000000000000000000000072
+:2046300000000000000000000000000000000000000000000000000000000000000000006A
+:20463800000000000000000000000000000000000000000000000000000000000000000062
+:2046400000000000000000000000000000000000000000000000000000000000000000005A
+:20464800000000000000000000000000000000000000000000000000000000000000000052
+:2046500000000000000000000000000000000000000000000000000000000000000000004A
+:20465800000000000000000000000000000000000000000000000000000000000000000042
+:2046600000000000000000000000000000000000000000000000000000000000000000003A
+:20466800000000000000000000000000000000000000000000000000000000000000000032
+:2046700000000000000000000000000000000000000000000000000000000000000000002A
+:20467800000000000000000000000000000000000000000000000000000000000000000022
+:2046800000000000000000000000000000000000000000000000000000000000000000001A
+:20468800000000000000000000000000000000000000000000000000000000000000000012
+:2046900000000000000000000000000000000000000000000000000000000000000000000A
+:20469800000000000000000000000000000000000000000000000000000000000000000002
+:2046A0000000000000000000000000000000000000000000000000000000000000000000FA
+:2046A8000000000000000000000000000000000000000000000000000000000000000000F2
+:2046B0000000000000000000000000000000000000000000000000000000000000000000EA
+:2046B8000000000000000000000000000000000000000000000000000000000000000000E2
+:2046C0000000000000000000000000000000000000000000000000000000000000000000DA
+:2046C8000000000000000000000000000000000000000000000000000000000000000000D2
+:2046D0000000000000000000000000000000000000000000000000000000000000000000CA
+:2046D8000000000000000000000000000000000000000000000000000000000000000000C2
+:2046E0000000000000000000000000000000000000000000000000000000000000000000BA
+:2046E8000000000000000000000000000000000000000000000000000000000000000000B2
+:2046F0000000000000000000000000000000000000000000000000000000000000000000AA
+:2046F8000000000000000000000000000000000000000000000000000000000000000000A2
+:20470000000000000000000000000000000000000000000000000000000000000000000099
+:20470800000000000000000000000000000000000000000000000000000000000000000091
+:20471000000000000000000000000000000000000000000000000000000000000000000089
+:20471800000000000000000000000000000000000000000000000000000000000000000081
+:20472000000000000000000000000000000000000000000000000000000000000000000079
+:20472800000000000000000000000000000000000000000000000000000000000000000071
+:20473000000000000000000000000000000000000000000000000000000000000000000069
+:20473800000000000000000000000000000000000000000000000000000000000000000061
+:20474000000000000000000000000000000000000000000000000000000000000000000059
+:20474800000000000000000000000000000000000000000000000000000000000000000051
+:20475000000000000000000000000000000000000000000000000000000000000000000049
+:20475800000000000000000000000000000000000000000000000000000000000000000041
+:20476000000000000000000000000000000000000000000000000000000000000000000039
+:20476800000000000000000000000000000000000000000000000000000000000000000031
+:20477000000000000000000000000000000000000000000000000000000000000000000029
+:20477800000000000000000000000000000000000000000000000000000000000000000021
+:20478000000000000000000000000000000000000000000000000000000000000000000019
+:20478800000000000000000000000000000000000000000000000000000000000000000011
+:20479000000000000000000000000000000000000000000000000000000000000000000009
+:20479800000000000000000000000000000000000000000000000000000000000000000001
+:2047A0000000000000000000000000000000000000000000000000000000000000000000F9
+:2047A8000000000000000000000000000000000000000000000000000000000000000000F1
+:2047B0000000000000000000000000000000000000000000000000000000000000000000E9
+:2047B8000000000000000000000000000000000000000000000000000000000000000000E1
+:2047C0000000000000000000000000000000000000000000000000000000000000000000D9
+:2047C8000000000000000000000000000000000000000000000000000000000000000000D1
+:2047D0000000000000000000000000000000000000000000000000000000000000000000C9
+:2047D8000000000000000000000000000000000000000000000000000000000000000000C1
+:2047E0000000000000000000000000000000000000000000000000000000000000000000B9
+:2047E8000000000000000000000000000000000000000000000000000000000000000000B1
+:2047F0000000000000000000000000000000000000000000000000000000000000000000A9
+:2047F8000000000000000000000000000000000000000000000000000000000000000000A1
+:20480000000000000000000000000000000000000000000000000000000000000000000098
+:20480800000000000000000000000000000000000000000000000000000000000000000090
+:20481000000000000000000000000000000000000000000000000000000000000000000088
+:20481800000000000000000000000000000000000000000000000000000000000000000080
+:20482000000000000000000000000000000000000000000000000000000000000000000078
+:20482800000000000000000000000000000000000000000000000000000000000000000070
+:20483000000000000000000000000000000000000000000000000000000000000000000068
+:20483800000000000000000000000000000000000000000000000000000000000000000060
+:20484000000000000000000000000000000000000000000000000000000000000000000058
+:20484800000000000000000000000000000000000000000000000000000000000000000050
+:20485000000000000000000000000000000000000000000000000000000000000000000048
+:20485800000000000000000000000000000000000000000000000000000000000000000040
+:20486000000000000000000000000000000000000000000000000000000000000000000038
+:20486800000000000000000000000000000000000000000000000000000000000000000030
+:20487000000000000000000000000000000000000000000000000000000000000000000028
+:20487800000000000000000000000000000000000000000000000000000000000000000020
+:20488000000000000000000000000000000000000000000000000000000000000000000018
+:20488800000000000000000000000000000000000000000000000000000000000000000010
+:20489000000000000000000000000000000000000000000000000000000000000000000008
+:20489800000000000000000000000000000000000000000000000000000000000000000000
+:2048A0000000000000000000000000000000000000000000000000000000000000000000F8
+:2048A8000000000000000000000000000000000000000000000000000000000000000000F0
+:2048B0000000000000000000000000000000000000000000000000000000000000000000E8
+:2048B8000000000000000000000000000000000000000000000000000000000000000000E0
+:2048C0000000000000000000000000000000000000000000000000000000000000000000D8
+:2048C8000000000000000000000000000000000000000000000000000000000000000000D0
+:2048D0000000000000000000000000000000000000000000000000000000000000000000C8
+:2048D8000000000000000000000000000000000000000000000000000000000000000000C0
+:2048E0000000000000000000000000000000000000000000000000000000000000000000B8
+:2048E8000000000000000000000000000000000000000000000000000000000000000000B0
+:2048F0000000000000000000000000000000000000000000000000000000000000000000A8
+:2048F8000000000000000000000000000000000000000000000000000000000000000000A0
+:20490000000000000000000000000000000000000000000000000000000000000000000097
+:2049080000000000000000000000000000000000000000000000000000000000000000008F
+:20491000000000000000000000000000000000000000000000000000000000000000000087
+:2049180000000000000000000000000000000000000000000000000000000000000000007F
+:20492000000000000000000000000000000000000000000000000000000000000000000077
+:2049280000000000000000000000000000000000000000000000000000000000000000006F
+:20493000000000000000000000000000000000000000000000000000000000000000000067
+:2049380000000000000000000000000000000000000000000000000000000000000000005F
+:20494000000000000000000000000000000000000000000000000000000000000000000057
+:2049480000000000000000000000000000000000000000000000000000000000000000004F
+:20495000000000000000000000000000000000000000000000000000000000000000000047
+:2049580000000000000000000000000000000000000000000000000000000000000000003F
+:20496000000000000000000000000000000000000000000000000000000000000000000037
+:2049680000000000000000000000000000000000000000000000000000000000000000002F
+:20497000000000000000000000000000000000000000000000000000000000000000000027
+:2049780000000000000000000000000000000000000000000000000000000000000000001F
+:20498000000000000000000000000000000000000000000000000000000000000000000017
+:2049880000000000000000000000000000000000000000000000000000000000000000000F
+:20499000000000000000000000000000000000000000000000000000000000000000000007
+:204998000000000000000000000000000000000000000000000000000000000000000000FF
+:2049A0000000000000000000000000000000000000000000000000000000000000000000F7
+:2049A8000000000000000000000000000000000000000000000000000000000000000000EF
+:2049B0000000000000000000000000000000000000000000000000000000000000000000E7
+:2049B8000000000000000000000000000000000000000000000000000000000000000000DF
+:2049C0000000000000000000000000000000000000000000000000000000000000000000D7
+:2049C8000000000000000000000000000000000000000000000000000000000000000000CF
+:2049D0000000000000000000000000000000000000000000000000000000000000000000C7
+:2049D8000000000000000000000000000000000000000000000000000000000000000000BF
+:2049E0000000000000000000000000000000000000000000000000000000000000000000B7
+:2049E8000000000000000000000000000000000000000000000000000000000000000000AF
+:2049F0000000000000000000000000000000000000000000000000000000000000000000A7
+:2049F80000000000000000000000000000000000000000000000000000000000000000009F
+:204A0000000000000000000000000000000000000000000000000000000000000000000096
+:204A080000000000000000000000000000000000000000000000000000000000000000008E
+:204A1000000000000000000000000000000000000000000000000000000000000000000086
+:204A180000000000000000000000000000000000000000000000000000000000000000007E
+:204A2000000000000000000000000000000000000000000000000000000000000000000076
+:204A280000000000000000000000000000000000000000000000000000000000000000006E
+:204A3000000000000000000000000000000000000000000000000000000000000000000066
+:204A380000000000000000000000000000000000000000000000000000000000000000005E
+:204A4000000000000000000000000000000000000000000000000000000000000000000056
+:204A480000000000000000000000000000000000000000000000000000000000000000004E
+:204A5000000000000000000000000000000000000000000000000000000000000000000046
+:204A580000000000000000000000000000000000000000000000000000000000000000003E
+:204A6000000000000000000000000000000000000000000000000000000000000000000036
+:204A680000000000000000000000000000000000000000000000000000000000000000002E
+:204A7000000000000000000000000000000000000000000000000000000000000000000026
+:204A780000000000000000000000000000000000000000000000000000000000000000001E
+:204A8000000000000000000000000000000000000000000000000000000000000000000016
+:204A880000000000000000000000000000000000000000000000000000000000000000000E
+:204A9000000000000000000000000000000000000000000000000000000000000000000006
+:204A98000000000000000000000000000000000000000000000000000000000000000000FE
+:204AA0000000000000000000000000000000000000000000000000000000000000000000F6
+:204AA8000000000000000000000000000000000000000000000000000000000000000000EE
+:204AB0000000000000000000000000000000000000000000000000000000000000000000E6
+:204AB8000000000000000000000000000000000000000000000000000000000000000000DE
+:204AC0000000000000000000000000000000000000000000000000000000000000000000D6
+:204AC8000000000000000000000000000000000000000000000000000000000000000000CE
+:204AD0000000000000000000000000000000000000000000000000000000000000000000C6
+:204AD8000000000000000000000000000000000000000000000000000000000000000000BE
+:204AE0000000000000000000000000000000000000000000000000000000000000000000B6
+:204AE8000000000000000000000000000000000000000000000000000000000000000000AE
+:204AF0000000000000000000000000000000000000000000000000000000000000000000A6
+:204AF80000000000000000000000000000000000000000000000000000000000000000009E
+:204B0000000000000000000000000000000000000000000000000000000000000000000095
+:204B080000000000000000000000000000000000000000000000000000000000000000008D
+:204B1000000000000000000000000000000000000000000000000000000000000000000085
+:204B180000000000000000000000000000000000000000000000000000000000000000007D
+:204B2000000000000000000000000000000000000000000000000000000000000000000075
+:204B280000000000000000000000000000000000000000000000000000000000000000006D
+:204B3000000000000000000000000000000000000000000000000000000000000000000065
+:204B380000000000000000000000000000000000000000000000000000000000000000005D
+:204B4000000000000000000000000000000000000000000000000000000000000000000055
+:204B480000000000000000000000000000000000000000000000000000000000000000004D
+:204B5000000000000000000000000000000000000000000000000000000000000000000045
+:204B580000000000000000000000000000000000000000000000000000000000000000003D
+:204B6000000000000000000000000000000000000000000000000000000000000000000035
+:204B680000000000000000000000000000000000000000000000000000000000000000002D
+:204B7000000000000000000000000000000000000000000000000000000000000000000025
+:204B780000000000000000000000000000000000000000000000000000000000000000001D
+:204B8000000000000000000000000000000000000000000000000000000000000000000015
+:204B880000000000000000000000000000000000000000000000000000000000000000000D
+:204B9000000000000000000000000000000000000000000000000000000000000000000005
+:204B98000000000000000000000000000000000000000000000000000000000000000000FD
+:204BA0000000000000000000000000000000000000000000000000000000000000000000F5
+:204BA8000000000000000000000000000000000000000000000000000000000000000000ED
+:204BB0000000000000000000000000000000000000000000000000000000000000000000E5
+:204BB8000000000000000000000000000000000000000000000000000000000000000000DD
+:204BC0000000000000000000000000000000000000000000000000000000000000000000D5
+:204BC8000000000000000000000000000000000000000000000000000000000000000000CD
+:204BD0000000000000000000000000000000000000000000000000000000000000000000C5
+:204BD8000000000000000000000000000000000000000000000000000000000000000000BD
+:204BE0000000000000000000000000000000000000000000000000000000000000000000B5
+:204BE8000000000000000000000000000000000000000000000000000000000000000000AD
+:204BF0000000000000000000000000000000000000000000000000000000000000000000A5
+:204BF80000000000000000000000000000000000000000000000000000000000000000009D
+:204C0000000000000000000000000000000000000000000000000000000000000000000094
+:204C080000000000000000000000000000000000000000000000000000000000000000008C
+:204C1000000000000000000000000000000000000000000000000000000000000000000084
+:204C180000000000000000000000000000000000000000000000000000000000000000007C
+:204C2000000000000000000000000000000000000000000000000000000000000000000074
+:204C280000000000000000000000000000000000000000000000000000000000000000006C
+:204C3000000000000000000000000000000000000000000000000000000000000000000064
+:204C380000000000000000000000000000000000000000000000000000000000000000005C
+:204C4000000000000000000000000000000000000000000000000000000000000000000054
+:204C480000000000000000000000000000000000000000000000000000000000000000004C
+:204C5000000000000000000000000000000000000000000000000000000000000000000044
+:204C580000000000000000000000000000000000000000000000000000000000000000003C
+:204C6000000000000000000000000000000000000000000000000000000000000000000034
+:204C680000000000000000000000000000000000000000000000000000000000000000002C
+:204C7000000000000000000000000000000000000000000000000000000000000000000024
+:204C780000000000000000000000000000000000000000000000000000000000000000001C
+:204C8000000000000000000000000000000000000000000000000000000000000000000014
+:204C880000000000000000000000000000000000000000000000000000000000000000000C
+:204C9000000000000000000000000000000000000000000000000000000000000000000004
+:204C98000000000000000000000000000000000000000000000000000000000000000000FC
+:204CA0000000000000000000000000000000000000000000000000000000000000000000F4
+:204CA8000000000000000000000000000000000000000000000000000000000000000000EC
+:204CB0000000000000000000000000000000000000000000000000000000000000000000E4
+:204CB8000000000000000000000000000000000000000000000000000000000000000000DC
+:204CC0000000000000000000000000000000000000000000000000000000000000000000D4
+:204CC8000000000000000000000000000000000000000000000000000000000000000000CC
+:204CD0000000000000000000000000000000000000000000000000000000000000000000C4
+:204CD8000000000000000000000000000000000000000000000000000000000000000000BC
+:204CE0000000000000000000000000000000000000000000000000000000000000000000B4
+:204CE8000000000000000000000000000000000000000000000000000000000000000000AC
+:204CF0000000000000000000000000000000000000000000000000000000000000000000A4
+:204CF80000000000000000000000000000000000000000000000000000000000000000009C
+:204D0000000000000000000000000000000000000000000000000000000000000000000093
+:204D080000000000000000000000000000000000000000000000000000000000000000008B
+:204D1000000000000000000000000000000000000000000000000000000000000000000083
+:204D180000000000000000000000000000000000000000000000000000000000000000007B
+:204D2000000000000000000000000000000000000000000000000000000000000000000073
+:204D280000000000000000000000000000000000000000000000000000000000000000006B
+:204D3000000000000000000000000000000000000000000000000000000000000000000063
+:204D380000000000000000000000000000000000000000000000000000000000000000005B
+:204D4000000000000000000000000000000000000000000000000000000000000000000053
+:204D480000000000000000000000000000000000000000000000000000000000000000004B
+:204D5000000000000000000000000000000000000000000000000000000000000000000043
+:204D580000000000000000000000000000000000000000000000000000000000000000003B
+:204D6000000000000000000000000000000000000000000000000000000000000000000033
+:204D680000000000000000000000000000000000000000000000000000000000000000002B
+:204D7000000000000000000000000000000000000000000000000000000000000000000023
+:204D780000000000000000000000000000000000000000000000000000000000000000001B
+:204D8000000000000000000000000000000000000000000000000000000000000000000013
+:204D880000000000000000000000000000000000000000000000000000000000000000000B
+:204D9000000000000000000000000000000000000000000000000000000000000000000003
+:204D98000000000000000000000000000000000000000000000000000000000000000000FB
+:204DA0000000000000000000000000000000000000000000000000000000000000000000F3
+:204DA8000000000000000000000000000000000000000000000000000000000000000000EB
+:204DB0000000000000000000000000000000000000000000000000000000000000000000E3
+:204DB8000000000000000000000000000000000000000000000000000000000000000000DB
+:204DC0000000000000000000000000000000000000000000000000000000000000000000D3
+:204DC8000000000000000000000000000000000000000000000000000000000000000000CB
+:204DD0000000000000000000000000000000000000000000000000000000000000000000C3
+:204DD8000000000000000000000000000000000000000000000000000000000000000000BB
+:204DE0000000000000000000000000000000000000000000000000000000000000000000B3
+:204DE8000000000000000000000000000000000000000000000000000000000000000000AB
+:204DF0000000000000000000000000000000000000000000000000000000000000000000A3
+:204DF80000000000000000000000000000000000000000000000000000000000000000009B
+:204E0000000000000000000000000000000000000000000000000000000000000000000092
+:204E080000000000000000000000000000000000000000000000000000000000000000008A
+:204E1000000000000000000000000000000000000000000000000000000000000000000082
+:204E180000000000000000000000000000000000000000000000000000000000000000007A
+:204E2000000000000000000000000000000000000000000000000000000000000000000072
+:204E280000000000000000000000000000000000000000000000000000000000000000006A
+:204E3000000000000000000000000000000000000000000000000000000000000000000062
+:204E380000000000000000000000000000000000000000000000000000000000000000005A
+:204E4000000000000000000000000000000000000000000000000000000000000000000052
+:204E480000000000000000000000000000000000000000000000000000000000000000004A
+:204E5000000000000000000000000000000000000000000000000000000000000000000042
+:204E580000000000000000000000000000000000000000000000000000000000000000003A
+:204E6000000000000000000000000000000000000000000000000000000000000000000032
+:204E680000000000000000000000000000000000000000000000000000000000000000002A
+:204E7000000000000000000000000000000000000000000000000000000000000000000022
+:204E780000000000000000000000000000000000000000000000000000000000000000001A
+:204E8000000000000000000000000000000000000000000000000000000000000000000012
+:204E880000000000000000000000000000000000000000000000000000000000000000000A
+:204E9000000000000000000000000000000000000000000000000000000000000000000002
+:204E98000000000000000000000000000000000000000000000000000000000000000000FA
+:204EA0000000000000000000000000000000000000000000000000000000000000000000F2
+:204EA8000000000000000000000000000000000000000000000000000000000000000000EA
+:204EB0000000000000000000000000000000000000000000000000000000000000000000E2
+:204EB8000000000000000000000000000000000000000000000000000000000000000000DA
+:204EC0000000000000000000000000000000000000000000000000000000000000000000D2
+:204EC8000000000000000000000000000000000000000000000000000000000000000000CA
+:204ED0000000000000000000000000000000000000000000000000000000000000000000C2
+:204ED8000000000000000000000000000000000000000000000000000000000000000000BA
+:204EE0000000000000000000000000000000000000000000000000000000000000000000B2
+:204EE8000000000000000000000000000000000000000000000000000000000000000000AA
+:204EF0000000000000000000000000000000000000000000000000000000000000000000A2
+:204EF80000000000000000000000000000000000000000000000000000000000000000009A
+:204F0000000000000000000000000000000000000000000000000000000000000000000091
+:204F0800000000000000000000000000000000000000000000000000000000000000000089
+:204F1000000000000000000000000000000000000000000000000000000000000000000081
+:204F1800000000000000000000000000000000000000000000000000000000000000000079
+:204F2000000000000000000000000000000000000000000000000000000000000000000071
+:204F2800000000000000000000000000000000000000000000000000000000000000000069
+:204F3000000000000000000000000000000000000000000000000000000000000000000061
+:204F3800000000000000000000000000000000000000000000000000000000000000000059
+:204F4000000000000000000000000000000000000000000000000000000000000000000051
+:204F4800000000000000000000000000000000000000000000000000000000000000000049
+:204F5000000000000000000000000000000000000000000000000000000000000000000041
+:204F5800000000000000000000000000000000000000000000000000000000000000000039
+:204F6000000000000000000000000000000000000000000000000000000000000000000031
+:204F6800000000000000000000000000000000000000000000000000000000000000000029
+:204F7000000000000000000000000000000000000000000000000000000000000000000021
+:204F7800000000000000000000000000000000000000000000000000000000000000000019
+:204F8000000000000000000000000000000000000000000000000000000000000000000011
+:204F8800000000000000000000000000000000000000000000000000000000000000000009
+:204F9000000000000000000000000000000000000000000000000000000000000000000001
+:204F98000000000000000000000000000000000000000000000000000000000000000000F9
+:204FA0000000000000000000000000000000000000000000000000000000000000000000F1
+:204FA8000000000000000000000000000000000000000000000000000000000000000000E9
+:204FB0000000000000000000000000000000000000000000000000000000000000000000E1
+:204FB8000000000000000000000000000000000000000000000000000000000000000000D9
+:204FC0000000000000000000000000000000000000000000000000000000000000000000D1
+:204FC8000000000000000000000000000000000000000000000000000000000000000000C9
+:204FD0000000000000000000000000000000000000000000000000000000000000000000C1
+:204FD8000000000000000000000000000000000000000000000000000000000000000000B9
+:204FE0000000000000000000000000000000000000000000000000000000000000000000B1
+:204FE8000000000000000000000000000000000000000000000000000000000000000000A9
+:204FF0000000000000000000000000000000000000000000000000000000000000000000A1
+:204FF800000000000000000000000000000000000000000000000000000000000000000099
+:20500000000000000000000000000000000000000000000000000000000000000000000090
+:20500800000000000000000000000000000000000000000000000000000000000000000088
+:20501000000000000000000000000000000000000000000000000000000000000000000080
+:20501800000000000000000000000000000000000000000000000000000000000000000078
+:20502000000000000000000000000000000000000000000000000000000000000000000070
+:20502800000000000000000000000000000000000000000000000000000000000000000068
+:20503000000000000000000000000000000000000000000000000000000000000000000060
+:20503800000000000000000000000000000000000000000000000000000000000000000058
+:20504000000000000000000000000000000000000000000000000000000000000000000050
+:20504800000000000000000000000000000000000000000000000000000000000000000048
+:20505000000000000000000000000000000000000000000000000000000000000000000040
+:20505800000000000000000000000000000000000000000000000000000000000000000038
+:20506000000000000000000000000000000000000000000000000000000000000000000030
+:20506800000000000000000000000000000000000000000000000000000000000000000028
+:20507000000000000000000000000000000000000000000000000000000000000000000020
+:20507800000000000000000000000000000000000000000000000000000000000000000018
+:20508000000000000000000000000000000000000000000000000000000000000000000010
+:20508800000000000000000000000000000000000000000000000000000000000000000008
+:20509000000000000000000000000000000000000000000000000000000000000000000000
+:205098000000000000000000000000000000000000000000000000000000000000000000F8
+:2050A0000000000000000000000000000000000000000000000000000000000000000000F0
+:2050A8000000000000000000000000000000000000000000000000000000000000000000E8
+:2050B0000000000000000000000000000000000000000000000000000000000000000000E0
+:2050B8000000000000000000000000000000000000000000000000000000000000000000D8
+:2050C0000000000000000000000000000000000000000000000000000000000000000000D0
+:2050C8000000000000000000000000000000000000000000000000000000000000000000C8
+:2050D0000000000000000000000000000000000000000000000000000000000000000000C0
+:2050D8000000000000000000000000000000000000000000000000000000000000000000B8
+:2050E0000000000000000000000000000000000000000000000000000000000000000000B0
+:2050E8000000000000000000000000000000000000000000000000000000000000000000A8
+:2050F0000000000000000000000000000000000000000000000000000000000000000000A0
+:2050F800000000000000000000000000000000000000000000000000000000000000000098
+:2051000000000000000000000000000000000000000000000000000000000000000000008F
+:20510800000000000000000000000000000000000000000000000000000000000000000087
+:2051100000000000000000000000000000000000000000000000000000000000000000007F
+:20511800000000000000000000000000000000000000000000000000000000000000000077
+:2051200000000000000000000000000000000000000000000000000000000000000000006F
+:20512800000000000000000000000000000000000000000000000000000000000000000067
+:2051300000000000000000000000000000000000000000000000000000000000000000005F
+:20513800000000000000000000000000000000000000000000000000000000000000000057
+:2051400000000000000000000000000000000000000000000000000000000000000000004F
+:20514800000000000000000000000000000000000000000000000000000000000000000047
+:2051500000000000000000000000000000000000000000000000000000000000000000003F
+:20515800000000000000000000000000000000000000000000000000000000000000000037
+:2051600000000000000000000000000000000000000000000000000000000000000000002F
+:20516800000000000000000000000000000000000000000000000000000000000000000027
+:2051700000000000000000000000000000000000000000000000000000000000000000001F
+:20517800000000000000000000000000000000000000000000000000000000000000000017
+:2051800000000000000000000000000000000000000000000000000000000000000000000F
+:20518800000000000000000000000000000000000000000000000000000000000000000007
+:205190000000000000000000000000000000000000000000000000000000000000000000FF
+:205198000000000000000000000000000000000000000000000000000000000000000000F7
+:2051A0000000000000000000000000000000000000000000000000000000000000000000EF
+:2051A8000000000000000000000000000000000000000000000000000000000000000000E7
+:2051B0000000000000000000000000000000000000000000000000000000000000000000DF
+:2051B8000000000000000000000000000000000000000000000000000000000000000000D7
+:2051C0000000000000000000000000000000000000000000000000000000000000000000CF
+:2051C8000000000000000000000000000000000000000000000000000000000000000000C7
+:2051D0000000000000000000000000000000000000000000000000000000000000000000BF
+:2051D8000000000000000000000000000000000000000000000000000000000000000000B7
+:2051E0000000000000000000000000000000000000000000000000000000000000000000AF
+:2051E8000000000000000000000000000000000000000000000000000000000000000000A7
+:2051F00000000000000000000000000000000000000000000000000000000000000000009F
+:2051F800000000000000000000000000000000000000000000000000000000000000000097
+:2052000000000000000000000000000000000000000000000000000000000000000000008E
+:20520800000000000000000000000000000000000000000000000000000000000000000086
+:2052100000000000000000000000000000000000000000000000000000000000000000007E
+:20521800000000000000000000000000000000000000000000000000000000000000000076
+:2052200000000000000000000000000000000000000000000000000000000000000000006E
+:20522800000000000000000000000000000000000000000000000000000000000000000066
+:2052300000000000000000000000000000000000000000000000000000000000000000005E
+:20523800000000000000000000000000000000000000000000000000000000000000000056
+:2052400000000000000000000000000000000000000000000000000000000000000000004E
+:20524800000000000000000000000000000000000000000000000000000000000000000046
+:2052500000000000000000000000000000000000000000000000000000000000000000003E
+:20525800000000000000000000000000000000000000000000000000000000000000000036
+:2052600000000000000000000000000000000000000000000000000000000000000000002E
+:20526800000000000000000000000000000000000000000000000000000000000000000026
+:2052700000000000000000000000000000000000000000000000000000000000000000001E
+:20527800000000000000000000000000000000000000000000000000000000000000000016
+:2052800000000000000000000000000000000000000000000000000000000000000000000E
+:20528800000000000000000000000000000000000000000000000000000000000000000006
+:205290000000000000000000000000000000000000000000000000000000000000000000FE
+:205298000000000000000000000000000000000000000000000000000000000000000000F6
+:2052A0000000000000000000000000000000000000000000000000000000000000000000EE
+:2052A8000000000000000000000000000000000000000000000000000000000000000000E6
+:2052B0000000000000000000000000000000000000000000000000000000000000000000DE
+:2052B8000000000000000000000000000000000000000000000000000000000000000000D6
+:2052C0000000000000000000000000000000000000000000000000000000000000000000CE
+:2052C8000000000000000000000000000000000000000000000000000000000000000000C6
+:2052D0000000000000000000000000000000000000000000000000000000000000000000BE
+:2052D8000000000000000000000000000000000000000000000000000000000000000000B6
+:2052E0000000000000000000000000000000000000000000000000000000000000000000AE
+:2052E8000000000000000000000000000000000000000000000000000000000000000000A6
+:2052F00000000000000000000000000000000000000000000000000000000000000000009E
+:2052F800000000000000000000000000000000000000000000000000000000000000000096
+:2053000000000000000000000000000000000000000000000000000000000000000000008D
+:20530800000000000000000000000000000000000000000000000000000000000000000085
+:2053100000000000000000000000000000000000000000000000000000000000000000007D
+:20531800000000000000000000000000000000000000000000000000000000000000000075
+:2053200000000000000000000000000000000000000000000000000000000000000000006D
+:20532800000000000000000000000000000000000000000000000000000000000000000065
+:2053300000000000000000000000000000000000000000000000000000000000000000005D
+:20533800000000000000000000000000000000000000000000000000000000000000000055
+:2053400000000000000000000000000000000000000000000000000000000000000000004D
+:20534800000000000000000000000000000000000000000000000000000000000000000045
+:2053500000000000000000000000000000000000000000000000000000000000000000003D
+:20535800000000000000000000000000000000000000000000000000000000000000000035
+:2053600000000000000000000000000000000000000000000000000000000000000000002D
+:20536800000000000000000000000000000000000000000000000000000000000000000025
+:2053700000000000000000000000000000000000000000000000000000000000000000001D
+:20537800000000000000000000000000000000000000000000000000000000000000000015
+:2053800000000000000000000000000000000000000000000000000000000000000000000D
+:20538800000000000000000000000000000000000000000000000000000000000000000005
+:205390000000000000000000000000000000000000000000000000000000000000000000FD
+:205398000000000000000000000000000000000000000000000000000000000000000000F5
+:2053A0000000000000000000000000000000000000000000000000000000000000000000ED
+:2053A8000000000000000000000000000000000000000000000000000000000000000000E5
+:2053B0000000000000000000000000000000000000000000000000000000000000000000DD
+:2053B8000000000000000000000000000000000000000000000000000000000000000000D5
+:2053C0000000000000000000000000000000000000000000000000000000000000000000CD
+:2053C8000000000000000000000000000000000000000000000000000000000000000000C5
+:2053D0000000000000000000000000000000000000000000000000000000000000000000BD
+:2053D8000000000000000000000000000000000000000000000000000000000000000000B5
+:2053E0000000000000000000000000000000000000000000000000000000000000000000AD
+:2053E8000000000000000000000000000000000000000000000000000000000000000000A5
+:2053F00000000000000000000000000000000000000000000000000000000000000000009D
+:2053F800000000000000000000000000000000000000000000000000000000000000000095
+:2054000000000000000000000000000000000000000000000000000000000000000000008C
+:20540800000000000000000000000000000000000000000000000000000000000000000084
+:2054100000000000000000000000000000000000000000000000000000000000000000007C
+:20541800000000000000000000000000000000000000000000000000000000000000000074
+:2054200000000000000000000000000000000000000000000000000000000000000000006C
+:20542800000000000000000000000000000000000000000000000000000000000000000064
+:2054300000000000000000000000000000000000000000000000000000000000000000005C
+:20543800000000000000000000000000000000000000000000000000000000000000000054
+:2054400000000000000000000000000000000000000000000000000000000000000000004C
+:20544800000000000000000000000000000000000000000000000000000000000000000044
+:2054500000000000000000000000000000000000000000000000000000000000000000003C
+:20545800000000000000000000000000000000000000000000000000000000000000000034
+:2054600000000000000000000000000000000000000000000000000000000000000000002C
+:20546800000000000000000000000000000000000000000000000000000000000000000024
+:2054700000000000000000000000000000000000000000000000000000000000000000001C
+:20547800000000000000000000000000000000000000000000000000000000000000000014
+:2054800000000000000000000000000000000000000000000000000000000000000000000C
+:20548800000000000000000000000000000000000000000000000000000000000000000004
+:205490000000000000000000000000000000000000000000000000000000000000000000FC
+:205498000000000000000000000000000000000000000000000000000000000000000000F4
+:2054A0000000000000000000000000000000000000000000000000000000000000000000EC
+:2054A8000000000000000000000000000000000000000000000000000000000000000000E4
+:2054B0000000000000000000000000000000000000000000000000000000000000000000DC
+:2054B8000000000000000000000000000000000000000000000000000000000000000000D4
+:2054C0000000000000000000000000000000000000000000000000000000000000000000CC
+:2054C8000000000000000000000000000000000000000000000000000000000000000000C4
+:2054D0000000000000000000000000000000000000000000000000000000000000000000BC
+:2054D8000000000000000000000000000000000000000000000000000000000000000000B4
+:2054E0000000000000000000000000000000000000000000000000000000000000000000AC
+:2054E8000000000000000000000000000000000000000000000000000000000000000000A4
+:2054F00000000000000000000000000000000000000000000000000000000000000000009C
+:2054F800000000000000000000000000000000000000000000000000000000000000000094
+:2055000000000000000000000000000000000000000000000000000000000000000000008B
+:20550800000000000000000000000000000000000000000000000000000000000000000083
+:2055100000000000000000000000000000000000000000000000000000000000000000007B
+:20551800000000000000000000000000000000000000000000000000000000000000000073
+:2055200000000000000000000000000000000000000000000000000000000000000000006B
+:20552800000000000000000000000000000000000000000000000000000000000000000063
+:2055300000000000000000000000000000000000000000000000000000000000000000005B
+:20553800000000000000000000000000000000000000000000000000000000000000000053
+:2055400000000000000000000000000000000000000000000000000000000000000000004B
+:20554800000000000000000000000000000000000000000000000000000000000000000043
+:2055500000000000000000000000000000000000000000000000000000000000000000003B
+:20555800000000000000000000000000000000000000000000000000000000000000000033
+:2055600000000000000000000000000000000000000000000000000000000000000000002B
+:20556800000000000000000000000000000000000000000000000000000000000000000023
+:2055700000000000000000000000000000000000000000000000000000000000000000001B
+:20557800000000000000000000000000000000000000000000000000000000000000000013
+:2055800000000000000000000000000000000000000000000000000000000000000000000B
+:20558800000000000000000000000000000000000000000000000000000000000000000003
+:205590000000000000000000000000000000000000000000000000000000000000000000FB
+:205598000000000000000000000000000000000000000000000000000000000000000000F3
+:2055A0000000000000000000000000000000000000000000000000000000000000000000EB
+:2055A8000000000000000000000000000000000000000000000000000000000000000000E3
+:2055B0000000000000000000000000000000000000000000000000000000000000000000DB
+:2055B8000000000000000000000000000000000000000000000000000000000000000000D3
+:2055C0000000000000000000000000000000000000000000000000000000000000000000CB
+:2055C8000000000000000000000000000000000000000000000000000000000000000000C3
+:2055D0000000000000000000000000000000000000000000000000000000000000000000BB
+:2055D8000000000000000000000000000000000000000000000000000000000000000000B3
+:2055E0000000000000000000000000000000000000000000000000000000000000000000AB
+:2055E8000000000000000000000000000000000000000000000000000000000000000000A3
+:2055F00000000000000000000000000000000000000000000000000000000000000000009B
+:2055F800000000000000000000000000000000000000000000000000000000000000000093
+:2056000000000000000000000000000000000000000000000000000000000000000000008A
+:20560800000000000000000000000000000000000000000000000000000000000000000082
+:2056100000000000000000000000000000000000000000000000000000000000000000007A
+:20561800000000000000000000000000000000000000000000000000000000000000000072
+:2056200000000000000000000000000000000000000000000000000000000000000000006A
+:20562800000000000000000000000000000000000000000000000000000000000000000062
+:2056300000000000000000000000000000000000000000000000000000000000000000005A
+:20563800000000000000000000000000000000000000000000000000000000000000000052
+:2056400000000000000000000000000000000000000000000000000000000000000000004A
+:20564800000000000000000000000000000000000000000000000000000000000000000042
+:2056500000000000000000000000000000000000000000000000000000000000000000003A
+:20565800000000000000000000000000000000000000000000000000000000000000000032
+:2056600000000000000000000000000000000000000000000000000000000000000000002A
+:20566800000000000000000000000000000000000000000000000000000000000000000022
+:2056700000000000000000000000000000000000000000000000000000000000000000001A
+:20567800000000000000000000000000000000000000000000000000000000000000000012
+:2056800000000000000000000000000000000000000000000000000000000000000000000A
+:20568800000000000000000000000000000000000000000000000000000000000000000002
+:205690000000000000000000000000000000000000000000000000000000000000000000FA
+:205698000000000000000000000000000000000000000000000000000000000000000000F2
+:2056A0000000000000000000000000000000000000000000000000000000000000000000EA
+:2056A8000000000000000000000000000000000000000000000000000000000000000000E2
+:2056B0000000000000000000000000000000000000000000000000000000000000000000DA
+:2056B8000000000000000000000000000000000000000000000000000000000000000000D2
+:2056C0000000000000000000000000000000000000000000000000000000000000000000CA
+:2056C8000000000000000000000000000000000000000000000000000000000000000000C2
+:2056D0000000000000000000000000000000000000000000000000000000000000000000BA
+:2056D8000000000000000000000000000000000000000000000000000000000000000000B2
+:2056E0000000000000000000000000000000000000000000000000000000000000000000AA
+:2056E8000000000000000000000000000000000000000000000000000000000000000000A2
+:2056F00000000000000000000000000000000000000000000000000000000000000000009A
+:2056F800000000000000000000000000000000000000000000000000000000000000000092
+:20570000000000000000000000000000000000000000000000000000000000000000000089
+:20570800000000000000000000000000000000000000000000000000000000000000000081
+:20571000000000000000000000000000000000000000000000000000000000000000000079
+:20571800000000000000000000000000000000000000000000000000000000000000000071
+:20572000000000000000000000000000000000000000000000000000000000000000000069
+:20572800000000000000000000000000000000000000000000000000000000000000000061
+:20573000000000000000000000000000000000000000000000000000000000000000000059
+:20573800000000000000000000000000000000000000000000000000000000000000000051
+:20574000000000000000000000000000000000000000000000000000000000000000000049
+:20574800000000000000000000000000000000000000000000000000000000000000000041
+:20575000000000000000000000000000000000000000000000000000000000000000000039
+:20575800000000000000000000000000000000000000000000000000000000000000000031
+:20576000000000000000000000000000000000000000000000000000000000000000000029
+:20576800000000000000000000000000000000000000000000000000000000000000000021
+:20577000000000000000000000000000000000000000000000000000000000000000000019
+:20577800000000000000000000000000000000000000000000000000000000000000000011
+:20578000000000000000000000000000000000000000000000000000000000000000000009
+:20578800000000000000000000000000000000000000000000000000000000000000000001
+:205790000000000000000000000000000000000000000000000000000000000000000000F9
+:205798000000000000000000000000000000000000000000000000000000000000000000F1
+:2057A0000000000000000000000000000000000000000000000000000000000000000000E9
+:2057A8000000000000000000000000000000000000000000000000000000000000000000E1
+:2057B0000000000000000000000000000000000000000000000000000000000000000000D9
+:2057B8000000000000000000000000000000000000000000000000000000000000000000D1
+:2057C0000000000000000000000000000000000000000000000000000000000000000000C9
+:2057C8000000000000000000000000000000000000000000000000000000000000000000C1
+:2057D0000000000000000000000000000000000000000000000000000000000000000000B9
+:2057D8000000000000000000000000000000000000000000000000000000000000000000B1
+:2057E0000000000000000000000000000000000000000000000000000000000000000000A9
+:2057E8000000000000000000000000000000000000000000000000000000000000000000A1
+:2057F000000000000000000000000000000000000000000000000000000000000000000099
+:2057F800000000000000000000000000000000000000000000000000000000000000000091
+:20580000000000000000000000000000000000000000000000000000000000000000000088
+:20580800000000000000000000000000000000000000000000000000000000000000000080
+:20581000000000000000000000000000000000000000000000000000000000000000000078
+:20581800000000000000000000000000000000000000000000000000000000000000000070
+:20582000000000000000000000000000000000000000000000000000000000000000000068
+:20582800000000000000000000000000000000000000000000000000000000000000000060
+:20583000000000000000000000000000000000000000000000000000000000000000000058
+:20583800000000000000000000000000000000000000000000000000000000000000000050
+:20584000000000000000000000000000000000000000000000000000000000000000000048
+:20584800000000000000000000000000000000000000000000000000000000000000000040
+:20585000000000000000000000000000000000000000000000000000000000000000000038
+:20585800000000000000000000000000000000000000000000000000000000000000000030
+:20586000000000000000000000000000000000000000000000000000000000000000000028
+:20586800000000000000000000000000000000000000000000000000000000000000000020
+:20587000000000000000000000000000000000000000000000000000000000000000000018
+:20587800000000000000000000000000000000000000000000000000000000000000000010
+:20588000000000000000000000000000000000000000000000000000000000000000000008
+:20588800000000000000000000000000000000000000000000000000000000000000000000
+:205890000000000000000000000000000000000000000000000000000000000000000000F8
+:205898000000000000000000000000000000000000000000000000000000000000000000F0
+:2058A0000000000000000000000000000000000000000000000000000000000000000000E8
+:2058A8000000000000000000000000000000000000000000000000000000000000000000E0
+:2058B0000000000000000000000000000000000000000000000000000000000000000000D8
+:2058B8000000000000000000000000000000000000000000000000000000000000000000D0
+:2058C0000000000000000000000000000000000000000000000000000000000000000000C8
+:2058C8000000000000000000000000000000000000000000000000000000000000000000C0
+:2058D0000000000000000000000000000000000000000000000000000000000000000000B8
+:2058D8000000000000000000000000000000000000000000000000000000000000000000B0
+:2058E0000000000000000000000000000000000000000000000000000000000000000000A8
+:2058E8000000000000000000000000000000000000000000000000000000000000000000A0
+:2058F000000000000000000000000000000000000000000000000000000000000000000098
+:2058F800000000000000000000000000000000000000000000000000000000000000000090
+:20590000000000000000000000000000000000000000000000000000000000000000000087
+:2059080000000000000000000000000000000000000000000000000000000000000000007F
+:20591000000000000000000000000000000000000000000000000000000000000000000077
+:2059180000000000000000000000000000000000000000000000000000000000000000006F
+:20592000000000000000000000000000000000000000000000000000000000000000000067
+:2059280000000000000000000000000000000000000000000000000000000000000000005F
+:20593000000000000000000000000000000000000000000000000000000000000000000057
+:2059380000000000000000000000000000000000000000000000000000000000000000004F
+:20594000000000000000000000000000000000000000000000000000000000000000000047
+:2059480000000000000000000000000000000000000000000000000000000000000000003F
+:20595000000000000000000000000000000000000000000000000000000000000000000037
+:2059580000000000000000000000000000000000000000000000000000000000000000002F
+:20596000000000000000000000000000000000000000000000000000000000000000000027
+:2059680000000000000000000000000000000000000000000000000000000000000000001F
+:20597000000000000000000000000000000000000000000000000000000000000000000017
+:2059780000000000000000000000000000000000000000000000000000000000000000000F
+:20598000000000000000000000000000000000000000000000000000000000000000000007
+:205988000000000000000000000000000000000000000000000000000000000000000000FF
+:205990000000000000000000000000000000000000000000000000000000000000000000F7
+:205998000000000000000000000000000000000000000000000000000000000000000000EF
+:2059A0000000000000000000000000000000000000000000000000000000000000000000E7
+:2059A8000000000000000000000000000000000000000000000000000000000000000000DF
+:2059B0000000000000000000000000000000000000000000000000000000000000000000D7
+:2059B8000000000000000000000000000000000000000000000000000000000000000000CF
+:2059C0000000000000000000000000000000000000000000000000000000000000000000C7
+:2059C8000000000000000000000000000000000000000000000000000000000000000000BF
+:2059D0000000000000000000000000000000000000000000000000000000000000000000B7
+:2059D8000000000000000000000000000000000000000000000000000000000000000000AF
+:2059E0000000000000000000000000000000000000000000000000000000000000000000A7
+:2059E80000000000000000000000000000000000000000000000000000000000000000009F
+:2059F000000000000000000000000000000000000000000000000000000000000000000097
+:2059F80000000000000000000000000000000000000000000000000000000000000000008F
+:205A0000000000000000000000000000000000000000000000000000000000000000000086
+:205A080000000000000000000000000000000000000000000000000000000000000000007E
+:205A1000000000000000000000000000000000000000000000000000000000000000000076
+:205A180000000000000000000000000000000000000000000000000000000000000000006E
+:205A2000000000000000000000000000000000000000000000000000000000000000000066
+:205A280000000000000000000000000000000000000000000000000000000000000000005E
+:205A3000000000000000000000000000000000000000000000000000000000000000000056
+:205A380000000000000000000000000000000000000000000000000000000000000000004E
+:205A4000000000000000000000000000000000000000000000000000000000000000000046
+:205A480000000000000000000000000000000000000000000000000000000000000000003E
+:205A5000000000000000000000000000000000000000000000000000000000000000000036
+:205A580000000000000000000000000000000000000000000000000000000000000000002E
+:205A6000000000000000000000000000000000000000000000000000000000000000000026
+:205A680000000000000000000000000000000000000000000000000000000000000000001E
+:205A7000000000000000000000000000000000000000000000000000000000000000000016
+:205A780000000000000000000000000000000000000000000000000000000000000000000E
+:205A8000000000000000000000000000000000000000000000000000000000000000000006
+:205A88000000000000000000000000000000000000000000000000000000000000000000FE
+:205A90000000000000000000000000000000000000000000000000000000000000000000F6
+:205A98000000000000000000000000000000000000000000000000000000000000000000EE
+:205AA0000000000000000000000000000000000000000000000000000000000000000000E6
+:205AA8000000000000000000000000000000000000000000000000000000000000000000DE
+:205AB0000000000000000000000000000000000000000000000000000000000000000000D6
+:205AB8000000000000000000000000000000000000000000000000000000000000000000CE
+:205AC0000000000000000000000000000000000000000000000000000000000000000000C6
+:205AC8000000000000000000000000000000000000000000000000000000000000000000BE
+:205AD0000000000000000000000000000000000000000000000000000000000000000000B6
+:205AD8000000000000000000000000000000000000000000000000000000000000000000AE
+:205AE0000000000000000000000000000000000000000000000000000000000000000000A6
+:205AE80000000000000000000000000000000000000000000000000000000000000000009E
+:205AF000000000000000000000000000000000000000000000000000000000000000000096
+:205AF80000000000000000000000000000000000000000000000000000000000000000008E
+:205B0000000000000000000000000000000000000000000000000000000000000000000085
+:205B080000000000000000000000000000000000000000000000000000000000000000007D
+:205B1000000000000000000000000000000000000000000000000000000000000000000075
+:205B180000000000000000000000000000000000000000000000000000000000000000006D
+:205B2000000000000000000000000000000000000000000000000000000000000000000065
+:205B280000000000000000000000000000000000000000000000000000000000000000005D
+:205B3000000000000000000000000000000000000000000000000000000000000000000055
+:205B380000000000000000000000000000000000000000000000000000000000000000004D
+:205B4000000000000000000000000000000000000000000000000000000000000000000045
+:205B480000000000000000000000000000000000000000000000000000000000000000003D
+:205B5000000000000000000000000000000000000000000000000000000000000000000035
+:205B580000000000000000000000000000000000000000000000000000000000000000002D
+:205B6000000000000000000000000000000000000000000000000000000000000000000025
+:205B680000000000000000000000000000000000000000000000000000000000000000001D
+:205B7000000000000000000000000000000000000000000000000000000000000000000015
+:205B780000000000000000000000000000000000000000000000000000000000000000000D
+:205B8000000000000000000000000000000000000000000000000000000000000000000005
+:205B88000000000000000000000000000000000000000000000000000000000000000000FD
+:205B90000000000000000000000000000000000000000000000000000000000000000000F5
+:205B98000000000000000000000000000000000000000000000000000000000000000000ED
+:205BA0000000000000000000000000000000000000000000000000000000000000000000E5
+:205BA8000000000000000000000000000000000000000000000000000000000000000000DD
+:205BB0000000000000000000000000000000000000000000000000000000000000000000D5
+:205BB8000000000000000000000000000000000000000000000000000000000000000000CD
+:205BC0000000000000000000000000000000000000000000000000000000000000000000C5
+:205BC8000000000000000000000000000000000000000000000000000000000000000000BD
+:205BD0000000000000000000000000000000000000000000000000000000000000000000B5
+:205BD8000000000000000000000000000000000000000000000000000000000000000000AD
+:205BE0000000000000000000000000000000000000000000000000000000000000000000A5
+:205BE80000000000000000000000000000000000000000000000000000000000000000009D
+:205BF000000000000000000000000000000000000000000000000000000000000000000095
+:205BF80000000000000000000000000000000000000000000000000000000000000000008D
+:205C0000000000000000000000000000000000000000000000000000000000000000000084
+:205C080000000000000000000000000000000000000000000000000000000000000000007C
+:205C1000000000000000000000000000000000000000000000000000000000000000000074
+:205C180000000000000000000000000000000000000000000000000000000000000000006C
+:205C2000000000000000000000000000000000000000000000000000000000000000000064
+:205C280000000000000000000000000000000000000000000000000000000000000000005C
+:205C3000000000000000000000000000000000000000000000000000000000000000000054
+:205C380000000000000000000000000000000000000000000000000000000000000000004C
+:205C4000000000000000000000000000000000000000000000000000000000000000000044
+:205C480000000000000000000000000000000000000000000000000000000000000000003C
+:205C5000000000000000000000000000000000000000000000000000000000000000000034
+:205C580000000000000000000000000000000000000000000000000000000000000000002C
+:205C6000000000000000000000000000000000000000000000000000000000000000000024
+:205C680000000000000000000000000000000000000000000000000000000000000000001C
+:205C7000000000000000000000000000000000000000000000000000000000000000000014
+:205C780000000000000000000000000000000000000000000000000000000000000000000C
+:205C8000000000000000000000000000000000000000000000000000000000000000000004
+:205C88000000000000000000000000000000000000000000000000000000000000000000FC
+:205C90000000000000000000000000000000000000000000000000000000000000000000F4
+:205C98000000000000000000000000000000000000000000000000000000000000000000EC
+:205CA0000000000000000000000000000000000000000000000000000000000000000000E4
+:205CA8000000000000000000000000000000000000000000000000000000000000000000DC
+:205CB0000000000000000000000000000000000000000000000000000000000000000000D4
+:205CB8000000000000000000000000000000000000000000000000000000000000000000CC
+:205CC0000000000000000000000000000000000000000000000000000000000000000000C4
+:205CC8000000000000000000000000000000000000000000000000000000000000000000BC
+:205CD0000000000000000000000000000000000000000000000000000000000000000000B4
+:205CD8000000000000000000000000000000000000000000000000000000000000000000AC
+:205CE0000000000000000000000000000000000000000000000000000000000000000000A4
+:205CE80000000000000000000000000000000000000000000000000000000000000000009C
+:205CF000000000000000000000000000000000000000000000000000000000000000000094
+:205CF80000000000000000000000000000000000000000000000000000000000000000008C
+:205D0000000000000000000000000000000000000000000000000000000000000000000083
+:205D080000000000000000000000000000000000000000000000000000000000000000007B
+:205D1000000000000000000000000000000000000000000000000000000000000000000073
+:205D180000000000000000000000000000000000000000000000000000000000000000006B
+:205D2000000000000000000000000000000000000000000000000000000000000000000063
+:205D280000000000000000000000000000000000000000000000000000000000000000005B
+:205D3000000000000000000000000000000000000000000000000000000000000000000053
+:205D380000000000000000000000000000000000000000000000000000000000000000004B
+:205D4000000000000000000000000000000000000000000000000000000000000000000043
+:205D480000000000000000000000000000000000000000000000000000000000000000003B
+:205D5000000000000000000000000000000000000000000000000000000000000000000033
+:205D580000000000000000000000000000000000000000000000000000000000000000002B
+:205D6000000000000000000000000000000000000000000000000000000000000000000023
+:205D680000000000000000000000000000000000000000000000000000000000000000001B
+:205D7000000000000000000000000000000000000000000000000000000000000000000013
+:205D780000000000000000000000000000000000000000000000000000000000000000000B
+:205D8000000000000000000000000000000000000000000000000000000000000000000003
+:205D88000000000000000000000000000000000000000000000000000000000000000000FB
+:205D90000000000000000000000000000000000000000000000000000000000000000000F3
+:205D98000000000000000000000000000000000000000000000000000000000000000000EB
+:205DA0000000000000000000000000000000000000000000000000000000000000000000E3
+:205DA8000000000000000000000000000000000000000000000000000000000000000000DB
+:205DB0000000000000000000000000000000000000000000000000000000000000000000D3
+:205DB8000000000000000000000000000000000000000000000000000000000000000000CB
+:205DC0000000000000000000000000000000000000000000000000000000000000000000C3
+:205DC8000000000000000000000000000000000000000000000000000000000000000000BB
+:205DD0000000000000000000000000000000000000000000000000000000000000000000B3
+:205DD8000000000000000000000000000000000000000000000000000000000000000000AB
+:205DE0000000000000000000000000000000000000000000000000000000000000000000A3
+:205DE80000000000000000000000000000000000000000000000000000000000000000009B
+:205DF000000000000000000000000000000000000000000000000000000000000000000093
+:205DF80000000000000000000000000000000000000000000000000000000000000000008B
+:205E0000000000000000000000000000000000000000000000000000000000000000000082
+:205E080000000000000000000000000000000000000000000000000000000000000000007A
+:205E1000000000000000000000000000000000000000000000000000000000000000000072
+:205E180000000000000000000000000000000000000000000000000000000000000000006A
+:205E2000000000000000000000000000000000000000000000000000000000000000000062
+:205E280000000000000000000000000000000000000000000000000000000000000000005A
+:205E3000000000000000000000000000000000000000000000000000000000000000000052
+:205E380000000000000000000000000000000000000000000000000000000000000000004A
+:205E4000000000000000000000000000000000000000000000000000000000000000000042
+:205E480000000000000000000000000000000000000000000000000000000000000000003A
+:205E5000000000000000000000000000000000000000000000000000000000000000000032
+:205E580000000000000000000000000000000000000000000000000000000000000000002A
+:205E6000000000000000000000000000000000000000000000000000000000000000000022
+:205E680000000000000000000000000000000000000000000000000000000000000000001A
+:205E7000000000000000000000000000000000000000000000000000000000000000000012
+:205E780000000000000000000000000000000000000000000000000000000000000000000A
+:205E8000000000000000000000000000000000000000000000000000000000000000000002
+:205E88000000000000000000000000000000000000000000000000000000000000000000FA
+:205E90000000000000000000000000000000000000000000000000000000000000000000F2
+:205E98000000000000000000000000000000000000000000000000000000000000000000EA
+:205EA0000000000000000000000000000000000000000000000000000000000000000000E2
+:205EA8000000000000000000000000000000000000000000000000000000000000000000DA
+:205EB0000000000000000000000000000000000000000000000000000000000000000000D2
+:205EB8000000000000000000000000000000000000000000000000000000000000000000CA
+:205EC0000000000000000000000000000000000000000000000000000000000000000000C2
+:205EC8000000000000000000000000000000000000000000000000000000000000000000BA
+:205ED0000000000000000000000000000000000000000000000000000000000000000000B2
+:205ED8000000000000000000000000000000000000000000000000000000000000000000AA
+:205EE0000000000000000000000000000000000000000000000000000000000000000000A2
+:205EE80000000000000000000000000000000000000000000000000000000000000000009A
+:205EF000000000000000000000000000000000000000000000000000000000000000000092
+:205EF80000000000000000000000000000000000000000000000000000000000000000008A
+:205F0000000000000000000000000000000000000000000000000000000000000000000081
+:205F0800000000000000000000000000000000000000000000000000000000000000000079
+:205F1000000000000000000000000000000000000000000000000000000000000000000071
+:205F1800000000000000000000000000000000000000000000000000000000000000000069
+:205F2000000000000000000000000000000000000000000000000000000000000000000061
+:205F2800000000000000000000000000000000000000000000000000000000000000000059
+:205F3000000000000000000000000000000000000000000000000000000000000000000051
+:205F3800000000000000000000000000000000000000000000000000000000000000000049
+:205F4000000000000000000000000000000000000000000000000000000000000000000041
+:205F4800000000000000000000000000000000000000000000000000000000000000000039
+:205F5000000000000000000000000000000000000000000000000000000000000000000031
+:205F5800000000000000000000000000000000000000000000000000000000000000000029
+:205F6000000000000000000000000000000000000000000000000000000000000000000021
+:205F6800000000000000000000000000000000000000000000000000000000000000000019
+:205F7000000000000000000000000000000000000000000000000000000000000000000011
+:205F7800000000000000000000000000000000000000000000000000000000000000000009
+:205F8000000000000000000000000000000000000000000000000000000000000000000001
+:205F88000000000000000000000000000000000000000000000000000000000000000000F9
+:205F90000000000000000000000000000000000000000000000000000000000000000000F1
+:205F98000000000000000000000000000000000000000000000000000000000000000000E9
+:205FA0000000000000000000000000000000000000000000000000000000000000000000E1
+:205FA8000000000000000000000000000000000000000000000000000000000000000000D9
+:205FB0000000000000000000000000000000000000000000000000000000000000000000D1
+:205FB8000000000000000000000000000000000000000000000000000000000000000000C9
+:205FC0000000000000000000000000000000000000000000000000000000000000000000C1
+:205FC8000000000000000000000000000000000000000000000000000000000000000000B9
+:205FD0000000000000000000000000000000000000000000000000000000000000000000B1
+:205FD8000000000000000000000000000000000000000000000000000000000000000000A9
+:205FE0000000000000000000000000000000000000000000000000000000000000000000A1
+:205FE800000000000000000000000000000000000000000000000000000000000000000099
+:205FF000000000000000000000000000000000000000000000000000000000000000000091
+:205FF800000000000000000000000000000000000000000000000000000000000000000089
+:20600000000000000000000000000000000000000000000000000000000000000000000080
+:20600800000000000000000000000000000000000000000000000000000000000000000078
+:20601000000000000000000000000000000000000000000000000000000000000000000070
+:20601800000000000000000000000000000000000000000000000000000000000000000068
+:20602000000000000000000000000000000000000000000000000000000000000000000060
+:20602800000000000000000000000000000000000000000000000000000000000000000058
+:20603000000000000000000000000000000000000000000000000000000000000000000050
+:20603800000000000000000000000000000000000000000000000000000000000000000048
+:20604000000000000000000000000000000000000000000000000000000000000000000040
+:20604800000000000000000000000000000000000000000000000000000000000000000038
+:20605000000000000000000000000000000000000000000000000000000000000000000030
+:20605800000000000000000000000000000000000000000000000000000000000000000028
+:20606000000000000000000000000000000000000000000000000000000000000000000020
+:20606800000000000000000000000000000000000000000000000000000000000000000018
+:20607000000000000000000000000000000000000000000000000000000000000000000010
+:20607800000000000000000000000000000000000000000000000000000000000000000008
+:20608000000000000000000000000000000000000000000000000000000000000000000000
+:206088000000000000000000000000000000000000000000000000000000000000000000F8
+:206090000000000000000000000000000000000000000000000000000000000000000000F0
+:206098000000000000000000000000000000000000000000000000000000000000000000E8
+:2060A0000000000000000000000000000000000000000000000000000000000000000000E0
+:2060A8000000000000000000000000000000000000000000000000000000000000000000D8
+:2060B0000000000000000000000000000000000000000000000000000000000000000000D0
+:2060B8000000000000000000000000000000000000000000000000000000000000000000C8
+:2060C0000000000000000000000000000000000000000000000000000000000000000000C0
+:2060C8000000000000000000000000000000000000000000000000000000000000000000B8
+:2060D0000000000000000000000000000000000000000000000000000000000000000000B0
+:2060D8000000000000000000000000000000000000000000000000000000000000000000A8
+:2060E0000000000000000000000000000000000000000000000000000000000000000000A0
+:2060E800000000000000000000000000000000000000000000000000000000000000000098
+:2060F000000000000000000000000000000000000000000000000000000000000000000090
+:2060F800000000000000000000000000000000000000000000000000000000000000000088
+:2061000000000000000000000000000000000000000000000000000000000000000000007F
+:20610800000000000000000000000000000000000000000000000000000000000000000077
+:2061100000000000000000000000000000000000000000000000000000000000000000006F
+:20611800000000000000000000000000000000000000000000000000000000000000000067
+:2061200000000000000000000000000000000000000000000000000000000000000000005F
+:20612800000000000000000000000000000000000000000000000000000000000000000057
+:2061300000000000000000000000000000000000000000000000000000000000000000004F
+:20613800000000000000000000000000000000000000000000000000000000000000000047
+:2061400000000000000000000000000000000000000000000000000000000000000000003F
+:20614800000000000000000000000000000000000000000000000000000000000000000037
+:2061500000000000000000000000000000000000000000000000000000000000000000002F
+:20615800000000000000000000000000000000000000000000000000000000000000000027
+:2061600000000000000000000000000000000000000000000000000000000000000000001F
+:20616800000000000000000000000000000000000000000000000000000000000000000017
+:2061700000000000000000000000000000000000000000000000000000000000000000000F
+:20617800000000000000000000000000000000000000000000000000000000000000000007
+:206180000000000000000000000000000000000000000000000000000000000000000000FF
+:206188000000000000000000000000000000000000000000000000000000000000000000F7
+:206190000000000000000000000000000000000000000000000000000000000000000000EF
+:206198000000000000000000000000000000000000000000000000000000000000000000E7
+:2061A0000000000000000000000000000000000000000000000000000000000000000000DF
+:2061A8000000000000000000000000000000000000000000000000000000000000000000D7
+:2061B0000000000000000000000000000000000000000000000000000000000000000000CF
+:2061B8000000000000000000000000000000000000000000000000000000000000000000C7
+:2061C0000000000000000000000000000000000000000000000000000000000000000000BF
+:2061C8000000000000000000000000000000000000000000000000000000000000000000B7
+:2061D0000000000000000000000000000000000000000000000000000000000000000000AF
+:2061D8000000000000000000000000000000000000000000000000000000000000000000A7
+:2061E00000000000000000000000000000000000000000000000000000000000000000009F
+:2061E800000000000000000000000000000000000000000000000000000000000000000097
+:2061F00000000000000000000000000000000000000000000000000000000000000000008F
+:2061F800000000000000000000000000000000000000000000000000000000000000000087
+:2062000000000000000000000000000000000000000000000000000000000000000000007E
+:20620800000000000000000000000000000000000000000000000000000000000000000076
+:2062100000000000000000000000000000000000000000000000000000000000000000006E
+:20621800000000000000000000000000000000000000000000000000000000000000000066
+:2062200000000000000000000000000000000000000000000000000000000000000000005E
+:20622800000000000000000000000000000000000000000000000000000000000000000056
+:2062300000000000000000000000000000000000000000000000000000000000000000004E
+:20623800000000000000000000000000000000000000000000000000000000000000000046
+:2062400000000000000000000000000000000000000000000000000000000000000000003E
+:20624800000000000000000000000000000000000000000000000000000000000000000036
+:2062500000000000000000000000000000000000000000000000000000000000000000002E
+:20625800000000000000000000000000000000000000000000000000000000000000000026
+:2062600000000000000000000000000000000000000000000000000000000000000000001E
+:20626800000000000000000000000000000000000000000000000000000000000000000016
+:2062700000000000000000000000000000000000000000000000000000000000000000000E
+:20627800000000000000000000000000000000000000000000000000000000000000000006
+:206280000000000000000000000000000000000000000000000000000000000000000000FE
+:206288000000000000000000000000000000000000000000000000000000000000000000F6
+:206290000000000000000000000000000000000000000000000000000000000000000000EE
+:206298000000000000000000000000000000000000000000000000000000000000000000E6
+:2062A0000000000000000000000000000000000000000000000000000000000000000000DE
+:2062A8000000000000000000000000000000000000000000000000000000000000000000D6
+:2062B0000000000000000000000000000000000000000000000000000000000000000000CE
+:2062B8000000000000000000000000000000000000000000000000000000000000000000C6
+:2062C0000000000000000000000000000000000000000000000000000000000000000000BE
+:2062C8000000000000000000000000000000000000000000000000000000000000000000B6
+:2062D0000000000000000000000000000000000000000000000000000000000000000000AE
+:2062D8000000000000000000000000000000000000000000000000000000000000000000A6
+:2062E00000000000000000000000000000000000000000000000000000000000000000009E
+:2062E800000000000000000000000000000000000000000000000000000000000000000096
+:2062F00000000000000000000000000000000000000000000000000000000000000000008E
+:2062F800000000000000000000000000000000000000000000000000000000000000000086
+:2063000000000000000000000000000000000000000000000000000000000000000000007D
+:20630800000000000000000000000000000000000000000000000000000000000000000075
+:2063100000000000000000000000000000000000000000000000000000000000000000006D
+:20631800000000000000000000000000000000000000000000000000000000000000000065
+:2063200000000000000000000000000000000000000000000000000000000000000000005D
+:20632800000000000000000000000000000000000000000000000000000000000000000055
+:2063300000000000000000000000000000000000000000000000000000000000000000004D
+:20633800000000000000000000000000000000000000000000000000000000000000000045
+:2063400000000000000000000000000000000000000000000000000000000000000000003D
+:20634800000000000000000000000000000000000000000000000000000000000000000035
+:2063500000000000000000000000000000000000000000000000000000000000000000002D
+:20635800000000000000000000000000000000000000000000000000000000000000000025
+:2063600000000000000000000000000000000000000000000000000000000000000000001D
+:20636800000000000000000000000000000000000000000000000000000000000000000015
+:2063700000000000000000000000000000000000000000000000000000000000000000000D
+:20637800000000000000000000000000000000000000000000000000000000000000000005
+:206380000000000000000000000000000000000000000000000000000000000000000000FD
+:206388000000000000000000000000000000000000000000000000000000000000000000F5
+:206390000000000000000000000000000000000000000000000000000000000000000000ED
+:206398000000000000000000000000000000000000000000000000000000000000000000E5
+:2063A0000000000000000000000000000000000000000000000000000000000000000000DD
+:2063A8000000000000000000000000000000000000000000000000000000000000000000D5
+:2063B0000000000000000000000000000000000000000000000000000000000000000000CD
+:2063B8000000000000000000000000000000000000000000000000000000000000000000C5
+:2063C0000000000000000000000000000000000000000000000000000000000000000000BD
+:2063C8000000000000000000000000000000000000000000000000000000000000000000B5
+:2063D0000000000000000000000000000000000000000000000000000000000000000000AD
+:2063D8000000000000000000000000000000000000000000000000000000000000000000A5
+:2063E00000000000000000000000000000000000000000000000000000000000000000009D
+:2063E800000000000000000000000000000000000000000000000000000000000000000095
+:2063F00000000000000000000000000000000000000000000000000000000000000000008D
+:2063F800000000000000000000000000000000000000000000000000000000000000000085
+:2064000000000000000000000000000000000000000000000000000000000000000000007C
+:20640800000000000000000000000000000000000000000000000000000000000000000074
+:2064100000000000000000000000000000000000000000000000000000000000000000006C
+:20641800000000000000000000000000000000000000000000000000000000000000000064
+:2064200000000000000000000000000000000000000000000000000000000000000000005C
+:20642800000000000000000000000000000000000000000000000000000000000000000054
+:2064300000000000000000000000000000000000000000000000000000000000000000004C
+:20643800000000000000000000000000000000000000000000000000000000000000000044
+:2064400000000000000000000000000000000000000000000000000000000000000000003C
+:20644800000000000000000000000000000000000000000000000000000000000000000034
+:2064500000000000000000000000000000000000000000000000000000000000000000002C
+:20645800000000000000000000000000000000000000000000000000000000000000000024
+:2064600000000000000000000000000000000000000000000000000000000000000000001C
+:20646800000000000000000000000000000000000000000000000000000000000000000014
+:2064700000000000000000000000000000000000000000000000000000000000000000000C
+:20647800000000000000000000000000000000000000000000000000000000000000000004
+:206480000000000000000000000000000000000000000000000000000000000000000000FC
+:206488000000000000000000000000000000000000000000000000000000000000000000F4
+:206490000000000000000000000000000000000000000000000000000000000000000000EC
+:206498000000000000000000000000000000000000000000000000000000000000000000E4
+:2064A0000000000000000000000000000000000000000000000000000000000000000000DC
+:2064A8000000000000000000000000000000000000000000000000000000000000000000D4
+:2064B0000000000000000000000000000000000000000000000000000000000000000000CC
+:2064B8000000000000000000000000000000000000000000000000000000000000000000C4
+:2064C0000000000000000000000000000000000000000000000000000000000000000000BC
+:2064C8000000000000000000000000000000000000000000000000000000000000000000B4
+:2064D0000000000000000000000000000000000000000000000000000000000000000000AC
+:2064D8000000000000000000000000000000000000000000000000000000000000000000A4
+:2064E00000000000000000000000000000000000000000000000000000000000000000009C
+:2064E800000000000000000000000000000000000000000000000000000000000000000094
+:2064F00000000000000000000000000000000000000000000000000000000000000000008C
+:2064F800000000000000000000000000000000000000000000000000000000000000000084
+:2065000000000000000000000000000000000000000000000000000000000000000000007B
+:20650800000000000000000000000000000000000000000000000000000000000000000073
+:2065100000000000000000000000000000000000000000000000000000000000000000006B
+:20651800000000000000000000000000000000000000000000000000000000000000000063
+:2065200000000000000000000000000000000000000000000000000000000000000000005B
+:20652800000000000000000000000000000000000000000000000000000000000000000053
+:2065300000000000000000000000000000000000000000000000000000000000000000004B
+:20653800000000000000000000000000000000000000000000000000000000000000000043
+:2065400000000000000000000000000000000000000000000000000000000000000000003B
+:20654800000000000000000000000000000000000000000000000000000000000000000033
+:2065500000000000000000000000000000000000000000000000000000000000000000002B
+:20655800000000000000000000000000000000000000000000000000000000000000000023
+:2065600000000000000000000000000000000000000000000000000000000000000000001B
+:20656800000000000000000000000000000000000000000000000000000000000000000013
+:2065700000000000000000000000000000000000000000000000000000000000000000000B
+:20657800000000000000000000000000000000000000000000000000000000000000000003
+:206580000000000000000000000000000000000000000000000000000000000000000000FB
+:206588000000000000000000000000000000000000000000000000000000000000000000F3
+:206590000000000000000000000000000000000000000000000000000000000000000000EB
+:206598000000000000000000000000000000000000000000000000000000000000000000E3
+:2065A0000000000000000000000000000000000000000000000000000000000000000000DB
+:2065A8000000000000000000000000000000000000000000000000000000000000000000D3
+:2065B0000000000000000000000000000000000000000000000000000000000000000000CB
+:2065B8000000000000000000000000000000000000000000000000000000000000000000C3
+:2065C0000000000000000000000000000000000000000000000000000000000000000000BB
+:2065C8000000000000000000000000000000000000000000000000000000000000000000B3
+:2065D0000000000000000000000000000000000000000000000000000000000000000000AB
+:2065D8000000000000000000000000000000000000000000000000000000000000000000A3
+:2065E00000000000000000000000000000000000000000000000000000000000000000009B
+:2065E800000000000000000000000000000000000000000000000000000000000000000093
+:2065F00000000000000000000000000000000000000000000000000000000000000000008B
+:2065F800000000000000000000000000000000000000000000000000000000000000000083
+:2066000000000000000000000000000000000000000000000000000000000000000000007A
+:20660800000000000000000000000000000000000000000000000000000000000000000072
+:2066100000000000000000000000000000000000000000000000000000000000000000006A
+:20661800000000000000000000000000000000000000000000000000000000000000000062
+:2066200000000000000000000000000000000000000000000000000000000000000000005A
+:20662800000000000000000000000000000000000000000000000000000000000000000052
+:2066300000000000000000000000000000000000000000000000000000000000000000004A
+:20663800000000000000000000000000000000000000000000000000000000000000000042
+:2066400000000000000000000000000000000000000000000000000000000000000000003A
+:20664800000000000000000000000000000000000000000000000000000000000000000032
+:2066500000000000000000000000000000000000000000000000000000000000000000002A
+:20665800000000000000000000000000000000000000000000000000000000000000000022
+:2066600000000000000000000000000000000000000000000000000000000000000000001A
+:20666800000000000000000000000000000000000000000000000000000000000000000012
+:2066700000000000000000000000000000000000000000000000000000000000000000000A
+:20667800000000000000000000000000000000000000000000000000000000000000000002
+:206680000000000000000000000000000000000000000000000000000000000000000000FA
+:206688000000000000000000000000000000000000000000000000000000000000000000F2
+:206690000000000000000000000000000000000000000000000000000000000000000000EA
+:206698000000000000000000000000000000000000000000000000000000000000000000E2
+:2066A0000000000000000000000000000000000000000000000000000000000000000000DA
+:2066A8000000000000000000000000000000000000000000000000000000000000000000D2
+:2066B0000000000000000000000000000000000000000000000000000000000000000000CA
+:2066B8000000000000000000000000000000000000000000000000000000000000000000C2
+:2066C0000000000000000000000000000000000000000000000000000000000000000000BA
+:2066C8000000000000000000000000000000000000000000000000000000000000000000B2
+:2066D0000000000000000000000000000000000000000000000000000000000000000000AA
+:2066D8000000000000000000000000000000000000000000000000000000000000000000A2
+:2066E00000000000000000000000000000000000000000000000000000000000000000009A
+:2066E800000000000000000000000000000000000000000000000000000000000000000092
+:2066F00000000000000000000000000000000000000000000000000000000000000000008A
+:2066F800000000000000000000000000000000000000000000000000000000000000000082
+:20670000000000000000000000000000000000000000000000000000000000000000000079
+:20670800000000000000000000000000000000000000000000000000000000000000000071
+:20671000000000000000000000000000000000000000000000000000000000000000000069
+:20671800000000000000000000000000000000000000000000000000000000000000000061
+:20672000000000000000000000000000000000000000000000000000000000000000000059
+:20672800000000000000000000000000000000000000000000000000000000000000000051
+:20673000000000000000000000000000000000000000000000000000000000000000000049
+:20673800000000000000000000000000000000000000000000000000000000000000000041
+:20674000000000000000000000000000000000000000000000000000000000000000000039
+:20674800000000000000000000000000000000000000000000000000000000000000000031
+:20675000000000000000000000000000000000000000000000000000000000000000000029
+:20675800000000000000000000000000000000000000000000000000000000000000000021
+:20676000000000000000000000000000000000000000000000000000000000000000000019
+:20676800000000000000000000000000000000000000000000000000000000000000000011
+:20677000000000000000000000000000000000000000000000000000000000000000000009
+:20677800000000000000000000000000000000000000000000000000000000000000000001
+:206780000000000000000000000000000000000000000000000000000000000000000000F9
+:206788000000000000000000000000000000000000000000000000000000000000000000F1
+:206790000000000000000000000000000000000000000000000000000000000000000000E9
+:206798000000000000000000000000000000000000000000000000000000000000000000E1
+:2067A0000000000000000000000000000000000000000000000000000000000000000000D9
+:2067A8000000000000000000000000000000000000000000000000000000000000000000D1
+:2067B0000000000000000000000000000000000000000000000000000000000000000000C9
+:2067B8000000000000000000000000000000000000000000000000000000000000000000C1
+:2067C0000000000000000000000000000000000000000000000000000000000000000000B9
+:2067C8000000000000000000000000000000000000000000000000000000000000000000B1
+:2067D0000000000000000000000000000000000000000000000000000000000000000000A9
+:2067D8000000000000000000000000000000000000000000000000000000000000000000A1
+:2067E000000000000000000000000000000000000000000000000000000000000000000099
+:2067E800000000000000000000000000000000000000000000000000000000000000000091
+:2067F000000000000000000000000000000000000000000000000000000000000000000089
+:2067F800000000000000000000000000000000000000000000000000000000000000000081
+:20680000000000000000000000000000000000000000000000000000000000000000000078
+:20680800000000000000000000000000000000000000000000000000000000000000000070
+:20681000000000000000000000000000000000000000000000000000000000000000000068
+:20681800000000000000000000000000000000000000000000000000000000000000000060
+:20682000000000000000000000000000000000000000000000000000000000000000000058
+:20682800000000000000000000000000000000000000000000000000000000000000000050
+:20683000000000000000000000000000000000000000000000000000000000000000000048
+:20683800000000000000000000000000000000000000000000000000000000000000000040
+:20684000000000000000000000000000000000000000000000000000000000000000000038
+:20684800000000000000000000000000000000000000000000000000000000000000000030
+:20685000000000000000000000000000000000000000000000000000000000000000000028
+:20685800000000000000000000000000000000000000000000000000000000000000000020
+:20686000000000000000000000000000000000000000000000000000000000000000000018
+:20686800000000000000000000000000000000000000000000000000000000000000000010
+:20687000000000000000000000000000000000000000000000000000000000000000000008
+:20687800000000000000000000000000000000000000000000000000000000000000000000
+:206880000000000000000000000000000000000000000000000000000000000000000000F8
+:206888000000000000000000000000000000000000000000000000000000000000000000F0
+:206890000000000000000000000000000000000000000000000000000000000000000000E8
+:206898000000000000000000000000000000000000000000000000000000000000000000E0
+:2068A0000000000000000000000000000000000000000000000000000000000000000000D8
+:2068A8000000000000000000000000000000000000000000000000000000000000000000D0
+:2068B0000000000000000000000000000000000000000000000000000000000000000000C8
+:2068B8000000000000000000000000000000000000000000000000000000000000000000C0
+:2068C0000000000000000000000000000000000000000000000000000000000000000000B8
+:2068C8000000000000000000000000000000000000000000000000000000000000000000B0
+:2068D0000000000000000000000000000000000000000000000000000000000000000000A8
+:2068D8000000000000000000000000000000000000000000000000000000000000000000A0
+:2068E000000000000000000000000000000000000000000000000000000000000000000098
+:2068E800000000000000000000000000000000000000000000000000000000000000000090
+:2068F000000000000000000000000000000000000000000000000000000000000000000088
+:2068F800000000000000000000000000000000000000000000000000000000000000000080
+:20690000000000000000000000000000000000000000000000000000000000000000000077
+:2069080000000000000000000000000000000000000000000000000000000000000000006F
+:20691000000000000000000000000000000000000000000000000000000000000000000067
+:2069180000000000000000000000000000000000000000000000000000000000000000005F
+:20692000000000000000000000000000000000000000000000000000000000000000000057
+:2069280000000000000000000000000000000000000000000000000000000000000000004F
+:20693000000000000000000000000000000000000000000000000000000000000000000047
+:2069380000000000000000000000000000000000000000000000000000000000000000003F
+:20694000000000000000000000000000000000000000000000000000000000000000000037
+:2069480000000000000000000000000000000000000000000000000000000000000000002F
+:20695000000000000000000000000000000000000000000000000000000000000000000027
+:2069580000000000000000000000000000000000000000000000000000000000000000001F
+:20696000000000000000000000000000000000000000000000000000000000000000000017
+:2069680000000000000000000000000000000000000000000000000000000000000000000F
+:20697000000000000000000000000000000000000000000000000000000000000000000007
+:206978000000000000000000000000000000000000000000000000000000000000000000FF
+:206980000000000000000000000000000000000000000000000000000000000000000000F7
+:206988000000000000000000000000000000000000000000000000000000000000000000EF
+:206990000000000000000000000000000000000000000000000000000000000000000000E7
+:206998000000000000000000000000000000000000000000000000000000000000000000DF
+:2069A0000000000000000000000000000000000000000000000000000000000000000000D7
+:2069A8000000000000000000000000000000000000000000000000000000000000000000CF
+:2069B0000000000000000000000000000000000000000000000000000000000000000000C7
+:2069B8000000000000000000000000000000000000000000000000000000000000000000BF
+:2069C0000000000000000000000000000000000000000000000000000000000000000000B7
+:2069C8000000000000000000000000000000000000000000000000000000000000000000AF
+:2069D0000000000000000000000000000000000000000000000000000000000000000000A7
+:2069D80000000000000000000000000000000000000000000000000000000000000000009F
+:2069E000000000000000000000000000000000000000000000000000000000000000000097
+:2069E80000000000000000000000000000000000000000000000000000000000000000008F
+:2069F000000000000000000000000000000000000000000000000000000000000000000087
+:2069F80000000000000000000000000000000000000000000000000000000000000000007F
+:206A0000000000000000000000000000000000000000000000000000000000000000000076
+:206A080000000000000000000000000000000000000000000000000000000000000000006E
+:206A1000000000000000000000000000000000000000000000000000000000000000000066
+:206A180000000000000000000000000000000000000000000000000000000000000000005E
+:206A2000000000000000000000000000000000000000000000000000000000000000000056
+:206A280000000000000000000000000000000000000000000000000000000000000000004E
+:206A3000000000000000000000000000000000000000000000000000000000000000000046
+:206A380000000000000000000000000000000000000000000000000000000000000000003E
+:206A4000000000000000000000000000000000000000000000000000000000000000000036
+:206A480000000000000000000000000000000000000000000000000000000000000000002E
+:206A5000000000000000000000000000000000000000000000000000000000000000000026
+:206A580000000000000000000000000000000000000000000000000000000000000000001E
+:206A6000000000000000000000000000000000000000000000000000000000000000000016
+:206A680000000000000000000000000000000000000000000000000000000000000000000E
+:206A7000000000000000000000000000000000000000000000000000000000000000000006
+:206A78000000000000000000000000000000000000000000000000000000000000000000FE
+:206A80000000000000000000000000000000000000000000000000000000000000000000F6
+:206A88000000000000000000000000000000000000000000000000000000000000000000EE
+:206A90000000000000000000000000000000000000000000000000000000000000000000E6
+:206A98000000000000000000000000000000000000000000000000000000000000000000DE
+:206AA0000000000000000000000000000000000000000000000000000000000000000000D6
+:206AA8000000000000000000000000000000000000000000000000000000000000000000CE
+:206AB0000000000000000000000000000000000000000000000000000000000000000000C6
+:206AB8000000000000000000000000000000000000000000000000000000000000000000BE
+:206AC0000000000000000000000000000000000000000000000000000000000000000000B6
+:206AC8000000000000000000000000000000000000000000000000000000000000000000AE
+:206AD0000000000000000000000000000000000000000000000000000000000000000000A6
+:206AD80000000000000000000000000000000000000000000000000000000000000000009E
+:206AE000000000000000000000000000000000000000000000000000000000000000000096
+:206AE80000000000000000000000000000000000000000000000000000000000000000008E
+:206AF000000000000000000000000000000000000000000000000000000000000000000086
+:206AF80000000000000000000000000000000000000000000000000000000000000000007E
+:206B0000000000000000000000000000000000000000000000000000000000000000000075
+:206B080000000000000000000000000000000000000000000000000000000000000000006D
+:206B1000000000000000000000000000000000000000000000000000000000000000000065
+:206B180000000000000000000000000000000000000000000000000000000000000000005D
+:206B2000000000000000000000000000000000000000000000000000000000000000000055
+:206B280000000000000000000000000000000000000000000000000000000000000000004D
+:206B3000000000000000000000000000000000000000000000000000000000000000000045
+:206B380000000000000000000000000000000000000000000000000000000000000000003D
+:206B4000000000000000000000000000000000000000000000000000000000000000000035
+:206B480000000000000000000000000000000000000000000000000000000000000000002D
+:206B5000000000000000000000000000000000000000000000000000000000000000000025
+:206B580000000000000000000000000000000000000000000000000000000000000000001D
+:206B6000000000000000000000000000000000000000000000000000000000000000000015
+:206B680000000000000000000000000000000000000000000000000000000000000000000D
+:206B7000000000000000000000000000000000000000000000000000000000000000000005
+:206B78000000000000000000000000000000000000000000000000000000000000000000FD
+:206B80000000000000000000000000000000000000000000000000000000000000000000F5
+:206B88000000000000000000000000000000000000000000000000000000000000000000ED
+:206B90000000000000000000000000000000000000000000000000000000000000000000E5
+:206B98000000000000000000000000000000000000000000000000000000000000000000DD
+:206BA0000000000000000000000000000000000000000000000000000000000000000000D5
+:206BA8000000000000000000000000000000000000000000000000000000000000000000CD
+:206BB0000000000000000000000000000000000000000000000000000000000000000000C5
+:206BB8000000000000000000000000000000000000000000000000000000000000000000BD
+:206BC0000000000000000000000000000000000000000000000000000000000000000000B5
+:206BC8000000000000000000000000000000000000000000000000000000000000000000AD
+:206BD0000000000000000000000000000000000000000000000000000000000000000000A5
+:206BD80000000000000000000000000000000000000000000000000000000000000000009D
+:206BE000000000000000000000000000000000000000000000000000000000000000000095
+:206BE80000000000000000000000000000000000000000000000000000000000000000008D
+:206BF000000000000000000000000000000000000000000000000000000000000000000085
+:206BF80000000000000000000000000000000000000000000000000000000000000000007D
+:206C0000000000000000000000000000000000000000000000000000000000000000000074
+:206C080000000000000000000000000000000000000000000000000000000000000000006C
+:206C1000000000000000000000000000000000000000000000000000000000000000000064
+:206C180000000000000000000000000000000000000000000000000000000000000000005C
+:206C2000000000000000000000000000000000000000000000000000000000000000000054
+:206C280000000000000000000000000000000000000000000000000000000000000000004C
+:206C3000000000000000000000000000000000000000000000000000000000000000000044
+:206C380000000000000000000000000000000000000000000000000000000000000000003C
+:206C4000000000000000000000000000000000000000000000000000000000000000000034
+:206C480000000000000000000000000000000000000000000000000000000000000000002C
+:206C5000000000000000000000000000000000000000000000000000000000000000000024
+:206C580000000000000000000000000000000000000000000000000000000000000000001C
+:206C6000000000000000000000000000000000000000000000000000000000000000000014
+:206C680000000000000000000000000000000000000000000000000000000000000000000C
+:206C7000000000000000000000000000000000000000000000000000000000000000000004
+:206C78000000000000000000000000000000000000000000000000000000000000000000FC
+:206C80000000000000000000000000000000000000000000000000000000000000000000F4
+:206C88000000000000000000000000000000000000000000000000000000000000000000EC
+:206C90000000000000000000000000000000000000000000000000000000000000000000E4
+:206C98000000000000000000000000000000000000000000000000000000000000000000DC
+:206CA0000000000000000000000000000000000000000000000000000000000000000000D4
+:206CA8000000000000000000000000000000000000000000000000000000000000000000CC
+:206CB0000000000000000000000000000000000000000000000000000000000000000000C4
+:206CB8000000000000000000000000000000000000000000000000000000000000000000BC
+:206CC0000000000000000000000000000000000000000000000000000000000000000000B4
+:206CC8000000000000000000000000000000000000000000000000000000000000000000AC
+:206CD0000000000000000000000000000000000000000000000000000000000000000000A4
+:206CD80000000000000000000000000000000000000000000000000000000000000000009C
+:206CE000000000000000000000000000000000000000000000000000000000000000000094
+:206CE80000000000000000000000000000000000000000000000000000000000000000008C
+:206CF000000000000000000000000000000000000000000000000000000000000000000084
+:206CF80000000000000000000000000000000000000000000000000000000000000000007C
+:206D0000000000000000000000000000000000000000000000000000000000000000000073
+:206D080000000000000000000000000000000000000000000000000000000000000000006B
+:206D1000000000000000000000000000000000000000000000000000000000000000000063
+:206D180000000000000000000000000000000000000000000000000000000000000000005B
+:206D2000000000000000000000000000000000000000000000000000000000000000000053
+:206D280000000000000000000000000000000000000000000000000000000000000000004B
+:206D3000000000000000000000000000000000000000000000000000000000000000000043
+:206D380000000000000000000000000000000000000000000000000000000000000000003B
+:206D4000000000000000000000000000000000000000000000000000000000000000000033
+:206D480000000000000000000000000000000000000000000000000000000000000000002B
+:206D5000000000000000000000000000000000000000000000000000000000000000000023
+:206D580000000000000000000000000000000000000000000000000000000000000000001B
+:206D6000000000000000000000000000000000000000000000000000000000000000000013
+:206D680000000000000000000000000000000000000000000000000000000000000000000B
+:206D7000000000000000000000000000000000000000000000000000000000000000000003
+:206D78000000000000000000000000000000000000000000000000000000000000000000FB
+:206D80000000000000000000000000000000000000000000000000000000000000000000F3
+:206D88000000000000000000000000000000000000000000000000000000000000000000EB
+:206D90000000000000000000000000000000000000000000000000000000000000000000E3
+:206D98000000000000000000000000000000000000000000000000000000000000000000DB
+:206DA0000000000000000000000000000000000000000000000000000000000000000000D3
+:206DA8000000000000000000000000000000000000000000000000000000000000000000CB
+:206DB0000000000000000000000000000000000000000000000000000000000000000000C3
+:206DB8000000000000000000000000000000000000000000000000000000000000000000BB
+:206DC0000000000000000000000000000000000000000000000000000000000000000000B3
+:206DC8000000000000000000000000000000000000000000000000000000000000000000AB
+:206DD0000000000000000000000000000000000000000000000000000000000000000000A3
+:206DD80000000000000000000000000000000000000000000000000000000000000000009B
+:206DE000000000000000000000000000000000000000000000000000000000000000000093
+:206DE80000000000000000000000000000000000000000000000000000000000000000008B
+:206DF000000000000000000000000000000000000000000000000000000000000000000083
+:206DF80000000000000000000000000000000000000000000000000000000000000000007B
+:206E0000000000000000000000000000000000000000000000000000000000000000000072
+:206E080000000000000000000000000000000000000000000000000000000000000000006A
+:206E1000000000000000000000000000000000000000000000000000000000000000000062
+:206E180000000000000000000000000000000000000000000000000000000000000000005A
+:206E2000000000000000000000000000000000000000000000000000000000000000000052
+:206E280000000000000000000000000000000000000000000000000000000000000000004A
+:206E3000000000000000000000000000000000000000000000000000000000000000000042
+:206E380000000000000000000000000000000000000000000000000000000000000000003A
+:206E4000000000000000000000000000000000000000000000000000000000000000000032
+:206E480000000000000000000000000000000000000000000000000000000000000000002A
+:206E5000000000000000000000000000000000000000000000000000000000000000000022
+:206E580000000000000000000000000000000000000000000000000000000000000000001A
+:206E6000000000000000000000000000000000000000000000000000000000000000000012
+:206E680000000000000000000000000000000000000000000000000000000000000000000A
+:206E7000000000000000000000000000000000000000000000000000000000000000000002
+:206E78000000000000000000000000000000000000000000000000000000000000000000FA
+:206E80000000000000000000000000000000000000000000000000000000000000000000F2
+:206E88000000000000000000000000000000000000000000000000000000000000000000EA
+:206E90000000000000000000000000000000000000000000000000000000000000000000E2
+:206E98000000000000000000000000000000000000000000000000000000000000000000DA
+:206EA0000000000000000000000000000000000000000000000000000000000000000000D2
+:206EA8000000000000000000000000000000000000000000000000000000000000000000CA
+:206EB0000000000000000000000000000000000000000000000000000000000000000000C2
+:206EB8000000000000000000000000000000000000000000000000000000000000000000BA
+:206EC0000000000000000000000000000000000000000000000000000000000000000000B2
+:206EC8000000000000000000000000000000000000000000000000000000000000000000AA
+:206ED0000000000000000000000000000000000000000000000000000000000000000000A2
+:206ED80000000000000000000000000000000000000000000000000000000000000000009A
+:206EE000000000000000000000000000000000000000000000000000000000000000000092
+:206EE80000000000000000000000000000000000000000000000000000000000000000008A
+:206EF000000000000000000000000000000000000000000000000000000000000000000082
+:206EF80000000000000000000000000000000000000000000000000000000000000000007A
+:206F0000000000000000000000000000000000000000000000000000000000000000000071
+:206F0800000000000000000000000000000000000000000000000000000000000000000069
+:206F1000000000000000000000000000000000000000000000000000000000000000000061
+:206F1800000000000000000000000000000000000000000000000000000000000000000059
+:206F2000000000000000000000000000000000000000000000000000000000000000000051
+:206F2800000000000000000000000000000000000000000000000000000000000000000049
+:206F3000000000000000000000000000000000000000000000000000000000000000000041
+:206F3800000000000000000000000000000000000000000000000000000000000000000039
+:206F4000000000000000000000000000000000000000000000000000000000000000000031
+:206F4800000000000000000000000000000000000000000000000000000000000000000029
+:206F5000000000000000000000000000000000000000000000000000000000000000000021
+:206F5800000000000000000000000000000000000000000000000000000000000000000019
+:206F6000000000000000000000000000000000000000000000000000000000000000000011
+:206F6800000000000000000000000000000000000000000000000000000000000000000009
+:206F7000000000000000000000000000000000000000000000000000000000000000000001
+:206F78000000000000000000000000000000000000000000000000000000000000000000F9
+:206F80000000000000000000000000000000000000000000000000000000000000000000F1
+:206F88000000000000000000000000000000000000000000000000000000000000000000E9
+:206F90000000000000000000000000000000000000000000000000000000000000000000E1
+:206F98000000000000000000000000000000000000000000000000000000000000000000D9
+:206FA0000000000000000000000000000000000000000000000000000000000000000000D1
+:206FA8000000000000000000000000000000000000000000000000000000000000000000C9
+:206FB0000000000000000000000000000000000000000000000000000000000000000000C1
+:206FB8000000000000000000000000000000000000000000000000000000000000000000B9
+:206FC0000000000000000000000000000000000000000000000000000000000000000000B1
+:206FC8000000000000000000000000000000000000000000000000000000000000000000A9
+:206FD0000000000000000000000000000000000000000000000000000000000000000000A1
+:206FD800000000000000000000000000000000000000000000000000000000000000000099
+:206FE000000000000000000000000000000000000000000000000000000000000000000091
+:206FE800000000000000000000000000000000000000000000000000000000000000000089
+:206FF000000000000000000000000000000000000000000000000000000000000000000081
+:206FF800000000000000000000000000000000000000000000000000000000000000000079
+:20700000000000000000000000000000000000000000000000000000000000000000000070
+:20700800000000000000000000000000000000000000000000000000000000000000000068
+:20701000000000000000000000000000000000000000000000000000000000000000000060
+:20701800000000000000000000000000000000000000000000000000000000000000000058
+:20702000000000000000000000000000000000000000000000000000000000000000000050
+:20702800000000000000000000000000000000000000000000000000000000000000000048
+:20703000000000000000000000000000000000000000000000000000000000000000000040
+:20703800000000000000000000000000000000000000000000000000000000000000000038
+:20704000000000000000000000000000000000000000000000000000000000000000000030
+:20704800000000000000000000000000000000000000000000000000000000000000000028
+:20705000000000000000000000000000000000000000000000000000000000000000000020
+:20705800000000000000000000000000000000000000000000000000000000000000000018
+:20706000000000000000000000000000000000000000000000000000000000000000000010
+:20706800000000000000000000000000000000000000000000000000000000000000000008
+:20707000000000000000000000000000000000000000000000000000000000000000000000
+:207078000000000000000000000000000000000000000000000000000000000000000000F8
+:207080000000000000000000000000000000000000000000000000000000000000000000F0
+:207088000000000000000000000000000000000000000000000000000000000000000000E8
+:207090000000000000000000000000000000000000000000000000000000000000000000E0
+:207098000000000000000000000000000000000000000000000000000000000000000000D8
+:2070A0000000000000000000000000000000000000000000000000000000000000000000D0
+:2070A8000000000000000000000000000000000000000000000000000000000000000000C8
+:2070B0000000000000000000000000000000000000000000000000000000000000000000C0
+:2070B8000000000000000000000000000000000000000000000000000000000000000000B8
+:2070C0000000000000000000000000000000000000000000000000000000000000000000B0
+:2070C8000000000000000000000000000000000000000000000000000000000000000000A8
+:2070D0000000000000000000000000000000000000000000000000000000000000000000A0
+:2070D800000000000000000000000000000000000000000000000000000000000000000098
+:2070E000000000000000000000000000000000000000000000000000000000000000000090
+:2070E800000000000000000000000000000000000000000000000000000000000000000088
+:2070F000000000000000000000000000000000000000000000000000000000000000000080
+:2070F800000000000000000000000000000000000000000000000000000000000000000078
+:2071000000000000000000000000000000000000000000000000000000000000000000006F
+:20710800000000000000000000000000000000000000000000000000000000000000000067
+:2071100000000000000000000000000000000000000000000000000000000000000000005F
+:20711800000000000000000000000000000000000000000000000000000000000000000057
+:2071200000000000000000000000000000000000000000000000000000000000000000004F
+:20712800000000000000000000000000000000000000000000000000000000000000000047
+:2071300000000000000000000000000000000000000000000000000000000000000000003F
+:20713800000000000000000000000000000000000000000000000000000000000000000037
+:2071400000000000000000000000000000000000000000000000000000000000000000002F
+:20714800000000000000000000000000000000000000000000000000000000000000000027
+:2071500000000000000000000000000000000000000000000000000000000000000000001F
+:20715800000000000000000000000000000000000000000000000000000000000000000017
+:2071600000000000000000000000000000000000000000000000000000000000000000000F
+:20716800000000000000000000000000000000000000000000000000000000000000000007
+:207170000000000000000000000000000000000000000000000000000000000000000000FF
+:207178000000000000000000000000000000000000000000000000000000000000000000F7
+:207180000000000000000000000000000000000000000000000000000000000000000000EF
+:207188000000000000000000000000000000000000000000000000000000000000000000E7
+:207190000000000000000000000000000000000000000000000000000000000000000000DF
+:207198000000000000000000000000000000000000000000000000000000000000000000D7
+:2071A0000000000000000000000000000000000000000000000000000000000000000000CF
+:2071A8000000000000000000000000000000000000000000000000000000000000000000C7
+:2071B0000000000000000000000000000000000000000000000000000000000000000000BF
+:2071B8000000000000000000000000000000000000000000000000000000000000000000B7
+:2071C0000000000000000000000000000000000000000000000000000000000000000000AF
+:2071C8000000000000000000000000000000000000000000000000000000000000000000A7
+:2071D00000000000000000000000000000000000000000000000000000000000000000009F
+:2071D800000000000000000000000000000000000000000000000000000000000000000097
+:2071E00000000000000000000000000000000000000000000000000000000000000000008F
+:2071E800000000000000000000000000000000000000000000000000000000000000000087
+:2071F00000000000000000000000000000000000000000000000000000000000000000007F
+:2071F800000000000000000000000000000000000000000000000000000000000000000077
+:2072000000000000000000000000000000000000000000000000000000000000000000006E
+:20720800000000000000000000000000000000000000000000000000000000000000000066
+:2072100000000000000000000000000000000000000000000000000000000000000000005E
+:20721800000000000000000000000000000000000000000000000000000000000000000056
+:2072200000000000000000000000000000000000000000000000000000000000000000004E
+:20722800000000000000000000000000000000000000000000000000000000000000000046
+:2072300000000000000000000000000000000000000000000000000000000000000000003E
+:20723800000000000000000000000000000000000000000000000000000000000000000036
+:2072400000000000000000000000000000000000000000000000000000000000000000002E
+:20724800000000000000000000000000000000000000000000000000000000000000000026
+:2072500000000000000000000000000000000000000000000000000000000000000000001E
+:20725800000000000000000000000000000000000000000000000000000000000000000016
+:2072600000000000000000000000000000000000000000000000000000000000000000000E
+:20726800000000000000000000000000000000000000000000000000000000000000000006
+:207270000000000000000000000000000000000000000000000000000000000000000000FE
+:207278000000000000000000000000000000000000000000000000000000000000000000F6
+:207280000000000000000000000000000000000000000000000000000000000000000000EE
+:207288000000000000000000000000000000000000000000000000000000000000000000E6
+:207290000000000000000000000000000000000000000000000000000000000000000000DE
+:207298000000000000000000000000000000000000000000000000000000000000000000D6
+:2072A0000000000000000000000000000000000000000000000000000000000000000000CE
+:2072A8000000000000000000000000000000000000000000000000000000000000000000C6
+:2072B0000000000000000000000000000000000000000000000000000000000000000000BE
+:2072B8000000000000000000000000000000000000000000000000000000000000000000B6
+:2072C0000000000000000000000000000000000000000000000000000000000000000000AE
+:2072C8000000000000000000000000000000000000000000000000000000000000000000A6
+:2072D00000000000000000000000000000000000000000000000000000000000000000009E
+:2072D800000000000000000000000000000000000000000000000000000000000000000096
+:2072E00000000000000000000000000000000000000000000000000000000000000000008E
+:2072E800000000000000000000000000000000000000000000000000000000000000000086
+:2072F00000000000000000000000000000000000000000000000000000000000000000007E
+:2072F800000000000000000000000000000000000000000000000000000000000000000076
+:2073000000000000000000000000000000000000000000000000000000000000000000006D
+:20730800000000000000000000000000000000000000000000000000000000000000000065
+:2073100000000000000000000000000000000000000000000000000000000000000000005D
+:20731800000000000000000000000000000000000000000000000000000000000000000055
+:2073200000000000000000000000000000000000000000000000000000000000000000004D
+:20732800000000000000000000000000000000000000000000000000000000000000000045
+:2073300000000000000000000000000000000000000000000000000000000000000000003D
+:20733800000000000000000000000000000000000000000000000000000000000000000035
+:2073400000000000000000000000000000000000000000000000000000000000000000002D
+:20734800000000000000000000000000000000000000000000000000000000000000000025
+:2073500000000000000000000000000000000000000000000000000000000000000000001D
+:20735800000000000000000000000000000000000000000000000000000000000000000015
+:2073600000000000000000000000000000000000000000000000000000000000000000000D
+:20736800000000000000000000000000000000000000000000000000000000000000000005
+:207370000000000000000000000000000000000000000000000000000000000000000000FD
+:207378000000000000000000000000000000000000000000000000000000000000000000F5
+:207380000000000000000000000000000000000000000000000000000000000000000000ED
+:207388000000000000000000000000000000000000000000000000000000000000000000E5
+:207390000000000000000000000000000000000000000000000000000000000000000000DD
+:207398000000000000000000000000000000000000000000000000000000000000000000D5
+:2073A0000000000000000000000000000000000000000000000000000000000000000000CD
+:2073A8000000000000000000000000000000000000000000000000000000000000000000C5
+:2073B0000000000000000000000000000000000000000000000000000000000000000000BD
+:2073B8000000000000000000000000000000000000000000000000000000000000000000B5
+:2073C0000000000000000000000000000000000000000000000000000000000000000000AD
+:2073C8000000000000000000000000000000000000000000000000000000000000000000A5
+:2073D00000000000000000000000000000000000000000000000000000000000000000009D
+:2073D800000000000000000000000000000000000000000000000000000000000000000095
+:2073E00000000000000000000000000000000000000000000000000000000000000000008D
+:2073E800000000000000000000000000000000000000000000000000000000000000000085
+:2073F00000000000000000000000000000000000000000000000000000000000000000007D
+:2073F800000000000000000000000000000000000000000000000000000000000000000075
+:2074000000000000000000000000000000000000000000000000000000000000000000006C
+:20740800000000000000000000000000000000000000000000000000000000000000000064
+:2074100000000000000000000000000000000000000000000000000000000000000000005C
+:20741800000000000000000000000000000000000000000000000000000000000000000054
+:2074200000000000000000000000000000000000000000000000000000000000000000004C
+:20742800000000000000000000000000000000000000000000000000000000000000000044
+:2074300000000000000000000000000000000000000000000000000000000000000000003C
+:20743800000000000000000000000000000000000000000000000000000000000000000034
+:2074400000000000000000000000000000000000000000000000000000000000000000002C
+:20744800000000000000000000000000000000000000000000000000000000000000000024
+:2074500000000000000000000000000000000000000000000000000000000000000000001C
+:20745800000000000000000000000000000000000000000000000000000000000000000014
+:2074600000000000000000000000000000000000000000000000000000000000000000000C
+:20746800000000000000000000000000000000000000000000000000000000000000000004
+:207470000000000000000000000000000000000000000000000000000000000000000000FC
+:207478000000000000000000000000000000000000000000000000000000000000000000F4
+:207480000000000000000000000000000000000000000000000000000000000000000000EC
+:207488000000000000000000000000000000000000000000000000000000000000000000E4
+:207490000000000000000000000000000000000000000000000000000000000000000000DC
+:207498000000000000000000000000000000000000000000000000000000000000000000D4
+:2074A0000000000000000000000000000000000000000000000000000000000000000000CC
+:2074A8000000000000000000000000000000000000000000000000000000000000000000C4
+:2074B0000000000000000000000000000000000000000000000000000000000000000000BC
+:2074B8000000000000000000000000000000000000000000000000000000000000000000B4
+:2074C0000000000000000000000000000000000000000000000000000000000000000000AC
+:2074C8000000000000000000000000000000000000000000000000000000000000000000A4
+:2074D00000000000000000000000000000000000000000000000000000000000000000009C
+:2074D800000000000000000000000000000000000000000000000000000000000000000094
+:2074E00000000000000000000000000000000000000000000000000000000000000000008C
+:2074E800000000000000000000000000000000000000000000000000000000000000000084
+:2074F00000000000000000000000000000000000000000000000000000000000000000007C
+:2074F800000000000000000000000000000000000000000000000000000000000000000074
+:2075000000000000000000000000000000000000000000000000000000000000000000006B
+:20750800000000000000000000000000000000000000000000000000000000000000000063
+:2075100000000000000000000000000000000000000000000000000000000000000000005B
+:20751800000000000000000000000000000000000000000000000000000000000000000053
+:2075200000000000000000000000000000000000000000000000000000000000000000004B
+:20752800000000000000000000000000000000000000000000000000000000000000000043
+:2075300000000000000000000000000000000000000000000000000000000000000000003B
+:20753800000000000000000000000000000000000000000000000000000000000000000033
+:2075400000000000000000000000000000000000000000000000000000000000000000002B
+:20754800000000000000000000000000000000000000000000000000000000000000000023
+:2075500000000000000000000000000000000000000000000000000000000000000000001B
+:20755800000000000000000000000000000000000000000000000000000000000000000013
+:2075600000000000000000000000000000000000000000000000000000000000000000000B
+:20756800000000000000000000000000000000000000000000000000000000000000000003
+:207570000000000000000000000000000000000000000000000000000000000000000000FB
+:207578000000000000000000000000000000000000000000000000000000000000000000F3
+:207580000000000000000000000000000000000000000000000000000000000000000000EB
+:207588000000000000000000000000000000000000000000000000000000000000000000E3
+:207590000000000000000000000000000000000000000000000000000000000000000000DB
+:207598000000000000000000000000000000000000000000000000000000000000000000D3
+:2075A0000000000000000000000000000000000000000000000000000000000000000000CB
+:2075A8000000000000000000000000000000000000000000000000000000000000000000C3
+:2075B0000000000000000000000000000000000000000000000000000000000000000000BB
+:2075B8000000000000000000000000000000000000000000000000000000000000000000B3
+:2075C0000000000000000000000000000000000000000000000000000000000000000000AB
+:2075C8000000000000000000000000000000000000000000000000000000000000000000A3
+:2075D00000000000000000000000000000000000000000000000000000000000000000009B
+:2075D800000000000000000000000000000000000000000000000000000000000000000093
+:2075E00000000000000000000000000000000000000000000000000000000000000000008B
+:2075E800000000000000000000000000000000000000000000000000000000000000000083
+:2075F00000000000000000000000000000000000000000000000000000000000000000007B
+:2075F800000000000000000000000000000000000000000000000000000000000000000073
+:2076000000000000000000000000000000000000000000000000000000000000000000006A
+:20760800000000000000000000000000000000000000000000000000000000000000000062
+:2076100000000000000000000000000000000000000000000000000000000000000000005A
+:20761800000000000000000000000000000000000000000000000000000000000000000052
+:2076200000000000000000000000000000000000000000000000000000000000000000004A
+:20762800000000000000000000000000000000000000000000000000000000000000000042
+:2076300000000000000000000000000000000000000000000000000000000000000000003A
+:20763800000000000000000000000000000000000000000000000000000000000000000032
+:2076400000000000000000000000000000000000000000000000000000000000000000002A
+:20764800000000000000000000000000000000000000000000000000000000000000000022
+:2076500000000000000000000000000000000000000000000000000000000000000000001A
+:20765800000000000000000000000000000000000000000000000000000000000000000012
+:2076600000000000000000000000000000000000000000000000000000000000000000000A
+:20766800000000000000000000000000000000000000000000000000000000000000000002
+:207670000000000000000000000000000000000000000000000000000000000000000000FA
+:207678000000000000000000000000000000000000000000000000000000000000000000F2
+:207680000000000000000000000000000000000000000000000000000000000000000000EA
+:207688000000000000000000000000000000000000000000000000000000000000000000E2
+:207690000000000000000000000000000000000000000000000000000000000000000000DA
+:207698000000000000000000000000000000000000000000000000000000000000000000D2
+:2076A0000000000000000000000000000000000000000000000000000000000000000000CA
+:2076A8000000000000000000000000000000000000000000000000000000000000000000C2
+:2076B0000000000000000000000000000000000000000000000000000000000000000000BA
+:2076B8000000000000000000000000000000000000000000000000000000000000000000B2
+:2076C0000000000000000000000000000000000000000000000000000000000000000000AA
+:2076C8000000000000000000000000000000000000000000000000000000000000000000A2
+:2076D00000000000000000000000000000000000000000000000000000000000000000009A
+:2076D800000000000000000000000000000000000000000000000000000000000000000092
+:2076E00000000000000000000000000000000000000000000000000000000000000000008A
+:2076E800000000000000000000000000000000000000000000000000000000000000000082
+:2076F00000000000000000000000000000000000000000000000000000000000000000007A
+:2076F800000000000000000000000000000000000000000000000000000000000000000072
+:20770000000000000000000000000000000000000000000000000000000000000000000069
+:20770800000000000000000000000000000000000000000000000000000000000000000061
+:20771000000000000000000000000000000000000000000000000000000000000000000059
+:20771800000000000000000000000000000000000000000000000000000000000000000051
+:20772000000000000000000000000000000000000000000000000000000000000000000049
+:20772800000000000000000000000000000000000000000000000000000000000000000041
+:20773000000000000000000000000000000000000000000000000000000000000000000039
+:20773800000000000000000000000000000000000000000000000000000000000000000031
+:20774000000000000000000000000000000000000000000000000000000000000000000029
+:20774800000000000000000000000000000000000000000000000000000000000000000021
+:20775000000000000000000000000000000000000000000000000000000000000000000019
+:20775800000000000000000000000000000000000000000000000000000000000000000011
+:20776000000000000000000000000000000000000000000000000000000000000000000009
+:20776800000000000000000000000000000000000000000000000000000000000000000001
+:207770000000000000000000000000000000000000000000000000000000000000000000F9
+:207778000000000000000000000000000000000000000000000000000000000000000000F1
+:207780000000000000000000000000000000000000000000000000000000000000000000E9
+:207788000000000000000000000000000000000000000000000000000000000000000000E1
+:207790000000000000000000000000000000000000000000000000000000000000000000D9
+:207798000000000000000000000000000000000000000000000000000000000000000000D1
+:2077A0000000000000000000000000000000000000000000000000000000000000000000C9
+:2077A8000000000000000000000000000000000000000000000000000000000000000000C1
+:2077B0000000000000000000000000000000000000000000000000000000000000000000B9
+:2077B8000000000000000000000000000000000000000000000000000000000000000000B1
+:2077C0000000000000000000000000000000000000000000000000000000000000000000A9
+:2077C8000000000000000000000000000000000000000000000000000000000000000000A1
+:2077D000000000000000000000000000000000000000000000000000000000000000000099
+:2077D800000000000000000000000000000000000000000000000000000000000000000091
+:2077E000000000000000000000000000000000000000000000000000000000000000000089
+:2077E800000000000000000000000000000000000000000000000000000000000000000081
+:2077F000000000000000000000000000000000000000000000000000000000000000000079
+:2077F800000000000000000000000000000000000000000000000000000000000000000071
+:20780000000000000000000000000000000000000000000000000000000000000000000068
+:20780800000000000000000000000000000000000000000000000000000000000000000060
+:20781000000000000000000000000000000000000000000000000000000000000000000058
+:20781800000000000000000000000000000000000000000000000000000000000000000050
+:20782000000000000000000000000000000000000000000000000000000000000000000048
+:20782800000000000000000000000000000000000000000000000000000000000000000040
+:20783000000000000000000000000000000000000000000000000000000000000000000038
+:20783800000000000000000000000000000000000000000000000000000000000000000030
+:20784000000000000000000000000000000000000000000000000000000000000000000028
+:20784800000000000000000000000000000000000000000000000000000000000000000020
+:20785000000000000000000000000000000000000000000000000000000000000000000018
+:20785800000000000000000000000000000000000000000000000000000000000000000010
+:20786000000000000000000000000000000000000000000000000000000000000000000008
+:20786800000000000000000000000000000000000000000000000000000000000000000000
+:207870000000000000000000000000000000000000000000000000000000000000000000F8
+:207878000000000000000000000000000000000000000000000000000000000000000000F0
+:207880000000000000000000000000000000000000000000000000000000000000000000E8
+:207888000000000000000000000000000000000000000000000000000000000000000000E0
+:207890000000000000000000000000000000000000000000000000000000000000000000D8
+:207898000000000000000000000000000000000000000000000000000000000000000000D0
+:2078A0000000000000000000000000000000000000000000000000000000000000000000C8
+:2078A8000000000000000000000000000000000000000000000000000000000000000000C0
+:2078B0000000000000000000000000000000000000000000000000000000000000000000B8
+:2078B8000000000000000000000000000000000000000000000000000000000000000000B0
+:2078C0000000000000000000000000000000000000000000000000000000000000000000A8
+:2078C8000000000000000000000000000000000000000000000000000000000000000000A0
+:2078D000000000000000000000000000000000000000000000000000000000000000000098
+:2078D800000000000000000000000000000000000000000000000000000000000000000090
+:2078E000000000000000000000000000000000000000000000000000000000000000000088
+:2078E800000000000000000000000000000000000000000000000000000000000000000080
+:2078F000000000000000000000000000000000000000000000000000000000000000000078
+:2078F800000000000000000000000000000000000000000000000000000000000000000070
+:20790000000000000000000000000000000000000000000000000000000000000000000067
+:2079080000000000000000000000000000000000000000000000000000000000000000005F
+:20791000000000000000000000000000000000000000000000000000000000000000000057
+:2079180000000000000000000000000000000000000000000000000000000000000000004F
+:20792000000000000000000000000000000000000000000000000000000000000000000047
+:2079280000000000000000000000000000000000000000000000000000000000000000003F
+:20793000000000000000000000000000000000000000000000000000000000000000000037
+:2079380000000000000000000000000000000000000000000000000000000000000000002F
+:20794000000000000000000000000000000000000000000000000000000000000000000027
+:2079480000000000000000000000000000000000000000000000000000000000000000001F
+:20795000000000000000000000000000000000000000000000000000000000000000000017
+:2079580000000000000000000000000000000000000000000000000000000000000000000F
+:20796000000000000000000000000000000000000000000000000000000000000000000007
+:207968000000000000000000000000000000000000000000000000000000000000000000FF
+:207970000000000000000000000000000000000000000000000000000000000000000000F7
+:207978000000000000000000000000000000000000000000000000000000000000000000EF
+:207980000000000000000000000000000000000000000000000000000000000000000000E7
+:207988000000000000000000000000000000000000000000000000000000000000000000DF
+:207990000000000000000000000000000000000000000000000000000000000000000000D7
+:207998000000000000000000000000000000000000000000000000000000000000000000CF
+:2079A0000000000000000000000000000000000000000000000000000000000000000000C7
+:2079A8000000000000000000000000000000000000000000000000000000000000000000BF
+:2079B0000000000000000000000000000000000000000000000000000000000000000000B7
+:2079B8000000000000000000000000000000000000000000000000000000000000000000AF
+:2079C0000000000000000000000000000000000000000000000000000000000000000000A7
+:2079C80000000000000000000000000000000000000000000000000000000000000000009F
+:2079D000000000000000000000000000000000000000000000000000000000000000000097
+:2079D80000000000000000000000000000000000000000000000000000000000000000008F
+:2079E000000000000000000000000000000000000000000000000000000000000000000087
+:2079E80000000000000000000000000000000000000000000000000000000000000000007F
+:2079F000000000000000000000000000000000000000000000000000000000000000000077
+:2079F80000000000000000000000000000000000000000000000000000000000000000006F
+:207A0000000000000000000000000000000000000000000000000000000000000000000066
+:207A080000000000000000000000000000000000000000000000000000000000000000005E
+:207A1000000000000000000000000000000000000000000000000000000000000000000056
+:207A180000000000000000000000000000000000000000000000000000000000000000004E
+:207A2000000000000000000000000000000000000000000000000000000000000000000046
+:207A280000000000000000000000000000000000000000000000000000000000000000003E
+:207A3000000000000000000000000000000000000000000000000000000000000000000036
+:207A380000000000000000000000000000000000000000000000000000000000000000002E
+:207A4000000000000000000000000000000000000000000000000000000000000000000026
+:207A480000000000000000000000000000000000000000000000000000000000000000001E
+:207A5000000000000000000000000000000000000000000000000000000000000000000016
+:207A580000000000000000000000000000000000000000000000000000000000000000000E
+:207A6000000000000000000000000000000000000000000000000000000000000000000006
+:207A68000000000000000000000000000000000000000000000000000000000000000000FE
+:207A70000000000000000000000000000000000000000000000000000000000000000000F6
+:207A78000000000000000000000000000000000000000000000000000000000000000000EE
+:207A80000000000000000000000000000000000000000000000000000000000000000000E6
+:207A88000000000000000000000000000000000000000000000000000000000000000000DE
+:207A90000000000000000000000000000000000000000000000000000000000000000000D6
+:207A98000000000000000000000000000000000000000000000000000000000000000000CE
+:207AA0000000000000000000000000000000000000000000000000000000000000000000C6
+:207AA8000000000000000000000000000000000000000000000000000000000000000000BE
+:207AB0000000000000000000000000000000000000000000000000000000000000000000B6
+:207AB8000000000000000000000000000000000000000000000000000000000000000000AE
+:207AC0000000000000000000000000000000000000000000000000000000000000000000A6
+:207AC80000000000000000000000000000000000000000000000000000000000000000009E
+:207AD000000000000000000000000000000000000000000000000000000000000000000096
+:207AD80000000000000000000000000000000000000000000000000000000000000000008E
+:207AE000000000000000000000000000000000000000000000000000000000000000000086
+:207AE80000000000000000000000000000000000000000000000000000000000000000007E
+:207AF000000000000000000000000000000000000000000000000000000000000000000076
+:207AF80000000000000000000000000000000000000000000000000000000000000000006E
+:207B0000000000000000000000000000000000000000000000000000000000000000000065
+:207B080000000000000000000000000000000000000000000000000000000000000000005D
+:207B1000000000000000000000000000000000000000000000000000000000000000000055
+:207B180000000000000000000000000000000000000000000000000000000000000000004D
+:207B2000000000000000000000000000000000000000000000000000000000000000000045
+:207B280000000000000000000000000000000000000000000000000000000000000000003D
+:207B3000000000000000000000000000000000000000000000000000000000000000000035
+:207B380000000000000000000000000000000000000000000000000000000000000000002D
+:207B4000000000000000000000000000000000000000000000000000000000000000000025
+:207B480000000000000000000000000000000000000000000000000000000000000000001D
+:207B5000000000000000000000000000000000000000000000000000000000000000000015
+:207B580000000000000000000000000000000000000000000000000000000000000000000D
+:207B6000000000000000000000000000000000000000000000000000000000000000000005
+:207B68000000000000000000000000000000000000000000000000000000000000000000FD
+:207B70000000000000000000000000000000000000000000000000000000000000000000F5
+:207B78000000000000000000000000000000000000000000000000000000000000000000ED
+:207B80000000000000000000000000000000000000000000000000000000000000000000E5
+:207B88000000000000000000000000000000000000000000000000000000000000000000DD
+:207B90000000000000000000000000000000000000000000000000000000000000000000D5
+:207B98000000000000000000000000000000000000000000000000000000000000000000CD
+:207BA0000000000000000000000000000000000000000000000000000000000000000000C5
+:207BA8000000000000000000000000000000000000000000000000000000000000000000BD
+:207BB0000000000000000000000000000000000000000000000000000000000000000000B5
+:207BB8000000000000000000000000000000000000000000000000000000000000000000AD
+:207BC0000000000000000000000000000000000000000000000000000000000000000000A5
+:207BC80000000000000000000000000000000000000000000000000000000000000000009D
+:207BD000000000000000000000000000000000000000000000000000000000000000000095
+:207BD80000000000000000000000000000000000000000000000000000000000000000008D
+:207BE000000000000000000000000000000000000000000000000000000000000000000085
+:207BE80000000000000000000000000000000000000000000000000000000000000000007D
+:207BF000000000000000000000000000000000000000000000000000000000000000000075
+:207BF80000000000000000000000000000000000000000000000000000000000000000006D
+:207C0000000000000000000000000000000000000000000000000000000000000000000064
+:207C080000000000000000000000000000000000000000000000000000000000000000005C
+:207C1000000000000000000000000000000000000000000000000000000000000000000054
+:207C180000000000000000000000000000000000000000000000000000000000000000004C
+:207C2000000000000000000000000000000000000000000000000000000000000000000044
+:207C280000000000000000000000000000000000000000000000000000000000000000003C
+:207C3000000000000000000000000000000000000000000000000000000000000000000034
+:207C380000000000000000000000000000000000000000000000000000000000000000002C
+:207C4000000000000000000000000000000000000000000000000000000000000000000024
+:207C480000000000000000000000000000000000000000000000000000000000000000001C
+:207C5000000000000000000000000000000000000000000000000000000000000000000014
+:207C580000000000000000000000000000000000000000000000000000000000000000000C
+:207C6000000000000000000000000000000000000000000000000000000000000000000004
+:207C68000000000000000000000000000000000000000000000000000000000000000000FC
+:207C70000000000000000000000000000000000000000000000000000000000000000000F4
+:207C78000000000000000000000000000000000000000000000000000000000000000000EC
+:207C80000000000000000000000000000000000000000000000000000000000000000000E4
+:207C88000000000000000000000000000000000000000000000000000000000000000000DC
+:207C90000000000000000000000000000000000000000000000000000000000000000000D4
+:207C98000000000000000000000000000000000000000000000000000000000000000000CC
+:207CA0000000000000000000000000000000000000000000000000000000000000000000C4
+:207CA8000000000000000000000000000000000000000000000000000000000000000000BC
+:207CB0000000000000000000000000000000000000000000000000000000000000000000B4
+:207CB8000000000000000000000000000000000000000000000000000000000000000000AC
+:207CC0000000000000000000000000000000000000000000000000000000000000000000A4
+:207CC80000000000000000000000000000000000000000000000000000000000000000009C
+:207CD000000000000000000000000000000000000000000000000000000000000000000094
+:207CD80000000000000000000000000000000000000000000000000000000000000000008C
+:207CE000000000000000000000000000000000000000000000000000000000000000000084
+:207CE80000000000000000000000000000000000000000000000000000000000000000007C
+:207CF000000000000000000000000000000000000000000000000000000000000000000074
+:207CF80000000000000000000000000000000000000000000000000000000000000000006C
+:207D0000000000000000000000000000000000000000000000000000000000000000000063
+:207D080000000000000000000000000000000000000000000000000000000000000000005B
+:207D1000000000000000000000000000000000000000000000000000000000000000000053
+:207D180000000000000000000000000000000000000000000000000000000000000000004B
+:207D2000000000000000000000000000000000000000000000000000000000000000000043
+:207D280000000000000000000000000000000000000000000000000000000000000000003B
+:207D3000000000000000000000000000000000000000000000000000000000000000000033
+:207D380000000000000000000000000000000000000000000000000000000000000000002B
+:207D4000000000000000000000000000000000000000000000000000000000000000000023
+:207D480000000000000000000000000000000000000000000000000000000000000000001B
+:207D5000000000000000000000000000000000000000000000000000000000000000000013
+:207D580000000000000000000000000000000000000000000000000000000000000000000B
+:207D6000000000000000000000000000000000000000000000000000000000000000000003
+:207D68000000000000000000000000000000000000000000000000000000000000000000FB
+:207D70000000000000000000000000000000000000000000000000000000000000000000F3
+:207D78000000000000000000000000000000000000000000000000000000000000000000EB
+:207D80000000000000000000000000000000000000000000000000000000000000000000E3
+:207D88000000000000000000000000000000000000000000000000000000000000000000DB
+:207D90000000000000000000000000000000000000000000000000000000000000000000D3
+:207D98000000000000000000000000000000000000000000000000000000000000000000CB
+:207DA0000000000000000000000000000000000000000000000000000000000000000000C3
+:207DA8000000000000000000000000000000000000000000000000000000000000000000BB
+:207DB0000000000000000000000000000000000000000000000000000000000000000000B3
+:207DB8000000000000000000000000000000000000000000000000000000000000000000AB
+:207DC0000000000000000000000000000000000000000000000000000000000000000000A3
+:207DC80000000000000000000000000000000000000000000000000000000000000000009B
+:207DD000000000000000000000000000000000000000000000000000000000000000000093
+:207DD80000000000000000000000000000000000000000000000000000000000000000008B
+:207DE000000000000000000000000000000000000000000000000000000000000000000083
+:207DE80000000000000000000000000000000000000000000000000000000000000000007B
+:207DF000000000000000000000000000000000000000000000000000000000000000000073
+:207DF80000000000000000000000000000000000000000000000000000000000000000006B
+:207E0000000000000000000000000000000000000000000000000000000000000000000062
+:207E080000000000000000000000000000000000000000000000000000000000000000005A
+:207E1000000000000000000000000000000000000000000000000000000000000000000052
+:207E180000000000000000000000000000000000000000000000000000000000000000004A
+:207E2000000000000000000000000000000000000000000000000000000000000000000042
+:207E280000000000000000000000000000000000000000000000000000000000000000003A
+:207E3000000000000000000000000000000000000000000000000000000000000000000032
+:207E380000000000000000000000000000000000000000000000000000000000000000002A
+:207E4000000000000000000000000000000000000000000000000000000000000000000022
+:207E480000000000000000000000000000000000000000000000000000000000000000001A
+:207E5000000000000000000000000000000000000000000000000000000000000000000012
+:207E580000000000000000000000000000000000000000000000000000000000000000000A
+:207E6000000000000000000000000000000000000000000000000000000000000000000002
+:207E68000000000000000000000000000000000000000000000000000000000000000000FA
+:207E70000000000000000000000000000000000000000000000000000000000000000000F2
+:207E78000000000000000000000000000000000000000000000000000000000000000000EA
+:207E80000000000000000000000000000000000000000000000000000000000000000000E2
+:207E88000000000000000000000000000000000000000000000000000000000000000000DA
+:207E90000000000000000000000000000000000000000000000000000000000000000000D2
+:207E98000000000000000000000000000000000000000000000000000000000000000000CA
+:207EA0000000000000000000000000000000000000000000000000000000000000000000C2
+:207EA8000000000000000000000000000000000000000000000000000000000000000000BA
+:207EB0000000000000000000000000000000000000000000000000000000000000000000B2
+:207EB8000000000000000000000000000000000000000000000000000000000000000000AA
+:207EC0000000000000000000000000000000000000000000000000000000000000000000A2
+:207EC80000000000000000000000000000000000000000000000000000000000000000009A
+:207ED000000000000000000000000000000000000000000000000000000000000000000092
+:207ED80000000000000000000000000000000000000000000000000000000000000000008A
+:207EE000000000000000000000000000000000000000000000000000000000000000000082
+:207EE80000000000000000000000000000000000000000000000000000000000000000007A
+:207EF000000000000000000000000000000000000000000000000000000000000000000072
+:207EF80000000000000000000000000000000000000000000000000000000000000000006A
+:207F0000000000000000000000000000000000000000000000000000000000000000000061
+:207F0800000000000000000000000000000000000000000000000000000000000000000059
+:207F1000000000000000000000000000000000000000000000000000000000000000000051
+:207F1800000000000000000000000000000000000000000000000000000000000000000049
+:207F2000000000000000000000000000000000000000000000000000000000000000000041
+:207F2800000000000000000000000000000000000000000000000000000000000000000039
+:207F3000000000000000000000000000000000000000000000000000000000000000000031
+:207F3800000000000000000000000000000000000000000000000000000000000000000029
+:207F4000000000000000000000000000000000000000000000000000000000000000000021
+:207F4800000000000000000000000000000000000000000000000000000000000000000019
+:207F5000000000000000000000000000000000000000000000000000000000000000000011
+:207F5800000000000000000000000000000000000000000000000000000000000000000009
+:207F6000000000000000000000000000000000000000000000000000000000000000000001
+:207F68000000000000000000000000000000000000000000000000000000000000000000F9
+:207F70000000000000000000000000000000000000000000000000000000000000000000F1
+:207F78000000000000000000000000000000000000000000000000000000000000000000E9
+:207F80000000000000000000000000000000000000000000000000000000000000000000E1
+:207F88000000000000000000000000000000000000000000000000000000000000000000D9
+:207F90000000000000000000000000000000000000000000000000000000000000000000D1
+:207F98000000000000000000000000000000000000000000000000000000000000000000C9
+:207FA0000000000000000000000000000000000000000000000000000000000000000000C1
+:207FA8000000000000000000000000000000000000000000000000000000000000000000B9
+:207FB0000000000000000000000000000000000000000000000000000000000000000000B1
+:207FB8000000000000000000000000000000000000000000000000000000000000000000A9
+:207FC0000000000000000000000000000000000000000000000000000000000000000000A1
+:207FC800000000000000000000000000000000000000000000000000000000000000000099
+:207FD000000000000000000000000000000000000000000000000000000000000000000091
+:207FD800000000000000000000000000000000000000000000000000000000000000000089
+:207FE000000000000000000000000000000000000000000000000000000000000000000081
+:207FE800000000000000000000000000000000000000000000000000000000000000000079
+:207FF000000000000000000000000000000000000000000000000000000000000000000071
+:207FF800000000000000000000000000000000000000000000000000000000000000000069
+:00000001FF
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/opencl_bsp_ip.qsf b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/opencl_bsp_ip.qsf
new file mode 100755
index 0000000000000000000000000000000000000000..f8d1dd23856996aa7799cf161a78991ff2ebb659
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/opencl_bsp_ip.qsf
@@ -0,0 +1,65 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+
+# device.tcl contains settings unique to each device type/board variant (most importantly, the device string for the particular device type)
+source device.tcl
+
+#============================================================
+# Files and basic settings
+#============================================================
+set_global_assignment -name TOP_LEVEL_ENTITY top
+set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
+set_global_assignment -name VHDL_FILE top.vhd
+set_global_assignment -name VERILOG_FILE ip/freeze_wrapper.v
+set_global_assignment -name VERILOG_FILE ip/pr_region.v
+set_global_assignment -name QIP_FILE ip/kernel_mem/kernel_mem_mm_bridge_0/kernel_mem_mm_bridge_0.qip
+set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Pro Edition"
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
+set_global_assignment -name DEVICE 10AX115U2F45E1SG
+set_global_assignment -name FAMILY "Arria 10"
+set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1932
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 4
+set_global_assignment -name QSYS_FILE board.qsys
+set_global_assignment -name IP_FILE ip/board/board_reg_unb_pmbus.ip
+set_global_assignment -name IP_FILE ip/board/board_kernel_clk_gen.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_epcs.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_mmdp_ctrl.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_mmdp_data.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_dpmm_ctrl.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_dpmm_data.ip
+set_global_assignment -name IP_FILE ip/board/board_cpu_0.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_fpga_voltage_sens.ip
+set_global_assignment -name IP_FILE ip/board/board_onchip_memory2_0.ip
+set_global_assignment -name IP_FILE ip/board/board_clk_0.ip
+set_global_assignment -name IP_FILE ip/board/board_pio_system_info.ip
+set_global_assignment -name IP_FILE ip/board/board_kernel_interface.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_wdi.ip
+set_global_assignment -name IP_FILE ip/board/board_pio_pps.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_unb_sens.ip
+set_global_assignment -name IP_FILE ip/board/board_avs_eth_0.ip
+set_global_assignment -name IP_FILE ip/board/board_timer_0.ip
+set_global_assignment -name IP_FILE ip/board/board_rom_system_info.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_fpga_temp_sens.ip
+set_global_assignment -name IP_FILE ip/board/board_pio_wdi.ip
+set_global_assignment -name IP_FILE ip/board/board_reg_remu.ip
+set_global_assignment -name IP_FILE ip/board/board_jtag_uart_0.ip
+set_global_assignment -name IP_FILE ip/board/board_kernel_clk.ip
+set_global_assignment -name IP_FILE ip/board/board_onchip_memory.ip
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/post_flow_pr.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/post_flow_pr.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..8645fbd06855126645914cd22b6adbe7b61833a1
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/post_flow_pr.tcl
@@ -0,0 +1,58 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+post_message "Running post_flow_pr.tcl script"
+
+post_message "Checking for OpenCL SDK installation, environment should have INTELFPGAOCLSDKROOT defined"
+if {[catch {set sdk_root $::env(INTELFPGAOCLSDKROOT)} result]} {
+  post_message -type error "OpenCL SDK installation not found.  Make sure INTELFPGAOCLSDKROOT is correctly set"
+  exit 2
+} else {
+  post_message "INTELFPGAOCLSDKROOT=$::env(INTELFPGAOCLSDKROOT)"
+}
+
+# Load OpenCL BSP utility functions
+source "$sdk_root/ip/board/bsp/opencl_bsp_util.tcl"
+
+set project_name  [::opencl_bsp::get_project_name $quartus(args)]
+set revision_name [::opencl_bsp::get_revision_name $quartus(args) $project_name]
+set fast_compile  [::aocl_fast_compile::is_fast_compile]
+set logic_limit 75.0
+set update_mif 1
+
+
+##############################################################################
+##############################       MAIN        #############################
+##############################################################################
+
+post_message "Project name: $project_name"
+post_message "Revision name: $revision_name"
+
+
+# Run adjust PLL script 
+source "$sdk_root/ip/board/bsp/adjust_plls_a10.tcl"
+
+# Copy flat.rbf to parent directory
+file copy -force flat.sof ../flat.sof
+
+# Convert .sof to .rbf 
+qexec "quartus_cpf -c --option=scripts/rbf_options_file flat.sof ../flat.rbf"
+
+if {$fast_compile} {
+  ::aocl_fast_compile::check_logic_utilization $logic_limit
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..cb75339916f99a61c527fa966b6fa51883e3d090
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl
@@ -0,0 +1,82 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+post_message "Running pre-flow script"
+
+# Make sure OpenCL SDK installation exists
+post_message "Checking for OpenCL SDK installation, environment should have INTELFPGAOCLSDKROOT defined"
+if {[catch {set sdk_root $::env(INTELFPGAOCLSDKROOT)} result]} {
+  post_message -type error "OpenCL SDK installation not found.  Make sure INTELFPGAOCLSDKROOT is correctly set"
+  post_message -type error "Terminating pre-flow script"
+  exit 2
+} else {
+  post_message "INTELFPGAOCLSDKROOT=$::env(INTELFPGAOCLSDKROOT)"
+}
+
+
+# Make sure RadioHDL installation exists
+post_message "Checking for RadioHDL installation, environment should have RADIOHDL_BUILD_DIR defined"
+if {[catch {set radiohdl_build $::env(RADIOHDL_BUILD_DIR)} result]} {
+  post_message -type error "RadioHDL installation not found.  Make sure RADIOHDL_BUILD_DIR are correctly set"
+  post_message -type error "Terminating pre-flow script"
+  exit 2
+} else {
+  post_message "RADIOHDL_BUILD_DIR=$::env(RADIOHDL_BUILD_DIR)"
+}
+
+# Load OpenCL BSP utility functions
+source "$sdk_root/ip/board/bsp/opencl_bsp_util.tcl"
+
+set project_name  top
+set revision_name UNKNOWN
+
+# Get revision name (from quartus(args) variable)
+if { [llength $quartus(args)] > 0 } {
+  set revision_name [lindex $quartus(args) 0]
+} else {
+  set revision_name top
+}
+
+set fast_compile  [::aocl_fast_compile::is_fast_compile]
+set device_name   [::opencl_bsp::get_device_name $project_name $revision_name]
+
+
+##############################################################################
+##############################       MAIN        #############################
+##############################################################################
+
+post_message "Project name: $project_name"
+post_message "Revision name: $revision_name"
+post_message "Device part name: $device_name"
+
+# Check if fast compile is on during base revision
+if {$revision_name eq "flat"} {
+  post_message "Compiling flat revision"
+} else {
+  post_message -type error "This BSP only supports compilation of flat revision, you are trying to compile $revision_name revision"
+  post_message -type error "Terminating pre-flow script"
+  exit 2
+}   
+
+
+post_message "Compiling $revision_name revision: generating and archiving board.qsys"
+post_message "    qsys-generate -syn --family=\"Arria 10\" --part=$device_name board.qsys"
+qexec "qsys-generate -syn --family=\"Arria 10\" --part=$device_name board.qsys"
+post_message "    qsys-archive --quartus-project=$project_name --rev=opencl_bsp_ip --add-to-project board.qsys"
+qexec "qsys-archive --quartus-project=$project_name --rev=opencl_bsp_ip --add-to-project board.qsys"
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/rbf_options_file b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/rbf_options_file
new file mode 100644
index 0000000000000000000000000000000000000000..8a66c6d47b9d0f3be884e5492176697e4939df83
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/rbf_options_file
@@ -0,0 +1 @@
+Bitstream_compression=on
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/sw_iface.iipx b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/sw_iface.iipx
new file mode 100755
index 0000000000000000000000000000000000000000..aaa3a24f5fda36247192cbf5468dfbd122349026
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/sw_iface.iipx
@@ -0,0 +1,8 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<library>
+ <!--  date: 2018.04.26.16:36:03 -->
+ <!--  generated by: sw-ip-make-ipx -->
+ <!--   -->
+ <!--     0 in ${INTELFPGAOCLSDKROOT}/ip/board -->
+ <!--   -->
+</library>
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ta2_unb2b_bsp.mif b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ta2_unb2b_bsp.mif
new file mode 100644
index 0000000000000000000000000000000000000000..388880086a6abe8b13ba3ec3003daf779021e539
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ta2_unb2b_bsp.mif
@@ -0,0 +1,104 @@
+DEPTH = 1024;
+WIDTH = 32;
+ADDRESS_RADIX = DEC;
+DATA_RADIX = HEX;
+CONTENT BEGIN
+0 : 4156535f;
+1 : 4554485f;
+2 : 305f4d4d;
+3 : 535f5241;
+4 : 4d203930;
+5 : 30302034;
+6 : 30393620;
+7 : 4156535f;
+8 : 4554485f;
+9 : 305f4d4d;
+10 : 535f5245;
+11 : 47203830;
+12 : 20363420;
+13 : 4156535f;
+14 : 4554485f;
+15 : 305f4d4d;
+16 : 535f5453;
+17 : 45203830;
+18 : 30302034;
+19 : 30393620;
+20 : 4b45524e;
+21 : 454c5f43;
+22 : 4c4b5f47;
+23 : 454e2032;
+24 : 30303020;
+25 : 34303936;
+26 : 204b4552;
+27 : 4e454c5f;
+28 : 494e5445;
+29 : 52464143;
+30 : 45203430;
+31 : 30302031;
+32 : 36333834;
+33 : 2050494f;
+34 : 5f505053;
+35 : 20336230;
+36 : 20382050;
+37 : 494f5f57;
+38 : 44492033;
+39 : 38302031;
+40 : 36205245;
+41 : 475f4450;
+42 : 4d4d5f43;
+43 : 54524c20;
+44 : 33613820;
+45 : 38205245;
+46 : 475f4450;
+47 : 4d4d5f44;
+48 : 41544120;
+49 : 33613020;
+50 : 38205245;
+51 : 475f4550;
+52 : 43532033;
+53 : 34302033;
+54 : 32205245;
+55 : 475f4650;
+56 : 47415f54;
+57 : 454d505f;
+58 : 53454e53;
+59 : 20333230;
+60 : 20333220;
+61 : 5245475f;
+62 : 46504741;
+63 : 5f564f4c;
+64 : 54414745;
+65 : 5f53454e;
+66 : 53206330;
+67 : 20363420;
+68 : 5245475f;
+69 : 4d4d4450;
+70 : 5f435452;
+71 : 4c203339;
+72 : 38203820;
+73 : 5245475f;
+74 : 4d4d4450;
+75 : 5f444154;
+76 : 41203339;
+77 : 30203820;
+78 : 5245475f;
+79 : 52454d55;
+80 : 20333630;
+81 : 20333220;
+82 : 5245475f;
+83 : 554e425f;
+84 : 504d4255;
+85 : 53203130;
+86 : 30203235;
+87 : 36205245;
+88 : 475f554e;
+89 : 425f5345;
+90 : 4e532032;
+91 : 30302032;
+92 : 35362052;
+93 : 45475f57;
+94 : 44492033;
+95 : 30303020;
+96 : 38000000;
+
+END;
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.qpf b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.qpf
new file mode 100755
index 0000000000000000000000000000000000000000..58a55b4f0c54d61213e0ec532abd659390881eb2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.qpf
@@ -0,0 +1,31 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2018  Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Intel Program License 
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel FPGA IP License Agreement, or other applicable license
+# agreement, including, without limitation, that your use is for
+# the sole purpose of programming logic devices manufactured by
+# Intel and sold by Intel or its authorized distributors.  Please
+# refer to the applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 18.0.0 Build 219 04/25/2018 SJ Pro Edition
+# Date created = 11:26:08  January 10, 2020
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "18.0"
+DATE = "11:26:08  January 10, 2020"
+
+# Revisions
+
+PROJECT_REVISION = "flat"
+PROJECT_REVISION = "opencl_bsp_ip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.sdc b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.sdc
new file mode 100755
index 0000000000000000000000000000000000000000..30f196ac1656f8981fc8b542e3b9163a6696f1de
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.sdc
@@ -0,0 +1,68 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+
+#**************************************************************
+# Create Clock
+#**************************************************************
+set_time_format -unit ns -decimal_places 3
+
+create_clock -name {altera_reserved_tck} -period 50.000 -waveform { 0.000 25.000 } [get_ports {altera_reserved_tck}] 
+create_clock -name {altera_ts_clk} -period 1000.000 -waveform { 0.000 500.000 } [get_ports {altera_ts_clk}] 
+create_clock -period 125Mhz [get_ports {ETH_CLK}]
+create_clock -period 200Mhz [get_ports {CLK}]
+create_clock -period 100Mhz [get_ports {CLKUSR}]
+create_clock -period 644.53125Mhz [get_ports {SA_CLK}]
+create_clock -period 644.53125Mhz [get_ports {SB_CLK}]
+create_clock -period 1.552 -name {BCK_REF_CLK} { BCK_REF_CLK }
+
+#**************************************************************
+# Set Clock Latency
+#**************************************************************
+
+#**************************************************************
+# Set Input Delay
+#**************************************************************
+
+#**************************************************************
+# Set Output Delay
+#**************************************************************
+
+#**************************************************************
+# Set Multicycle Path
+#**************************************************************
+
+#**************************************************************
+# Set Maximum Delay
+#**************************************************************
+
+#**************************************************************
+# Set Minimum Delay
+#**************************************************************
+
+#**************************************************************
+# Set Input Transition
+#**************************************************************
+
+#**************************************************************
+# Set Load
+#**************************************************************
+
+#**************************************************************
+# Set False Paths
+#**************************************************************
+set_false_path -from [get_ports perstl0_n] -to *
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..318285cfc53ad1b6064e56b8a6cbbf36ea5bf86f
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd
@@ -0,0 +1,915 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright (C) 2020
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+-------------------------------------------------------------------------------
+
+LIBRARY IEEE, common_lib, unb2b_board_lib, technology_lib, dp_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.NUMERIC_STD.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_peripherals_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL;
+
+ENTITY top IS
+  GENERIC (
+    g_design_name       : STRING  := "ta2_unb2b_bsp";
+    g_design_note       : STRING  := "UNUSED";
+    g_technology        : NATURAL := c_tech_arria10_e1sg;
+    g_sim               : BOOLEAN := FALSE; --Overridden by TB
+    g_sim_unb_nr        : NATURAL := 0;
+    g_sim_node_nr       : NATURAL := 0;
+    g_stamp_date        : NATURAL := 0;  -- Date (YYYYMMDD) -- set by QSF
+    g_stamp_time        : NATURAL := 0;  -- Time (HHMMSS)   -- set by QSF
+    g_revision_id       : STRING  := "";  -- revision_id, commit hash (first 9 chars) or number
+    g_factory_image     : BOOLEAN := FALSE;
+    g_protect_addr_range: BOOLEAN := FALSE
+  );
+  PORT (
+    -- GENERAL
+    CLK          : IN    STD_LOGIC; -- System Clock
+    PPS          : IN    STD_LOGIC; -- System Sync
+    WDI          : OUT   STD_LOGIC; -- Watchdog Clear
+    INTA         : INOUT STD_LOGIC; -- FPGA interconnect line
+    INTB         : INOUT STD_LOGIC; -- FPGA interconnect line
+
+    -- Others
+    VERSION      : IN    STD_LOGIC_VECTOR(c_unb2b_board_aux.version_w-1 DOWNTO 0);
+    ID           : IN    STD_LOGIC_VECTOR(c_unb2b_board_aux.id_w-1 DOWNTO 0);
+    TESTIO       : INOUT STD_LOGIC_VECTOR(c_unb2b_board_aux.testio_w-1 DOWNTO 0);
+    
+    -- I2C Interface to Sensors
+    SENS_SC      : INOUT STD_LOGIC;
+    SENS_SD      : INOUT STD_LOGIC;
+
+    PMBUS_SC     : INOUT STD_LOGIC;
+    PMBUS_SD     : INOUT STD_LOGIC;
+    PMBUS_ALERT  : IN    STD_LOGIC := '0';
+  
+    -- 1GbE Control Interface
+    ETH_CLK      : IN    STD_LOGIC;
+    ETH_SGIN     : IN    STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
+    ETH_SGOUT    : OUT   STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
+
+    -- Transceiver clocks
+    SA_CLK       : IN    STD_LOGIC := '0'; -- Clock 10GbE front (qsfp) and ring lines
+
+    -- front transceivers
+    QSFP_0_RX    : IN    STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+    QSFP_0_TX    : OUT   STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0);
+    QSFP_1_RX    : IN    STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+    QSFP_1_TX    : OUT   STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0);
+
+    -- LEDs
+    QSFP_LED     : OUT   STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0)
+  );
+END top;
+
+
+ARCHITECTURE str OF top IS
+
+  -- Firmware version x.y
+  CONSTANT c_fw_version             : t_unb2b_board_fw_version := (1, 1);
+  CONSTANT c_mm_clk_freq            : NATURAL := c_unb2b_board_mm_clk_freq_100M;
+  
+  -- 1 GbE
+  CONSTANT c_use_1GbE_udp_offload   : BOOLEAN := TRUE;
+  CONSTANT c_nof_streams_1GbE       : NATURAL := 1;
+
+  -- 10GbE
+  CONSTANT c_nof_qsfp_bus           : NATURAL := 2;
+  CONSTANT c_nof_streams_qsfp       : NATURAL := c_quad*c_nof_qsfp_bus;
+
+  -- System
+  SIGNAL cs_sim                     : STD_LOGIC;
+  SIGNAL xo_ethclk                  : STD_LOGIC;
+  SIGNAL xo_rst                     : STD_LOGIC;
+  SIGNAL xo_rst_n                   : STD_LOGIC;
+  SIGNAL mm_clk                     : STD_LOGIC;
+  SIGNAL mm_rst                     : STD_LOGIC;
+  
+  SIGNAL st_rst                     : STD_LOGIC;
+  SIGNAL st_clk                     : STD_LOGIC;
+
+  -- PIOs
+  SIGNAL pout_wdi                   : STD_LOGIC;
+
+  -- WDI override
+  SIGNAL reg_wdi_mosi               : t_mem_mosi;
+  SIGNAL reg_wdi_miso               : t_mem_miso;
+
+  -- PPSH
+  SIGNAL reg_ppsh_mosi              : t_mem_mosi;
+  SIGNAL reg_ppsh_miso              : t_mem_miso;
+  
+  -- UniBoard system info
+  SIGNAL reg_unb_system_info_mosi   : t_mem_mosi;
+  SIGNAL reg_unb_system_info_miso   : t_mem_miso;
+  SIGNAL rom_unb_system_info_mosi   : t_mem_mosi;
+  SIGNAL rom_unb_system_info_miso   : t_mem_miso;
+
+  -- UniBoard I2C sens
+  SIGNAL reg_unb_sens_mosi          : t_mem_mosi;
+  SIGNAL reg_unb_sens_miso          : t_mem_miso;
+
+  -- pm bus
+  SIGNAL reg_unb_pmbus_mosi         : t_mem_mosi;
+  SIGNAL reg_unb_pmbus_miso         : t_mem_miso;
+
+  -- FPGA sensors
+  SIGNAL reg_fpga_temp_sens_mosi    : t_mem_mosi;
+  SIGNAL reg_fpga_temp_sens_miso    : t_mem_miso;
+  SIGNAL reg_fpga_voltage_sens_mosi : t_mem_mosi;
+  SIGNAL reg_fpga_voltage_sens_miso : t_mem_miso;
+
+  -- eth1g
+  SIGNAL eth1g_mm_rst               : STD_LOGIC;
+  SIGNAL eth1g_tse_mosi             : t_mem_mosi;  -- ETH TSE MAC registers
+  SIGNAL eth1g_tse_miso             : t_mem_miso;
+  SIGNAL eth1g_reg_mosi             : t_mem_mosi;  -- ETH control and status registers
+  SIGNAL eth1g_reg_miso             : t_mem_miso;
+  SIGNAL eth1g_reg_interrupt        : STD_LOGIC;   -- Interrupt
+  SIGNAL eth1g_ram_mosi             : t_mem_mosi;  -- ETH rx frame and tx frame memory
+  SIGNAL eth1g_ram_miso             : t_mem_miso;
+
+  -- Interface: 1GbE UDP streaming ports
+  SIGNAL eth1g_udp_tx_sosi_arr      : t_dp_sosi_arr(c_nof_streams_1GbE-1 DOWNTO 0);
+  SIGNAL eth1g_udp_tx_siso_arr      : t_dp_siso_arr(c_nof_streams_1GbE-1 DOWNTO 0);
+  SIGNAL eth1g_udp_rx_sosi_arr      : t_dp_sosi_arr(c_nof_streams_1GbE-1 DOWNTO 0);
+  SIGNAL eth1g_udp_rx_siso_arr      : t_dp_siso_arr(c_nof_streams_1GbE-1 DOWNTO 0);
+
+  -- EPCS read
+  SIGNAL reg_dpmm_data_mosi         : t_mem_mosi;
+  SIGNAL reg_dpmm_data_miso         : t_mem_miso;
+  SIGNAL reg_dpmm_ctrl_mosi         : t_mem_mosi;
+  SIGNAL reg_dpmm_ctrl_miso         : t_mem_miso;
+
+  -- EPCS write
+  SIGNAL reg_mmdp_data_mosi         : t_mem_mosi;
+  SIGNAL reg_mmdp_data_miso         : t_mem_miso;
+  SIGNAL reg_mmdp_ctrl_mosi         : t_mem_mosi;
+  SIGNAL reg_mmdp_ctrl_miso         : t_mem_miso;
+
+  -- EPCS status/control
+  SIGNAL reg_epcs_mosi              : t_mem_mosi;
+  SIGNAL reg_epcs_miso              : t_mem_miso;
+
+  -- Remote Update
+  SIGNAL reg_remu_mosi              : t_mem_mosi;
+  SIGNAL reg_remu_miso              : t_mem_miso;
+
+  -- 10GbE
+  SIGNAL i_QSFP_TX                  : t_unb2b_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0); 
+  SIGNAL i_QSFP_RX                  : t_unb2b_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0);
+ 
+  SIGNAL unb2b_board_front_io_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
+  SIGNAL unb2b_board_front_io_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+
+  -- QSFP leds
+  SIGNAL qsfp_green_led_arr         : STD_LOGIC_VECTOR(c_nof_qsfp_bus-1 DOWNTO 0);
+  SIGNAL qsfp_red_led_arr           : STD_LOGIC_VECTOR(c_nof_qsfp_bus-1 DOWNTO 0);
+  SIGNAL unb2b_board_qsfp_leds_tx_src_in_arr : t_dp_siso_arr(c_nof_qsfp_bus*c_quad-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
+
+  SIGNAL i_reset_n         : STD_LOGIC;
+
+
+
+  -- OpenCL kernel
+
+  SIGNAL board_kernel_clk_clk                         : std_logic;                    
+  SIGNAL board_kernel_clk2x_clk                       : std_logic;                   
+  SIGNAL board_kernel_reset_reset_n                   : std_logic;                   
+ 
+  SIGNAL board_kernel_cra_waitrequest                 : std_logic;                     
+  SIGNAL board_kernel_cra_readdata                    : std_logic_vector(63 downto 0); 
+  SIGNAL board_kernel_cra_readdatavalid               : std_logic;                     
+  SIGNAL board_kernel_cra_burstcount                  : std_logic_vector(0 downto 0); 
+  SIGNAL board_kernel_cra_writedata                   : std_logic_vector(63 downto 0);
+  SIGNAL board_kernel_cra_address                     : std_logic_vector(29 downto 0);
+  SIGNAL board_kernel_cra_write                       : std_logic;                    
+  SIGNAL board_kernel_cra_read                        : std_logic;                    
+  SIGNAL board_kernel_cra_byteenable                  : std_logic_vector(7 downto 0); 
+  SIGNAL board_kernel_cra_debugaccess                 : std_logic;                    
+
+  SIGNAL board_kernel_irq_irq                         : std_logic_vector(0 downto 0); 
+
+  SIGNAL board_kernel_register_mem_address            : std_logic_vector(6 downto 0); --  := (others => 'X'); -- address
+  SIGNAL board_kernel_register_mem_clken              : std_logic; --                     := 'X';             -- clken
+  SIGNAL board_kernel_register_mem_chipselect         : std_logic; --                     := 'X';             -- chipselect
+  SIGNAL board_kernel_register_mem_write              : std_logic; --                     := 'X';             -- write
+  SIGNAL board_kernel_register_mem_readdata           : std_logic_vector(255 downto 0);                    -- readdata
+  SIGNAL board_kernel_register_mem_writedata          : std_logic_vector(255 downto 0); -- := (others => 'X'); -- writedata
+  SIGNAL board_kernel_register_mem_byteenable         : std_logic_vector(31 downto 0); --  := (others => 'X'); -- byteenable
+
+  SIGNAL board_kernel_stream_snk_40GbE_data           : std_logic_vector(263 downto 0) := (others => 'X'); -- data
+  SIGNAL board_kernel_stream_snk_40GbE_ready          : std_logic;                                         -- ready
+  SIGNAL board_kernel_stream_snk_40GbE_valid          : std_logic                      := 'X';             -- valid
+  SIGNAL board_kernel_stream_src_40GbE_data           : std_logic_vector(263 downto 0);                    -- data
+  SIGNAL board_kernel_stream_src_40GbE_ready          : std_logic                      := 'X';             -- ready
+  SIGNAL board_kernel_stream_src_40GbE_valid          : std_logic;                                         -- valid
+  SIGNAL ta2_unb2b_40gbe_rx_status_rx_status          : std_logic;                                         -- rx_status
+
+  SIGNAL board_kernel_stream_src_10GbE_data           : std_logic_vector(71 downto 0); 
+  SIGNAL board_kernel_stream_src_10GbE_valid          : std_logic; 
+  SIGNAL board_kernel_stream_src_10GbE_ready          : std_logic; 
+  SIGNAL board_kernel_stream_snk_10GbE_data           : std_logic_vector(71 downto 0); 
+  SIGNAL board_kernel_stream_snk_10GbE_valid          : std_logic; 
+  SIGNAL board_kernel_stream_snk_10GbE_ready          : std_logic;
+  SIGNAL ta2_unb2b_10gbe_rx_status_rx_status          : std_logic;                                         -- rx_status
+
+
+  SIGNAL board_kernel_stream_src_1GbE_data           : std_logic_vector(39 downto 0); 
+  SIGNAL board_kernel_stream_src_1GbE_valid          : std_logic; 
+  SIGNAL board_kernel_stream_src_1GbE_ready          : std_logic; 
+  SIGNAL board_kernel_stream_snk_1GbE_data           : std_logic_vector(39 downto 0); 
+  SIGNAL board_kernel_stream_snk_1GbE_valid          : std_logic; 
+  SIGNAL board_kernel_stream_snk_1GbE_ready          : std_logic;
+
+  component board is
+    port (
+      avs_eth_0_clk_export                   : out std_logic;                                        -- export
+      avs_eth_0_irq_export                   : in  std_logic                     := 'X';             -- export
+      avs_eth_0_ram_address_export           : out std_logic_vector(9 downto 0);                     -- export
+      avs_eth_0_ram_read_export              : out std_logic;                                        -- export
+      avs_eth_0_ram_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      avs_eth_0_ram_write_export             : out std_logic;                                        -- export
+      avs_eth_0_ram_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      avs_eth_0_reg_address_export           : out std_logic_vector(3 downto 0);                     -- export
+      avs_eth_0_reg_read_export              : out std_logic;                                        -- export
+      avs_eth_0_reg_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      avs_eth_0_reg_write_export             : out std_logic;                                        -- export
+      avs_eth_0_reg_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      avs_eth_0_reset_export                 : out std_logic;                                        -- export
+      avs_eth_0_tse_address_export           : out std_logic_vector(9 downto 0);                     -- export
+      avs_eth_0_tse_read_export              : out std_logic;                                        -- export
+      avs_eth_0_tse_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      avs_eth_0_tse_waitrequest_export       : in  std_logic                     := 'X';             -- export
+      avs_eth_0_tse_write_export             : out std_logic;                                        -- export
+      avs_eth_0_tse_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      clk_clk                                : in  std_logic                     := 'X';             -- clk
+      kernel_clk_clk                         : out std_logic;                                        -- clk
+      kernel_clk2x_clk                       : out std_logic;                                        -- clk
+      kernel_cra_waitrequest                 : in  std_logic                     := 'X';             -- waitrequest
+      kernel_cra_readdata                    : in  std_logic_vector(63 downto 0) := (others => 'X'); -- readdata
+      kernel_cra_readdatavalid               : in  std_logic                     := 'X';             -- readdatavalid
+      kernel_cra_burstcount                  : out std_logic_vector(0 downto 0);                     -- burstcount
+      kernel_cra_writedata                   : out std_logic_vector(63 downto 0);                    -- writedata
+      kernel_cra_address                     : out std_logic_vector(29 downto 0);                    -- address
+      kernel_cra_write                       : out std_logic;                                        -- write
+      kernel_cra_read                        : out std_logic;                                        -- read
+      kernel_cra_byteenable                  : out std_logic_vector(7 downto 0);                     -- byteenable
+      kernel_cra_debugaccess                 : out std_logic;                                        -- debugaccess
+      kernel_interface_sw_reset_in_reset     : in  std_logic                     := 'X';             -- reset
+      kernel_irq_irq                         : in  std_logic_vector(0 downto 0)  := (others => 'X'); -- irq
+      kernel_reset_reset_n                   : out std_logic;                                        -- reset_n
+      pio_pps_address_export                 : out std_logic_vector(0 downto 0);                     -- export
+      pio_pps_clk_export                     : out std_logic;                                        -- export
+      pio_pps_read_export                    : out std_logic;                                        -- export
+      pio_pps_readdata_export                : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      pio_pps_reset_export                   : out std_logic;                                        -- export
+      pio_pps_write_export                   : out std_logic;                                        -- export
+      pio_pps_writedata_export               : out std_logic_vector(31 downto 0);                    -- export
+      pio_system_info_address_export         : out std_logic_vector(4 downto 0);                     -- export
+      pio_system_info_clk_export             : out std_logic;                                        -- export
+      pio_system_info_read_export            : out std_logic;                                        -- export
+      pio_system_info_readdata_export        : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      pio_system_info_reset_export           : out std_logic;                                        -- export
+      pio_system_info_write_export           : out std_logic;                                        -- export
+      pio_system_info_writedata_export       : out std_logic_vector(31 downto 0);                    -- export
+      pio_wdi_external_connection_export     : out std_logic;                                        -- export
+      reg_dpmm_ctrl_address_export           : out std_logic_vector(0 downto 0);                     -- export
+      reg_dpmm_ctrl_clk_export               : out std_logic;                                        -- export
+      reg_dpmm_ctrl_read_export              : out std_logic;                                        -- export
+      reg_dpmm_ctrl_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_dpmm_ctrl_reset_export             : out std_logic;                                        -- export
+      reg_dpmm_ctrl_write_export             : out std_logic;                                        -- export
+      reg_dpmm_ctrl_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      reg_dpmm_data_address_export           : out std_logic_vector(0 downto 0);                     -- export
+      reg_dpmm_data_clk_export               : out std_logic;                                        -- export
+      reg_dpmm_data_read_export              : out std_logic;                                        -- export
+      reg_dpmm_data_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_dpmm_data_reset_export             : out std_logic;                                        -- export
+      reg_dpmm_data_write_export             : out std_logic;                                        -- export
+      reg_dpmm_data_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      reg_epcs_address_export                : out std_logic_vector(2 downto 0);                     -- export
+      reg_epcs_clk_export                    : out std_logic;                                        -- export
+      reg_epcs_read_export                   : out std_logic;                                        -- export
+      reg_epcs_readdata_export               : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_epcs_reset_export                  : out std_logic;                                        -- export
+      reg_epcs_write_export                  : out std_logic;                                        -- export
+      reg_epcs_writedata_export              : out std_logic_vector(31 downto 0);                    -- export
+      reg_fpga_temp_sens_address_export      : out std_logic_vector(2 downto 0);                     -- export
+      reg_fpga_temp_sens_clk_export          : out std_logic;                                        -- export
+      reg_fpga_temp_sens_read_export         : out std_logic;                                        -- export
+      reg_fpga_temp_sens_readdata_export     : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_fpga_temp_sens_reset_export        : out std_logic;                                        -- export
+      reg_fpga_temp_sens_write_export        : out std_logic;                                        -- export
+      reg_fpga_temp_sens_writedata_export    : out std_logic_vector(31 downto 0);                    -- export
+      reg_fpga_voltage_sens_address_export   : out std_logic_vector(3 downto 0);                     -- export
+      reg_fpga_voltage_sens_clk_export       : out std_logic;                                        -- export
+      reg_fpga_voltage_sens_read_export      : out std_logic;                                        -- export
+      reg_fpga_voltage_sens_readdata_export  : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_fpga_voltage_sens_reset_export     : out std_logic;                                        -- export
+      reg_fpga_voltage_sens_write_export     : out std_logic;                                        -- export
+      reg_fpga_voltage_sens_writedata_export : out std_logic_vector(31 downto 0);                    -- export
+      reg_mmdp_ctrl_address_export           : out std_logic_vector(0 downto 0);                     -- export
+      reg_mmdp_ctrl_clk_export               : out std_logic;                                        -- export
+      reg_mmdp_ctrl_read_export              : out std_logic;                                        -- export
+      reg_mmdp_ctrl_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_mmdp_ctrl_reset_export             : out std_logic;                                        -- export
+      reg_mmdp_ctrl_write_export             : out std_logic;                                        -- export
+      reg_mmdp_ctrl_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      reg_mmdp_data_address_export           : out std_logic_vector(0 downto 0);                     -- export
+      reg_mmdp_data_clk_export               : out std_logic;                                        -- export
+      reg_mmdp_data_read_export              : out std_logic;                                        -- export
+      reg_mmdp_data_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_mmdp_data_reset_export             : out std_logic;                                        -- export
+      reg_mmdp_data_write_export             : out std_logic;                                        -- export
+      reg_mmdp_data_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      reg_remu_address_export                : out std_logic_vector(2 downto 0);                     -- export
+      reg_remu_clk_export                    : out std_logic;                                        -- export
+      reg_remu_read_export                   : out std_logic;                                        -- export
+      reg_remu_readdata_export               : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_remu_reset_export                  : out std_logic;                                        -- export
+      reg_remu_write_export                  : out std_logic;                                        -- export
+      reg_remu_writedata_export              : out std_logic_vector(31 downto 0);                    -- export
+      reg_unb_pmbus_address_export           : out std_logic_vector(5 downto 0);                     -- export
+      reg_unb_pmbus_clk_export               : out std_logic;                                        -- export
+      reg_unb_pmbus_read_export              : out std_logic;                                        -- export
+      reg_unb_pmbus_readdata_export          : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_unb_pmbus_reset_export             : out std_logic;                                        -- export
+      reg_unb_pmbus_write_export             : out std_logic;                                        -- export
+      reg_unb_pmbus_writedata_export         : out std_logic_vector(31 downto 0);                    -- export
+      reg_unb_sens_address_export            : out std_logic_vector(5 downto 0);                     -- export
+      reg_unb_sens_clk_export                : out std_logic;                                        -- export
+      reg_unb_sens_read_export               : out std_logic;                                        -- export
+      reg_unb_sens_readdata_export           : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_unb_sens_reset_export              : out std_logic;                                        -- export
+      reg_unb_sens_write_export              : out std_logic;                                        -- export
+      reg_unb_sens_writedata_export          : out std_logic_vector(31 downto 0);                    -- export
+      reg_wdi_address_export                 : out std_logic_vector(0 downto 0);                     -- export
+      reg_wdi_clk_export                     : out std_logic;                                        -- export
+      reg_wdi_read_export                    : out std_logic;                                        -- export
+      reg_wdi_readdata_export                : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      reg_wdi_reset_export                   : out std_logic;                                        -- export
+      reg_wdi_write_export                   : out std_logic;                                        -- export
+      reg_wdi_writedata_export               : out std_logic_vector(31 downto 0);                    -- export
+      kernel_register_mem_address            : in  std_logic_vector(6 downto 0)  := (others => 'X'); -- address
+      kernel_register_mem_clken              : in  std_logic                     := 'X';             -- clken
+      kernel_register_mem_chipselect         : in  std_logic                     := 'X';             -- chipselect
+      kernel_register_mem_write              : in  std_logic                     := 'X';             -- write
+      kernel_register_mem_readdata           : out std_logic_vector(255 downto 0);                    -- readdata
+      kernel_register_mem_writedata          : in  std_logic_vector(255 downto 0) := (others => 'X'); -- writedata
+      kernel_register_mem_byteenable         : in  std_logic_vector(31 downto 0)  := (others => 'X'); -- byteenable
+      reset_reset_n                          : in  std_logic                     := 'X';             -- reset_n
+      rom_system_info_address_export         : out std_logic_vector(9 downto 0);                     -- export
+      rom_system_info_clk_export             : out std_logic;                                        -- export
+      rom_system_info_read_export            : out std_logic;                                        -- export
+      rom_system_info_readdata_export        : in  std_logic_vector(31 downto 0) := (others => 'X'); -- export
+      rom_system_info_reset_export           : out std_logic;                                        -- export
+      rom_system_info_write_export           : out std_logic;                                        -- export
+      rom_system_info_writedata_export       : out std_logic_vector(31 downto 0);                     -- export
+      ta2_unb2b_10gbe_kernel_snk_data        : in  std_logic_vector(71 downto 0)  := (others => 'X'); -- data
+      ta2_unb2b_10gbe_kernel_snk_ready       : out std_logic;                                         -- ready
+      ta2_unb2b_10gbe_kernel_snk_valid       : in  std_logic                      := 'X';             -- valid
+      ta2_unb2b_10gbe_kernel_src_data        : out std_logic_vector(71 downto 0);                     -- data
+      ta2_unb2b_10gbe_kernel_src_ready       : in  std_logic                      := 'X';             -- ready
+      ta2_unb2b_10gbe_kernel_src_valid       : out std_logic;                                         -- valid
+      ta2_unb2b_10gbe_refclk_clk             : in  std_logic                      := 'X';             -- clk
+      ta2_unb2b_10gbe_rx_serial_data_conduit : in  std_logic                      := 'X';             -- conduit
+      ta2_unb2b_10gbe_rx_status_rx_status    : out std_logic;                                         -- rx_status
+      ta2_unb2b_10gbe_tx_serial_data_conduit : out std_logic;                                         -- conduit
+      ta2_unb2b_40gbe_kernel_snk_data        : in  std_logic_vector(263 downto 0) := (others => 'X'); -- data
+      ta2_unb2b_40gbe_kernel_snk_ready       : out std_logic;                                         -- ready
+      ta2_unb2b_40gbe_kernel_snk_valid       : in  std_logic                      := 'X';             -- valid
+      ta2_unb2b_40gbe_kernel_src_data        : out std_logic_vector(263 downto 0);                    -- data
+      ta2_unb2b_40gbe_kernel_src_ready       : in  std_logic                      := 'X';             -- ready
+      ta2_unb2b_40gbe_kernel_src_valid       : out std_logic;                                         -- valid
+      ta2_unb2b_40gbe_refclk_clk             : in  std_logic                      := 'X';             -- clk
+      ta2_unb2b_40gbe_rx_serial_data_conduit : in  std_logic_vector(3 downto 0)   := (others => 'X'); -- conduit
+      ta2_unb2b_40gbe_rx_status_rx_status    : out std_logic;                                         -- rx_status
+      ta2_unb2b_40gbe_tx_serial_data_conduit : out std_logic_vector(3 downto 0);                       -- conduit
+
+      ta2_unb2b_1gbe_mc_kernel_snk_data              : in  std_logic_vector(39 downto 0)  := (others => 'X'); -- data
+      ta2_unb2b_1gbe_mc_kernel_snk_ready             : out std_logic;                                         -- ready
+      ta2_unb2b_1gbe_mc_kernel_snk_valid             : in  std_logic                      := 'X';             -- valid
+      ta2_unb2b_1gbe_mc_kernel_src_data              : out std_logic_vector(39 downto 0);                     -- data
+      ta2_unb2b_1gbe_mc_kernel_src_ready             : in  std_logic                      := 'X';             -- ready
+      ta2_unb2b_1gbe_mc_kernel_src_valid             : out std_logic;                                         -- valid
+      ta2_unb2b_1gbe_mc_st_clk_clk                   : in  std_logic                      := 'X';             -- clk
+      ta2_unb2b_1gbe_mc_st_rst_reset                 : in  std_logic                      := 'X';             -- reset
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_ready          : out std_logic;                                         -- ready
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_data           : in  std_logic_vector(39 downto 0)  := (others => 'X'); -- data
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_empty          : in  std_logic_vector(1 downto 0)   := (others => 'X'); -- empty
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_endofpacket    : in  std_logic                      := 'X';             -- endofpacket
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_startofpacket  : in  std_logic                      := 'X';             -- startofpacket
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_valid          : in  std_logic                      := 'X';             -- valid
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_xon_xon        : out std_logic;                                         -- xon
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_ready         : in  std_logic                      := 'X';             -- ready
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_data          : out std_logic_vector(39 downto 0);                     -- data
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_empty         : out std_logic_vector(1 downto 0);                      -- empty
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_endofpacket   : out std_logic;                                         -- endofpacket
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_startofpacket : out std_logic;                                         -- startofpacket
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_valid         : out std_logic;                                         -- valid
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_xon_xon       : in  std_logic                      := 'X'              -- xon
+    );
+  end component board;
+
+  component freeze_wrapper is
+    port (
+      board_kernel_clk_clk               : in   std_logic; --input           
+      board_kernel_clk2x_clk             : in   std_logic; --input           
+      board_kernel_reset_reset_n         : in   std_logic; --input           
+      board_kernel_irq_irq               : out  std_logic_vector(0 downto 0); --output [0:0]    
+      board_kernel_cra_waitrequest       : out  std_logic; --output          
+      board_kernel_cra_readdata          : out  std_logic_vector(63 downto 0); --output [63:0]   
+      board_kernel_cra_readdatavalid     : out  std_logic; --output          
+      board_kernel_cra_burstcount        : in   std_logic_vector(0 downto 0); --input [0:0]     
+      board_kernel_cra_writedata         : in   std_logic_vector(63 downto 0); --input [63:0]    
+      board_kernel_cra_address           : in   std_logic_vector(29 downto 0); --input [29:0]    
+      board_kernel_cra_write             : in   std_logic; --input           
+      board_kernel_cra_read              : in   std_logic; --input           
+      board_kernel_cra_byteenable        : in   std_logic_vector(7 downto 0); --input [7:0]     
+      board_kernel_cra_debugaccess       : in   std_logic;  --input
+
+      board_kernel_register_mem_address    : out std_logic_vector(6 downto 0); --  := (others => 'X'); -- address
+      board_kernel_register_mem_clken      : out std_logic; --                     := 'X';             -- clken
+      board_kernel_register_mem_chipselect : out std_logic; --                     := 'X';             -- chipselect
+      board_kernel_register_mem_write      : out std_logic; --                     := 'X';             -- write
+      board_kernel_register_mem_readdata   : in  std_logic_vector(255 downto 0);                    -- readdata
+      board_kernel_register_mem_writedata  : out std_logic_vector(255 downto 0); -- := (others => 'X'); -- writedata
+      board_kernel_register_mem_byteenable : out std_logic_vector(31 downto 0); --  := (others => 'X'); -- byteenable
+
+      board_kernel_stream_src_40GbE_data   : in  std_logic_vector(263 downto 0);  
+      board_kernel_stream_src_40GbE_valid  : in  std_logic; 
+      board_kernel_stream_src_40GbE_ready  : out std_logic; 
+      board_kernel_stream_snk_40GbE_data   : out std_logic_vector(263 downto 0); 
+      board_kernel_stream_snk_40GbE_valid  : out std_logic; 
+      board_kernel_stream_snk_40GbE_ready  : in  std_logic; 
+                                          
+      board_kernel_stream_src_10GbE_data   : in  std_logic_vector(71 downto 0); 
+      board_kernel_stream_src_10GbE_valid  : in  std_logic; 
+      board_kernel_stream_src_10GbE_ready  : out std_logic; 
+      board_kernel_stream_snk_10GbE_data   : out std_logic_vector(71 downto 0); 
+      board_kernel_stream_snk_10GbE_valid  : out std_logic; 
+      board_kernel_stream_snk_10GbE_ready  : in  std_logic;
+                                          
+      board_kernel_stream_src_1GbE_data   : in  std_logic_vector(39 downto 0); 
+      board_kernel_stream_src_1GbE_valid  : in  std_logic; 
+      board_kernel_stream_src_1GbE_ready  : out std_logic; 
+      board_kernel_stream_snk_1GbE_data   : out std_logic_vector(39 downto 0); 
+      board_kernel_stream_snk_1GbE_valid  : out std_logic; 
+      board_kernel_stream_snk_1GbE_ready  : in  std_logic
+
+
+   );
+  end component freeze_wrapper;
+
+
+
+BEGIN
+
+  i_reset_n <= NOT mm_rst;
+
+  -----------------------------------------------------------------------------
+  -- General control function
+  -----------------------------------------------------------------------------
+  u_ctrl_unb2b_board : ENTITY unb2b_board_lib.ctrl_unb2b_board
+  GENERIC MAP (
+    g_sim                     => g_sim,
+    g_technology              => g_technology,
+    g_design_name             => g_design_name,
+    g_design_note             => g_design_note,
+    g_stamp_date              => g_stamp_date,
+    g_stamp_time              => g_stamp_time,
+    g_revision_id             => g_revision_id,
+    g_fw_version              => c_fw_version,
+    g_mm_clk_freq             => c_mm_clk_freq,
+    g_eth_clk_freq            => c_unb2b_board_eth_clk_freq_125M,
+    g_udp_offload             => c_use_1GbE_udp_offload,
+    g_udp_offload_nof_streams => c_nof_streams_1GbE,
+    g_aux                     => c_unb2b_board_aux,
+    g_factory_image           => g_factory_image,
+    g_protect_addr_range      => g_protect_addr_range
+  )
+  PORT MAP (
+    -- Clock an reset signals
+    cs_sim                   => cs_sim,
+    xo_ethclk                => xo_ethclk,
+    xo_rst                   => xo_rst,
+    xo_rst_n                 => xo_rst_n,
+
+    mm_clk                   => mm_clk,
+    mm_rst                   => mm_rst,
+
+    dp_rst                   => st_rst,
+    dp_clk                   => st_clk,
+    dp_pps                   => OPEN,
+    dp_rst_in                => st_rst,
+    dp_clk_in                => st_clk,
+    
+    -- Toggle WDI
+    pout_wdi                 => pout_wdi,
+
+    -- MM buses
+    -- REMU
+    reg_remu_mosi            => reg_remu_mosi,
+    reg_remu_miso            => reg_remu_miso,
+
+    -- EPCS read
+    reg_dpmm_data_mosi       => reg_dpmm_data_mosi,
+    reg_dpmm_data_miso       => reg_dpmm_data_miso,
+    reg_dpmm_ctrl_mosi       => reg_dpmm_ctrl_mosi,
+    reg_dpmm_ctrl_miso       => reg_dpmm_ctrl_miso,
+
+    -- EPCS write
+    reg_mmdp_data_mosi       => reg_mmdp_data_mosi,
+    reg_mmdp_data_miso       => reg_mmdp_data_miso,
+    reg_mmdp_ctrl_mosi       => reg_mmdp_ctrl_mosi,
+    reg_mmdp_ctrl_miso       => reg_mmdp_ctrl_miso,
+
+    -- EPCS status/control
+    reg_epcs_mosi            => reg_epcs_mosi,
+    reg_epcs_miso            => reg_epcs_miso,
+
+    -- . Manual WDI override
+    reg_wdi_mosi             => reg_wdi_mosi,
+    reg_wdi_miso             => reg_wdi_miso,
+    
+    -- . System_info
+    reg_unb_system_info_mosi => reg_unb_system_info_mosi,
+    reg_unb_system_info_miso => reg_unb_system_info_miso, 
+    rom_unb_system_info_mosi => rom_unb_system_info_mosi,
+    rom_unb_system_info_miso => rom_unb_system_info_miso, 
+    
+    -- . UniBoard I2C sensors
+    reg_unb_sens_mosi        => reg_unb_sens_mosi,
+    reg_unb_sens_miso        => reg_unb_sens_miso,    
+    
+    -- . FPGA sensors
+    reg_fpga_temp_sens_mosi  => reg_fpga_temp_sens_mosi,
+    reg_fpga_temp_sens_miso  => reg_fpga_temp_sens_miso,
+    reg_fpga_voltage_sens_mosi  => reg_fpga_voltage_sens_mosi,
+    reg_fpga_voltage_sens_miso  => reg_fpga_voltage_sens_miso,
+
+    reg_unb_pmbus_mosi       => reg_unb_pmbus_mosi,
+    reg_unb_pmbus_miso       => reg_unb_pmbus_miso,
+
+    -- . PPSH
+    reg_ppsh_mosi            => reg_ppsh_mosi,
+    reg_ppsh_miso            => reg_ppsh_miso,
+    
+    -- eth1g
+    eth1g_mm_rst             => eth1g_mm_rst,
+    eth1g_tse_mosi           => eth1g_tse_mosi,
+    eth1g_tse_miso           => eth1g_tse_miso,
+    eth1g_reg_mosi           => eth1g_reg_mosi,
+    eth1g_reg_miso           => eth1g_reg_miso,
+    eth1g_reg_interrupt      => eth1g_reg_interrupt,
+    eth1g_ram_mosi           => eth1g_ram_mosi,
+    eth1g_ram_miso           => eth1g_ram_miso,
+
+    -- eth1g UDP streaming ports
+    udp_tx_sosi_arr          =>  eth1g_udp_tx_sosi_arr,
+    udp_tx_siso_arr          =>  eth1g_udp_tx_siso_arr,
+    udp_rx_sosi_arr          =>  eth1g_udp_rx_sosi_arr,
+    udp_rx_siso_arr          =>  eth1g_udp_rx_siso_arr,
+        
+    -- FPGA pins
+    -- . General
+    CLK                      => CLK,
+    PPS                      => PPS,
+    WDI                      => WDI,
+    INTA                     => INTA,
+    INTB                     => INTB,
+    -- . Others
+    VERSION                  => VERSION,
+    ID                       => ID,
+    TESTIO                   => TESTIO,
+    -- . I2C Interface to Sensors
+    SENS_SC                  => SENS_SC,
+    SENS_SD                  => SENS_SD,
+    -- PM bus
+    PMBUS_SC                 => PMBUS_SC,
+    PMBUS_SD                 => PMBUS_SD,
+    PMBUS_ALERT              => PMBUS_ALERT,
+
+    -- . 1GbE Control Interface
+    ETH_clk                  => ETH_CLK,
+    ETH_SGIN                 => ETH_SGIN,
+    ETH_SGOUT                => ETH_SGOUT
+  );
+
+
+  ------------
+  -- Front IO
+  ------------
+
+  -- put the QSFP_TX/RX ports into arrays 
+  i_QSFP_RX(0) <= QSFP_0_RX;
+  i_QSFP_RX(1) <= QSFP_1_RX;
+
+  QSFP_0_TX <= i_QSFP_TX(0);
+  QSFP_1_TX <= i_QSFP_TX(1);
+
+  u_unb2b_board_front_io : ENTITY unb2b_board_lib.unb2b_board_front_io
+  GENERIC MAP (
+    g_nof_qsfp_bus => c_nof_qsfp_bus
+  )
+  PORT MAP (
+    serial_tx_arr => unb2b_board_front_io_serial_tx_arr,
+    serial_rx_arr => unb2b_board_front_io_serial_rx_arr,
+
+    green_led_arr => qsfp_green_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
+    red_led_arr   => qsfp_red_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
+
+    QSFP_RX    => i_QSFP_RX,
+    QSFP_TX    => i_QSFP_TX,
+
+    QSFP_LED   => QSFP_LED
+  );
+
+  ------------------------
+  -- qsfp LEDs controller 
+  ------------------------
+  unb2b_board_qsfp_leds_tx_src_in_arr(4).xon <= ta2_unb2b_40gbe_rx_status_rx_status;
+  unb2b_board_qsfp_leds_tx_src_in_arr(0).xon <= ta2_unb2b_10gbe_rx_status_rx_status;
+  u_unb2b_board_qsfp_leds : ENTITY unb2b_board_lib.unb2b_board_qsfp_leds
+  GENERIC MAP (
+    g_sim             => g_sim,
+    g_factory_image   => g_factory_image,
+    g_nof_qsfp        => c_nof_qsfp_bus,
+    g_pulse_us        => 1000 / (10**9 / c_mm_clk_freq) -- nof clk cycles to get us period
+  )
+  PORT MAP (
+    rst               => mm_rst,
+    clk               => mm_clk,
+
+    tx_siso_arr       => unb2b_board_qsfp_leds_tx_src_in_arr,
+
+    green_led_arr     => qsfp_green_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
+    red_led_arr       => qsfp_red_led_arr(c_nof_qsfp_bus-1 DOWNTO 0)
+  );
+
+
+
+  -----------------------------------------------------------------------------
+  -- Board qsys 
+  -----------------------------------------------------------------------------
+  board_inst : board
+  PORT MAP (
+      clk_clk                                   => mm_clk,
+      reset_reset_n                             => i_reset_n,
+
+      kernel_clk_clk                            => board_kernel_clk_clk,
+      kernel_clk2x_clk                          => board_kernel_clk2x_clk,
+      kernel_reset_reset_n                      => board_kernel_reset_reset_n,
+
+      kernel_interface_sw_reset_in_reset        => mm_rst,  
+
+      -- the_pio_wdi: toggled by NIOS II application unb_osy. Connects to WDI via ctrl_unb2b_board.
+      pio_wdi_external_connection_export        => pout_wdi,
+
+      avs_eth_0_reset_export                    => eth1g_mm_rst,
+      avs_eth_0_tse_address_export              => eth1g_tse_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
+      avs_eth_0_tse_write_export                => eth1g_tse_mosi.wr,
+      avs_eth_0_tse_read_export                 => eth1g_tse_mosi.rd,
+      avs_eth_0_tse_writedata_export            => eth1g_tse_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_tse_readdata_export             => eth1g_tse_miso.rddata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_tse_waitrequest_export          => eth1g_tse_miso.waitrequest,
+      avs_eth_0_reg_address_export              => eth1g_reg_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_eth_adr_w-1 DOWNTO 0),
+      avs_eth_0_reg_write_export                => eth1g_reg_mosi.wr,
+      avs_eth_0_reg_read_export                 => eth1g_reg_mosi.rd,
+      avs_eth_0_reg_writedata_export            => eth1g_reg_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_reg_readdata_export             => eth1g_reg_miso.rddata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_ram_address_export              => eth1g_ram_mosi.address(c_unb2b_board_peripherals_mm_reg_default.ram_eth_adr_w-1 DOWNTO 0),
+      avs_eth_0_ram_write_export                => eth1g_ram_mosi.wr,
+      avs_eth_0_ram_read_export                 => eth1g_ram_mosi.rd,
+      avs_eth_0_ram_writedata_export            => eth1g_ram_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_ram_readdata_export             => eth1g_ram_miso.rddata(c_word_w-1 DOWNTO 0),
+      avs_eth_0_irq_export                      => eth1g_reg_interrupt,
+
+      reg_unb_sens_address_export               => reg_unb_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_sens_adr_w-1 DOWNTO 0),
+      reg_unb_sens_write_export                 => reg_unb_sens_mosi.wr,
+      reg_unb_sens_writedata_export             => reg_unb_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_unb_sens_read_export                  => reg_unb_sens_mosi.rd,
+      reg_unb_sens_readdata_export              => reg_unb_sens_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_unb_pmbus_address_export              => reg_unb_pmbus_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_pmbus_adr_w-1 DOWNTO 0),
+      reg_unb_pmbus_write_export                => reg_unb_pmbus_mosi.wr,
+      reg_unb_pmbus_writedata_export            => reg_unb_pmbus_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_unb_pmbus_read_export                 => reg_unb_pmbus_mosi.rd,
+      reg_unb_pmbus_readdata_export             => reg_unb_pmbus_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_fpga_temp_sens_address_export         => reg_fpga_temp_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_fpga_temp_sens_adr_w-1 DOWNTO 0),
+      reg_fpga_temp_sens_write_export           => reg_fpga_temp_sens_mosi.wr,
+      reg_fpga_temp_sens_writedata_export       => reg_fpga_temp_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_fpga_temp_sens_read_export            => reg_fpga_temp_sens_mosi.rd,
+      reg_fpga_temp_sens_readdata_export        => reg_fpga_temp_sens_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_fpga_voltage_sens_address_export      => reg_fpga_voltage_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_fpga_voltage_sens_adr_w-1 DOWNTO 0),
+      reg_fpga_voltage_sens_write_export        => reg_fpga_voltage_sens_mosi.wr,
+      reg_fpga_voltage_sens_writedata_export    => reg_fpga_voltage_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_fpga_voltage_sens_read_export         => reg_fpga_voltage_sens_mosi.rd,
+      reg_fpga_voltage_sens_readdata_export     => reg_fpga_voltage_sens_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      rom_system_info_address_export            => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0), 
+      rom_system_info_write_export              => rom_unb_system_info_mosi.wr,
+      rom_system_info_writedata_export          => rom_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      rom_system_info_read_export               => rom_unb_system_info_mosi.rd,
+      rom_system_info_readdata_export           => rom_unb_system_info_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      pio_system_info_address_export            => reg_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_system_info_adr_w-1 DOWNTO 0), 
+      pio_system_info_write_export              => reg_unb_system_info_mosi.wr,
+      pio_system_info_writedata_export          => reg_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      pio_system_info_read_export               => reg_unb_system_info_mosi.rd,
+      pio_system_info_readdata_export           => reg_unb_system_info_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      pio_pps_address_export                    => reg_ppsh_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_ppsh_adr_w-1 DOWNTO 0),
+      pio_pps_write_export                      => reg_ppsh_mosi.wr,
+      pio_pps_writedata_export                  => reg_ppsh_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      pio_pps_read_export                       => reg_ppsh_mosi.rd,
+      pio_pps_readdata_export                   => reg_ppsh_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_wdi_address_export                    => reg_wdi_mosi.address(0 DOWNTO 0),
+      reg_wdi_write_export                      => reg_wdi_mosi.wr,
+      reg_wdi_writedata_export                  => reg_wdi_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_wdi_read_export                       => reg_wdi_mosi.rd,
+      reg_wdi_readdata_export                   => reg_wdi_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_remu_address_export                   => reg_remu_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_remu_adr_w-1 DOWNTO 0),
+      reg_remu_write_export                     => reg_remu_mosi.wr,
+      reg_remu_writedata_export                 => reg_remu_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_remu_read_export                      => reg_remu_mosi.rd,
+      reg_remu_readdata_export                  => reg_remu_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_epcs_address_export                   => reg_epcs_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_epcs_adr_w-1 DOWNTO 0),
+      reg_epcs_write_export                     => reg_epcs_mosi.wr,
+      reg_epcs_writedata_export                 => reg_epcs_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_epcs_read_export                      => reg_epcs_mosi.rd,
+      reg_epcs_readdata_export                  => reg_epcs_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_dpmm_ctrl_address_export              => reg_dpmm_ctrl_mosi.address(0 DOWNTO 0),
+      reg_dpmm_ctrl_write_export                => reg_dpmm_ctrl_mosi.wr,
+      reg_dpmm_ctrl_writedata_export            => reg_dpmm_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_dpmm_ctrl_read_export                 => reg_dpmm_ctrl_mosi.rd,
+      reg_dpmm_ctrl_readdata_export             => reg_dpmm_ctrl_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_mmdp_data_address_export              => reg_mmdp_data_mosi.address(0 DOWNTO 0),
+      reg_mmdp_data_write_export                => reg_mmdp_data_mosi.wr,
+      reg_mmdp_data_writedata_export            => reg_mmdp_data_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_mmdp_data_read_export                 => reg_mmdp_data_mosi.rd,
+      reg_mmdp_data_readdata_export             => reg_mmdp_data_miso.rddata(c_word_w-1 DOWNTO 0),
+
+      reg_dpmm_data_address_export              => reg_dpmm_data_mosi.address(0 DOWNTO 0),
+      reg_dpmm_data_read_export                 => reg_dpmm_data_mosi.rd,
+      reg_dpmm_data_readdata_export             => reg_dpmm_data_miso.rddata(c_word_w-1 DOWNTO 0),
+      reg_dpmm_data_write_export                => reg_dpmm_data_mosi.wr,
+      reg_dpmm_data_writedata_export            => reg_dpmm_data_mosi.wrdata(c_word_w-1 DOWNTO 0),
+
+      reg_mmdp_ctrl_address_export              => reg_mmdp_ctrl_mosi.address(0 DOWNTO 0),
+      reg_mmdp_ctrl_read_export                 => reg_mmdp_ctrl_mosi.rd,
+      reg_mmdp_ctrl_readdata_export             => reg_mmdp_ctrl_miso.rddata(c_word_w-1 DOWNTO 0),
+      reg_mmdp_ctrl_write_export                => reg_mmdp_ctrl_mosi.wr,
+      reg_mmdp_ctrl_writedata_export            => reg_mmdp_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
+
+      kernel_cra_waitrequest                    => board_kernel_cra_waitrequest,            
+      kernel_cra_readdata                       => board_kernel_cra_readdata,               
+      kernel_cra_readdatavalid                  => board_kernel_cra_readdatavalid,          
+      kernel_cra_burstcount                     => board_kernel_cra_burstcount,              
+      kernel_cra_writedata                      => board_kernel_cra_writedata,               
+      kernel_cra_address                        => board_kernel_cra_address,                 
+      kernel_cra_write                          => board_kernel_cra_write,                   
+      kernel_cra_read                           => board_kernel_cra_read,                    
+      kernel_cra_byteenable                     => board_kernel_cra_byteenable,              
+      kernel_cra_debugaccess                    => board_kernel_cra_debugaccess,    
+         
+      kernel_irq_irq                            => board_kernel_irq_irq,            
+
+      kernel_register_mem_address               => board_kernel_register_mem_address,
+      kernel_register_mem_clken                 => board_kernel_register_mem_clken, 
+      kernel_register_mem_chipselect            => board_kernel_register_mem_chipselect,
+      kernel_register_mem_write                 => board_kernel_register_mem_write, 
+      kernel_register_mem_readdata              => board_kernel_register_mem_readdata,
+      kernel_register_mem_writedata             => board_kernel_register_mem_writedata,
+      kernel_register_mem_byteenable            => board_kernel_register_mem_byteenable,        
+      
+      ta2_unb2b_10gbe_kernel_snk_data           => board_kernel_stream_snk_10GbE_data,       
+      ta2_unb2b_10gbe_kernel_snk_ready          => board_kernel_stream_snk_10GbE_ready,      
+      ta2_unb2b_10gbe_kernel_snk_valid          => board_kernel_stream_snk_10GbE_valid,      
+      ta2_unb2b_10gbe_kernel_src_data           => board_kernel_stream_src_10GbE_data,       
+      ta2_unb2b_10gbe_kernel_src_ready          => board_kernel_stream_src_10GbE_ready,      
+      ta2_unb2b_10gbe_kernel_src_valid          => board_kernel_stream_src_10GbE_valid,      
+      ta2_unb2b_10gbe_refclk_clk                => SA_CLK,             
+      ta2_unb2b_10gbe_rx_serial_data_conduit    => unb2b_board_front_io_serial_rx_arr(0), 
+      ta2_unb2b_10gbe_rx_status_rx_status       => ta2_unb2b_10gbe_rx_status_rx_status, 
+      ta2_unb2b_10gbe_tx_serial_data_conduit    => unb2b_board_front_io_serial_tx_arr(0), 
+
+      ta2_unb2b_40gbe_kernel_snk_data           => board_kernel_stream_snk_40GbE_data,      
+      ta2_unb2b_40gbe_kernel_snk_ready          => board_kernel_stream_snk_40GbE_ready,      
+      ta2_unb2b_40gbe_kernel_snk_valid          => board_kernel_stream_snk_40GbE_valid,      
+      ta2_unb2b_40gbe_kernel_src_data           => board_kernel_stream_src_40GbE_data,      
+      ta2_unb2b_40gbe_kernel_src_ready          => board_kernel_stream_src_40GbE_ready,     
+      ta2_unb2b_40gbe_kernel_src_valid          => board_kernel_stream_src_40GbE_valid,     
+      ta2_unb2b_40gbe_refclk_clk                => SA_CLK,            
+      ta2_unb2b_40gbe_rx_serial_data_conduit    => unb2b_board_front_io_serial_rx_arr(7 DOWNTO 4),
+      ta2_unb2b_40gbe_rx_status_rx_status       => ta2_unb2b_40gbe_rx_status_rx_status,   
+      ta2_unb2b_40gbe_tx_serial_data_conduit    => unb2b_board_front_io_serial_tx_arr(7 DOWNTO 4),
+
+      ta2_unb2b_1gbe_mc_kernel_snk_data              => board_kernel_stream_snk_1GbE_data, 
+      ta2_unb2b_1gbe_mc_kernel_snk_ready             => board_kernel_stream_snk_1GbE_ready, 
+      ta2_unb2b_1gbe_mc_kernel_snk_valid             => board_kernel_stream_snk_1GbE_valid, 
+      ta2_unb2b_1gbe_mc_kernel_src_data              => board_kernel_stream_src_1GbE_data, 
+      ta2_unb2b_1gbe_mc_kernel_src_ready             => board_kernel_stream_src_1GbE_ready, 
+      ta2_unb2b_1gbe_mc_kernel_src_valid             => board_kernel_stream_src_1GbE_valid,
+ 
+      ta2_unb2b_1gbe_mc_st_clk_clk                   => st_clk, 
+      ta2_unb2b_1gbe_mc_st_rst_reset                 => st_rst, 
+
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_data           => eth1g_udp_rx_sosi_arr(0).data(39 DOWNTO 0), 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_empty          => eth1g_udp_rx_sosi_arr(0).empty(1 DOWNTO 0), 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_endofpacket    => eth1g_udp_rx_sosi_arr(0).eop, 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_startofpacket  => eth1g_udp_rx_sosi_arr(0).sop, 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_valid          => eth1g_udp_rx_sosi_arr(0).valid, 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_ready          => eth1g_udp_rx_siso_arr(0).ready, 
+      ta2_unb2b_1gbe_mc_udp_rx_snk_in_xon_xon        => eth1g_udp_rx_siso_arr(0).xon, 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_data          => eth1g_udp_tx_sosi_arr(0).data(39 DOWNTO 0), 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_empty         => eth1g_udp_tx_sosi_arr(0).empty(1 DOWNTO 0), 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_endofpacket   => eth1g_udp_tx_sosi_arr(0).eop, 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_startofpacket => eth1g_udp_tx_sosi_arr(0).sop, 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_valid         => eth1g_udp_tx_sosi_arr(0).valid, 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_ready         => eth1g_udp_tx_siso_arr(0).ready, 
+      ta2_unb2b_1gbe_mc_udp_tx_src_out_xon_xon       => eth1g_udp_tx_siso_arr(0).xon
+  );
+
+  -----------------------------------------------------------------------------
+  -- Freeze wrapper instantiation 
+  -----------------------------------------------------------------------------
+  freeze_wrapper_inst : freeze_wrapper
+  PORT MAP(
+    board_kernel_clk_clk                 => board_kernel_clk_clk,  
+    board_kernel_clk2x_clk               => board_kernel_clk2x_clk,
+    board_kernel_reset_reset_n           => board_kernel_reset_reset_n,
+    board_kernel_irq_irq                 => board_kernel_irq_irq,
+    board_kernel_cra_waitrequest         => board_kernel_cra_waitrequest,
+    board_kernel_cra_readdata            => board_kernel_cra_readdata,
+    board_kernel_cra_readdatavalid       => board_kernel_cra_readdatavalid,
+    board_kernel_cra_burstcount          => board_kernel_cra_burstcount,
+    board_kernel_cra_writedata           => board_kernel_cra_writedata,
+    board_kernel_cra_address             => board_kernel_cra_address,
+    board_kernel_cra_write               => board_kernel_cra_write,
+    board_kernel_cra_read                => board_kernel_cra_read,
+    board_kernel_cra_byteenable          => board_kernel_cra_byteenable,
+    board_kernel_cra_debugaccess         => board_kernel_cra_debugaccess,
+    board_kernel_register_mem_address    => board_kernel_register_mem_address,
+    board_kernel_register_mem_clken      => board_kernel_register_mem_clken, 
+    board_kernel_register_mem_chipselect => board_kernel_register_mem_chipselect,
+    board_kernel_register_mem_write      => board_kernel_register_mem_write, 
+    board_kernel_register_mem_readdata   => board_kernel_register_mem_readdata,
+    board_kernel_register_mem_writedata  => board_kernel_register_mem_writedata,
+    board_kernel_register_mem_byteenable => board_kernel_register_mem_byteenable,  
+
+    board_kernel_stream_src_40GbE_data   => board_kernel_stream_src_40GbE_data,
+    board_kernel_stream_src_40GbE_valid  => board_kernel_stream_src_40GbE_valid,
+    board_kernel_stream_src_40GbE_ready  => board_kernel_stream_src_40GbE_ready,
+    board_kernel_stream_snk_40GbE_data   => board_kernel_stream_snk_40GbE_data,
+    board_kernel_stream_snk_40GbE_valid  => board_kernel_stream_snk_40GbE_valid,
+    board_kernel_stream_snk_40GbE_ready  => board_kernel_stream_snk_40GbE_ready,
+
+    board_kernel_stream_src_10GbE_data   => board_kernel_stream_src_10GbE_data,
+    board_kernel_stream_src_10GbE_valid  => board_kernel_stream_src_10GbE_valid,
+    board_kernel_stream_src_10GbE_ready  => board_kernel_stream_src_10GbE_ready,
+    board_kernel_stream_snk_10GbE_data   => board_kernel_stream_snk_10GbE_data,
+    board_kernel_stream_snk_10GbE_valid  => board_kernel_stream_snk_10GbE_valid,
+    board_kernel_stream_snk_10GbE_ready  => board_kernel_stream_snk_10GbE_ready,
+
+    board_kernel_stream_src_1GbE_data    => board_kernel_stream_src_1GbE_data,
+    board_kernel_stream_src_1GbE_valid   => board_kernel_stream_src_1GbE_valid,
+    board_kernel_stream_src_1GbE_ready   => board_kernel_stream_src_1GbE_ready,
+    board_kernel_stream_snk_1GbE_data    => board_kernel_stream_snk_1GbE_data,
+    board_kernel_stream_snk_1GbE_valid   => board_kernel_stream_snk_1GbE_valid,
+    board_kernel_stream_snk_1GbE_ready   => board_kernel_stream_snk_1GbE_ready
+  );
+
+
+END str;
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc
new file mode 100755
index 0000000000000000000000000000000000000000..41e245fe23712e0a1d1d4da689f138d8a1d3972b
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top_post.sdc
@@ -0,0 +1,82 @@
+# (C) 1992-2018 Intel Corporation.                            
+# Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+# and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+# and/or other countries. Other marks and brands may be claimed as the property  
+# of others. See Trademarks on intel.com for full list of Intel trademarks or    
+# the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+# Your use of Intel Corporation's design tools, logic functions and other        
+# software and tools, and its AMPP partner logic functions, and any output       
+# files any of the foregoing (including device programming or simulation         
+# files), and any associated documentation or information are expressly subject  
+# to the terms and conditions of the Altera Program License Subscription         
+# Agreement, Intel MegaCore Function License Agreement, or other applicable      
+# license agreement, including, without limitation, that your use is for the     
+# sole purpose of programming logic devices manufactured by Intel and sold by    
+# Intel or its authorized distributors.  Please refer to the applicable          
+# agreement for further details.                                                 
+
+
+
+#**************************************************************
+# Create Generated Clock
+#**************************************************************
+derive_pll_clocks
+
+#**************************************************************
+# Set Clock Uncertainty
+#**************************************************************
+derive_clock_uncertainty
+
+#**************************************************************
+# Set Clock Groups
+#**************************************************************
+set_clock_groups -asynchronous -group {CLK}
+set_clock_groups -asynchronous -group {BCK_REF_CLK}
+set_clock_groups -asynchronous -group {CLK_USR}
+set_clock_groups -asynchronous -group {CLKUSR}
+set_clock_groups -asynchronous -group {SA_CLK}
+set_clock_groups -asynchronous -group {SB_CLK}
+# Do not put ETH_CLK in this list, otherwise the Triple Speed Ethernet does not work
+
+set_clock_groups -asynchronous -group [get_clocks altera_ts_clk]
+
+set_clock_groups -asynchronous -group [get_clocks altera_reserved_tck]
+
+
+# IOPLL outputs (which have global names defined in the IP qsys settings)
+set_clock_groups -asynchronous -group [get_clocks pll_clk20]
+set_clock_groups -asynchronous -group [get_clocks pll_clk50]
+set_clock_groups -asynchronous -group [get_clocks pll_clk100]
+set_clock_groups -asynchronous -group [get_clocks pll_clk125]
+set_clock_groups -asynchronous -group [get_clocks pll_clk200]
+set_clock_groups -asynchronous -group [get_clocks pll_clk200p]
+set_clock_groups -asynchronous -group [get_clocks pll_clk400]
+# Isolate the 200MHz dp_clk
+set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2b_board|\gen_pll:u_unb2b_board_clk200_pll|\gen_st_fractional_pll:u_st_fractional_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|*}]
+
+# Isolate the 125MHz mm_clk
+set_clock_groups -asynchronous -group [get_clocks {u_ctrl_unb2b_board|\gen_mm_clk_hardware:u_unb2b_board_clk125_pll|\gen_fractional_pll:u_pll|\gen_ip_arria10_e1sg:u0|xcvr_fpll_a10_0|*}]
+
+# Isolate Kernel clock
+set_clock_groups -asynchronous -group [get_clocks {board_inst|kernel_clk_gen|board_kernel_clk_gen|kernel_pll|*}]
+#**************************************************************
+# Set False Path
+#**************************************************************
+set_false_path -from * -to {u_unb2b_board_qsfp_leds|green_on_arr[*]}
+set_false_path -from * -to QSFP_LED[*]
+
+set_false_path -from {u_ctrl_unb2b_board|u_mms_ppsh|u_ppsh|u_in|u_ddio_in|\gen_ip_arria10_e1sg:u0|\gen_w:0:u_ip_arria10_e1sg_ddio_in_1|ip_arria10_ddio_in_1|core|i_loop[0].altera_gpio_bit_i|input_path.in_path_fr.buffer_data_in_fr_ddio~ddio_in_fr__nff} -to {u_ctrl_unb2b_board|u_mms_ppsh|u_ppsh|pps_ext_cap}
+
+# Make the kernel reset multicycle
+set_multicycle_path -to * -setup 4 -from {board_inst|kernel_interface|kernel_interface|reset_controller_sw|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out}
+set_multicycle_path -to * -hold 3 -from {board_inst|kernel_interface|kernel_interface|reset_controller_sw|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out}
+#set_multicycle_path -to * -setup 4 -from {freeze_wrapper_inst|kernel_system_clock_reset_reset_reset_n}
+set_multicycle_path -to * -setup 4 -from {freeze_wrapper_inst|board_kernel_reset_reset_n}
+#set_multicycle_path -to * -hold 3 -from {freeze_wrapper_inst|kernel_system_clock_reset_reset_reset_n}
+set_multicycle_path -to * -hold 3 -from {freeze_wrapper_inst|board_kernel_reset_reset_n}
+
+# Cut path to twoXclock_consumer (this instance is only there to keep 
+# kernel interface consistent and prevents kernel_clk2x to be swept away by synthesis)
+#set_false_path -from * -to freeze_wrapper_inst|pr_region_inst|*|twoXclock_consumer_NO_SHIFT_REG
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..58bd63b7cb13360ab1d1e09508dbc2c9cefdfbf9
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/Makefile
@@ -0,0 +1,20 @@
+# This is a special makefile format for compiling kernel drivers
+ifeq ($(shell uname -m),ppc64)
+EXTRA_CFLAGS += -DACL_BIG_ENDIAN
+endif
+
+EXTRA_CFLAGS += -I$(PWD)/../../include
+
+ifneq ($(BSP_NAME),)
+MODULENAME ?= aclpci_$(BSP_NAME)_drv
+EXTRA_CFLAGS += -DBSP_NAME=$(BSP_NAME)
+else
+MODULENAME ?= aclpci_drv
+endif
+
+# Final module
+obj-m := $(MODULENAME).o
+
+# List of object files to compile for the final module.
+$(MODULENAME)-y := aclpci_queue.o aclpci.o aclpci_fileio.o aclpci_dma.o aclpci_pr.o aclpci_cmd.o
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/README b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/README
new file mode 100755
index 0000000000000000000000000000000000000000..dc238eedcb6603b246f43914fa8fd033317d685c
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/README
@@ -0,0 +1,62 @@
+Intel(R) OpenCL PCI Express Driver for Linux
+------------------------------------------
+
+This directory contains full source code for the Intel(R) OpenCL 
+PCIE Express Driver for Linux [1][2].  
+
+The driver achieves approximately 3100 MB/sec on gen2 x 8 PCIe 
+core with SG DMA on Stratix IV GX FPGA (77.5% efficiency).
+
+
+LIMITATIONS
+-----------
+Only one single-threaded user process should be accessing the driver 
+at a time.
+
+DMA controller supports operations on 32-byte aligned data (both source and
+destination must be aligned). Furthermore, the size of the data must also
+be 32-byte aligned. If any of these alignments are not met, very slow non-
+DMA transfer will be used.
+
+
+PREREQUISITES
+-------------
+- GCC version in /usr/bin (the same version of gcc that was used to compile
+  the kernel).
+
+- Kernel include files, or the complete source. The make script
+  (make_all.sh) assumes that the source is installed in 
+  /usr/src/kernels/<version>. If the /usr/src/kernels/<version>
+  is missing or does not contain Makefile, install kernel-devel
+  package by running (as root) "yum install kernel-devel".
+
+
+COMPIILE and INSTALL
+--------------------
+
+To compile and install the driver, run as root:
+  aocl install
+(The installation loads the driver, and sets up the necessary files 
+to allow automatic load of driver upon reboot)
+
+
+To manually load/unload the driver:
+  sudo /sbin/modprobe aclpci_drv     (load)
+  sudo /sbin/modprobe -r aclpci_drv  (unload)
+
+
+TESTING
+-------
+The driver was developed and tested on CentOS 5.6, 64-bit with 
+2.6.18-238.el5 kernel compiled for x86_64 architecture.
+
+Also tested on CentOS 6.4, 64-bit with 2.6.32-358.el6.x86_64 kernel.
+
+
+FEEDBACK
+--------
+Issues, comments, enhancements? Contect Dmitry Denisenko at ddenisen@altera.com.
+
+
+[1] Intel(R), Quartus, and Stratix are tradermarks of Intel(R) Corporation.
+[2] OpenCL and the OpenCL logo are trademarks of Apple Inc.
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.c
new file mode 100755
index 0000000000000000000000000000000000000000..74f8b331307124a580843ccb1723c8fe3a7fab90
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.c
@@ -0,0 +1,857 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Top-level file for the driver.
+ * Deal with device init and shutdown, BAR mapping, and interrupts. */
+
+#include "aclpci.h"
+#include <asm/siginfo.h>    //siginfo
+#include <linux/rcupdate.h> //rcu_read_lock
+#include <linux/version.h>  //kernel_version
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
+#include <linux/sched/signal.h>
+#endif
+
+MODULE_AUTHOR  ("Dmitry Denisenko");
+MODULE_DESCRIPTION ("Driver for Intel(R) OpenCL Acceleration Boards");
+MODULE_SUPPORTED_DEVICE ("Intel(R) OpenCL Boards");
+MODULE_LICENSE("GPL");
+
+
+/* Static function declarations */
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 7, 0)
+# define MY_PROBE
+# define MY_INIT __init
+# define MY_EXIT __exit
+#else
+# define MY_PROBE __devinit
+# define MY_INIT __devinit
+# define MY_EXIT __devexit
+#endif
+
+static int MY_PROBE probe(struct pci_dev *dev, const struct pci_device_id *id);
+static int MY_INIT init_chrdev (struct aclpci_dev *aclpci);
+static void MY_EXIT remove(struct pci_dev *dev);
+static int MY_INIT scan_bars(struct aclpci_dev *aclpci, struct pci_dev *dev);
+static int MY_INIT map_bars(struct aclpci_dev *aclpci, struct pci_dev *dev);
+static void free_bars(struct aclpci_dev *aclpci, struct pci_dev *dev);
+
+/* Populating kernel-defined data structures */
+static struct pci_device_id aclpci_ids[] = {
+  { .vendor = ACL_PCI_INTELFPGA_VENDOR_ID, .device = PCI_ANY_ID, \
+    .class = ACL_PCI_CLASSCODE, .class_mask = 0x00ff00ff, \
+    .subvendor = ACL_PCI_SUBSYSTEM_VENDOR_ID, .subdevice = ACL_PCI_SUBSYSTEM_DEVICE_ID },
+  { 0 },
+};
+MODULE_DEVICE_TABLE(pci, aclpci_ids);
+
+
+static struct pci_driver aclpci_driver = {
+  .name = DRIVER_NAME,
+  .id_table = aclpci_ids,
+  .probe = probe,
+  .remove = remove,
+  /* resume, suspend are optional */
+};
+
+
+struct file_operations aclpci_fileops = {
+  .owner =    THIS_MODULE,
+  .read =     aclpci_read,
+  .write =    aclpci_write,
+/*  .ioctl =    aclpci_ioctl, */
+  .open =     aclpci_open,
+  .release =  aclpci_close,
+};
+
+
+static int aclpci_major;
+static unsigned char aclpci_devices[ACLPCI_MAX_MINORS];
+static struct class *aclpci_class = NULL;
+
+/* Allocate coherent memory and zero them */
+/* Local implementation of dma_zalloc_coherent */
+/* Customers using older version of kernel was running into issues using dma_zalloc_coherent */
+static inline void *dma_zalloc_coherent_local(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag)
+{
+  void *ret = dma_alloc_coherent(dev, size, dma_handle, flag);
+  if (ret)
+    memset(ret, 0, size);
+    
+  return ret;
+}
+
+/* Find a free minor id */
+static unsigned int aclpci_get_free(void)
+{
+  unsigned int i;
+
+  for (i = 0; i < ACLPCI_MAX_MINORS; i++)
+    if (aclpci_devices[i] == 0)
+      break;
+
+  return i;
+}
+
+/* Allocate /dev/BOARD_NAME device */
+static int MY_INIT init_chrdev (struct aclpci_dev *aclpci) {
+
+  int dev_major =   aclpci_major; 
+  int dev_minor =   aclpci_get_free();
+  int devno = -1;
+  int result;
+
+  /* request minor number for device */
+  if (dev_minor == ACLPCI_MAX_MINORS) {
+    printk (KERN_ERR "can't get minor ID -- too many devices");
+    goto fail_alloc;
+  }
+  aclpci_devices[dev_minor] = 1;
+  devno = MKDEV(dev_major, dev_minor);
+    
+  cdev_init (&aclpci->cdev, &aclpci_fileops);
+  aclpci->cdev.owner = THIS_MODULE;
+  aclpci->cdev.ops = &aclpci_fileops;
+  result = cdev_add (&aclpci->cdev, devno, 1);
+  /* Fail gracefully if need be */
+  if (result) {
+    printk(KERN_NOTICE "Error %d adding aclpci (%d, %d)", result, dev_major, dev_minor);
+    goto fail_add;
+  }
+  ACL_DEBUG (KERN_DEBUG "aclpci = %d:%d", MAJOR(devno), MINOR(devno));
+  aclpci->cdev_num = devno;
+
+  /* create device nodes under /dev/ using udev */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
+  aclpci->device = device_create(aclpci_class, NULL, devno, BOARD_NAME "%d", dev_minor);
+#else
+  aclpci->device = device_create(aclpci_class, NULL, devno, NULL, BOARD_NAME "%d", dev_minor);
+#endif
+  if (IS_ERR(aclpci->device)) {
+    printk(KERN_NOTICE "Can't create device\n");
+    goto fail_dev_create;
+  }
+  
+  return 0;
+  
+/* ERROR HANDLING */
+fail_dev_create:
+  cdev_del(&aclpci->cdev);
+fail_add:
+  /* free the dynamically allocated character device node */
+  unregister_chrdev_region(devno, 1/*count*/);
+  
+fail_alloc:
+  return -1;
+}
+
+
+/* Returns virtual mem address corresponding to location of IRQ control
+ * register of the board */
+static void* get_interrupt_enable_addr(struct aclpci_dev *aclpci) {
+
+  /* Bar 2, register PCIE_CRA_IRQ_ENABLE is the IRQ enable register
+   * (among other things). */
+  return (void*)(aclpci->bar[ACL_PCI_CRA_BAR] + (unsigned long)PCIE_CRA_IRQ_ENABLE);
+}
+
+
+static void* get_interrupt_status_addr(struct aclpci_dev *aclpci) {
+
+  /* Bar 2, register PCIE_CRA_IRQ_ENABLE is the IRQ enable register
+   * (among other things). */
+  return (void*)(aclpci->bar[ACL_PCI_CRA_BAR] + (unsigned long)PCIE_CRA_IRQ_STATUS);
+}
+
+
+
+/* Disable interrupt generation on the device. */
+static void mask_irq(struct aclpci_dev *aclpci) {
+
+  /* Save kernel irq mask */
+  aclpci->saved_kernel_irq_mask = ACL_PCIE_READ_BIT(
+      readl(get_interrupt_enable_addr(aclpci)),ACL_PCIE_KERNEL_IRQ_VEC);
+
+  writel (0x0, get_interrupt_enable_addr(aclpci));
+  //Read again to ensure the writel is finished
+  //Without doing this might cause the programe moving
+  //forward without properly mask the irq.
+  readl(get_interrupt_enable_addr(aclpci));
+}
+
+
+/* Enable interrupt generation on the device. */
+static void unmask_irq(struct aclpci_dev *aclpci) {
+
+  u32 val = 0;
+  
+  /* Restore kernel irq mask */
+  if (aclpci->saved_kernel_irq_mask)
+    val = ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC);
+
+  writel (val, get_interrupt_enable_addr(aclpci));
+}
+
+/* Enable interrupt generation on the device. */
+void unmask_kernel_irq(struct aclpci_dev *aclpci) {
+
+  u32 val = 0;
+  val = readl(get_interrupt_enable_addr(aclpci));
+  val |= ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC);
+
+  writel (val, get_interrupt_enable_addr(aclpci));
+}
+
+//
+// IDENTICAL COPY OF THIS FUNCTION IS IN HAL/PCIE.
+// KEEP THE TWO COPIES IN SYNC!!!
+//
+// Given irq status, determine type of interrupt
+// Result is returned in kernel_update/dma_update arguments.
+// Using 'int' instead of 'bool' for returns because the kernel code
+// is pure C and doesn't support bools.
+void get_interrupt_type (struct aclpci_dma *aclpci_dma_data, unsigned int irq_status, 
+                         unsigned int *kernel_update, unsigned int *dma_update)
+{
+   int dma_last_id, reading;
+   *kernel_update = ACL_PCIE_READ_BIT( irq_status, ACL_PCIE_KERNEL_IRQ_VEC );
+  
+   reading = aclpci_dma_data->m_read;
+   
+   if (reading) {
+     if (aclpci_dma_data->dma_wr_last_id < ACL_PCIE_DMA_DESC_MAX_ENTRIES) {
+       dma_last_id = aclpci_dma_data->dma_wr_last_id;
+       *dma_update = (aclpci_dma_data->desc_table_wr_cpu_virt_addr->header.flags[dma_last_id]);
+     } else {
+       *dma_update = 0;
+     }
+   } else {
+     if (aclpci_dma_data->dma_rd_last_id < ACL_PCIE_DMA_DESC_MAX_ENTRIES) {
+       dma_last_id = aclpci_dma_data->dma_rd_last_id;
+       *dma_update = (aclpci_dma_data->desc_table_rd_cpu_virt_addr->header.flags[dma_last_id]);
+     } else {
+       *dma_update = 0;
+     }
+   }
+    
+   
+}
+
+
+void mask_kernel_irq(struct aclpci_dev *aclpci){
+  u32 val;
+  val = readl(get_interrupt_enable_addr(aclpci));
+
+  if((val & ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC)) != 0){
+    val ^= ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC);
+  }
+
+  writel (val, get_interrupt_enable_addr(aclpci));
+  //Read again to ensure the writel is finished
+  //Without doing this might cause the programe moving
+  //forward without properly mask the irq.
+  val = readl(get_interrupt_enable_addr(aclpci));
+}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+irqreturn_t aclpci_irq (int irq, void *dev_id, struct pt_regs * not_used) {
+#else
+irqreturn_t aclpci_irq (int irq, void *dev_id) {
+#endif
+
+
+  struct aclpci_dev *aclpci = (struct aclpci_dev *)dev_id;
+  struct aclpci_dma *aclpci_dma_data = &(aclpci->dma_data);
+  
+  u32 irq_status;
+  irqreturn_t res;
+  unsigned int kernel_update = 0, dma_update = 0;
+ 
+  if (aclpci == NULL) {
+    return IRQ_NONE;
+  }
+  
+  /* During core reconfiguration, ignore interrupts. */
+  if (aclpci->pr_in_progress) {
+    ACL_VERBOSE_DEBUG (KERN_WARNING "Ignoring interrupt while PR is in progress");
+    return IRQ_HANDLED;
+  }
+  
+  /* From this point on, this is our interrupt. So return IRQ_HANDLED
+   * no matter what (since nobody else in the system will handle this
+   * interrupt for us). */
+  aclpci->num_handled_interrupts++;
+  
+
+  
+  /* Can get interrupt for two reasons --  DMA descriptor processing is done
+   * or kernel has finished. DMA is done entirely in the driver, so check for
+   * that first and do NOT notify the user. */
+  irq_status = readl ( get_interrupt_status_addr(aclpci) );
+
+  get_interrupt_type (aclpci_dma_data, irq_status, &kernel_update, &dma_update);
+  
+  ACL_VERBOSE_DEBUG (KERN_WARNING "irq_status = 0x%x, kernel = %d, dma = %d",
+                     irq_status, kernel_update, dma_update);
+
+  if(!dma_update && !kernel_update){
+    return IRQ_HANDLED;
+  }
+  if (kernel_update) {
+  
+  mask_kernel_irq(aclpci);
+  #if !POLLING
+    /* Send SIGNAL to user program to notify about the kernel update interrupt. */
+    if (aclpci->user_task != NULL) {
+      int ret = send_sig_info(aclpci->signal_number, &aclpci->signal_info, aclpci->user_task);      
+      if (ret < 0) {
+        /* Can get to this state if the host is suspended for whatever reason.
+         * Just print a warning message the first few times. The FPGA will keep
+         * the interrupt level high until the kernel done bit is cleared (by the host).
+         * See Case:84460. */
+        aclpci->num_undelivered_signals++;
+        if (aclpci->num_undelivered_signals < 5) {
+          ACL_DEBUG (KERN_DEBUG "Error sending signal to host! irq_status is 0x%x\n", irq_status);
+        }
+      }
+    }
+  #else
+    ACL_VERBOSE_DEBUG (KERN_WARNING "Kernel update interrupt. Letting host POLL for it.");
+  #endif
+    res = IRQ_HANDLED;
+     
+  }
+  if (dma_update) {
+    /* A DMA-status interrupt - let the DMA object handle this without going to
+      * user space */
+    res = aclpci_dma_service_interrupt(aclpci);
+  }
+  return res;
+}
+
+
+void load_signal_info (struct aclpci_dev *aclpci) {
+
+  /* Setup siginfo struct to send signal to user process. Doing it once here
+   * so don't waste time inside the interrupt handler. */
+  struct siginfo *info = &aclpci->signal_info;
+  memset(info, 0, sizeof(struct siginfo));
+  info->si_signo = aclpci->signal_number;
+  /* this is bit of a trickery: SI_QUEUE is normally used by sigqueue from user
+   * space,  and kernel space should use SI_KERNEL. But if SI_KERNEL is used the
+   * real_time data is not delivered to the user space signal handler function. */
+  info->si_code = SI_QUEUE;
+  info->si_int = 0;  /* Signal payload. Will be filled later with 
+                        ACLPCI_CMD_SET_SIGNAL_PAYLOAD cmd from user. */
+
+  /* Perform the same setup for struct siginfo for dma */
+  info = &aclpci->signal_info_dma;
+  memset(info, 0, sizeof(struct siginfo));
+  info->si_signo = aclpci->signal_number;
+  info->si_code  = SI_QUEUE;
+  info->si_int   = 0;
+}
+
+
+int init_irq (struct pci_dev *dev, void *dev_id) {
+
+  u32 irq_type;
+  struct aclpci_dev *aclpci = (struct aclpci_dev*)dev_id;
+  int rc;
+
+  if (dev == NULL || aclpci == NULL) {
+    ACL_DEBUG (KERN_WARNING "Invalid inputs to init_irq (%p, %p)", dev, dev_id);
+    return -1;
+  }
+  
+  /* Message Signalled Interrupts. */  
+  #if USE_MSI
+  if(pci_enable_msi(dev) != 0){
+    ACL_DEBUG (KERN_WARNING "Could not enable MSI");
+  }
+  if (!pci_set_dma_mask(dev, DMA_BIT_MASK(64))) {
+    pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64));
+    ACL_DEBUG (KERN_WARNING "using a 64-bit irq mask\n");
+  } else {
+    ACL_DEBUG (KERN_WARNING "unable to use 64-bit irq mask\n");
+    pci_disable_msi(dev);
+    return -1;
+  }
+  #endif
+
+  /* Do NOT use PCI_INTERRUPT_LINE config register. Its value is different
+   * from dev->irq and doesn't work! Why? Who knows! */
+  
+  /* IRQF_SHARED   -- allow sharing IRQs with other devices */
+  #if !USE_MSI 
+    irq_type = IRQF_SHARED;
+  #else
+    /* No need to share MSI interrupts since they don't use dedicated wires.*/
+    irq_type = 0;
+  #endif
+  
+  pci_read_config_byte(dev, PCI_REVISION_ID, &aclpci->revision);
+  pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &aclpci->irq_pin);
+  pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &aclpci->irq_line);
+  
+  ACL_VERBOSE_DEBUG (KERN_WARNING "irq pin: %d\n", aclpci->irq_pin);
+  ACL_VERBOSE_DEBUG (KERN_WARNING "irq line: %d\n", aclpci->irq_line);
+  ACL_VERBOSE_DEBUG (KERN_WARNING "irq: %d\n", dev->irq);
+  
+  rc = request_irq (dev->irq, aclpci_irq, irq_type, DRIVER_NAME, dev_id);
+  if (rc) {
+    ACL_DEBUG (KERN_WARNING "Could not request IRQ #%d, error %d", dev->irq, rc);
+    return -1;
+  }
+  pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Succesfully requested IRQ #%d", dev->irq);
+  
+  aclpci->num_handled_interrupts = 0;
+  aclpci->num_undelivered_signals = 0;
+  
+  aclpci_dma_init(aclpci);
+  aclpci_hostch_init(aclpci);
+  
+  /* Enable interrupts */
+  unmask_irq(aclpci);
+  
+  return 0;
+}
+
+
+void release_irq (struct pci_dev *dev, void *aclpci) {
+
+  int num_usignals;
+  
+  aclpci_dma_finish(aclpci);
+  
+  /* Disable interrupts before going away. If something bad happened in
+   * user space and the user program crashes, the interrupt assigned to the device
+   * will be freed (on automatic close()) call but the device will continue 
+   * generating interrupts. Soon the kernel will notice, complain, and bring down
+   * the whole system. */
+  mask_irq(aclpci);
+  
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Freeing IRQ %d", dev->irq);
+  free_irq (dev->irq, aclpci);
+  
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Handled %d interrupts", 
+        ((struct aclpci_dev*)aclpci)->num_handled_interrupts);
+        
+  num_usignals = ((struct aclpci_dev*)aclpci)->num_undelivered_signals;
+  if (num_usignals > 0) {
+    ACL_DEBUG (KERN_DEBUG "Number undelivered signals is %d", num_usignals);
+  }
+    
+  /* Perform software reset on the FPGA.
+   * If the host is killed after launching a kernel but before the kernel
+   * finishes, the FPGA will keep sending "kernel done" interrupt. That might
+   * kill a *new* host before it can do anything. 
+   *
+   * WARNING: THIS RESET LOGIC IS ALSO IN THE HAL/PCIE.
+   *          IF YOU CHANGE IT, UPDATE THE HAL AS WELL!!! */
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Reseting kernel on FPGA");
+  //PETE - disable this for now
+  //pio_out_addr_base = ((struct aclpci_dev*)aclpci)->bar[ACL_PCIE_PIO_OUT_BAR] + ACL_PCIE_PIO_OUT_OFFSET - ACL_PCIE_MEMWINDOW_SIZE;
+  /* Do the reset */
+  //writel (ACL_PCIE_GET_BIT(PIO_OUT_SWRESET), pio_out_addr_base + PIO_SET);
+  /* De-assert the reset */
+  //for (i = 0; i < 10; i++) {
+    //writel (ACL_PCIE_GET_BIT(PIO_OUT_SWRESET), pio_out_addr_base + PIO_CLR);
+  //}
+  
+  #if USE_MSI
+    pci_disable_msi (dev);
+  #endif
+  mask_irq(aclpci);
+}
+
+
+/* Find upstream PCIe root node. 
+ * Used for re-training and disabling AER. */
+static struct pci_dev* find_upstream_dev (struct pci_dev *dev) {
+  struct pci_bus *bus = 0;
+  struct pci_dev *bridge = 0;
+  struct pci_dev *cur = 0;
+  int found_dev = 0;
+  
+  bus = dev->bus;
+  if (bus == 0) {
+    ACL_DEBUG (KERN_WARNING "Device doesn't have an associated bus!\n");
+    return 0;
+  }
+  
+  bridge = bus->self;
+  if (bridge == 0) {
+    ACL_DEBUG (KERN_WARNING "Can't get the bridge for the bus!\n");
+    return 0;
+  }
+  
+  ACL_DEBUG (KERN_DEBUG "Upstream device %x/%x, bus:slot.func %02x:%02x.%02x", 
+             bridge->vendor, bridge->device,
+             bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn));
+             
+  ACL_DEBUG (KERN_DEBUG "List of downstream devices:");
+  list_for_each_entry (cur, &bus->devices, bus_list) {
+    if (cur != 0) {
+      ACL_DEBUG (KERN_DEBUG "  %x/%x", cur->vendor, cur->device);
+      if (cur == dev) {
+        found_dev = 1;
+      }
+    }
+  }
+  
+  if (found_dev) {
+    return bridge;
+  } else {
+    ACL_DEBUG (KERN_WARNING "Couldn't find upstream device!");
+    return 0;
+  }
+}
+
+static int MY_PROBE probe(struct pci_dev *dev, const struct pci_device_id *id) {
+
+  struct aclpci_dev *aclpci = 0;
+  struct aclpci_dma *aclpci_dma_data = 0;
+  struct aclpci_hostch_desc *aclpci_hostch_data = 0;
+  int res;
+  
+  ACL_VERBOSE_DEBUG (KERN_DEBUG " probe (dev = 0x%p, pciid = 0x%p)", dev, id);
+  ACL_DEBUG (KERN_DEBUG " vendor = 0x%x, device = 0x%x, class = 0x%x, bus:slot.func = %02x:%02x.%02x",
+        dev->vendor, dev->device, dev->class, 
+        dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
+  
+  aclpci = kzalloc(sizeof(struct aclpci_dev), GFP_KERNEL);
+  if (!aclpci) {
+    ACL_DEBUG(KERN_WARNING "Couldn't allocate memory!\n");
+    goto fail_kzalloc;
+  }
+  
+
+  spin_lock_init(&aclpci->lock);
+  sema_init (&aclpci->sem, 1);
+  aclpci->pci_dev = dev;
+  dev_set_drvdata(&dev->dev, (void*)aclpci);
+  aclpci->user_pid = -1;
+  aclpci->pr_in_progress = 0;
+  aclpci->pci_gen = 0;
+  aclpci->pci_num_lanes = 0;
+  aclpci->upstream = find_upstream_dev (dev);
+  aclpci->num_handles_open = 0;
+  aclpci->signal_number = SIG_INT_NOTIFY;   //new mmd will overwrite this, just safety for compatibility with new driver / old mmd
+
+  retrain_gen2 (aclpci);
+        
+  aclpci->buffer = kmalloc (BUF_SIZE * sizeof(char), GFP_KERNEL);
+  if (!aclpci->buffer) {
+    ACL_DEBUG(KERN_WARNING "Couldn't allocate memory for buffer!\n");
+    goto fail_kmalloc;
+  }
+  
+  res = init_chrdev (aclpci);
+  if (res) {
+    goto fail_chrdev_init;
+  }
+  
+  if (pci_enable_device(dev)) {
+    ACL_DEBUG (KERN_WARNING "pci_enable_device() failed");
+    goto fail_enable;
+  }
+
+  pci_set_master(dev);
+
+  if (pci_request_regions(dev, DRIVER_NAME)) {
+    goto fail_regions;
+  }
+  scan_bars(aclpci, dev);  
+  if (map_bars(aclpci, dev)) {
+    goto fail_map_bars;
+  }
+  
+  // DMA initialization required at driver installation
+  // Keep descriptor table in memory
+  aclpci_dma_data = &(aclpci->dma_data);
+  aclpci_dma_data->dma_rd_last_id = 255;
+  aclpci_dma_data->dma_wr_last_id = 255;
+  
+  aclpci_dma_data->desc_table_rd_cpu_virt_addr = (struct dma_desc_table *)dma_zalloc_coherent_local(&dev->dev, sizeof(struct dma_desc_table), &aclpci_dma_data->desc_table_rd_bus_addr, GFP_KERNEL);
+  if (!aclpci_dma_data->desc_table_rd_cpu_virt_addr) {
+      res = -ENOMEM;
+      goto err_rd_table;
+  }
+  aclpci_dma_data->desc_table_wr_cpu_virt_addr = (struct dma_desc_table *)dma_zalloc_coherent_local(&dev->dev, sizeof(struct dma_desc_table), &aclpci_dma_data->desc_table_wr_bus_addr, GFP_KERNEL);
+  if (!aclpci_dma_data->desc_table_wr_cpu_virt_addr) {
+      res = -ENOMEM;
+      goto err_wr_table;
+  }
+  
+  
+  // Host channel data initialization
+  aclpci_hostch_data = &(aclpci_dma_data->hostch_data);
+  
+  aclpci_hostch_data->push_page_table = (struct hostch_table *)dma_zalloc_coherent_local(&dev->dev, sizeof(struct hostch_table), &aclpci_hostch_data->push_page_table_bus_addr, GFP_KERNEL);
+  if (!aclpci_hostch_data->push_page_table) {
+      res = -ENOMEM;
+      goto err_hostch_push_page_table;
+  }
+  aclpci_hostch_data->pull_page_table = (struct hostch_table *)dma_zalloc_coherent_local(&dev->dev, sizeof(struct hostch_table), &aclpci_hostch_data->pull_page_table_bus_addr, GFP_KERNEL);
+  if (!aclpci_hostch_data->pull_page_table) {
+      res = -ENOMEM;
+      goto err_hostch_pull_page_table;
+  }
+
+  
+  return 0;
+
+
+/* ERROR HANDLING */
+err_hostch_pull_page_table:
+    dma_free_coherent(&dev->dev, sizeof(struct hostch_table), aclpci_hostch_data->pull_page_table, aclpci_hostch_data->pull_page_table_bus_addr);
+
+err_hostch_push_page_table:
+    dma_free_coherent(&dev->dev, sizeof(struct hostch_table), aclpci_hostch_data->push_page_table, aclpci_hostch_data->push_page_table_bus_addr);
+
+err_wr_table:
+    dma_free_coherent(&dev->dev, sizeof(struct dma_desc_table), aclpci_dma_data->desc_table_wr_cpu_virt_addr, aclpci_dma_data->desc_table_wr_bus_addr);
+    
+err_rd_table:
+    dma_free_coherent(&dev->dev, sizeof(struct dma_desc_table), aclpci_dma_data->desc_table_rd_cpu_virt_addr, aclpci_dma_data->desc_table_rd_bus_addr);
+
+fail_map_bars:
+  pci_release_regions(dev);
+  pci_disable_device (dev);
+  
+fail_regions:
+
+fail_enable:
+  unregister_chrdev_region (aclpci->cdev_num, 1);
+  aclpci_devices[MINOR(aclpci->cdev_num)] = 0;
+ 
+fail_chrdev_init:
+  kfree (aclpci->buffer);
+  
+fail_kmalloc:
+  kfree (aclpci);
+  
+fail_kzalloc:
+  return -1;
+}
+
+
+static int MY_INIT scan_bars(struct aclpci_dev *aclpci, struct pci_dev *dev)
+{
+  int i;
+  for (i = 0; i < ACL_PCI_NUM_BARS; i++) {
+    unsigned long bar_start = pci_resource_start(dev, i);
+    if (bar_start) {
+      unsigned long bar_end = pci_resource_end(dev, i);
+      unsigned long bar_flags = pci_resource_flags(dev, i);
+      ACL_DEBUG (KERN_DEBUG "BAR[%d] 0x%08lx-0x%08lx flags 0x%08lx",
+         i, bar_start, bar_end, bar_flags);
+    }
+  }
+  return 0;
+}
+
+
+/**
+ * Map the device memory regions into kernel virtual address space
+ * after verifying their sizes respect the minimum sizes needed, given
+ * by the bar_min_len[] array.
+ */
+static int MY_INIT map_bars(struct aclpci_dev *aclpci, struct pci_dev *dev)
+{
+  int i;
+  for (i = 0; i < ACL_PCI_NUM_BARS; i++){
+    unsigned long bar_start = pci_resource_start(dev, i);
+    unsigned long bar_end = pci_resource_end(dev, i);
+    unsigned long bar_length = bar_end - bar_start + 1;
+    aclpci->bar_length[i] = bar_length;
+
+    if (!bar_start || !bar_end) {
+      aclpci->bar_length[i] = 0;
+      continue;
+    }
+
+    if (bar_length < 1) {
+      ACL_DEBUG (KERN_WARNING "BAR #%d length is less than 1 byte", i);
+      continue;
+    }
+
+    /* map the device memory or IO region into kernel virtual
+     * address space */  
+    aclpci->bar[i] = ioremap (bar_start, bar_length);
+
+    if (!aclpci->bar[i]) {
+      ACL_DEBUG (KERN_WARNING "Could not map BAR #%d.", i);
+      return -1;
+    }
+
+    ACL_DEBUG (KERN_DEBUG "BAR[%d] mapped at 0x%p with length %lu.", i,
+         aclpci->bar[i], bar_length);
+  }
+  return 0;
+}  
+
+
+
+static void free_bars(struct aclpci_dev *aclpci, struct pci_dev *dev) {
+
+  int i;
+  for (i = 0; i < ACL_PCI_NUM_BARS; i++) {
+    if (aclpci->bar[i]) {
+      pci_iounmap(dev, aclpci->bar[i]);
+      aclpci->bar[i] = NULL;
+    }
+  }
+}
+
+static void MY_EXIT remove(struct pci_dev *dev) {
+
+  struct aclpci_dev *aclpci = 0;
+  struct aclpci_dma *aclpci_dma_data;
+  struct aclpci_hostch_desc *aclpci_hostch_data = 0;
+  ACL_DEBUG (KERN_DEBUG ": dev is %p", dev);
+  
+  if (dev == 0) {
+    ACL_DEBUG (KERN_WARNING ": dev is 0");
+    return;
+  }
+  
+  aclpci = (struct aclpci_dev*) dev_get_drvdata(&dev->dev);
+  if (aclpci == 0) {
+    ACL_DEBUG (KERN_WARNING ": aclpci_dev is 0");
+    return;
+  }
+  
+  aclpci_dma_data = &(aclpci->dma_data);
+  aclpci_hostch_data = &(aclpci_dma_data->hostch_data);
+
+  dma_free_coherent(&dev->dev, sizeof(struct hostch_table), aclpci_hostch_data->pull_page_table, aclpci_hostch_data->pull_page_table_bus_addr);
+  dma_free_coherent(&dev->dev, sizeof(struct hostch_table), aclpci_hostch_data->push_page_table, aclpci_hostch_data->push_page_table_bus_addr);
+  dma_free_coherent(&dev->dev, sizeof(struct dma_desc_table), aclpci_dma_data->desc_table_wr_cpu_virt_addr, aclpci_dma_data->desc_table_wr_bus_addr);
+  dma_free_coherent(&dev->dev, sizeof(struct dma_desc_table), aclpci_dma_data->desc_table_rd_cpu_virt_addr, aclpci_dma_data->desc_table_rd_bus_addr);
+  
+  #if USE_MSI
+    pci_disable_msi(dev);
+    if (aclpci->irq_line >= 0) {
+      printk(KERN_DEBUG "Freeing IRQ #%d", aclpci->irq_line);
+      free_irq(aclpci->irq_line, (void *)aclpci);
+    }
+  #endif
+  
+  device_destroy(aclpci_class, aclpci->cdev_num);
+  cdev_del (&aclpci->cdev);
+  aclpci_devices[MINOR(aclpci->cdev_num)] = 0;
+  free_bars (aclpci, dev);
+  pci_disable_device(dev);
+  pci_release_regions(dev);
+
+  kfree (aclpci->buffer);
+  kfree (aclpci);
+}
+
+
+/* Initialize the driver module (but not any device) and register
+ * the module with the kernel PCI subsystem. */
+static int __init aclpci_init(void) {
+
+  unsigned int i;
+  int retval;
+  dev_t dev;
+
+  ACL_DEBUG (KERN_DEBUG "----------------------------");
+  ACL_DEBUG (KERN_DEBUG "Driver version: %s", ACL_DRIVER_VERSION);
+
+  /* initialize the allocated minor devices */
+  for (i = 0; i < ACLPCI_MAX_MINORS; i++) {
+    aclpci_devices[i] = 0;
+  }
+
+  retval = alloc_chrdev_region(&dev, 0, ACLPCI_MAX_MINORS, BOARD_NAME);
+  if (retval) {
+    printk(KERN_ERR "aclpci: can't register character device\n");
+    goto err_attr;
+  }
+  aclpci_major = MAJOR(dev);
+  
+  aclpci_class = class_create(THIS_MODULE, DRIVER_NAME);
+  if (IS_ERR(aclpci_class)) {
+    printk(KERN_ERR "aclpci: can't create class\n");
+    goto err_unchr;
+  }
+ 
+  /* register this driver with the PCI bus driver */
+  ACL_DEBUG (KERN_DEBUG "pci_register_driver");
+  retval =  pci_register_driver(&aclpci_driver);
+  if (retval) {
+    printk(KERN_ERR "aclpci: can't register pci driver\n");
+    goto err_class_create;
+  }
+  ACL_DEBUG (KERN_DEBUG "success");
+  return 0;
+
+  /* error handling */
+err_class_create:
+  class_destroy(aclpci_class);
+err_unchr:
+  unregister_chrdev_region(dev, ACLPCI_MAX_MINORS);
+err_attr:
+  return retval;
+}
+
+static void __exit aclpci_exit(void)
+{
+  ACL_DEBUG (KERN_DEBUG "");
+
+  /* unregister this driver from the PCI bus driver */
+  pci_unregister_driver(&aclpci_driver);
+
+  class_destroy(aclpci_class);
+  
+  unregister_chrdev_region (MKDEV(aclpci_major,0), ACLPCI_MAX_MINORS);  
+}
+
+
+module_init (aclpci_init);
+module_exit (aclpci_exit);
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.h
new file mode 100755
index 0000000000000000000000000000000000000000..bb976d0dd4ab1b306424729b62b98b483d8d4354
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci.h
@@ -0,0 +1,245 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Global declarations shared by all files of this driver. */
+
+#ifndef ACLPCI_H
+#define ACLPCI_H
+
+
+#include <linux/kobject.h>
+#include <linux/kdev_t.h>
+#include <linux/list.h>
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/jiffies.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/uaccess.h>
+#include <linux/sched.h>
+
+
+/* includes from opencl/include/pcie */
+#include "hw_pcie_constants.h"
+#include "pcie_linux_driver_exports.h"
+
+/* Local includes */
+#include "version.h"
+
+
+/* Use Message Signalled Interrupt (MSI).
+ * If not used will get many visibly-distinct interrupts for a single
+ * logical one (because it takes a while to reset the interrupt in the FPGA).
+ * MSIs are faster. HOWEVER, currently seem to loose MSIs once in a while. :( */
+#define USE_MSI           1
+
+#define USE_DMA           1
+
+#include "aclpci_dma.h"
+
+
+#define DRIVER_NAME       "aclpci_" ACL_BOARD_PKG_NAME
+#define BOARD_NAME        "acl" ACL_BOARD_PKG_NAME
+
+#define ACLPCI_MAX_MINORS 16
+
+/* Set to 1 to use Polling (instead of interrupts) to communicate
+ * with hal. HAL must be compiled in the same mode */
+#define POLLING           0
+
+
+/* Debugging defines */
+#define VERBOSE_DEBUG    0 
+#define ACL_DEBUG(...)					\
+  do {						\
+    printk("%s (%d): ", __func__, __LINE__);	\
+    printk(__VA_ARGS__);			\
+    printk("\n");				\
+  } while (0)
+  
+#if VERBOSE_DEBUG
+# define ACL_VERBOSE_DEBUG(...) ACL_DEBUG(__VA_ARGS__)
+#else 
+# define ACL_VERBOSE_DEBUG(...)
+#endif
+
+/* Don't actually bring down the kernel on an error condition */
+#define assert(expr) \
+do { \
+   if (!(expr)) { \
+      printk(KERN_ERR "Assertion failed! %s, %s, %s, line %d\n", \
+            #expr, __FILE__, __func__, __LINE__); \
+   } \
+} while (0)
+
+
+
+/* Maximum size of driver buffer (allocated with kalloc()).
+ * Needed to copy data from user to kernel space, among other
+ * things. */
+static const size_t BUF_SIZE = PAGE_SIZE;
+
+
+/* Device data used by this driver. */
+struct aclpci_dev {
+  /* the kernel pci device data structure */
+  struct pci_dev *pci_dev;
+  
+  /* upstream root node */
+  struct pci_dev *upstream;
+  
+  /* kernels virtual addr. for the mapped BARs */
+  void * __iomem bar[ACL_PCI_NUM_BARS];
+  
+  /* length of each memory region. Used for error checking. */
+  size_t bar_length[ACL_PCI_NUM_BARS];
+  
+  /* Controls which section of board's DDR maps to BAR */
+  u64 global_mem_segment;
+  
+  /* Kernel irq - mustn't assume it's safe to enable kernel irq */
+  char saved_kernel_irq_mask;
+  
+  /* Location of global_mem_segment value on the board. */
+  void *global_mem_segment_addr;
+  
+  /* temporary buffer. If allocated, will be BUF_SIZE. */
+  char *buffer;
+  
+  /* Mutex for this device. */
+  struct semaphore sem;
+  
+  /* PID of process that called open() */
+  int user_pid;
+  /* Number of handles referencing this device */
+  int num_handles_open;
+ 
+  /* character device */
+  dev_t cdev_num;
+  struct cdev cdev;
+  struct class *my_class;
+  struct device *device;
+
+
+  /* signal sending structs */
+  struct siginfo signal_info;
+  struct siginfo signal_info_dma;
+  struct task_struct *user_task;
+  int user_filehandle;
+  int signal_number;
+
+  /* 1 if doing core reconfig via PCIe. 
+   * Ignore all interrupts when this is going on. */
+  int pr_in_progress;
+  
+  /* State of uncorrectable error mask register, AER ext capability.
+   * Saved during reprogramming */
+  u32 aer_uerr_mask_reg;
+  
+  /* All the DMA data */
+  struct aclpci_dma dma_data;
+  
+  /* Debug data */  
+  /* number of hw interrupts handled. */
+  size_t num_handled_interrupts;
+  size_t num_undelivered_signals;
+  int pci_gen;
+  int pci_num_lanes;
+  
+  /* PCI dma table and msi controls */
+  u8 revision;
+  u8 irq_pin;
+  u8 irq_line;
+
+  wait_queue_head_t wait_q;
+  atomic_t status;
+  spinlock_t lock;
+};
+
+
+/* aclpci_fileio.c funciton */
+int aclpci_open(struct inode *inode, struct file *file);
+int aclpci_close(struct inode *inode, struct file *file);
+ssize_t aclpci_read(struct file *file, char __user *buf, size_t count, loff_t *pos);
+ssize_t aclpci_write(struct file *file, const char __user *buf, size_t count, loff_t *pos);
+void* aclpci_get_checked_addr (int bar_id, void *device_addr, size_t count,
+                               struct aclpci_dev *aclpci, ssize_t *errno, int print_error_msg);
+
+/* aclpci.c functions */
+void load_signal_info (struct aclpci_dev *aclpci);
+int init_irq (struct pci_dev *dev, void *dev_id);
+void release_irq (struct pci_dev *dev, void *aclpci);
+void unmask_kernel_irq(struct aclpci_dev *aclpci);
+void mask_kernel_irq(struct aclpci_dev *aclpci);
+
+/* aclpci_dma.c functions */
+void aclpci_dma_init(struct aclpci_dev *aclpci);
+void aclpci_dma_finish(struct aclpci_dev *aclpci);
+void aclpci_dma_stop(struct aclpci_dev *aclpci);
+int aclpci_dma_get_idle_status(struct aclpci_dev *aclpci);
+ssize_t aclpci_dma_rw (struct aclpci_dev *aclpci, void *dev_addr, void __user* use_addr, ssize_t len, int reading);
+irqreturn_t aclpci_dma_service_interrupt (struct aclpci_dev *aclpci);
+
+/* aclpci_dma.c hostch functions */
+void aclpci_hostch_init(struct aclpci_dev *aclpci);
+int aclpci_dma_hostch_create(struct aclpci_dev *aclpci, void *user_addr, void *buf_pointer, size_t size, int reading);
+int aclpci_dma_hostch_destroy(struct aclpci_dev *aclpci, int reading);
+void aclpci_dma_hostch_thread_sync(struct aclpci_dev *aclpci, void *user_addr);
+
+/* aclpci_cmd.c functions */
+void retrain_gen2 (struct aclpci_dev *aclpci);
+ssize_t aclpci_exec_cmd (struct aclpci_dev *aclpci, struct acl_cmd kcmd, size_t count);
+int aclpci_get_user_pages(struct task_struct *target_task, unsigned long start_page, size_t num_pages, struct page **p);
+void aclpci_release_user_pages(struct task_struct *target_task, struct page **p, size_t num_pages);
+
+/* aclpci_pr.c functions */
+int aclpci_pr (struct aclpci_dev *aclpci, void __user* core_bitstream, ssize_t len);
+
+#endif /* ACLPCI_H */
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cmd.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cmd.c
new file mode 100755
index 0000000000000000000000000000000000000000..a00b1ec918b593d7aff4050d5a36ec5f84a02a5c
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cmd.c
@@ -0,0 +1,611 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+/* Handling of special commands (anything that is not read/write/open/close)
+ * that user may call.
+ * See pcie_linux_driver_exports.h for explanations of each command. */
+
+
+#include <linux/mm.h>
+#include <linux/device.h>
+#include <linux/sched.h>
+#include <linux/aer.h>
+#include <linux/version.h>
+
+#include "aclpci.h"
+
+/* RedHat 5.5 doesn't define this */
+#ifndef PCI_EXP_LNKSTA_NLW_SHIFT
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4
+#endif
+
+// pci link generation
+#define LINKSPEED_2_5_GB         (0x1)
+#define LINKSPEED_5_0_GB         (0x2)
+#define LINKSPEED_8_0_GB         (0x3)
+
+
+void retrain_gen2 (struct aclpci_dev *aclpci);
+void disable_aer_on_upstream_dev(struct aclpci_dev *aclpci);
+void restore_aer_on_upstream_dev(struct aclpci_dev *aclpci);
+
+
+/* Execute special command */
+ssize_t aclpci_exec_cmd (struct aclpci_dev *aclpci, 
+                         struct acl_cmd kcmd, 
+                         size_t count) {
+  ssize_t result = 0;
+  char buf[128] = {0};
+
+  switch (kcmd.command) {
+  case ACLPCI_CMD_SAVE_PCI_CONTROL_REGS: {
+    /* Disable interrupts before reprogramming. O/w the board will get into
+     * a funny state and hang the system . */
+    ACL_DEBUG (KERN_DEBUG "Saving PCI control registers");
+    disable_aer_on_upstream_dev(aclpci);
+    release_irq (aclpci->pci_dev, aclpci);    
+    result = pci_save_state(aclpci->pci_dev);
+    break;
+  }
+
+  case ACLPCI_CMD_LOAD_PCI_CONTROL_REGS: {
+    
+    pci_set_master(aclpci->pci_dev);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 7, 0)
+    pci_restore_state(aclpci->pci_dev);
+#else
+    result = pci_restore_state(aclpci->pci_dev);
+#endif
+    init_irq (aclpci->pci_dev, aclpci);
+    restore_aer_on_upstream_dev(aclpci);
+    retrain_gen2(aclpci);
+    ACL_DEBUG (KERN_DEBUG "Restored PCI control registers");
+    break;
+  }
+
+  case ACLPCI_CMD_PIN_USER_ADDR:
+//    result = aclpci_pin_user_addr (kcmd.user_addr, count);
+    break;
+
+  case ACLPCI_CMD_UNPIN_USER_ADDR:
+//    result = aclpci_unpin_user_addr (kcmd.user_addr, count);
+    break;
+    
+  case ACLPCI_CMD_GET_DMA_IDLE_STATUS: {
+    u32 idle = aclpci_dma_get_idle_status(aclpci);
+    result = copy_to_user ( kcmd.user_addr, &idle, sizeof(idle) );
+    break;
+  }
+
+  case ACLPCI_CMD_DMA_UPDATE: {
+    //aclpci_dma_update(aclpci, 0);
+    break;
+  }
+
+  case ACLPCI_CMD_GET_DEVICE_ID: {
+    u32 id = aclpci->pci_dev->device;
+    result = copy_to_user ( kcmd.user_addr, &id, sizeof(id) );
+    break;
+  }
+  
+  case ACLPCI_CMD_GET_VENDOR_ID: {
+    u32 id = aclpci->pci_dev->vendor;
+    result = copy_to_user ( kcmd.user_addr, &id, sizeof(id) );
+    break;
+  }
+ 
+  case ACLPCI_CMD_GET_PCI_GEN: {
+    u32 pci_gen = aclpci->pci_gen;
+    result = copy_to_user ( kcmd.user_addr, &pci_gen, sizeof(pci_gen) );
+    break;
+  }
+
+  case ACLPCI_CMD_GET_PCI_NUM_LANES: {
+    u32 pci_num_lanes = aclpci->pci_num_lanes;
+    result = copy_to_user ( kcmd.user_addr, &pci_num_lanes, sizeof(pci_num_lanes) );
+    break;
+  }
+ 
+  case ACLPCI_CMD_ENABLE_KERNEL_IRQ: {
+    unmask_kernel_irq(aclpci);
+    break;
+  }
+
+ 
+  case ACLPCI_CMD_DO_PR: {
+    result = aclpci_pr (aclpci, kcmd.user_addr, count);
+    if (result != 0) {
+      ACL_DEBUG (KERN_DEBUG "PR failed.");
+    }
+    break;
+  }
+
+  case ACLPCI_CMD_SET_SIGNAL_PAYLOAD: {
+    u32 id;
+    result = copy_from_user ( &id, kcmd.user_addr, sizeof(id) );
+    aclpci->signal_info.si_int     = id;
+    aclpci->signal_info_dma.si_int = id | 0x1; // use the last bit to indicate the DMA completion
+    break;
+  }
+  
+  case ACLPCI_CMD_GET_DRIVER_VERSION: {
+    /* Driver version is a string */
+    sprintf(buf, "%s.%s", ACL_BOARD_PKG_NAME, ACL_DRIVER_VERSION);
+    result = copy_to_user ( kcmd.user_addr, buf, strlen(ACL_BOARD_PKG_NAME)+strlen(ACL_DRIVER_VERSION)+2 );
+    break;
+  }
+
+  case ACLPCI_CMD_GET_PCI_DEV_ID: {
+    u32 dev_id = aclpci->pci_dev->device;
+    result = copy_to_user ( kcmd.user_addr, &dev_id, sizeof(dev_id) );
+    break;
+  }
+
+  case ACLPCI_CMD_GET_PCI_SLOT_INFO: { 
+    /* PCI slot info (bus:slot.func) is a string with format "%02x:%02x.%02x" */ 
+    sprintf(buf, "%02x:%02x.%02x", aclpci->pci_dev->bus->number,  
+      PCI_SLOT(aclpci->pci_dev->devfn), PCI_FUNC(aclpci->pci_dev->devfn)); 
+    result = copy_to_user ( kcmd.user_addr, buf, strlen(buf)+1 ); 
+    break;
+  } 
+
+  case ACLPCI_CMD_DMA_STOP: { 
+    aclpci_dma_stop(aclpci); 
+    break; 
+  }
+  
+  case ACLPCI_CMD_SET_SIGNAL_NUMBER: {
+    int user_signal_number;
+    result = copy_from_user ( &user_signal_number, kcmd.user_addr, sizeof(user_signal_number) );
+    if (result == 0 && user_signal_number >= SIGRTMIN && user_signal_number <= SIGRTMAX) {
+      aclpci->signal_number = user_signal_number;
+	  load_signal_info (aclpci);
+    }
+    break;
+  }
+  
+  case ACLPCI_CMD_GET_SIGNAL_NUMBER: {
+    result = copy_to_user ( kcmd.user_addr, &(aclpci->signal_number), sizeof(aclpci->signal_number) );
+    break;
+  }
+  
+  case ACLPCI_CMD_HOSTCH_CREATE_RD: {
+    int reading = 1;
+    result = aclpci_dma_hostch_create(aclpci, kcmd.user_addr, kcmd.device_addr, count, reading);
+    break;
+  }
+  
+  case ACLPCI_CMD_HOSTCH_CREATE_WR: {
+    int reading = 0;
+    result = aclpci_dma_hostch_create(aclpci, kcmd.user_addr, kcmd.device_addr, count, reading);
+    break;
+  }
+  
+  case ACLPCI_CMD_HOSTCH_DESTROY_RD: {
+    int reading = 1;
+    aclpci_dma_hostch_destroy(aclpci, reading);
+    break;
+  }
+  
+  case ACLPCI_CMD_HOSTCH_DESTROY_WR: {
+    int reading = 0;
+    aclpci_dma_hostch_destroy(aclpci, reading);
+    break;
+  }
+  
+  case ACLPCI_CMD_HOSTCH_THREAD_SYNC: {
+    aclpci_dma_hostch_thread_sync(aclpci, kcmd.user_addr);
+    break;
+  }
+
+  default:
+    ACL_DEBUG (KERN_WARNING " Invalid command id %u! Ignoring the call. See aclpci_common.h for list of understood commands", kcmd.command);
+    result = -EFAULT;
+    break;
+  }
+  
+  return result;
+}
+
+
+
+
+/* Pinning user pages.
+ * 
+ * Taken from <kernel code>/drivers/infiniband/hw/ipath/ipath_user_pages.c
+ */
+static void __aclpci_release_user_pages(struct page **p, size_t num_pages,
+				   int dirty)
+{
+	size_t i;
+
+	for (i = 0; i < num_pages; i++) {
+		if (dirty) {
+			set_page_dirty_lock(p[i]);
+      }
+		put_page(p[i]);
+	}
+}
+
+/* call with target_task->mm->mmap_sem held */
+static int __aclpci_get_user_pages(struct task_struct *target_task, unsigned long start_page, size_t num_pages,
+			struct page **p, struct vm_area_struct **vma)
+{
+	size_t got;
+	int ret;
+
+	for (got = 0; got < num_pages; got += ret) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)
+   ret = get_user_pages_remote(target_task, target_task->mm,
+				     start_page + got * PAGE_SIZE,
+				     num_pages - got,
+				     FOLL_WRITE|FOLL_FORCE,
+				     p + got,
+				     vma, NULL);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)
+   ret = get_user_pages_remote(target_task, target_task->mm,
+				     start_page + got * PAGE_SIZE,
+				     num_pages - got,
+				     FOLL_WRITE|FOLL_FORCE,
+				     p + got,
+				     vma);
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 6, 0)
+   ret = get_user_pages_remote(target_task, target_task->mm,
+#else
+   ret = get_user_pages(target_task, target_task->mm,
+#endif
+				     start_page + got * PAGE_SIZE,
+				     num_pages - got, 1, 1,
+				     p + got, vma);
+#endif
+		if (ret < 0)
+			goto bail_release;
+	}
+
+	target_task->mm->locked_vm += num_pages;
+
+	ret = 0;
+	goto bail;
+
+bail_release:
+	__aclpci_release_user_pages(p, got, 0);
+bail:
+	return ret;
+}
+
+
+/**
+ * aclpci_get_user_pages - lock user pages into memory
+ * @start_page: the start page
+ * @num_pages: the number of pages
+ * @p: the output page structures
+ *
+ * This function takes a given start page (page aligned user virtual
+ * address) and pins it and the following specified number of pages.
+ */
+int aclpci_get_user_pages(struct task_struct *target_task, unsigned long start_page, size_t num_pages,
+			 struct page **p)
+{
+	int ret;
+
+	down_write(&target_task->mm->mmap_sem);
+	ret = __aclpci_get_user_pages(target_task, start_page, num_pages, p, NULL);
+	up_write(&target_task->mm->mmap_sem);
+
+	return ret;
+}
+
+void aclpci_release_user_pages(struct task_struct *target_task, struct page **p, size_t num_pages)
+{
+	down_write(&target_task->mm->mmap_sem);
+
+	__aclpci_release_user_pages(p, num_pages, 1);
+
+	target_task->mm->locked_vm -= num_pages;
+
+	up_write(&target_task->mm->mmap_sem);
+}
+
+void store_pci_speed(struct aclpci_dev *aclpci, u16 speed) {
+  switch(speed) {
+    case LINKSPEED_2_5_GB: aclpci->pci_gen = 1;
+                           break;
+    case LINKSPEED_5_0_GB: aclpci->pci_gen = 2;
+                           break;
+    case LINKSPEED_8_0_GB: aclpci->pci_gen = 3;
+                           break;
+    default: aclpci->pci_gen = 1;
+  }
+}
+
+/* Check link speed and retrain it to gen2 speeds.
+ * After reprogramming, the link defaults to gen1 speeds for some reason.
+ * Doing re-training by finding the upstream root device and telling it
+ * to retrain itself. Doesn't seem to be a cleaner way to do this. */
+void retrain_gen2 (struct aclpci_dev *aclpci) {
+
+  struct pci_dev *dev = aclpci->pci_dev;
+  u16 linkstat, speed, width;
+  struct pci_dev *upstream;
+  int pos, upos;
+  u16 status_reg, control_reg, link_cap_reg;
+  u16 status, control;
+  u32 link_cap;
+  int training, timeout;
+  
+  /* Defines for some special PCIe control bits */
+  #define DISABLE_LINK_BIT         (1 << 4)
+  #define RETRAIN_LINK_BIT         (1 << 5)
+  #define TRAINING_IN_PROGRESS_BIT (1 << 11)
+   
+  pos = pci_find_capability (dev, PCI_CAP_ID_EXP);
+  if (!pos) {
+    ACL_DEBUG (KERN_WARNING "Can't find PCI Express capability!");
+    return;
+  }
+
+  /* Find root node for this bus and tell it to retrain itself. */
+  upstream = aclpci->upstream;
+  if (upstream == NULL) {
+    return;
+  }
+  upos = pci_find_capability (upstream, PCI_CAP_ID_EXP);
+  status_reg = upos + PCI_EXP_LNKSTA;
+  control_reg = upos + PCI_EXP_LNKCTL;
+  link_cap_reg = upos + PCI_EXP_LNKCAP;
+  pci_read_config_word (upstream, status_reg, &status);
+  pci_read_config_word (upstream, control_reg, &control);
+  pci_read_config_dword (upstream, link_cap_reg, &link_cap);
+  
+  
+  pci_read_config_word (dev, pos + PCI_EXP_LNKSTA, &linkstat);
+  pci_read_config_dword (upstream, link_cap_reg, &link_cap);
+  speed = linkstat & PCI_EXP_LNKSTA_CLS;
+  width = (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
+  
+  store_pci_speed(aclpci, speed);
+  aclpci->pci_num_lanes = width;
+      
+  if (speed == LINKSPEED_2_5_GB) {
+    ACL_DEBUG (KERN_DEBUG "Link is operating at 2.5 GT/s with %d lanes. Need to retrain.", width);
+  } else if (speed == LINKSPEED_5_0_GB) {
+    ACL_DEBUG (KERN_DEBUG "Link is operating at 5.0 GT/s with %d lanes.", width);
+    if (width == ACL_LINK_WIDTH) {
+      ACL_DEBUG (KERN_DEBUG "  All is good!");
+      return;
+    } else {
+      ACL_DEBUG (KERN_DEBUG "  Need to retrain.");
+    }
+  } else if (speed == LINKSPEED_8_0_GB) {
+    ACL_DEBUG (KERN_DEBUG "Link is operating at 8.0 GT/s with %d lanes.", width);
+    if (width == ACL_LINK_WIDTH) {
+      ACL_DEBUG (KERN_DEBUG "  All is good!");
+      return;
+    } else {
+      ACL_DEBUG (KERN_DEBUG "  Need to retrain.");
+    }
+  } else {
+    ACL_DEBUG (KERN_WARNING "Not sure what's going on. Retraining.");
+  }
+  
+      
+  /* Perform the training. */
+  training = 1;
+  timeout = 0;
+  pci_read_config_word (upstream, control_reg, &control);
+  pci_write_config_word (upstream, control_reg, control | RETRAIN_LINK_BIT);
+  
+  while (training && timeout < 50)
+  {
+    pci_read_config_word (upstream, status_reg, &status);
+    training = (status & TRAINING_IN_PROGRESS_BIT);
+    msleep (1); /* 1 ms */
+    ++timeout;
+  }
+  if(training)
+  {
+     ACL_DEBUG (KERN_DEBUG "Error: Link training timed out.");
+     ACL_DEBUG (KERN_DEBUG "PCIe link not established.");
+  }
+  else
+  {
+     ACL_DEBUG (KERN_DEBUG "Link training completed in %d ms.", timeout);
+  }
+   
+
+  /* Verify that it's a 5 GT/s link now */
+  pci_read_config_word (dev, pos + PCI_EXP_LNKSTA, &linkstat);
+  pci_read_config_dword (upstream, link_cap_reg, &link_cap);
+  speed = linkstat & PCI_EXP_LNKSTA_CLS;
+  width = (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
+  
+  store_pci_speed(aclpci, speed);
+  aclpci->pci_num_lanes = width;
+  
+  if(speed == LINKSPEED_8_0_GB)
+  {
+    ACL_DEBUG (KERN_DEBUG "Link operating at 8 GT/s with %d lanes", width);
+  }
+  else if(speed == LINKSPEED_5_0_GB)
+  {
+    ACL_DEBUG (KERN_DEBUG "Link operating at 5 GT/s with %d lanes", width);
+  }
+  else
+  {
+    ACL_DEBUG (KERN_WARNING "** WARNING: Link training failed.  Link operating at 2.5 GT/s with %d lanes.\n", width);
+  }
+  
+  return;
+}
+
+
+/* For some reason, pci_find_ext_capability is not resolved
+ * when loading this driver. So copied the implementation here. */
+#define PCI_CFG_SPACE_SIZE 256
+#define PCI_CFG_SPACE_EXP_SIZE 4096
+ int my_pci_find_ext_capability(struct pci_dev *dev, int cap)
+{
+  u32 header;
+  int ttl;
+  int pos = PCI_CFG_SPACE_SIZE;
+
+  /* minimum 8 bytes per capability */
+  ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
+
+  if (dev->cfg_size <= PCI_CFG_SPACE_SIZE)
+    return 0;
+
+  if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
+    return 0;
+
+  /*
+  * If we have no capabilities, this is indicated by cap ID,
+  * cap version and next pointer all being 0.
+  */
+  if (header == 0)
+    return 0;
+
+  while (ttl-- > 0) {
+  if (PCI_EXT_CAP_ID(header) == cap)
+    return pos;
+
+  pos = PCI_EXT_CAP_NEXT(header);
+  if (pos < PCI_CFG_SPACE_SIZE)
+    break;
+
+  if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
+    break;
+  }
+
+  return 0;
+}
+
+
+/* return value of AER uncorrectable error mask register
+ * for UPSTREAM node of the given device. */
+u32 get_aer_uerr_mask_reg (struct aclpci_dev *aclpci)
+{
+  struct pci_dev *dev = aclpci->upstream;
+  u32 reg32 = 0;
+  int pos;
+
+  if (dev == NULL) {
+    ACL_DEBUG (KERN_DEBUG "No upstream device found!");
+    return -EIO;
+  }
+  
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 7, 0)
+#else
+  if (dev->aer_firmware_first) {
+    return -EIO;
+  }
+#endif
+
+  pos = my_pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+  if (!pos) {
+    ACL_DEBUG (KERN_DEBUG "Upstream device doesn't have AER extended capability.");
+    return -EIO;
+  }
+  
+  pci_read_config_dword(dev, pos+0x4, &reg32);
+  pci_read_config_dword(dev, pos+0x8, &reg32);
+  return reg32;
+}
+
+/* Surprise down is the 5th register inside AER uncorrectable error register/mask */
+#define AER_SURPRISE_DOWN 0x20
+
+
+/* Set AER uncorrectable error mask register
+ * for UPSTREAM node of the given device. */
+void set_aer_uerr_mask_reg (struct aclpci_dev *aclpci, u32 val)
+{
+  int pos;
+  struct pci_dev *dev = aclpci->upstream;
+  if (!dev) {
+    return;
+  }
+    
+  pos = my_pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+  if (!pos) {
+    return;
+  }
+
+  /* First, clear the error bit by writing 1 to 5th bit. */
+  pci_write_config_dword(dev, pos+0x4, AER_SURPRISE_DOWN);
+
+  /* Now set the mask register */
+  pci_write_config_dword(dev, pos+0x8, val);
+  return;
+}
+
+
+/* Mask off "Surprise Down" error in AER. Note that setting the mask to '1' means
+ * the error is ignored. */
+void disable_aer_on_upstream_dev(struct aclpci_dev *aclpci) {
+
+  u32 disabled;
+  aclpci->aer_uerr_mask_reg = get_aer_uerr_mask_reg(aclpci);
+  if (aclpci->aer_uerr_mask_reg == -EIO) {
+    return;
+  }
+    
+  disabled = aclpci->aer_uerr_mask_reg | AER_SURPRISE_DOWN;
+  
+  ACL_DEBUG (KERN_WARNING "Changing AER Uncorrectable error mask register from %x to %x", 
+             aclpci->aer_uerr_mask_reg, disabled);
+  set_aer_uerr_mask_reg(aclpci, disabled);
+}
+
+
+/* Restore AER uncorrectable error mask register
+ * for UPSTREAM node of the given device. */
+void restore_aer_on_upstream_dev(struct aclpci_dev *aclpci) {
+
+  if (aclpci->aer_uerr_mask_reg == -EIO)
+    return;
+  ACL_DEBUG (KERN_WARNING "Restoring AER Uncorrectable error mask register to %x", aclpci->aer_uerr_mask_reg);
+  set_aer_uerr_mask_reg(aclpci, aclpci->aer_uerr_mask_reg);
+}
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cvp.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cvp.c
new file mode 100755
index 0000000000000000000000000000000000000000..fbe5bd49a388817635fd606b0f908d6b03bdc27d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_cvp.c
@@ -0,0 +1,376 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <asm/io.h> // __raw_writel
+#include "aclpci.h"
+#include "hw_pcie_cvp_constants.h"
+
+
+
+/********************************************/
+/* Code below is taken from quartus/pgm/cvp_drv/cvp_drv.c
+ * When OpenCL becomes part of Quartus, remove the duplicate code */
+ 
+/* Map VSEC_BIT to offset and bitmask. 
+ * Taken from pgm/cvp_drv/cvp_drv.c */
+static void get_mask_and_offset(unsigned char whichBit, unsigned char *bitMask, unsigned char *bitRegOffset)
+{
+  switch (whichBit) {
+    case DATA_ENCRYPTED:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask = MASK_DATA_ENCRYPTED;
+      break;
+    case DATA_COMPRESSED:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask = MASK_DATA_COMPRESSED;
+      break;
+    case CVP_CONFIG_READY:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask = MASK_CVP_CONFIG_READY;
+      break;
+    case CVP_CONFIG_ERROR:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask = MASK_CVP_CONFIG_ERROR;
+      break;
+    case CVP_EN:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask = MASK_CVP_EN;
+      break;
+    case USER_MODE:
+      *bitRegOffset = OFFSET_CVP_STATUS;
+      *bitMask =  MASK_USER_MODE;
+      break;
+    case PLD_CLK_IN_USE:
+      *bitRegOffset = OFFSET_CVP_STATUS+1;
+      *bitMask = MASK_PLD_CLK_IN_USE;
+      break;
+    case CVP_MODE:
+      *bitRegOffset = OFFSET_CVP_MODE_CTRL;
+      *bitMask = MASK_CVP_MODE;
+      break;
+    case HIP_CLK_SEL:
+      *bitRegOffset = OFFSET_CVP_MODE_CTRL;
+      *bitMask = MASK_HIP_CLK_SEL;
+      break;
+    case CVP_CONFIG:
+      *bitRegOffset = OFFSET_CVP_PROG_CTRL;
+      *bitMask = MASK_CVP_CONFIG;
+      break;
+    case START_XFER:
+      *bitRegOffset = OFFSET_CVP_PROG_CTRL;
+      *bitMask = MASK_START_XFER;
+      break;
+    case CVP_CFG_ERR_LATCH:
+      *bitRegOffset = OFFSET_UNC_IE_STATUS;
+      *bitMask = MASK_CVP_CFG_ERR_LATCH;
+      break;
+    default:
+      *bitRegOffset = -1;
+      *bitMask = -1;
+      break;
+  }
+}
+
+static unsigned char read_bit (struct pci_dev *dev, unsigned char whichBit)
+{
+  unsigned char bitMask, bitRegOffset;
+  u8 byteRead;
+  get_mask_and_offset(whichBit, &bitMask, &bitRegOffset);  
+  pci_read_config_byte (dev, OFFSET_VSEC + bitRegOffset, &byteRead);
+  return (byteRead & bitMask) ? 1 : 0;
+}
+
+static void write_bit (struct pci_dev *dev, unsigned char whichBit, unsigned char bitValue)
+{
+  unsigned char bitMask, bitRegOffset;
+  u8 byteValue;
+  switch (whichBit) {
+    case CVP_MODE:
+    case HIP_CLK_SEL:
+    case CVP_CONFIG:
+    case START_XFER:
+    case CVP_CFG_ERR_LATCH:
+      get_mask_and_offset (whichBit, &bitMask, &bitRegOffset);
+      pci_read_config_byte (dev, OFFSET_VSEC + bitRegOffset, &byteValue);
+      byteValue = bitValue ? (byteValue | bitMask) : (byteValue & ~bitMask);
+      pci_write_config_byte (dev, OFFSET_VSEC + bitRegOffset, byteValue);
+      break;
+    default:
+      break; // do nothing, the 5 bits above are the only writeable ones
+  }
+}
+
+
+/* Dump state of PCIe VSEC region. Useful when detect an error during CvP */
+static void dump_pcie_vsec_state (struct pci_dev *dev)
+{
+#define READ_PRINT16(x) pci_read_config_word  (dev, OFFSET_VSEC + x, &result16); ACL_DEBUG (KERN_DEBUG "%s = 0x%x", #x, result16);
+#define READ_PRINT32(x) pci_read_config_dword (dev, OFFSET_VSEC + x, &result32); ACL_DEBUG (KERN_DEBUG "%s = 0x%x", #x, result32);
+
+   u32 result32;
+   u16 result16;
+
+   ACL_DEBUG (KERN_DEBUG "Dump of PCIe VSEC");
+   READ_PRINT16 (OFFSET_CVP_STATUS);
+   READ_PRINT32 (OFFSET_CVP_MODE_CTRL);
+   READ_PRINT32 (OFFSET_CVP_DATA);
+   READ_PRINT32 (OFFSET_CVP_PROG_CTRL);
+   READ_PRINT32 (OFFSET_UNC_IE_STATUS);
+   
+#undef READ_PRINT16
+#undef READ_PRINT32
+}
+
+
+/* Wait for given bit to be given value, upto maximum value.
+ * Returns 1 if the given value was reached. */
+static unsigned char wait_for_bit (struct pci_dev *dev, unsigned char whichBit, unsigned char value)
+{
+  int max_num_tries = 10;
+  int single_delay = 1; /* in milliseconds */
+  int itry = 0;
+  while (read_bit (dev, whichBit) != value && itry < max_num_tries) {
+    itry++;
+    msleep (single_delay);
+  }
+  return (itry < max_num_tries);
+}
+
+
+static void send_pgm_data (struct aclpci_dev *aclpci, u32 data)
+{
+  __raw_writel (data, aclpci->bar[0] + 0x0);
+  mb();
+}
+
+
+#define OFFSET_CVP_NUMCLKS   0X21
+static void CVP_DRV_SetNumClks(struct pci_dev *dev, unsigned char numClks)
+{
+  int write_addr = OFFSET_VSEC+OFFSET_CVP_NUMCLKS;
+  
+  if (numClks == 64) {
+    pci_write_config_byte (dev, write_addr, 0x0);
+  } else if (numClks > 0 && numClks < 64) {
+    pci_write_config_byte (dev, write_addr, numClks);
+  } else {
+    // numClks is not a valid number!
+  }
+}
+
+
+static void prepare_for_pgm_data(struct pci_dev *dev)
+{
+  if (read_bit(dev, DATA_COMPRESSED)) {
+    CVP_DRV_SetNumClks(dev, 8);
+  } else if (read_bit(dev, DATA_ENCRYPTED)) {
+    CVP_DRV_SetNumClks(dev, 4);
+  } else {
+    CVP_DRV_SetNumClks(dev, 1);
+  }
+}
+
+
+
+/* Issue "dummy" writes to the HIP's memory to make the CB switch between CvP and internal clocks.
+ * The CB needs at least 244 125 MHz clock ticks, so we give it 64*4 = 256. */
+#define NUM_REG_WRITES       244
+#define VALUE_DUMMY          0x0
+#define NUM_CVP_CLKS         1
+static void switch_clock (struct aclpci_dev *aclpci)
+{
+  int i;
+  CVP_DRV_SetNumClks(aclpci->pci_dev, NUM_CVP_CLKS);
+  for (i = 0; i < NUM_REG_WRITES; i++) {
+    writel (VALUE_DUMMY, aclpci->bar[0] + 0x0);
+  }
+}
+
+
+/* check for CRC error that many 32-bit words */
+#define ERR_CHK_INTERVAL 25000
+
+
+/* Re-configure FPGA core with given bitstream via PCIe.
+ * Support for Stratix V devices and higher */
+int aclpci_cvp (struct aclpci_dev *aclpci, void __user* core_bitstream, ssize_t len) {
+
+  struct pci_dev *dev = NULL;
+  u32 *data;
+  int i;
+  int cvp_failed = 0;
+  int result = -EFAULT;
+
+  // ACL_DEBUG (KERN_DEBUG "aclpci_cvp (%p, %p, %lu)", aclpci, core_bitstream, len);
+  
+  /* Basic error checks */  
+  if (aclpci == NULL) {
+    ACL_DEBUG (KERN_WARNING "Need to open device before can do reconfigure!");
+    return result;
+  }
+  if (core_bitstream == NULL) {
+    ACL_DEBUG (KERN_WARNING "Programming bitstream is not provided!");
+    return result;
+  }
+  if (len < 1000000) {
+    ACL_DEBUG (KERN_WARNING "Programming bitstream length is suspiciously small. Not doing CvP!");
+    return result;
+  }
+  
+  dev = aclpci->pci_dev;
+  if (dev == NULL) {
+    ACL_DEBUG (KERN_WARNING "Dude, where is PCIe device?!");
+    return result;
+  }
+
+  
+  if (!read_bit (dev, CVP_EN)) {
+    ACL_DEBUG (KERN_WARNING "CvP is not enabled in the design on the FPGA!");
+    return result;
+  }
+  
+  ACL_DEBUG (KERN_DEBUG "OK to proceed with CvP!");
+  aclpci->cvp_in_progress = 1;
+    
+  write_bit(dev, HIP_CLK_SEL, 1);
+  write_bit(dev, CVP_MODE, 1);  
+  msleep (2);
+  switch_clock(aclpci);
+  
+  write_bit(dev, CVP_CONFIG, 1);
+  msleep (2);
+  switch_clock(aclpci);
+
+  /* wait for the CB to say it's ready for CvP */
+  if (!wait_for_bit (dev, CVP_CONFIG_READY, 1)) {
+    ACL_DEBUG (KERN_WARNING "Timed out waiting for CVP_CONFIG_READY to become 1! CvP has failed");
+    dump_pcie_vsec_state(dev);
+    cvp_failed = 1;
+    goto teardown;
+  }
+
+  switch_clock(aclpci);
+  write_bit(dev, START_XFER, 1);
+  
+  if (!wait_for_bit (dev, HIP_CLK_SEL, 1) || !wait_for_bit (dev, CVP_MODE, 1)) {
+    ACL_DEBUG (KERN_WARNING "Timed out waiting for HIP_CLK_SEL and CVP_MODE to be 1! CvP has failed");
+    dump_pcie_vsec_state(dev);
+    cvp_failed = 1;
+    goto teardown;
+  }
+
+  /* Transfer */
+  prepare_for_pgm_data(dev);
+
+  ACL_DEBUG (KERN_WARNING "Setup is done. Starting to write CvP data!");
+
+  data = (u32 __user*)core_bitstream;
+  for (i = 0; i < len; i++) {
+    u32 curData;
+    result = copy_from_user ( &curData, data + i, sizeof(curData));
+
+    send_pgm_data (aclpci, curData);
+    if ((i % ERR_CHK_INTERVAL == 0) && read_bit(dev, CVP_CONFIG_ERROR)) {
+      ACL_DEBUG (KERN_WARNING "ERROR: CB detected a CRC error between words %d and %d!\n", (i - ERR_CHK_INTERVAL), i);
+      dump_pcie_vsec_state(dev);
+      cvp_failed = 1;
+      break;
+    }
+  }
+
+  if (i == len) {
+    ACL_DEBUG (KERN_DEBUG "INFO: Reached the end of the core programming file.");
+  }
+
+teardown:
+  // Teardown
+  write_bit(dev, START_XFER, 0);
+  write_bit(dev, CVP_CONFIG, 0);
+  switch_clock(aclpci);
+
+  // wait for the CB to say it's done with CvP
+  if (!wait_for_bit (dev, CVP_CONFIG_READY, 0)) {
+    ACL_DEBUG (KERN_WARNING "Timed out waiting for CVP_CONFIG_READY to become 0! CvP has failed");
+    dump_pcie_vsec_state(dev);
+  }
+
+  if (read_bit(dev, CVP_CFG_ERR_LATCH)) {
+    ACL_DEBUG (KERN_WARNING "ERROR: Configuration error detected!");
+    dump_pcie_vsec_state(dev);
+    cvp_failed = 1;
+    write_bit(dev, CVP_CFG_ERR_LATCH, 1); // write a 1 to clear the config space error bit
+  } else {
+    cvp_failed = 0;
+  }
+
+  write_bit(dev, CVP_MODE, 0);
+  write_bit(dev, HIP_CLK_SEL, 0);
+  
+  if (!cvp_failed) {
+    // wait for the Application Layer to be ready for normal operation
+    if (!wait_for_bit (dev, PLD_CLK_IN_USE, 1)) {
+      ACL_DEBUG (KERN_WARNING "Timed out waiting for PLD_CLK_IN_USE to become 1! CvP has failed");
+      dump_pcie_vsec_state(dev);
+      cvp_failed = 1;
+    }
+    if (!wait_for_bit (dev, USER_MODE, 1)) {
+      ACL_DEBUG (KERN_WARNING "Timed out waiting for USER_MODE to become 1! CvP has failed");
+      dump_pcie_vsec_state(dev);
+      cvp_failed = 1;
+    }    
+    if (!cvp_failed) {
+      ACL_DEBUG (KERN_DEBUG "SUCCESS: CvP has finished.");
+      ACL_DEBUG (KERN_DEBUG " The Application Layer is ready for normal operation!");
+      msleep (200);
+      result = 0;
+    } else {
+      result = 1;
+    }
+  } else {
+    result = 1;
+  }
+  
+  aclpci->cvp_in_progress = 0;
+  return result;
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.c
new file mode 100755
index 0000000000000000000000000000000000000000..bd26f78c5edeaa276e17763cd220dd32da622dd8
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.c
@@ -0,0 +1,1436 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* DMA logic imlementation.
+ *
+ * The basic flow of DMA transfer is as follows:
+ *  1. Pin user memory (a contiguous set of address in processor address space)
+ *     to get a list of physical pages (almost never contiguous list of 4KB
+ *     blocks).
+ *  2. Setup descriptor table entries. The table has 128 entries, each entry has 
+ *     64 bit dma host address, 64 bit device address, size of transfer in dwords
+ *     and the id number of the transfer.
+ *  3. Send address descriptor table dma host address, device descriptor table
+ *     FIFO address, size of the descriptor table and last transfer id to DMA
+ *     controller
+ *  4. Go to step 2 if have not transfered all currently pinned memory yet.
+ *  5. Go to step 1 if need to pin more memory.
+ *
+ * DMA controller writes back the last transfer id status bit of the descriptor table 
+ * back into the host memory. At the same time, it signals an MSI interrupt
+ *
+ * Due to hardware restrictions, DMA can only do minimum transfer of 32-bits.
+ * The DMA driver logic assumed that MMD will not ask for transfers not divisible by 4
+ */
+
+
+#include <linux/mm.h>
+#include <linux/scatterlist.h>
+#include <linux/sched.h>
+#include <asm/page.h>
+#include <linux/spinlock.h>
+#include <linux/jiffies.h>
+#include <linux/version.h>
+#include <linux/dma-mapping.h>
+#include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/vmalloc.h>
+
+#include "aclpci.h"
+
+
+#include <linux/mm.h>
+#include <asm/siginfo.h>    //siginfo
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
+#include <linux/sched/signal.h>
+#endif
+
+#if USE_DMA
+
+/* Map/Unmap pages for DMA transfer.
+ * All docs say I need to do it but unmapping pages after
+ * reading clears their content. */
+
+#ifdef ACL_BIG_ENDIAN
+#  define MAP_UNMAP_PAGES 1
+#else
+#  define MAP_UNMAP_PAGES 0
+#endif
+
+#define DEBUG_UNLOCK_PAGES 0
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
+void wq_func_dma_update(void *data);
+#else
+void wq_func_dma_update(struct work_struct *pwork);
+#endif
+
+/* Forward declarations */
+static int set_desc_table_header(struct dma_desc_header *header);
+int read_write (struct aclpci_dev* aclpci, void* src, void *dst, size_t bytes, int reading);
+void unlock_dma_buffer (struct aclpci_dev *aclpci, struct dma_t *dma);
+void unlock_all_dma (struct aclpci_dev *aclpci);
+void poll_wait(struct aclpci_dev *aclpci, int reading);
+
+
+void *get_dma_desc_offset(struct aclpci_dev *aclpci) {
+  return aclpci->bar[ACL_PCIE_DMA_INTERNAL_BAR]+ACL_PCIE_DMA_INTERNAL_CTR_BASE; 
+}
+
+
+int is_idle (struct aclpci_dev *aclpci) {
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  return d->m_idle;
+}
+
+
+/* Add a byte-offset to a void* pointer */
+void* compute_address (void* base, unsigned long offset)
+{
+   unsigned long p = (unsigned long)(base);
+   return (void*)(p + offset);
+}
+
+
+/* Init DMA engine. Should be done at device load time */
+void aclpci_dma_init(struct aclpci_dev *aclpci) {
+
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  memset( &d->m_active_mem, 0, sizeof(struct pinned_mem) );
+  d->m_idle=1;
+  
+  d->m_aclpci = aclpci;
+  d->m_pci_dev = aclpci->pci_dev;
+  
+  // create a workqueue with a single thread and a work structure
+  d->my_wq   = create_singlethread_workqueue("aclkmdq");
+  d->my_work = (struct work_struct_t*) kmalloc(sizeof(struct work_struct_t), GFP_KERNEL);
+  if(d->my_work) {
+    d->my_work->data = (void *)aclpci;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
+    INIT_WORK( &d->my_work->work, wq_func_dma_update, (void *)d->my_work->data); 
+#else
+    INIT_WORK( &d->my_work->work, wq_func_dma_update);
+#endif
+  }
+}
+
+void aclpci_hostch_clear_buf(struct aclpci_dev *aclpci) {
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  memset( &h->m_hostch_rd_mem, 0, sizeof(struct pinned_mem) );
+  memset( &h->m_hostch_wr_mem, 0, sizeof(struct pinned_mem) );
+  memset( &h->m_hostch_rd_pointer, 0, sizeof(struct pinned_mem) );
+  memset( &h->m_hostch_wr_pointer, 0, sizeof(struct pinned_mem) );
+  memset( &h->m_sync_thread_pointer, 0, sizeof(struct pinned_mem) );
+
+}
+
+void aclpci_hostch_init(struct aclpci_dev *aclpci) {
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  aclpci_hostch_clear_buf(aclpci);
+  
+  h->push_valid = 0;
+  h->pull_valid = 0;
+
+}
+
+
+void aclpci_dma_finish(struct aclpci_dev *aclpci) {
+  
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  
+  d->dma_wr_last_id = ACL_PCIE_DMA_RESET_ID;
+  d->dma_rd_last_id = ACL_PCIE_DMA_RESET_ID;
+  
+  aclpci_hostch_clear_buf(aclpci);
+  
+  aclpci_dma_hostch_destroy(aclpci,0);
+  aclpci_dma_hostch_destroy(aclpci,1);
+  
+  unlock_all_dma(aclpci);
+  
+  flush_workqueue(d->my_wq);
+  destroy_workqueue(d->my_wq);
+  kfree(d->my_work);
+  d->m_idle = 1;
+
+}
+
+void aclpci_dma_stop(struct aclpci_dev *aclpci) {
+  int dma_last_id, reading;
+  int dma_update = 0;
+  int timeout = 0;
+
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  reading = d->m_read;
+  
+  aclpci_dma_hostch_destroy(aclpci,0);
+  aclpci_dma_hostch_destroy(aclpci,1);
+  
+  // Set DMA to idle to tell interrupt handler to stop queueing DMA update.
+  // Since the MMD calls dma stop as a read command, there should be nothing that checks
+  // DMA idle state until aclpci_dma_stop exits.
+  d->m_idle = 1;
+  
+  // Flush any pending work on the workqueue.
+  // This will request the last DMA request if the queue is not empty.
+  flush_workqueue(d->my_wq);
+
+  // Finish the last outstanding DMA request by polling valid bit.
+  // Timeout of ~1s was added in case there is issue with DMA IP, and it's not sending the last valid bit.
+  // This should only happen during board bring-up, if it happens at all.
+  while ((dma_update == 0) && (timeout < ACL_PCIE_DMA_CTRL_C_TIMEOUT)) {
+    if (reading) {
+       if (d->dma_wr_last_id < ACL_PCIE_DMA_DESC_MAX_ENTRIES) {
+         dma_last_id = d->dma_wr_last_id;
+         dma_update = (d->desc_table_wr_cpu_virt_addr->header.flags[dma_last_id]);
+       } else {
+         dma_update = 1;
+       }
+     } else {
+       if (d->dma_rd_last_id < ACL_PCIE_DMA_DESC_MAX_ENTRIES) {
+         dma_last_id = d->dma_rd_last_id;
+         dma_update = (d->desc_table_rd_cpu_virt_addr->header.flags[dma_last_id]);
+       } else {
+         dma_update = 1;
+       }
+     }
+     
+     msleep(1);
+     timeout += 1;
+  }
+  
+  if (reading) {
+    set_desc_table_header(&d->desc_table_wr_cpu_virt_addr->header);
+  } else {
+    set_desc_table_header(&d->desc_table_rd_cpu_virt_addr->header);
+  }
+  
+  d->dma_wr_last_id = ACL_PCIE_DMA_RESET_ID;
+  d->dma_rd_last_id = ACL_PCIE_DMA_RESET_ID;
+  
+  // Unpin all memories
+  unlock_all_dma(aclpci);
+}
+
+
+/* Called by main interrupt handler in aclpci.c. By the time we get here,
+ * we know it's a DMA interrupt. So only need to do DMA-related stuff. */
+irqreturn_t aclpci_dma_service_interrupt (struct aclpci_dev *aclpci)
+{
+  // Keep this to not affect aclpci.c.
+  // Add in code here for MSI
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct timeval us_end_time;
+  long int seconds, useconds;
+  int reading = d->m_read;
+  
+  if (d->m_idle) {
+    return IRQ_HANDLED;
+  }
+  
+  if (reading) {
+    set_desc_table_header(&d->desc_table_wr_cpu_virt_addr->header);
+  } else {
+    set_desc_table_header(&d->desc_table_rd_cpu_virt_addr->header);
+  }
+  d->m_dma_ready = 1;
+  
+  if (d->m_us_valid == 1) {
+    d->m_us_valid = 0;
+    do_gettimeofday(&us_end_time);
+    seconds = us_end_time.tv_sec - d->m_us_dma_start_time.tv_sec;
+    useconds = us_end_time.tv_usec - d->m_us_dma_start_time.tv_usec;
+    ACL_VERBOSE_DEBUG (KERN_DEBUG "Last table transfer measured %06ld usec :: check seconds %ld should be zero", useconds, seconds);
+  }
+  
+  queue_work(d->my_wq, &d->my_work->work);
+  
+  return IRQ_HANDLED;
+}
+
+static void* get_hostch_control_addr_push(struct aclpci_dev *aclpci) {
+
+  /* Bar 4, register PCIE_CRA_IRQ_ENABLE is the IRQ enable register
+   * (among other things). */
+  return (void*)(aclpci->bar[ACL_PCI_CRA_BAR] + (unsigned long)HOSTCH_CONTROL_ADDR_PUSH + (unsigned long)HOSTCH_BASE);
+}
+
+static void* get_hostch_control_addr_pull(struct aclpci_dev *aclpci) {
+
+  /* Bar 4, register PCIE_CRA_IRQ_ENABLE is the IRQ enable register
+   * (among other things). */
+  return (void*)(aclpci->bar[ACL_PCI_CRA_BAR] + (unsigned long)HOSTCH_CONTROL_ADDR_PULL + (unsigned long)HOSTCH_BASE);
+}
+
+/* Read/Write large amounts of data using DMA.
+ *   dev_addr  -- address on device to read to/write from
+ *   dest_addr -- address in user space to read to/write from
+ *   len       -- number of bytes to transfer
+ *   reading   -- 1 if doing read (from device), 0 if doing write (to device)
+ */
+ssize_t aclpci_dma_rw (struct aclpci_dev *aclpci,
+                       void *dev_addr, void __user* user_addr, 
+                       ssize_t len, int reading) {
+
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "DMA: %sing %lu bytes", reading ? "Read" : "Writ", len);
+  if (reading) {
+    read_write (aclpci, dev_addr,  user_addr, len, reading);
+  } else {
+    read_write (aclpci, user_addr,  dev_addr, len, reading);
+  }
+  
+  return 0;
+}
+
+
+/* Return idle status of the DMA hardware. */
+int aclpci_dma_get_idle_status(struct aclpci_dev *aclpci) {
+  return aclpci->dma_data.m_idle;
+}
+
+
+int lock_dma_buffer (struct aclpci_dev *aclpci, void *addr, ssize_t len, struct pinned_mem *active_mem) {
+
+  int ret;
+  unsigned int num_act_pages;
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  ssize_t start_page, end_page, num_pages;
+  u64 ej, startj = get_jiffies_64();
+  struct dma_t *dma = &(active_mem->dma);
+  
+  #if MAP_UNMAP_PAGES
+  unsigned int i;  
+  dma_addr_t phys;
+  #endif
+
+  dma->ptr = addr;
+  dma->len = len;
+  dma->dir = d->m_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE;
+  /* num_pages that [addr, addr+len] map to. */
+  start_page = (ssize_t)addr >> PAGE_SHIFT;
+  end_page = ((ssize_t)addr + len - 1) >> PAGE_SHIFT;
+  num_pages = end_page - start_page + 1;
+  
+  dma->num_pages = num_pages;
+  dma->pages = (struct page**)kzalloc ( sizeof(struct page*) * dma->num_pages, GFP_KERNEL );
+  if (dma->pages == NULL) {
+    ACL_DEBUG (KERN_WARNING "Couldn't allocate array of %u ptrs!", dma->num_pages);
+    return -EFAULT;
+  }
+  
+  dma->dma_addrs = (dma_addr_t*)kzalloc ( sizeof(dma_addr_t) * dma->num_pages, GFP_KERNEL );
+  if (dma->dma_addrs == NULL) {
+    ACL_DEBUG (KERN_WARNING "Couldn't allocate array of %u dma_addr_t's!", dma->num_pages);
+    return -EFAULT;
+  }
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "pages = [%p, %p), dma_addrs = [%p, %p)", 
+                     dma->pages, dma->pages+num_pages, dma->dma_addrs, dma->dma_addrs+num_pages);
+  
+  /* pin user memory and get set of physical pages back in 'p' ptr. */
+  ret = aclpci_get_user_pages(aclpci->user_task, (unsigned long)addr & PAGE_MASK, num_pages, dma->pages);
+  if (ret != 0) {
+    ACL_DEBUG (KERN_WARNING "Couldn't pin all user pages. %d!\n", ret);
+    return -EFAULT;
+  }
+  
+  
+  /* map pages for PCI access. */
+  num_act_pages = 0;
+  #if MAP_UNMAP_PAGES
+
+  for (i = 0; i < dma->num_pages; i++) {
+    struct page *cur = dma->pages[i];
+    // ACL_DEBUG (KERN_DEBUG "p[%d] = 0x%p", i, cur);
+    if (cur != NULL) {
+      // ACL_DEBUG (KERN_DEBUG "  phys_addr = 0x%llx", page_to_phys(cur));
+      phys = pci_map_page (d->m_pci_dev, cur, 0, PAGE_SIZE, dma->dir);
+      if (phys == 0) {
+        ACL_DEBUG (KERN_DEBUG "  Couldn't pci_map_page!");
+        return -EFAULT;
+      }
+      dma->dma_addrs[i] = phys;
+      num_act_pages++;
+    }
+  }
+  #endif
+
+  active_mem->pages_rem = dma->num_pages;
+  active_mem->next_page = dma->pages;
+  active_mem->next_dma_addr = dma->dma_addrs;
+  active_mem->first_page_offset = (unsigned long)addr & (PAGE_SIZE - 1);
+  active_mem->last_page_offset = (unsigned long)(addr + len) & (PAGE_SIZE - 1);
+  
+  //ACL_DEBUG (KERN_DEBUG  "Content of first page (addr  = %p): %s", 
+  //             page_to_phys(dma->pages[0]), (char*)phys_to_virt(page_to_phys(dma->pages[0])));
+  ej = get_jiffies_64();
+  
+  ACL_VERBOSE_DEBUG (KERN_DEBUG  "DMA: Pinned %u bytes (%lu pages) at 0x%p in %u usec", 
+      (unsigned int)len, num_pages, addr, jiffies_to_usecs(ej - startj));
+  ACL_VERBOSE_DEBUG (KERN_DEBUG  "DMA: first page offset is %u, last page offset is %u", 
+         active_mem->first_page_offset, active_mem->last_page_offset);
+         
+  d->m_pin_time += (ej - startj);
+  d->m_lock_time += (ej - startj);
+  return 0;
+}
+
+
+void unlock_dma_buffer (struct aclpci_dev *aclpci, struct dma_t *dma) {
+
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  u64 ej, startj = get_jiffies_64();
+  
+  #if DEBUG_UNLOCK_PAGES
+  char *s = (char*)phys_to_virt(page_to_phys(dma->pages[0]));
+  
+  ACL_DEBUG (KERN_DEBUG  "1. Content of first page (addr  = %p): %s", 
+               page_to_phys(dma->pages[0]), s);
+  #endif
+  
+  #if MAP_UNMAP_PAGES
+  int i;
+  /* Unmap pages to make the data available for CPU */      
+  for (i = 0; i < dma->num_pages; i++) {
+    struct page *cur = dma->pages[i];
+    // ACL_DEBUG (KERN_DEBUG "p[%d] = %p", i, cur);
+    if (cur != NULL) {
+      dma_addr_t phys = dma->dma_addrs[i];
+      pci_unmap_page (d->m_pci_dev, phys, PAGE_SIZE, dma->dir);
+    }
+  }
+  #endif
+  
+  // TODO: If do map/unmap for reads, the data is 0 by now!!!!
+  #if DEBUG_UNLOCK_PAGES
+    ACL_DEBUG (KERN_DEBUG  "2. Content of first page: %s", s);
+  #endif
+
+  /* Unpin pages */
+  aclpci_release_user_pages (aclpci->user_task, dma->pages, dma->num_pages);
+    
+  /* TODO: try to re-use these buffers on future allocs */
+  kfree (dma->pages);
+  kfree (dma->dma_addrs);
+
+  ej = get_jiffies_64();
+  ACL_VERBOSE_DEBUG (KERN_DEBUG  "DMA: Unpinned %u pages in %u usec", 
+                          dma->num_pages,
+                          jiffies_to_usecs(ej - startj));
+                          
+  /* Reset all dma fields. */
+  memset (dma, 0, sizeof(struct dma_t));
+  
+  d->m_pin_time += (ej - startj);
+  d->m_unlock_time += (ej - startj);
+}
+
+void unlock_all_dma(struct aclpci_dev *aclpci)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct dma_t *dma = &(d->m_active_mem.dma);
+  
+  if (d->m_active_mem.dma.ptr != NULL) {
+    unlock_dma_buffer (aclpci, dma);
+  }
+  dma = &(d->m_pre_pinned_mem.dma);
+  if (d->m_pre_pinned_mem.dma.ptr != NULL) {
+    unlock_dma_buffer (aclpci, dma);
+  }
+  dma = &(d->m_done_mem.dma);
+  if (d->m_done_mem.dma.ptr != NULL) {
+    unlock_dma_buffer (aclpci, dma);
+  }
+  
+}
+
+static int set_page_entry(struct hostch_entry *page_entry, u64 page_addr, u32 page_num)
+{
+    page_entry->page_addr_ldw = cpu_to_le32(page_addr & 0xffffffffUL);
+    page_entry->page_addr_udw = cpu_to_le32((page_addr >> 32));
+    page_entry->page_num = cpu_to_le32(page_num);
+    page_entry->reserved[0] = cpu_to_le32(0x0);
+    page_entry->reserved[1] = cpu_to_le32(0x0);
+    page_entry->reserved[2] = cpu_to_le32(0x1);
+    page_entry->reserved[3] = cpu_to_le32(0x0);
+    page_entry->reserved[4] = cpu_to_le32(0x0);
+    return 0;
+}
+
+static int set_write_desc(struct dma_desc_entry *wr_desc, u64 source, dma_addr_t dest, u32 ctl_dma_len, u32 id)
+{
+    wr_desc->src_addr_ldw = cpu_to_le32(source & 0xffffffffUL);
+    wr_desc->src_addr_udw = cpu_to_le32((source >> 32));
+    wr_desc->dest_addr_ldw = cpu_to_le32(dest & 0xffffffffUL);
+    wr_desc->dest_addr_udw = cpu_to_le32((dest >> 32));
+    wr_desc->ctl_dma_len = cpu_to_le32(ctl_dma_len | (id << 18));
+    wr_desc->reserved[0] = cpu_to_le32(0x0);
+    wr_desc->reserved[1] = cpu_to_le32(0x0);
+    wr_desc->reserved[2] = cpu_to_le32(0x0);
+    return 0;
+}
+
+static int set_read_desc(struct dma_desc_entry *rd_desc, dma_addr_t source, u64 dest, u32 ctl_dma_len, u32 id)
+{
+    rd_desc->src_addr_ldw = cpu_to_le32(source & 0xffffffffUL);
+    rd_desc->src_addr_udw = cpu_to_le32((source >> 32));
+    rd_desc->dest_addr_ldw = cpu_to_le32(dest & 0xffffffffUL);
+    rd_desc->dest_addr_udw = cpu_to_le32((dest >> 32));
+    rd_desc->ctl_dma_len = cpu_to_le32(ctl_dma_len | (id << 18));
+    rd_desc->reserved[0] = cpu_to_le32(0x0);
+    rd_desc->reserved[1] = cpu_to_le32(0x0);
+    rd_desc->reserved[2] = cpu_to_le32(0x0);
+    return 0;
+}
+
+static int set_desc_table_header(struct dma_desc_header *header)
+{
+    int i;
+    for (i = 0; i < ACL_PCIE_DMA_DESC_MAX_ENTRIES; i++)
+        header->flags[i] = cpu_to_le32(0x0); 
+    return 0;
+}
+
+void setup_dma_desc(struct aclpci_dev *aclpci)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  void *dma_desc_base = get_dma_desc_offset(aclpci);
+  
+  iowrite32 ((dma_addr_t)d->desc_table_wr_bus_addr, dma_desc_base+ACL_PCIE_DMA_RC_WR_DESC_BASE_LOW);
+  iowrite32 (((dma_addr_t)d->desc_table_wr_bus_addr)>>32, dma_desc_base+ACL_PCIE_DMA_RC_WR_DESC_BASE_HIGH);
+  iowrite32 (ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_LO, dma_desc_base+ACL_PCIE_DMA_EP_WR_FIFO_BASE_LOW);
+  iowrite32 (ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_HI, dma_desc_base+ACL_PCIE_DMA_EP_WR_FIFO_BASE_HIGH);
+  iowrite32 (ACL_PCIE_DMA_TABLE_SIZE-1, dma_desc_base+ACL_PCIE_DMA_WR_TABLE_SIZE);
+  
+  iowrite32 ((dma_addr_t)d->desc_table_rd_bus_addr, dma_desc_base+ACL_PCIE_DMA_RC_RD_DESC_BASE_LOW);
+  iowrite32 (((dma_addr_t)d->desc_table_rd_bus_addr)>>32, dma_desc_base+ACL_PCIE_DMA_RC_RD_DESC_BASE_HIGH);
+  iowrite32 (ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_LO, dma_desc_base+ACL_PCIE_DMA_EP_RD_FIFO_BASE_LOW);
+  iowrite32 (ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_HI, dma_desc_base+ACL_PCIE_DMA_EP_RD_FIFO_BASE_HIGH);
+  iowrite32 (ACL_PCIE_DMA_TABLE_SIZE-1, dma_desc_base+ACL_PCIE_DMA_RD_TABLE_SIZE);
+}
+
+void send_dma_desc(struct aclpci_dev *aclpci, int reading, int first, int last_id, int disable_int)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  void *dma_desc_base = get_dma_desc_offset(aclpci);
+  // TODO: int first is from get_start_id function. Right now always set to 0.
+  // When the last pointer loops back to 0, we don't have to write the FIFO address for some reason
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Set desc table\n");
+  if (reading) {
+    iowrite32 ((dma_addr_t)d->desc_table_wr_bus_addr, dma_desc_base+ACL_PCIE_DMA_RC_WR_DESC_BASE_LOW);
+    iowrite32 (((dma_addr_t)d->desc_table_wr_bus_addr)>>32, dma_desc_base+ACL_PCIE_DMA_RC_WR_DESC_BASE_HIGH);
+    if (first == 0) {
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "Set EP registers\n");
+      wmb();
+      iowrite32 (ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_LO, dma_desc_base+ACL_PCIE_DMA_EP_WR_FIFO_BASE_LOW);
+      iowrite32 (ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_HI, dma_desc_base+ACL_PCIE_DMA_EP_WR_FIFO_BASE_HIGH);
+      iowrite32 (ACL_PCIE_DMA_TABLE_SIZE-1, dma_desc_base+ACL_PCIE_DMA_WR_TABLE_SIZE);
+      if (disable_int)
+        iowrite32 (ACL_PCIE_DMA_DISABLE_INT, dma_desc_base+ACL_PCIE_DMA_WR_INT_CONTROL);
+      else
+        iowrite32 (ACL_PCIE_DMA_ENABLE_INT, dma_desc_base+ACL_PCIE_DMA_WR_INT_CONTROL);
+      // Add this for debug. Setting DMA control register to 1 makes it write 1 to all dma table status entry
+      // iowrite32 (1, dma_desc_base+ACL_PCIE_DMA_WR_CONTROL);
+    }
+    wmb();
+    d->dma_wr_last_id = last_id;
+    iowrite32 (last_id, dma_desc_base+ACL_PCIE_DMA_WR_LAST_PTR);
+  } else {
+    iowrite32 ((dma_addr_t)d->desc_table_rd_bus_addr, dma_desc_base+ACL_PCIE_DMA_RC_RD_DESC_BASE_LOW);
+    iowrite32 (((dma_addr_t)d->desc_table_rd_bus_addr)>>32, dma_desc_base+ACL_PCIE_DMA_RC_RD_DESC_BASE_HIGH);
+    if (first == 0) {
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "Set EP registers\n");
+      wmb();
+      iowrite32 (ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_LO, dma_desc_base+ACL_PCIE_DMA_EP_RD_FIFO_BASE_LOW);
+      iowrite32 (ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_HI, dma_desc_base+ACL_PCIE_DMA_EP_RD_FIFO_BASE_HIGH);
+      iowrite32 (ACL_PCIE_DMA_TABLE_SIZE-1, dma_desc_base+ACL_PCIE_DMA_RD_TABLE_SIZE);
+      if (disable_int)
+        iowrite32 (ACL_PCIE_DMA_DISABLE_INT, dma_desc_base+ACL_PCIE_DMA_RD_INT_CONTROL);
+      else
+        iowrite32 (ACL_PCIE_DMA_ENABLE_INT, dma_desc_base+ACL_PCIE_DMA_RD_INT_CONTROL);
+      // Add this for debug. Setting DMA control register to 1 makes it write 1 to all dma table status entry
+      //iowrite32 (1, dma_desc_base+ACL_PCIE_DMA_RD_CONTROL);
+    }
+    wmb();
+    d->dma_rd_last_id = last_id;
+    iowrite32 (last_id, dma_desc_base+ACL_PCIE_DMA_RD_LAST_PTR);
+  }
+}
+
+int get_start_id (struct aclpci_dev *aclpci, int reading, int *start_id, int *first) {
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  int check_last_id;
+  
+  if (reading) {
+    check_last_id = d->dma_wr_last_id;
+    set_desc_table_header(&d->desc_table_wr_cpu_virt_addr->header);
+  } else {
+    check_last_id = d->dma_rd_last_id;
+    set_desc_table_header(&d->desc_table_rd_cpu_virt_addr->header);
+  }
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "check_last_id = %i", check_last_id);
+  
+  // TODO: first can be changed to 1 for check_last_id==ACL_PCIE_DMA_TABLE_SIZE - 1 to optimize DMA behaviour
+  //       Safer to leave it at 0 for now though.
+  if (check_last_id == ACL_PCIE_DMA_RESET_ID) {
+    *start_id = 0;
+    *first = 0;
+  } else if (check_last_id == ACL_PCIE_DMA_TABLE_SIZE - 1) {
+    *start_id = 0;
+    *first = 0;
+  } else if (check_last_id < ACL_PCIE_DMA_TABLE_SIZE - 1) {
+    *start_id = check_last_id + 1;
+    *first = 0;
+  } else {
+    ACL_DEBUG (KERN_WARNING "WARNING :: Unrecognized last id %i", check_last_id);
+    return 1;
+  }
+  return 0;
+}
+
+int non_aligned_page_handler
+(
+  struct aclpci_dev *aclpci,
+  dma_addr_t pcie_addr,
+  u64 qsys_addr,
+  size_t bytes,
+  int reading
+)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct page *next_page;
+  size_t transfer_bytes_w, remaining, temp, transfer_bytes, transferred, transfer_words;
+  int result, i, last_id, max_transfer, start_id, first;
+  
+  if (bytes >= PAGE_SIZE) {
+    ACL_DEBUG(KERN_WARNING "WARNING :: non aligned handler asked to transfer %u bytes. Max is %u", (unsigned int) bytes, (unsigned int) PAGE_SIZE);
+    return 1;
+  }
+  
+  remaining = bytes;
+  last_id = ACL_PCIE_DMA_RESET_ID;
+
+  first = 0;
+  
+  result = get_start_id(aclpci, reading, &start_id, &first);
+  if (result != 0) {
+    ACL_DEBUG(KERN_WARNING "WARNING :: Failed get start id");
+    return 1;
+  }
+  max_transfer = ACL_PCIE_DMA_TABLE_SIZE - start_id;
+  
+  for (transfer_bytes_w = ACL_PCIE_DMA_NON_ALIGNED_TRANS_LOG; transfer_bytes_w > 1; transfer_bytes_w--) {
+    temp = remaining >> transfer_bytes_w;
+    transfer_bytes = 1 << transfer_bytes_w;
+    transfer_words = transfer_bytes/4;
+    
+    // Sanity check.
+    // When PAGE_SIZE <= 4096 and ACL_PCIE_DMA_NON_ALIGNED_TRANS_LOG >= 11,
+    // Non-aligned page handler transfers 1 descriptor at a time with size 2048 -> 1024 -> 512 -> ... -> 4
+    // So temp is never greater than 1.
+    if (PAGE_SIZE <= 4096 && ACL_PCIE_DMA_NON_ALIGNED_TRANS_LOG >= 11 && temp > 1) {
+      ACL_DEBUG(KERN_WARNING "WARNING :: non aligned handler transferring %u with max at %i", (unsigned int)temp, max_transfer);
+      return 1;
+    }
+    
+    if (temp >= max_transfer) {
+      for (i = 0; i < max_transfer; i++) {
+        if (reading) {
+          set_write_desc(&d->desc_table_wr_cpu_virt_addr->descriptors[i], (u64)qsys_addr + i*transfer_bytes, (dma_addr_t)pcie_addr + i*transfer_bytes, transfer_words, i+start_id);
+        } else {
+          set_read_desc(&d->desc_table_rd_cpu_virt_addr->descriptors[i], (dma_addr_t)pcie_addr + i*transfer_bytes, (u64)qsys_addr + i*transfer_bytes, transfer_words, i+start_id);
+        }
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "Building descriptor :: Transferring %u bytes :: pcie addr %llx%llx :: qsys addr %llx%llx :: descriptor %i", (unsigned int)transfer_bytes, (u64) (pcie_addr + i*transfer_bytes) >> 32, (u64) (pcie_addr + i*transfer_bytes) & 0xffffffff, (u64) (qsys_addr + i*transfer_bytes) >> 32, (u64) (qsys_addr + i*transfer_bytes) & 0xffffffff, i+start_id);
+      }
+      transferred = transfer_bytes*max_transfer;
+      last_id = ACL_PCIE_DMA_TABLE_SIZE - 1;
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "DMA Transfering page unaligned %u bytes",
+                  (unsigned int)transfer_bytes*max_transfer);
+      break;
+    } else if (temp > 0) {
+      for (i = 0; i < temp; i++) {
+        if (reading) {
+          set_write_desc(&d->desc_table_wr_cpu_virt_addr->descriptors[i], (u64)qsys_addr + i*transfer_bytes, (dma_addr_t)pcie_addr + i*transfer_bytes, transfer_words, i+start_id);
+        } else {
+          set_read_desc(&d->desc_table_rd_cpu_virt_addr->descriptors[i], (dma_addr_t)pcie_addr + i*transfer_bytes, (u64)qsys_addr + i*transfer_bytes, transfer_words, i+start_id);
+        }
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "Building descriptor :: Transferring %u bytes :: pcie addr %llx%llx :: qsys addr %llx%llx :: descriptor %i", (unsigned int)transfer_bytes, (u64) (pcie_addr + i*transfer_bytes) >> 32, (u64) (pcie_addr + i*transfer_bytes) & 0xffffffff, (u64) (qsys_addr + i*transfer_bytes) >> 32, (u64) (qsys_addr + i*transfer_bytes) & 0xffffffff, i+start_id);
+      }
+      transferred = transfer_bytes*temp;
+      last_id = start_id + temp - 1;
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "DMA Transfering page unaligned %u bytes",
+                  (unsigned int)transfer_bytes*temp);
+      break;
+    }
+  }
+  if (last_id == ACL_PCIE_DMA_RESET_ID) {
+    ACL_DEBUG(KERN_WARNING "DMA non-aligned transfer failed");
+    return 1;
+  }
+  send_dma_desc(aclpci, reading, first, last_id, 0);
+  
+  d->m_device_addr += transferred;
+  d->m_bytes_sent += transferred;
+  d->m_host_addr += transferred;
+  d->m_active_mem.first_page_offset += transferred;
+  remaining -= transferred;
+  
+  if (d->m_done_mem.dma.ptr != NULL) {
+    unlock_dma_buffer (aclpci, &(d->m_done_mem.dma));
+  }
+  if (remaining == 0) {
+    d->m_active_mem.first_page_offset = 0;
+    ++d->m_active_mem.next_page;
+    ++d->m_active_mem.next_dma_addr;
+    d->m_active_mem.pages_rem--;
+    next_page = *(d->m_active_mem.next_page);
+    d->m_cur_dma_addr = page_to_phys (next_page);
+  }
+  
+  return 0;
+}
+
+// Check if user mode 'ack' API updated end pointer of circular buf
+// Update end pointer in IP
+int aclpci_dma_hostch_push_update (struct aclpci_dev *aclpci)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  void *dma_desc_base;
+  
+  dma_desc_base = get_dma_desc_offset(aclpci);
+  
+  if (h->rd_buf_end_pointer != *h->user_rd_end_pointer)
+    h->rd_buf_end_pointer = *h->user_rd_end_pointer;
+  else {
+    h->loop_counter = (h->loop_counter > 0) ? h->loop_counter - 1 : h->loop_counter;
+    return 1;
+  }
+  h->loop_counter = HOSTCH_LOOP_COUNTER;
+
+  iowrite32 (h->rd_buf_end_pointer, dma_desc_base+ACL_HOST_CHANNEL_0_HOST_ENDP);
+  
+  return 0;
+}
+
+// Check if user mode 'ack' API updated front pointer of circular buf
+// Update end pointer in IP
+int aclpci_dma_hostch_pull_update (struct aclpci_dev *aclpci)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  void* dma_desc_base;
+  
+  
+  dma_desc_base = get_dma_desc_offset(aclpci);
+  
+  if (h->wr_buf_front_pointer != *h->user_wr_front_pointer)
+    h->wr_buf_front_pointer = *h->user_wr_front_pointer;
+  else {
+    h->loop_counter = (h->loop_counter > 0) ? h->loop_counter - 1 : h->loop_counter;
+    return 1;
+  }
+  h->loop_counter = HOSTCH_LOOP_COUNTER;
+
+  iowrite32 ( h->wr_buf_front_pointer, dma_desc_base+ACL_HOST_CHANNEL_1_HOST_FRONTP);
+  
+  return 0;
+}
+
+// Return 1 if something was done. 0 otherwise.
+int aclpci_dma_update (struct aclpci_dev *aclpci, int forced)
+{
+   struct aclpci_dma *d = &(aclpci->dma_data);
+   struct dma_t *dma = &(d->m_active_mem.dma);
+   struct aclpci_hostch_desc *h = &(d->hostch_data);
+   struct page *next_page;
+   
+   size_t remaining, lock_size;
+   u32 first;
+   unsigned int first_size, single_page;
+   int i, max_transfer, start_id, last_id, reading, result = 1;
+   int status;
+   u64 ej;
+   
+   if (h->pull_valid && d->m_idle) {
+     // Check user memory to see if there was update to user buffer pointer for pull
+     status = aclpci_dma_hostch_pull_update(aclpci);
+   }
+   
+   if (h->push_valid && d->m_idle) {
+     // Check user memory to see if there was update to user buffer pointer for push
+     status = aclpci_dma_hostch_push_update(aclpci);
+   }
+   
+   if ((h->push_valid | h->pull_valid) && d->m_idle && (h->thread_sync_valid && h->loop_counter > 0)) {
+     ndelay(100);
+     queue_work(d->my_wq, &d->my_work->work);
+     return 0;  
+   } else if (d->m_idle && (h->thread_sync_valid && h->loop_counter == 0)) {
+     *h->user_thread_sync = 0;
+     return 0;
+   } else if (d->m_idle) {
+     return 0;
+   }
+   
+   if (!d->m_dma_ready) {
+     return 0;
+   }
+   d->m_dma_ready = 0;
+   reading = d->m_read;
+     
+   remaining = d->m_bytes - d->m_bytes_sent;
+   max_transfer = 0;
+   
+   // DMA transaction complete. Reset values and return.
+   if (remaining == 0) {
+     d->dma_wr_last_id = ACL_PCIE_DMA_RESET_ID;
+     d->dma_rd_last_id = ACL_PCIE_DMA_RESET_ID;
+     d->m_page_last_id = ACL_PCIE_DMA_TABLE_SIZE-1;
+
+     unlock_dma_buffer (aclpci, dma);
+     if (d->m_done_mem.dma.ptr != NULL) {
+        unlock_dma_buffer (aclpci, &(d->m_done_mem.dma));
+      }
+     
+     ACL_VERBOSE_DEBUG (KERN_DEBUG "Done DMA for device_addr: %llx host_addr: %llx reading: %i bytes: %u\n", (u64)d->m_device_addr, (u64)d->m_host_addr, reading, (unsigned int) d->m_bytes);
+     
+     ej = get_jiffies_64();
+     ACL_VERBOSE_DEBUG (KERN_DEBUG "Spent %u msec %sing %u bytes", jiffies_to_msecs(ej - d->m_start_time), 
+                           reading ? "read" : "writ", (unsigned int) d->m_bytes);
+     
+     // Interrupt to MMD layer for DMA done
+     d->m_idle = 1;
+     if(aclpci->user_task != NULL) {
+           if( send_sig_info(aclpci->signal_number, &aclpci->signal_info_dma, aclpci->user_task) < 0) {
+              printk("Error sending signal to host!\n");
+           }
+     }
+     
+     if ((h->push_valid | h->pull_valid) && (h->thread_sync_valid && h->loop_counter > 0)) {
+       queue_work(d->my_wq, &d->my_work->work);
+     }
+     return 1;
+   }
+   
+   if (remaining > 0) {
+      first = 0;
+      
+      if (d->m_active_mem.dma.ptr == NULL || d->m_active_mem.pages_rem == 0) {
+        
+        if (d->m_active_mem.pages_rem == 0) {
+          d->m_done_mem = d->m_active_mem;
+          d->m_active_mem.dma.ptr = NULL;
+        }
+        
+        if (d->m_pre_pinned_mem.dma.ptr == NULL) {
+          lock_size = (remaining > ((ACL_PCIE_DMA_PAGES_LOCKED * PAGE_SIZE) + ((ACL_PCIE_DMA_TABLE_SIZE - d->m_page_last_id) * PAGE_SIZE))) ?
+                  ((ACL_PCIE_DMA_PAGES_LOCKED * PAGE_SIZE) + ((ACL_PCIE_DMA_TABLE_SIZE-1 - d->m_page_last_id) * PAGE_SIZE)) : remaining;
+
+          if (lock_dma_buffer (aclpci, d->m_host_addr, lock_size, &d->m_active_mem) != 0) {
+            ACL_DEBUG (KERN_WARNING "Failed lock dma buffer for %u bytes", (unsigned)lock_size);
+            return -EFAULT;
+          }
+          ACL_VERBOSE_DEBUG (KERN_DEBUG "Pinning %u bytes %i pages remaining", (unsigned int)lock_size, d->m_active_mem.pages_rem);
+        } else {
+          d->m_active_mem = d->m_pre_pinned_mem;
+          d->m_pre_pinned_mem.dma.ptr = NULL;
+        }
+        
+        d->m_handle_last = (d->m_active_mem.last_page_offset != 0) ? 1 : 0;
+        
+        // First page offset causes last page to have offset when max number of pages is pinned
+        if ((d->m_active_mem.pages_rem > (ACL_PCIE_DMA_PAGES_LOCKED)) && d->m_handle_last) {
+          d->m_active_mem.pages_rem--;
+          d->m_handle_last = 0;
+        }
+        next_page = *(d->m_active_mem.next_page);
+        d->m_cur_dma_addr = page_to_phys (next_page);
+      }
+      
+      single_page = (d->m_active_mem.pages_rem == 1) ? 1 : 0;
+      
+      first_size = PAGE_SIZE;
+      first_size = (single_page) ? remaining : PAGE_SIZE - d->m_active_mem.first_page_offset;
+      first_size = (first_size > PAGE_SIZE) ? PAGE_SIZE : first_size;
+      
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "single_page %i :: remaining %u :: first_size %u :: offset %u", single_page, (unsigned int)remaining, (unsigned int)first_size, d->m_active_mem.first_page_offset);
+      
+      // Handler for non-aligned pages
+      if ((first_size != PAGE_SIZE) && (first_size != 0)) {
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "Handling first page with offset :: Transferring %u bytes :: page start %llx%llx :: offset %u", first_size, d->m_cur_dma_addr >> 32, d->m_cur_dma_addr & 0xffffffff, d->m_active_mem.first_page_offset);
+        result = non_aligned_page_handler(aclpci, (dma_addr_t) (d->m_cur_dma_addr + d->m_active_mem.first_page_offset), d->m_device_addr, first_size, reading);
+
+        if (result != 0) {
+          unlock_all_dma(aclpci);
+          printk(KERN_ERR "aclpci_dma: Failed DMA First Page Transfer\n");
+          return -EFAULT;
+        }
+        return 1;
+      }
+      // Handler for page size transactions
+      if (d->m_active_mem.pages_rem > d->m_handle_last) {
+        result = get_start_id(aclpci, reading, &start_id, &first);
+        if (result != 0) {
+          unlock_all_dma(aclpci);
+          printk(KERN_ERR "aclpci_dma: Failed get start id\n");
+          return -EFAULT;
+        }
+        max_transfer = (d->m_active_mem.pages_rem - d->m_handle_last > ACL_PCIE_DMA_TABLE_SIZE - start_id) ?
+                ACL_PCIE_DMA_TABLE_SIZE - start_id : d->m_active_mem.pages_rem - d->m_handle_last;
+        wmb();
+
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "Doing full table transfer :: pcie addr %llx%llx :: device addr %llx%llx", (u32) (d->m_cur_dma_addr >> 32), (u32) (d->m_cur_dma_addr & 0xffffffff), ((u64)(d->m_device_addr)) >> 32, ((u64)(d->m_device_addr)) & 0xffffffff);
+        for (i = 0; i < max_transfer; i++) {
+          if (reading) {
+            set_write_desc(&d->desc_table_wr_cpu_virt_addr->descriptors[i], (u64)d->m_device_addr, (dma_addr_t) d->m_cur_dma_addr, PAGE_SIZE/4, i+start_id);
+            ++d->m_active_mem.next_page;
+            ++d->m_active_mem.next_dma_addr;
+            d->m_device_addr += PAGE_SIZE;
+            next_page = *(d->m_active_mem.next_page);
+            d->m_cur_dma_addr = page_to_phys (next_page);
+          } else {
+            set_read_desc(&d->desc_table_rd_cpu_virt_addr->descriptors[i], (dma_addr_t) d->m_cur_dma_addr, (u64)d->m_device_addr, PAGE_SIZE/4, i+start_id);
+            ++d->m_active_mem.next_page;
+            ++d->m_active_mem.next_dma_addr;
+            d->m_device_addr += PAGE_SIZE;
+            next_page = *(d->m_active_mem.next_page);
+            d->m_cur_dma_addr = page_to_phys (next_page);
+          }
+        }
+        d->m_bytes_sent += PAGE_SIZE*max_transfer;
+        d->m_host_addr += PAGE_SIZE*max_transfer;
+        d->m_active_mem.pages_rem -= max_transfer;
+        remaining -= PAGE_SIZE*max_transfer;
+        
+        last_id = max_transfer + start_id - 1;
+        d->m_page_last_id = last_id;
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "Transfer pages start id = %i :: last id = %i :: max_transfer %i :: num pages %i", start_id, last_id, max_transfer, dma->num_pages);
+        
+        d->m_us_valid = 1;
+        do_gettimeofday(&(d->m_us_dma_start_time));
+        send_dma_desc(aclpci, reading, first, last_id, 0);
+        
+        // pre-pin/unpin memory. Coupled with above pinning of memory.
+        if (d->m_done_mem.dma.ptr != NULL) {
+          unlock_dma_buffer (aclpci, &(d->m_done_mem.dma));
+        }
+        if (remaining > 0 && d->m_active_mem.pages_rem == 0) {
+          lock_size = (remaining > ((ACL_PCIE_DMA_PAGES_LOCKED * PAGE_SIZE) + ((ACL_PCIE_DMA_TABLE_SIZE - d->m_page_last_id) * PAGE_SIZE))) ?
+                    ((ACL_PCIE_DMA_PAGES_LOCKED * PAGE_SIZE) + ((ACL_PCIE_DMA_TABLE_SIZE-1 - d->m_page_last_id) * PAGE_SIZE)) : remaining;
+
+          if (lock_dma_buffer (aclpci, d->m_host_addr, lock_size, &d->m_pre_pinned_mem) != 0) {
+            // Don't EFAULT, since this will be re-tried on next interrupt.
+            ACL_DEBUG (KERN_WARNING "Failed lock dma buffer for %u bytes", (unsigned)lock_size);
+            return 1;
+          }
+        
+          ACL_VERBOSE_DEBUG (KERN_DEBUG "Pre-pinning %u bytes %i pages remaining", (unsigned int)lock_size, d->m_pre_pinned_mem.pages_rem);
+        }
+          
+        return 1;
+      } // end :: if (remaining pages > 0)
+   } // end :: if (remaining > 0)
+   
+   return 0;
+}
+
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
+void wq_func_dma_update(void *data){
+   struct aclpci_dev *aclpci = (struct aclpci_dev *)data;
+#else
+void wq_func_dma_update(struct work_struct *pwork){
+   struct work_struct_t * my_work_struct_t = container_of(pwork, struct work_struct_t, work);
+   struct aclpci_dev *aclpci = (struct aclpci_dev *)my_work_struct_t->data;
+#endif
+
+   aclpci_dma_update(aclpci, 1);
+   
+   return;
+}
+
+
+int hostch_buffer_lock(struct aclpci_dev *aclpci, void *addr, ssize_t len, struct pinned_mem *active_mem, int direction) {
+  int ret;
+  ssize_t start_page, end_page, num_pages;
+  struct dma_t *dma = &(active_mem->dma);
+
+  dma->ptr = addr;
+  dma->len = len;
+  dma->dir = direction ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE;
+  /* num_pages that [addr, addr+len] map to. */
+  start_page = (ssize_t)addr >> PAGE_SHIFT;
+  end_page = ((ssize_t)addr + len - 1) >> PAGE_SHIFT;
+  num_pages = end_page - start_page + 1;
+  
+  dma->num_pages = num_pages;
+  dma->pages = (struct page**)kzalloc ( sizeof(struct page*) * dma->num_pages, GFP_KERNEL );
+  if (dma->pages == NULL) {
+    ACL_DEBUG (KERN_WARNING "Couldn't allocate array of %u ptrs!", dma->num_pages);
+    return -EFAULT;
+  }
+  
+  dma->dma_addrs = (dma_addr_t*)kzalloc ( sizeof(dma_addr_t) * dma->num_pages, GFP_KERNEL );
+  if (dma->dma_addrs == NULL) {
+    ACL_DEBUG (KERN_WARNING "Couldn't allocate array of %u dma_addr_t's!", dma->num_pages);
+    return -EFAULT;
+  }
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "pages = [%p, %p), dma_addrs = [%p, %p)", 
+                     dma->pages, dma->pages+num_pages, dma->dma_addrs, dma->dma_addrs+num_pages);
+  
+  /* pin user memory and get set of physical pages back in 'p' ptr. */
+  ret = aclpci_get_user_pages(aclpci->user_task, (unsigned long)addr & PAGE_MASK, num_pages, dma->pages);
+  if (ret != 0) {
+    ACL_DEBUG (KERN_WARNING "Couldn't pin all user pages. %d!\n", ret);
+    return -EFAULT;
+  }
+  
+  active_mem->pages_rem = dma->num_pages;
+  active_mem->next_page = dma->pages;
+  
+  return 0;
+}
+
+// Poll DMA transfer
+// Only used during host channel create
+// Used to transfer the page table of pinned down MMD circular buffer to host channel IP
+// The size of this transfer is known to be small
+void poll_wait(struct aclpci_dev *aclpci, int reading) {
+   unsigned int timer;
+   struct aclpci_dma *d = &(aclpci->dma_data);
+   int dma_update = 0, dma_last_id;
+   
+   void *dma_desc_base = get_dma_desc_offset(aclpci);
+   
+   while(1) {
+     timer = ACL_PCIE_DMA_TIMEOUT;
+     while ( timer > 0) {
+        if (reading) {
+           if (d->dma_wr_last_id < 128) {
+             dma_last_id = d->dma_wr_last_id;
+             dma_update = (d->desc_table_wr_cpu_virt_addr->header.flags[dma_last_id]);
+           } else {
+             dma_update = 0;
+           }
+        } else {
+           if (d->dma_rd_last_id < 128) {
+             dma_last_id = d->dma_rd_last_id;
+             dma_update = (d->desc_table_rd_cpu_virt_addr->header.flags[dma_last_id]);
+           } else {
+             dma_update = 0;
+           }
+        }
+        if (dma_update != 0) {
+          if (reading)
+            iowrite32 (ACL_PCIE_DMA_ENABLE_INT, dma_desc_base+ACL_PCIE_DMA_WR_INT_CONTROL);
+          else
+            iowrite32 (ACL_PCIE_DMA_ENABLE_INT, dma_desc_base+ACL_PCIE_DMA_RD_INT_CONTROL);
+          return;
+        }
+        timer--;
+        
+        // Delay the CPU from checking the memory for 1us. CPU is still running this thread,
+        // but reduces memory access from CPU
+        udelay(1);
+     }
+     
+     // If DMA hasn't finished yet, free up the CPU for 1ms
+     printk("Poll wait failed while transferring host channel page table to IP. Sleeping for 1ms.\n");
+     if (timer == 0)
+       msleep(1);
+   }
+}
+
+// Set IP's parameters for host channel.
+// Parameters are txs address to write updated front/end pointer to on host memory,
+// Address to DMA data to, to stream data into kernel
+void aclpci_dma_hostch_start(struct aclpci_dev *aclpci, int channel)
+{
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  void *dma_desc_base;
+  
+  struct page *next_page;
+  
+  dma_desc_base = get_dma_desc_offset(aclpci);
+  
+  if (channel == (int) ACL_HOST_CHANNEL_0_ID) {
+    next_page = *(h->m_hostch_rd_pointer.next_page);
+    h->user_rd_front_pointer_bus_addr = page_to_phys (next_page);
+    
+    iowrite32 ((dma_addr_t)h->user_rd_front_pointer_bus_addr, dma_desc_base+ACL_HOST_CHANNEL_0_TXS_ADDR_LOW);
+    iowrite32 (((dma_addr_t)h->user_rd_front_pointer_bus_addr)>>32, dma_desc_base+ACL_HOST_CHANNEL_0_TXS_ADDR_HIGH);
+
+    iowrite32 (ACL_HOST_CHANNEL_0_DMA_ADDR&0xffffffff, dma_desc_base+ACL_HOST_CHANNEL_0_IP_ADDR_LOW);
+    iowrite32 (ACL_HOST_CHANNEL_0_DMA_ADDR>>32, dma_desc_base+ACL_HOST_CHANNEL_0_IP_ADDR_HIGH);
+    
+    iowrite32 (h->buffer_size, dma_desc_base+ACL_HOST_CHANNEL_0_BUF_SIZE);
+    
+    iowrite32 (0, dma_desc_base+ACL_HOST_CHANNEL_0_HOST_ENDP);
+    iowrite32 (1, dma_desc_base+ACL_HOST_CHANNEL_0_LOGIC_EN);
+  } else if (channel == (int) ACL_HOST_CHANNEL_1_ID) {  
+    next_page = *(h->m_hostch_wr_pointer.next_page);
+    h->user_wr_end_pointer_bus_addr = page_to_phys (next_page) + sizeof(size_t);
+  
+    iowrite32 ((dma_addr_t)h->user_wr_end_pointer_bus_addr, dma_desc_base+ACL_HOST_CHANNEL_1_TXS_ADDR_LOW);
+    iowrite32 (((dma_addr_t)h->user_wr_end_pointer_bus_addr)>>32, dma_desc_base+ACL_HOST_CHANNEL_1_TXS_ADDR_HIGH);
+  
+    iowrite32 (ACL_HOST_CHANNEL_1_DMA_ADDR&0xffffffff, dma_desc_base+ACL_HOST_CHANNEL_1_IP_ADDR_LOW);
+    iowrite32 (ACL_HOST_CHANNEL_1_DMA_ADDR>>32, dma_desc_base+ACL_HOST_CHANNEL_1_IP_ADDR_HIGH);
+  
+    iowrite32 (h->buffer_size, dma_desc_base+ACL_HOST_CHANNEL_1_BUF_SIZE);
+  
+    iowrite32 (0, dma_desc_base+ACL_HOST_CHANNEL_1_HOST_FRONTP);
+    iowrite32 (1, dma_desc_base+ACL_HOST_CHANNEL_1_LOGIC_EN);
+  }
+}
+
+void aclpci_dma_hostch_thread_sync(struct aclpci_dev *aclpci, void *user_addr)
+{
+  int status;
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  if ((user_addr == NULL) & (h->thread_sync_valid)) {
+    if ((h->push_valid | h->pull_valid) && d->m_idle && (*h->user_thread_sync == 0)) {
+      h->loop_counter = HOSTCH_LOOP_COUNTER;
+      queue_work(d->my_wq, &d->my_work->work);
+      *h->user_thread_sync = 1;
+    }
+  } else {
+    status = hostch_buffer_lock(aclpci, user_addr, sizeof(size_t), &(h->m_sync_thread_pointer), 1);
+    h->user_thread_sync = ((size_t *) vmap(h->m_sync_thread_pointer.next_page, 1, VM_MAP, PAGE_KERNEL));
+    h->loop_counter = HOSTCH_LOOP_COUNTER;
+    *h->user_thread_sync = 0;
+    h->thread_sync_valid = 1;
+  }
+}
+
+int aclpci_dma_hostch_create(struct aclpci_dev *aclpci,
+                              void *user_addr,
+                              void *buf_pointer,
+                              size_t size,
+                              int reading)
+{
+  int status, i;
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  void *dma_desc_base;
+  
+  int start_id, first, page_read;
+  struct page *next_page;
+  
+  dma_addr_t dma_address;
+  
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "creating hostch in driver for size %u", (unsigned) size);
+  
+  h->buffer_size = size;
+  
+  setup_dma_desc(aclpci);
+  
+  dma_desc_base = get_dma_desc_offset(aclpci);
+  d->dma_rd_last_id = ioread32(dma_desc_base+ACL_PCIE_DMA_RD_LAST_PTR);
+  d->dma_wr_last_id = ioread32(dma_desc_base+ACL_PCIE_DMA_WR_LAST_PTR);
+  
+  // Only create push channel if it's not already open
+  if (reading && !h->push_valid) {
+    h->user_rd_buffer = user_addr;
+    
+    // Pin push user buffer
+    status = hostch_buffer_lock(aclpci, user_addr, size, &(h->m_hostch_rd_mem), reading);
+    status |= hostch_buffer_lock(aclpci, buf_pointer, 2*sizeof(size_t), &(h->m_hostch_rd_pointer), 1); 
+    
+    if (status != 0) {
+      printk("Failed to lock host channel buffer\n");
+      return status;
+    }
+  
+    // Map circular push buffer's end pointer so that the driver can poll on it for update from user space
+    h->user_rd_front_pointer = ((size_t *) vmap(h->m_hostch_rd_pointer.next_page, 1, VM_MAP, PAGE_KERNEL));
+    h->user_rd_end_pointer = h->user_rd_front_pointer + 1;
+    
+    ACL_VERBOSE_DEBUG (KERN_DEBUG "user rd front pointer = %u :: user rd end pointer = %u", (unsigned) *(h->user_rd_front_pointer), (unsigned) *(h->user_rd_end_pointer));
+    
+    // Send the circular push buffer's pinned address to IP, so IP can initiate DMA transfer by itself.
+    for (i = 0; i < (size/PAGE_SIZE); i++) {
+       next_page = *(h->m_hostch_rd_mem.next_page + i);
+       dma_address = page_to_phys (next_page);
+       set_page_entry(&(h->push_page_table->page_entry[i]), (u64) dma_address, (u32) i);
+       ACL_VERBOSE_DEBUG (KERN_DEBUG "push page entry[%u] = %#016x", (unsigned) i, (u64) dma_address);
+    }
+    
+    first = 0;
+    page_read = 0;
+    
+    get_start_id (aclpci, page_read, &start_id, &first);
+    
+    set_read_desc(&d->desc_table_rd_cpu_virt_addr->descriptors[0], (dma_addr_t) (h->push_page_table_bus_addr), (u64)(ACL_PCIE_DMA_RD_FIFO_BASE), (32*size/PAGE_SIZE)/4, start_id);
+    send_dma_desc(aclpci, page_read, 0, start_id, 1);
+    
+    poll_wait(aclpci, page_read);
+    
+    // Reset and enable the push channel on IP
+    writel(0, get_hostch_control_addr_push(aclpci));
+    readl(get_hostch_control_addr_push(aclpci));
+    
+    writel(1, get_hostch_control_addr_push(aclpci));
+    readl(get_hostch_control_addr_push(aclpci));
+    
+    // Set IP's control registers for push channel
+    aclpci_dma_hostch_start(aclpci, (int) ACL_HOST_CHANNEL_0_ID);
+    
+    h->push_valid = 1;
+    
+    // Only launch queue if pull channel is not open and if there is no DMA transfer
+    if (!h->pull_valid && d->m_idle) {
+      if( !queue_work(d->my_wq, &d->my_work->work) ){
+         printk("fail to schedule the work\n");
+      }
+    }
+    
+    return 0;
+  } else if ((reading == 0) && !h->pull_valid) {
+    h->user_wr_buffer = user_addr;
+    
+    // Pin user's pull buffer
+    status = hostch_buffer_lock(aclpci, user_addr, size, &(h->m_hostch_wr_mem), reading);
+    status |= hostch_buffer_lock(aclpci, buf_pointer, 2*sizeof(size_t), &(h->m_hostch_wr_pointer), 1);
+    
+    if (status != 0) {
+      printk("Failed to lock host channel buffer\n");
+      return status;
+    }
+    
+    // Map circular pull buffer's end pointer so that the driver can poll on it for update from user space
+    h->user_wr_front_pointer = ((size_t *) vmap(h->m_hostch_wr_pointer.next_page, 1, VM_MAP, PAGE_KERNEL));
+    h->user_wr_end_pointer = h->user_wr_front_pointer + 1;
+    
+    ACL_VERBOSE_DEBUG (KERN_DEBUG "user wr front pointer = %u :: user wr end pointer = %u", (unsigned) *(h->user_wr_front_pointer), (unsigned) *(h->user_wr_end_pointer));
+    
+    // Send the circular pull buffer's pinned address to IP, so IP can initiate DMA transfer by itself.
+    for (i = 0; i < (size/PAGE_SIZE); i++) {
+       next_page = *(h->m_hostch_wr_mem.next_page + i);
+       dma_address = page_to_phys (next_page);
+       set_page_entry(&(h->pull_page_table->page_entry[i]), (u64) dma_address, (u32) i);
+       ACL_VERBOSE_DEBUG (KERN_DEBUG "pull page entry[%u] = %#016x", (unsigned) i, (u64) dma_address);
+    }
+    
+    first = 0;
+    page_read = 0;
+    
+    get_start_id (aclpci, page_read, &start_id, &first);
+    
+    set_read_desc(&d->desc_table_rd_cpu_virt_addr->descriptors[0], (dma_addr_t) (h->pull_page_table_bus_addr), (u64)(ACL_PCIE_DMA_WR_FIFO_BASE), (32*size/PAGE_SIZE)/4, start_id);
+    send_dma_desc(aclpci, page_read, 0, start_id, 1);
+    
+    poll_wait(aclpci, page_read);
+    
+    // Reset and enable the pull channel on IP
+    writel(0, get_hostch_control_addr_pull(aclpci));
+    readl(get_hostch_control_addr_pull(aclpci));
+     
+    writel(1, get_hostch_control_addr_pull(aclpci));
+    readl(get_hostch_control_addr_pull(aclpci));
+    
+    // Set IP's control registers for pull channel
+    aclpci_dma_hostch_start(aclpci, (int) ACL_HOST_CHANNEL_1_ID);
+   
+    ACL_VERBOSE_DEBUG (KERN_DEBUG "Creating Pull buffer.");
+    
+    h->pull_valid = 1;
+    
+    // Only launch queue if push channel is not open and if there is no DMA transfer
+    if (!h->push_valid && d->m_idle) {
+      if( !queue_work(d->my_wq, &d->my_work->work) ){
+         printk("fail to schedule the work\n");
+      }
+    }
+    
+    return 0;
+  } else {
+    return ERROR_INVALID_CHANNEL;
+  }
+  
+  
+  if (status != 0)
+    return status;
+
+  return 0;
+}
+
+// Destroy channel call from user.
+// Unlock all buffers and reset IP
+int aclpci_dma_hostch_destroy(struct aclpci_dev *aclpci, int reading) {
+  struct aclpci_dma *d = &(aclpci->dma_data);
+  struct aclpci_hostch_desc *h = &(d->hostch_data);
+  
+  void *dma_desc_base;
+  dma_desc_base = get_dma_desc_offset(aclpci);
+  
+  if (reading) {
+    if (h->pull_valid) {
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "destroying pull host channel.");
+      iowrite32 (0, dma_desc_base+ACL_HOST_CHANNEL_0_LOGIC_EN);
+      mb();
+      writel(0, get_hostch_control_addr_pull(aclpci));
+      mb();
+      
+      if (h->m_hostch_wr_mem.dma.ptr != NULL)
+        unlock_dma_buffer (aclpci, &(h->m_hostch_wr_mem.dma));
+      if (h->m_hostch_wr_pointer.dma.ptr != NULL)
+        unlock_dma_buffer (aclpci, &(h->m_hostch_wr_pointer.dma));
+      h->pull_valid = 0;
+      
+      if (!h->push_valid) {
+        if (h->thread_sync_valid) {
+          h->thread_sync_valid = 0;
+          if (h->m_sync_thread_pointer.dma.ptr != NULL)
+            unlock_dma_buffer (aclpci, &(h->m_sync_thread_pointer.dma));
+        }
+        if (d->m_idle)
+          flush_workqueue(d->my_wq);
+      }
+    }
+  } else if (!reading) {
+      if (h->push_valid) {
+        ACL_VERBOSE_DEBUG (KERN_DEBUG "destroying push host channel.");
+        iowrite32 (0, dma_desc_base+ACL_HOST_CHANNEL_1_LOGIC_EN);
+        mb();
+        writel(0, get_hostch_control_addr_push(aclpci));
+        mb();
+        
+        if (h->m_hostch_rd_mem.dma.ptr != NULL)
+          unlock_dma_buffer (aclpci, &(h->m_hostch_rd_mem.dma));
+        if (h->m_hostch_rd_pointer.dma.ptr != NULL)
+          unlock_dma_buffer (aclpci, &(h->m_hostch_rd_pointer.dma));
+        h->push_valid = 0;
+        
+        if (!h->pull_valid) {
+          if (h->thread_sync_valid) {
+            h->thread_sync_valid = 0;
+            if (h->m_sync_thread_pointer.dma.ptr != NULL)
+              unlock_dma_buffer (aclpci, &(h->m_sync_thread_pointer.dma));
+          }
+          if (d->m_idle)
+            flush_workqueue(d->my_wq);
+        }
+      }
+  }
+
+  return 0;
+}
+
+int read_write
+(
+   struct aclpci_dev *aclpci, 
+   void* src,
+   void *dst,
+   size_t bytes,
+   int reading
+)
+{  
+   size_t dev_addr;
+   void *dma_desc_base;
+   struct aclpci_dma *d = &(aclpci->dma_data);
+
+    // TODO: For now, only handle one transfer at a time
+   assert(d->m_active_mem.dma.ptr == NULL);
+
+   // Copy the parameters over and mark the job as running
+   d->m_read = reading;
+   d->m_bytes = (bytes);
+   assert(d->m_bytes == bytes);
+   d->m_host_addr = reading ? dst : src;
+   dev_addr = (size_t)(reading ? src : dst);
+   d->m_device_addr = (size_t)(dev_addr);
+   d->m_page_last_id = 127;
+   
+   //Keep local copy of last_id for current transfer. We don't have to read from pcie every table.
+   dma_desc_base = get_dma_desc_offset(aclpci);
+   if (reading) {
+     d->dma_wr_last_id = ioread32(dma_desc_base+ACL_PCIE_DMA_WR_LAST_PTR);
+   } else {
+     d->dma_rd_last_id = ioread32(dma_desc_base+ACL_PCIE_DMA_RD_LAST_PTR);
+   }
+
+   // Start processing the request
+   d->m_bytes_sent = 0;
+   
+   d->m_update_time = 0;
+   d->m_pin_time = d->m_lock_time = d->m_unlock_time = 0;
+   d->m_start_time = get_jiffies_64();
+   
+   ACL_VERBOSE_DEBUG (KERN_DEBUG "Entered DMA for src: %llx dst: %llx reading: %i bytes: %u\n", src, dst, reading, bytes);
+   
+   d->m_idle = 0;
+   d->m_dma_ready = 1;
+
+   if( !queue_work(d->my_wq, &d->my_work->work) ){
+      printk("fail to schedule the work\n");
+   }
+   
+   return 1;
+}
+
+
+#else // USE_DMA is 0
+
+irqreturn_t aclpci_dma_service_interrupt (struct aclpci_dev *aclpci) {
+  return IRQ_HANDLED;
+}
+ssize_t aclpci_dma_rw (struct aclpci_dev *aclpci, 
+                       void *dev_addr, void __user* user_addr, 
+                       ssize_t len, int reading) {return 0; }
+void aclpci_dma_init(struct aclpci_dev *aclpci) {}
+void aclpci_dma_finish(struct aclpci_dev *aclpci) {}
+int aclpci_dma_get_idle_status(struct aclpci_dev *aclpci) { return 1; }
+
+#endif // USE_DMA
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.h
new file mode 100755
index 0000000000000000000000000000000000000000..c5133276d1e7ed59fbad5b045f002facacf6b4a8
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_dma.h
@@ -0,0 +1,210 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Defines used only by aclpci_dma.c. */
+
+
+#if USE_DMA
+
+/* Enable Linux-specific defines in the hw_pcie_dma.h file */
+#define LINUX
+#include <linux/workqueue.h>
+#include "hw_pcie_dma.h"
+#include "hw_host_channel.h"
+#include "aclpci_queue.h"
+
+struct dma_t {
+  void *ptr;         /* if ptr is NULL, the whole struct considered invalid */
+  size_t len;
+  enum dma_data_direction dir;
+  struct page **pages;     /* one for each struct page */
+  dma_addr_t *dma_addrs;   /* one for each struct page */
+  unsigned int num_pages;
+};
+
+struct pinned_mem {
+  struct dma_t dma;
+  struct page **next_page;
+  dma_addr_t *next_dma_addr;
+  unsigned int pages_rem;
+  unsigned int first_page_offset;
+  unsigned int last_page_offset;
+};
+
+struct work_struct_t{
+  struct work_struct work;
+  void *data;
+};
+
+struct hostch_entry {                  
+  u32 page_addr_ldw;
+  u32 page_addr_udw;
+  u32 page_num;
+  u32 reserved[5];
+} __attribute__ ((packed));
+
+struct hostch_table {
+  struct hostch_entry page_entry[4096];
+} __attribute__ ((packed));
+
+
+struct aclpci_hostch_desc {
+  size_t buffer_size;
+  unsigned int loop_counter;
+  
+  int push_valid;
+  int pull_valid;
+  
+  // User memory circular buffer
+  void *user_rd_buffer;
+  void *user_wr_buffer;
+  
+  struct hostch_table *push_page_table;
+  struct hostch_table *pull_page_table;
+
+  dma_addr_t push_page_table_bus_addr;
+  dma_addr_t pull_page_table_bus_addr;
+  
+  struct pinned_mem m_hostch_rd_mem;
+  struct pinned_mem m_hostch_wr_mem;
+  
+  // User memory circular buffer front and end pointers
+  size_t *user_rd_front_pointer;
+  size_t *user_rd_end_pointer;
+  size_t *user_wr_front_pointer;
+  size_t *user_wr_end_pointer;
+  
+  dma_addr_t user_rd_front_pointer_bus_addr;
+  dma_addr_t user_wr_end_pointer_bus_addr;
+  
+  struct pinned_mem m_hostch_rd_pointer;
+  struct pinned_mem m_hostch_wr_pointer;
+  
+  // keep track of push end pointer
+  size_t rd_buf_end_pointer;
+  
+  // keep track of pull front pointer
+  size_t wr_buf_front_pointer;
+  
+  // User and driver thread synchronizer
+  int thread_sync_valid;
+  size_t *user_thread_sync;
+  
+  dma_addr_t user_thread_sync_bus_addr;
+  
+  struct pinned_mem m_sync_thread_pointer;
+  
+};
+
+struct dma_desc_entry {                  
+  u32 src_addr_ldw;
+  u32 src_addr_udw;
+  u32 dest_addr_ldw;
+  u32 dest_addr_udw;
+  u32 ctl_dma_len;
+  u32 reserved[3];
+} __attribute__ ((packed));
+
+struct dma_desc_header {
+    volatile u32 flags[ACL_PCIE_DMA_DESC_MAX_ENTRIES];
+} __attribute__ ((packed));
+
+
+struct dma_desc_table {
+  struct dma_desc_header header;
+    struct dma_desc_entry descriptors[ACL_PCIE_DMA_DESC_MAX_ENTRIES];
+} __attribute__ ((packed));
+
+struct aclpci_dma {
+
+  // hostchannel struct
+  struct aclpci_hostch_desc hostch_data;
+
+  // Pci-E DMA IP description table
+  struct dma_desc_table *desc_table_rd_cpu_virt_addr;
+  struct dma_desc_table *desc_table_wr_cpu_virt_addr;
+
+  dma_addr_t desc_table_rd_bus_addr;
+  dma_addr_t desc_table_wr_bus_addr;
+
+  // Local copy of last transfer id. Read once when DMA transfer starts
+  int dma_rd_last_id;
+  int dma_wr_last_id;
+  int m_page_last_id;
+
+  // Pinned memory we're currently building DMA transactions for
+  struct pinned_mem m_active_mem;
+  struct pinned_mem m_pre_pinned_mem;
+  struct pinned_mem m_done_mem;
+
+  // The transaction we are currently working on
+  unsigned long m_cur_dma_addr;
+  int m_handle_last;
+
+  struct pci_dev *m_pci_dev;
+  struct aclpci_dev *m_aclpci;
+
+  // workqueue and work structure for bottom-half interrupt routine
+  struct workqueue_struct *my_wq;
+  struct work_struct_t *my_work;
+  
+  // Transfer information
+  size_t m_device_addr;
+  void* m_host_addr;
+  int m_read;
+  size_t m_bytes;
+  size_t m_bytes_sent;
+  int m_idle;
+  int m_dma_ready;
+
+  u64 m_update_time, m_pin_time, m_start_time;
+  u64 m_lock_time, m_unlock_time;
+  
+  // Time measured to us accuracy to measure DMA transfer time
+  struct timeval m_us_dma_start_time;
+  int m_us_valid;
+};
+
+#else
+struct aclpci_dma {};
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_fileio.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_fileio.c
new file mode 100755
index 0000000000000000000000000000000000000000..be5b4b060afdab1c730f20737ddc84aa3e9ea8da
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_fileio.c
@@ -0,0 +1,626 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+/* Implementation of all I/O functions except DMA transfers.
+ * See aclpci_dma.c for DMA code.
+ */
+
+#include <linux/jiffies.h>
+#include <linux/sched.h>
+#include <asm/io.h> // __raw_write, __raw_read
+#include "aclpci.h"
+
+
+static ssize_t aclpci_rw_large (void *dev_addr, void __user* use_addr, ssize_t len, char *buffer, int reading, int access_le);
+
+
+
+/* Given (bar_id, device_addr) pair, make sure they're valid and return
+ * the resulting address. errno will contain error code, if any. */
+void* aclpci_get_checked_addr (int bar_id, void *device_addr, size_t count,
+                               struct aclpci_dev *aclpci, ssize_t *errno,
+                               int print_error_msg) {
+
+  if (bar_id >= ACL_PCI_NUM_BARS) {
+    ACL_DEBUG (KERN_WARNING "Requested read/write from BAR #%d. Only have %d BARs!",
+               bar_id, ACL_PCI_NUM_BARS);
+    *errno = -EFAULT;
+    return 0;
+  }
+  /* Make sure the final address is within range */
+  if ((count) > (unsigned long) aclpci->bar_length[bar_id]) {
+    if (print_error_msg) {
+      ACL_DEBUG (KERN_WARNING "Requested read/write from BAR #%d from range (0x%lx, 0x%lx). Length is %lu. BAR length is only %lu!",
+                 bar_id, 
+                 (unsigned long)device_addr,
+                 (unsigned long)device_addr + count, 
+                 count,
+                 aclpci->bar_length[bar_id]);
+    }
+    *errno = -EFAULT;
+    return 0;
+  }
+
+  *errno = 0;
+  return (void*)(aclpci->bar[bar_id] + (unsigned long)device_addr);  
+}
+
+/* Check that device address is within host control address range */
+static int address_range_check(int bar_id, void *device_addr, size_t count,
+                              struct aclpci_dev *aclpci) {
+  unsigned long bar4_start = (unsigned long) aclpci->bar[ACL_HOST_CTRL_BAR];
+  unsigned long bar4_end = (unsigned long) aclpci->bar[ACL_HOST_CTRL_BAR] + aclpci->bar_length[ACL_HOST_CTRL_BAR] - 1;
+  unsigned long first_device_addr = (unsigned long) aclpci->bar[bar_id] + (unsigned long) device_addr;
+  unsigned long last_device_addr = (unsigned long) aclpci->bar[bar_id] + (unsigned long) device_addr + count - 1;
+  
+  if ((first_device_addr >= bar4_start) && (last_device_addr <= bar4_end)) {
+    return 1;
+  }
+  
+  return 0;
+}
+
+
+/* Compute address that contains memory window segment control */
+static void *get_segment_ctrl_addr (struct aclpci_dev *aclpci) {
+
+  void *dev_addr = 0;
+  ssize_t errno = 0;
+  void *ctrl_addr = (void*) (ssize_t)ACL_PCIE_MEMWINDOW_CRA;
+
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "get_segment_ctrl_addr ctrl_addr = %llx.", ctrl_addr);
+  dev_addr = aclpci_get_checked_addr (ACL_PCIE_MEMWINDOW_BAR, ctrl_addr, sizeof(u64), aclpci, &errno, 1);
+  if (errno != 0) {
+    ACL_DEBUG (KERN_DEBUG "ERROR: ctrl_addr %p failed check", ctrl_addr);
+    return NULL;
+  }
+  return dev_addr;
+}
+
+
+static void aclpci_set_segment_by_val (struct aclpci_dev *aclpci, u64 new_val) {
+
+  void *ctrl_addr =  aclpci->global_mem_segment_addr;
+  if (ctrl_addr == NULL) {
+    return;
+  }
+  
+  if (new_val != aclpci->global_mem_segment) {
+    writeq (new_val, ctrl_addr);
+    aclpci->global_mem_segment = new_val;
+  }
+  ACL_VERBOSE_DEBUG (KERN_DEBUG " Changed global memory segment to %llu.", new_val);
+}
+
+
+/* Response to user's open() call */
+int aclpci_open(struct inode *inode, struct file *file) {
+
+  struct aclpci_dev *aclpci = 0;
+  int result = 0;
+  /* pointer to containing data structure of the character device inode */
+  aclpci = container_of(inode->i_cdev, struct aclpci_dev, cdev);
+
+  spin_lock(&aclpci->lock);
+  if (aclpci->num_handles_open) {
+      printk("Device already in use\n");
+      spin_unlock(&aclpci->lock);
+      result = -EBUSY;
+      goto done;
+  }
+  
+  if (down_interruptible(&aclpci->sem)) {
+    return -ERESTARTSYS;
+  }
+  /* create a reference to our device state in the opened file */
+  file->private_data = aclpci;
+  ACL_DEBUG (KERN_DEBUG "aclpci = %p, pid = %d (%s)", 
+             aclpci, current->pid, current->comm); 
+  
+  aclpci->user_pid = current->pid;
+  aclpci->user_task = current;
+
+  aclpci->global_mem_segment = 0;
+  aclpci->saved_kernel_irq_mask = 0;
+  aclpci->global_mem_segment_addr = get_segment_ctrl_addr(aclpci);
+#if 0
+  if (aclpci->user_pid == -1) {
+    aclpci->user_pid = current->pid;
+  } else {
+    ACL_DEBUG (KERN_WARNING "Tried open() by pid %d. Already opened by %d", current->pid, aclpci->user_pid);
+    result = -EFAULT;
+    goto done;
+  }
+#endif
+
+  if (init_irq (aclpci->pci_dev, aclpci)) {
+    ACL_DEBUG (KERN_WARNING "Could not allocate IRQ!");
+    result = -EFAULT;
+    goto done;
+  }
+
+  load_signal_info (aclpci);
+  #if !POLLING
+    if (aclpci->user_task == NULL) {
+      ACL_DEBUG (KERN_WARNING "Tried open() by pid %d but couldn't find associated task_info", current->pid);
+      result = -EFAULT;
+      goto done;
+    }
+  #endif
+  
+  ++aclpci->num_handles_open;
+  spin_unlock(&aclpci->lock);
+  
+  result = 0;
+  
+done:
+  up (&aclpci->sem);
+  return result;
+}
+
+
+/* Response to user's close() call. Will also be called by the kernel
+ * if the user process dies for any reason. */
+int aclpci_close(struct inode *inode, struct file *file) {
+
+  ssize_t result = 0;
+  struct aclpci_dev *aclpci = (struct aclpci_dev *)file->private_data;
+  ACL_DEBUG (KERN_DEBUG "aclpci = %p, pid = %d, dma_idle = %d",
+             aclpci, current->pid, aclpci_dma_get_idle_status(aclpci)); 
+  
+  if (down_interruptible(&aclpci->sem)) {
+    return -ERESTARTSYS;
+  }
+
+#if 0  
+  if (aclpci->user_pid == current->pid) {
+    aclpci->user_pid = -1;
+  } else {
+    ACL_DEBUG (KERN_WARNING "Tried close() by pid %d. Opened by %d", current->pid, aclpci->user_pid);
+    result = -EFAULT;
+    goto done;
+  }
+#endif
+  --aclpci->num_handles_open;
+
+  if (aclpci->num_handles_open == 0) {
+    /* only when all handles are closed, do we perform the device finalization */
+    release_irq (aclpci->pci_dev, aclpci);
+  }
+
+  atomic_set(&aclpci->status, 0);
+  up (&aclpci->sem);
+  return result;
+}
+
+
+/* Read a small number of bytes and put them into user space */
+ssize_t aclpci_read_small (void *read_addr, void __user* dest_addr, ssize_t len, int access_le) {
+
+  ssize_t copy_res = 0;
+  switch (len) {
+  case 1: {
+    u8 d = readb ( read_addr );
+    copy_res = copy_to_user ( dest_addr, &d, sizeof(d) );
+    break;
+  }
+  case 2: {
+    u16 d = access_le ? readw ( read_addr ) : __raw_readw ( read_addr );
+    copy_res = copy_to_user ( dest_addr, &d, sizeof(d) );
+    break;
+  }
+  case 4: {
+    u32 d = access_le ? readl ( read_addr ) : __raw_readl ( read_addr );
+    copy_res = copy_to_user ( dest_addr, &d, sizeof(d) );
+    break;
+  }
+  case 8: {
+    u32 ibuffer[2];
+    if(access_le){
+      ibuffer[0] = readl (((u32*)read_addr));
+      ibuffer[1] = readl (((u32*)read_addr)+1);
+    }else {
+      ibuffer[0] = __raw_readl(((u32*)read_addr));
+      mb();
+      ibuffer[1] = __raw_readl(((u32*)read_addr)+1);
+    }
+
+    copy_res = copy_to_user ( dest_addr, ibuffer, sizeof(ibuffer) );
+    break;
+  }
+  default:
+    break;
+  }
+  
+  if(!access_le){
+    mb();
+  }
+
+  if (copy_res) {
+    return -EFAULT;
+  } else {
+    return 0;
+  }
+}
+
+
+/* Write a small number of bytes taken from user space */
+ssize_t aclpci_write_small (void *write_addr, void __user* src_addr, ssize_t len, int access_le) {
+
+  ssize_t copy_res = 0;
+  switch (len) {
+  case 1: {
+    u8 d;
+    copy_res = copy_from_user ( &d, src_addr, sizeof(d) );
+    writeb ( d, write_addr );
+    break;
+  }
+  case 2: {
+    u16 d;
+    copy_res = copy_from_user ( &d, src_addr, sizeof(d) );
+    if(access_le){
+      writew ( d, write_addr );
+    } else {
+      __raw_writew ( d, write_addr );
+      mb();
+    }
+    break;
+  }
+  case 4: {
+    u32 d;
+    copy_res = copy_from_user ( &d, src_addr, sizeof(d) );
+    if(access_le){
+      writel ( d, write_addr );
+    } else {
+      __raw_writel ( d, write_addr );
+      mb();
+    }
+    break;
+  }
+  case 8: {
+    u32 ibuffer[2];
+    copy_res = copy_from_user (ibuffer, src_addr, sizeof(ibuffer));
+    if(access_le){
+      writel ( ibuffer[0], (u32*)write_addr);
+      writel ( ibuffer[1], ((u32*)write_addr) + 1 );
+    }else {
+      __raw_writel( ibuffer[0], (u32*)write_addr);
+      mb();
+      __raw_writel( ibuffer[1], ((u32*)write_addr) + 1 );
+    }
+    break;
+  }
+  default:
+    break;
+  }
+
+  if (copy_res) {
+    return -EFAULT;
+  } else {
+    return 0;
+  }
+}
+
+
+
+/* Read or Write arbitrary length sequency starting at read_addr and put it into
+ * user space at dest_addr. if 'reading' is set to 1, doing the read. If 0, doing
+ * the write. */
+static ssize_t aclpci_rw_large (void *dev_addr, void __user* user_addr,
+                                  ssize_t len, char *buffer, int reading, int access_le) {
+  size_t bytes_left = len;
+  size_t i, num_missed;
+  u32 *ibuffer = (u32*)buffer;
+  char *cbuffer;
+  size_t offset, num_to_read;
+  size_t chunk = BUF_SIZE;
+  
+  u64 startj, ej;
+  u64 sj = 0, acc_readj = 0, acc_transfj = 0;
+  
+  startj = get_jiffies_64();
+  
+  /* Reading upto BUF_SIZE values, one int at a time, and then transfer
+   * the buffer at once to user space. Repeat as necessary. */
+  while (bytes_left > 0) {
+    if (bytes_left < BUF_SIZE) {
+      chunk = bytes_left;
+    } else {
+      chunk = BUF_SIZE;
+    }
+    
+    if (!reading) {
+      sj = get_jiffies_64();
+      if (copy_from_user (ibuffer, user_addr, chunk)) {
+        return -EFAULT;
+      }
+      acc_transfj += get_jiffies_64() - sj;
+    }
+
+    /* Read one u32 at a time until fill the buffer. Then copy the whole
+     * buffer at once to user space. */
+    sj = get_jiffies_64();
+    num_to_read = chunk / sizeof(u32);
+    for (i = 0; i < num_to_read; i++) {
+      if (reading) {
+        if(access_le){
+          ibuffer[i] = readl (((u32*)dev_addr) + i);
+        }else {
+          ibuffer[i] = __raw_readl(((u32*)dev_addr) + i);
+          mb();
+        }
+      } else {
+        if(access_le){
+          writel ( ibuffer[i], ((u32*)dev_addr) + i );
+        }else {
+          __raw_writel( ibuffer[i], ((u32*)dev_addr) + i );
+          mb();
+        }
+      }
+    }
+    
+    /* If length is not a multiple of sizeof(u32), will miss last few bytes.
+     * In that case, read it one byte at a time. This can only happen on 
+     * last iteration of the while() loop. */
+    offset = num_to_read * sizeof(u32);
+    num_missed = chunk - offset;
+    cbuffer = (char*)(ibuffer + num_to_read);
+    
+    for (i = 0; i < num_missed; i++) {
+      if (reading) {
+        cbuffer[i] = readb ( (u8*)(dev_addr) + offset + i );
+      } else {
+        writeb ( cbuffer[i], (u8*)(dev_addr) + offset + i );
+      }
+    }
+    acc_readj += get_jiffies_64() - sj;
+    
+    if (reading) {
+      sj = get_jiffies_64();
+      if (copy_to_user (user_addr, ibuffer, chunk)) {
+        return -EFAULT;
+      }
+      acc_transfj += get_jiffies_64() - sj;
+    }
+    
+    dev_addr += chunk;
+    user_addr += chunk;
+    bytes_left -= chunk;
+  }
+  
+  ej = get_jiffies_64();
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "Spent %u msec %sing %lu bytes", jiffies_to_msecs(ej - startj), 
+                          reading ? "read" : "writ", len);
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "  Dev access %u msec. User space transfer %u msec",
+                        jiffies_to_msecs(acc_readj),
+                        jiffies_to_msecs(acc_transfj));
+  return 0;
+}
+
+/* Set CRA window so raw_user_ptr is "visible" to the BAR.
+ * Return pointer to use to access the user memory */
+static void* aclpci_set_segment (struct aclpci_dev *aclpci, void * raw_user_ptr) {
+
+  //ssize_t cur_segment = ((ssize_t)raw_user_ptr) / ACL_PCIE_MEMWINDOW_SIZE;  
+  ssize_t cur_segment = ((ssize_t)raw_user_ptr) & ((size_t)1 - (ACL_PCIE_MEMWINDOW_SIZE-1));
+  aclpci_set_segment_by_val (aclpci, cur_segment);  
+
+  /* Can use the return value in all read/write functions in this file now */
+  return (void*)((ssize_t)ACL_PCIE_MEMWINDOW_BASE + ((ssize_t)raw_user_ptr % ACL_PCIE_MEMWINDOW_SIZE));
+}
+
+
+/* Both start and end, user and device addresses must be 
+ * 64-byte aligned to use DMA */
+int aligned_request (struct acl_cmd *cmd, size_t count) {
+  
+  return (( (unsigned long)cmd->user_addr   & DMA_ALIGNMENT_BYTE_MASK) | 
+          ( (unsigned long)cmd->device_addr & DMA_ALIGNMENT_BYTE_MASK) |
+          ( count                           & DMA_ALIGNMENT_BYTE_MASK)
+         ) == 0;
+}                           
+
+
+/* High-level read/write dispatcher.
+ * There are three types of read/write based on bar_id.
+ * If bar id is ACLPCI_CMD_BAR, read/write request is special command to driver.
+ * If bar id is ACLPCI_DMA_BAR, read/write request is DMA request.
+ * All other request should only go to host control on BAR4.
+ */
+ssize_t aclpci_rw(struct file *file, char __user *buf, 
+                  size_t count, loff_t *pos,
+                  int reading) {
+  
+  struct aclpci_dev *aclpci = (struct aclpci_dev *)file->private_data;
+  struct acl_cmd __user *ucmd;
+  struct acl_cmd kcmd;
+  u64 old_segment = 0;
+  int restore_segment = 0;
+  void *addr = 0;
+  int access_le = 0;
+  int aligned = 0;
+  int use_dma = 0;
+  ssize_t result = 0;
+  ssize_t errno = 0;
+  size_t size = 0;
+  int secure_range = 0;
+
+  if (down_interruptible(&aclpci->sem)) {
+    return -ERESTARTSYS;
+  }
+  
+  /* For now we will support the case where processes can all open/close the device
+   * but there is only a single process performing an operation per device 
+   * Here we record the the task that is performing the operation. It is the one who will receive the signals back.
+   */
+  aclpci->user_task = current; 
+
+  ucmd = (struct acl_cmd __user *) buf;
+  if (copy_from_user (&kcmd, ucmd, sizeof(*ucmd))) {
+		result = -EFAULT;
+    goto done;
+	}
+  
+  
+  /* Each command should ensure that the command's memory accesses are secure */
+  size = kcmd.size;
+  if (kcmd.bar_id == ACLPCI_CMD_BAR) {
+    /* This is not a read but a special command. */
+    result = aclpci_exec_cmd (aclpci, kcmd, size);
+    goto done;
+  }
+
+  /* If access_le is true, it explicitly shows that we want to interpret the target memory as 
+   * little-endian. Otherwise, the same endianess as the host will be used. 
+   */
+  access_le = !kcmd.is_diff_endian;
+  
+  /* Only using DMA for large aligned reads/writes on global memory
+   * (due to some assumptions inside the DMA hardware). */
+  aligned = aligned_request (&kcmd, size);
+  use_dma = USE_DMA && (size >= 1024) && 
+            aligned && kcmd.bar_id == ACLPCI_DMA_BAR;
+  ACL_VERBOSE_DEBUG (KERN_DEBUG "\n\n-----------------------");
+  ACL_VERBOSE_DEBUG (KERN_DEBUG " kcmd = {%u, %p, %p}, count = %lu", 
+             kcmd.bar_id, (void*)kcmd.device_addr, (void*)kcmd.user_addr, size);
+
+  if (!use_dma) {
+    /* Do bounds checking on addresses, for DMA we don't know memory size */
+    if (kcmd.bar_id != ACLPCI_DMA_BAR) {
+      addr = aclpci_get_checked_addr (kcmd.bar_id, kcmd.device_addr, size, aclpci, &errno, 0);
+    }
+    else {
+      /* If not using DMA, but command specifies addresses in DMA's address
+       * space, we need to translate these to accesses to the memwindow.  The
+       * user-space written HAL currently also does this so we need to restore
+       * the current segment in hardware. */
+
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "For global memory accesses, trying to change segment so the address is mapped into PCIe BAR");
+      old_segment = aclpci->global_mem_segment;
+      restore_segment = 1;
+      kcmd.bar_id = ACL_PCIE_MEMWINDOW_BAR;
+      kcmd.device_addr = aclpci_set_segment (aclpci, kcmd.device_addr);
+      addr = aclpci_get_checked_addr (kcmd.bar_id, kcmd.device_addr, size, aclpci, &errno, 1);
+    }
+    
+    /* Check that no accesses are going outside of BAR4 */
+    secure_range = address_range_check(kcmd.bar_id, (void*)kcmd.device_addr, size, aclpci);
+    
+    if (!secure_range) {
+      ACL_DEBUG (KERN_DEBUG "Blocked illegal device address access");
+      result = -EFAULT;
+      goto done;
+    }
+    
+    if (errno != 0) {
+      result = -EFAULT;
+      goto done;
+    }
+  }
+
+
+  /* Intercept global mem segment changes to keep internal structures up-to-date */
+  if (kcmd.bar_id == ACL_PCIE_MEMWINDOW_BAR) {
+    if (addr == aclpci->global_mem_segment_addr && reading == 0) {
+      u64 d;
+      if (copy_from_user ( &d, kcmd.user_addr, sizeof(d) )) {
+        result = -EFAULT;
+        goto done;
+      }
+      ACL_VERBOSE_DEBUG (KERN_DEBUG "Intercepted mem segment change to %llu", d);
+      aclpci->global_mem_segment = d;
+    }
+  }
+  
+  
+  /* Offset value is always an address offset, not element offset. */
+  /* ACL_DEBUG (KERN_DEBUG "Read address is %p", addr); */
+  
+  switch (size) {
+  case 1:
+  case 2:
+  case 4:
+  case 8: {
+    if (reading) {
+      result = aclpci_read_small  (addr, (void __user*) kcmd.user_addr, size, access_le);
+    } else {
+      result = aclpci_write_small (addr, (void __user*) kcmd.user_addr, size, access_le);
+    }
+    break;
+  }
+    
+  default:
+    if (use_dma) {
+      result = aclpci_dma_rw (aclpci, kcmd.device_addr, (void __user*) kcmd.user_addr, size, reading);
+    } else {
+      result = aclpci_rw_large (addr, (void __user*) kcmd.user_addr, size, aclpci->buffer, reading, access_le );
+    }
+    break;
+  }
+  
+  /* If had to change the segment to get this read through, restore the value */
+  if (restore_segment) {
+    ACL_VERBOSE_DEBUG (KERN_DEBUG "Restoring mem segment to %llu", old_segment);
+    aclpci_set_segment_by_val (aclpci, old_segment);
+  }
+  
+done:
+  up (&aclpci->sem);
+  return result;
+}
+
+
+/* Response to user's read() call */
+ssize_t aclpci_read(struct file *file, char __user *buf, 
+                    size_t count, loff_t *pos) {
+  return aclpci_rw (file, buf, count, pos, 1 /* reading */);
+}
+
+
+/* Response to user's write() call */
+ssize_t aclpci_write(struct file *file, const char __user *buf, 
+                     size_t count, loff_t *pos) {
+  return aclpci_rw (file, (char __user *)buf, count, pos, 0 /* writing */);
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_pr.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_pr.c
new file mode 100755
index 0000000000000000000000000000000000000000..76350852152fa60e6725ce7bdfd8e502eca3d651
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_pr.c
@@ -0,0 +1,124 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <asm/io.h> // __raw_writel
+#include "aclpci.h"
+#include "hw_pcie_constants.h"
+#include <linux/time.h>
+
+/* Re-configure FPGA kernel partition with given bitstream via PCIe.
+ * Support for Arria 10 devices and higher */
+int aclpci_pr (struct aclpci_dev *aclpci, void __user* core_bitstream, ssize_t len) {
+
+  struct pci_dev *dev = NULL;
+  char *data;
+  int i;
+  int result = -EFAULT;
+  uint32_t to_send, status;
+  u64 startj, ej;
+
+  /* Basic error checks */  
+  if (aclpci == NULL) {
+    ACL_DEBUG (KERN_WARNING "Need to open device before can do reconfigure!");
+    return result;
+  }
+  if (core_bitstream == NULL) {
+    ACL_DEBUG (KERN_WARNING "Programming bitstream is not provided!");
+    return result;
+  }
+  if (len < 1000000) {
+    ACL_DEBUG (KERN_WARNING "Programming bitstream length is suspiciously small. Not doing PR!");
+    return result;
+  }
+  dev = aclpci->pci_dev;
+  if (dev == NULL) {
+    ACL_DEBUG (KERN_WARNING "Dude, where is PCIe device?!");
+    return result;
+  }
+
+  ACL_DEBUG (KERN_DEBUG "OK to proceed with PR!");
+  aclpci->pr_in_progress = 1;
+
+  startj = get_jiffies_64();
+
+  mb();
+  status = ioread32(aclpci->bar[ACL_PRCONTROLLER_BAR]+ACL_PRCONTROLLER_OFFSET+4);
+  ACL_DEBUG (KERN_DEBUG "Reading 0x%08X from PR IP status register", (int) status);
+
+  to_send = 0x00000001; 
+  ACL_DEBUG (KERN_DEBUG "Writing 0x%08X to PR IP status register", (int) to_send);
+  iowrite32(to_send, aclpci->bar[ACL_PRCONTROLLER_BAR]+ACL_PRCONTROLLER_OFFSET+4);
+
+  mb();
+  status = ioread32(aclpci->bar[ACL_PRCONTROLLER_BAR]+ACL_PRCONTROLLER_OFFSET+4);
+  ACL_DEBUG (KERN_DEBUG "Reading 0x%08X from PR IP status register", (int) status);
+  if ((status != 0x10) && (status != 0x0)) {
+    return -EFAULT;
+  }
+
+  data = (char __user*)core_bitstream;
+  ACL_DEBUG (KERN_DEBUG "Writing %d bytes of bitstream file to PR IP at BAR %d (0x%p), OFFSET 0x%08X", (int)len, ACL_PRCONTROLLER_BAR, aclpci->bar[ACL_PRCONTROLLER_BAR], (int) ACL_PRCONTROLLER_OFFSET);
+  for (i = 0; i < len; i=i+4) {
+    result = copy_from_user ( &to_send, data + i, sizeof(to_send));
+    iowrite32(to_send, aclpci->bar[ACL_PRCONTROLLER_BAR]+ACL_PRCONTROLLER_OFFSET);
+  }
+
+  mb();
+  status = ioread32(aclpci->bar[ACL_PRCONTROLLER_BAR]+ACL_PRCONTROLLER_OFFSET+4);
+  ACL_DEBUG (KERN_DEBUG "Reading 0x%08X from PR IP status register", (int) status);
+  if (status == 0x14){
+    ACL_DEBUG (KERN_DEBUG "PR done!: 0x%08X\n", (int) status);
+    result = 0;
+  } else {
+    ACL_DEBUG (KERN_DEBUG "PR error!: 0x%08X\n", (int) status);
+    result = 1;
+  }
+
+  ej = get_jiffies_64();
+  ACL_DEBUG (KERN_DEBUG "PR took %u usec\n", jiffies_to_usecs(ej - startj));
+
+  ACL_DEBUG (KERN_DEBUG "PR completed!");
+  aclpci->pr_in_progress = 0;
+  return result;
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.c b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.c
new file mode 100755
index 0000000000000000000000000000000000000000..abd7329c4e2b8817bd82af052987d8e5bcfa57c1
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.c
@@ -0,0 +1,187 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Queue of fixed size.
+ * Uncomment below to run in user-space unit-test mode.
+ * Otherwise, will compile in kernel mode. */
+// #define UNIT_TEST_MODE
+
+#include "aclpci_queue.h"
+
+#ifdef UNIT_TEST_MODE
+#include <stdlib.h> // for calloc
+#include <stdio.h>  // for printf
+#include <string.h> // for memcpy
+#else
+#include "aclpci.h"
+#endif
+
+
+void queue_init (struct queue *q, unsigned int elem_size, unsigned int size) {
+  // printk ("queue_init %p, elem_size = %u, size = %u\n", q, elem_size, size);
+  if (q == 0) { return; }
+  #ifdef UNIT_TEST_MODE
+    q->buffer = calloc (elem_size, size);
+  #else
+    q->buffer = kzalloc (elem_size * size, GFP_KERNEL);
+  #endif
+  if (q->buffer == 0) {
+    printk ("Couldn't allocate queue buffer!\n");
+    return;
+  }
+  q->size = size;
+  q->elem_size = elem_size;
+  q->count = 0;
+  q->out = 0;
+}
+
+
+void queue_fini (struct queue *q) {
+  // printk ("queue_init %p\n", q);
+  if (q == 0) { return; }
+  #ifdef UNIT_TEST_MODE
+    free (q->buffer);
+  #else
+    kfree (q->buffer);
+  #endif
+  q->buffer = NULL;
+  q->size = 0;
+  q->elem_size = 0;
+  q->count = 0;
+  q->out = 0;
+}
+
+
+unsigned int queue_size (struct queue *q) {
+  return q->count;
+}
+
+int queue_empty(struct queue *q) {
+  return (q->count == 0);
+}
+
+/* localize ugly casts */
+void *queue_addr (struct queue *q, unsigned int offset) {
+  unsigned long buffer_loc = (unsigned long)q->buffer + offset * q->elem_size;
+  return (void*)buffer_loc;
+}
+
+/* When working with the circular buffer, values can wrap around
+ * at most once. So instead of doing val % size, can do a simple comparison */
+unsigned int fast_mod (unsigned int val, unsigned int size) {
+  if (val >= size)
+    return val - size;
+  else
+    return val;
+}
+
+void queue_push (struct queue *q, void *e) {
+  unsigned int loc;
+  if (q->count == q->size) {
+    /* queue is full! */
+    return;
+  }
+  loc = fast_mod ( (q->out + q->count), q->size );
+  memcpy (queue_addr(q, loc), e, q->elem_size);
+  q->count++;
+}
+
+void queue_pop (struct queue *q) {
+  if (q->count == 0) {
+    return;
+  }
+  q->count--;
+  q->out = fast_mod ( (q->out + 1), q->size );
+}
+
+void *queue_front (struct queue *q) {
+  if (q->count == 0) {
+    return NULL;
+  }
+  return queue_addr (q, q->out);
+}
+
+void *queue_back (struct queue *q) {
+  if (q->count == 0) {
+    return NULL;
+  }
+  return queue_addr (q, fast_mod( (q->out + q->count - 1), q->size ) );
+}
+
+
+/* Unit tests. */
+#ifdef UNIT_TEST_MODE
+int main() {
+  struct queue q;
+  int i, j, k;
+  queue_init (&q, sizeof(int), 5);
+  i = 1; queue_push(&q, &i);
+  i = 2; queue_push(&q, &i);
+  i = 3; queue_push(&q, &i);
+  j = *(int*)queue_front(&q); k = *(int*)queue_back(&q);
+  printf ("%d, %d\n", j, k);
+  
+  queue_pop(&q);
+  j = *(int*)queue_front(&q); k = *(int*)queue_back(&q);
+  printf ("%d, %d\n", j, k);
+  
+  queue_pop(&q);
+  queue_pop(&q);
+  i = 11; queue_push(&q, &i);
+  i = 12; queue_push(&q, &i);
+  i = 13; queue_push(&q, &i);
+  i = 14; queue_push(&q, &i);
+  i = 15; queue_push(&q, &i);
+  i = 16; queue_push(&q, &i);
+  j = *(int*)queue_front(&q);
+  k = *(int*)queue_back(&q);
+  printf ("%d, %d\n", j, k);
+  
+  while (!queue_empty(&q)) {
+    int s = *(int*)queue_front(&q); queue_pop(&q);
+    printf ("%d\n", s);
+  }
+  
+  return 0;
+}
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.h
new file mode 100755
index 0000000000000000000000000000000000000000..477f8b22d090ab17453b96debb99261f636bcd34
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/aclpci_queue.h
@@ -0,0 +1,73 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef ACLPCI_QUEUE_H
+#define ACLPCI_QUEUE_H
+
+/* FIFO for a fixed number of elements. Interface is the same as for
+ * C++ STL queue<> adaptor.
+ *
+ * Implemented as a circular buffer in an array.
+ * Could've used kfifo but its interface changes between kernel 
+ * versions. So don't want to bother porting source code just for a fifo. */
+ 
+struct queue {
+  void *buffer;       /* Buffer to hold the data. Size is >= size * elem_size */
+  unsigned int size;  /* number of elements */
+  unsigned int elem_size; /* size of single element */
+  unsigned int count;   /* number of valid entries */
+  unsigned int out;     /* First valid entry */
+};
+
+void queue_init (struct queue *q, unsigned int elem_size, unsigned int size);
+void queue_fini (struct queue *q);
+
+unsigned int queue_size (struct queue *q);
+int queue_empty(struct queue *q);
+
+void queue_push (struct queue *q, void *e);
+void queue_pop (struct queue *q);
+void *queue_front (struct queue *q);
+void *queue_back (struct queue *q);
+
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_host_channel.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_host_channel.h
new file mode 100755
index 0000000000000000000000000000000000000000..8e3dae88353ddfca46bce895d463f17c74264b20
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_host_channel.h
@@ -0,0 +1,129 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef HW_HOST_CHANNEL_H
+#define HW_HOST_CHANNEL_H
+
+#ifndef PAGE_SIZE
+#  define PAGE_SIZE                           0x1000
+#endif
+
+/// Maximum software buffer size
+//  Constrained by page table size on hardware
+#define HOSTCH_MAX_BUF_SIZE                 0x100000
+
+// Loop counter that lets kernel thread to end after
+// 1ms of no activity.
+#define HOSTCH_LOOP_COUNTER                    20000
+
+/// Host Channel BAR4 Registers
+//  Controls dma_to_kernel IP
+#define HOSTCH_BASE                           0xc700
+#define HOSTCH_CONTROL_ADDR_PUSH          0x00000000
+#define HOSTCH_CONTROL_ADDR_PULL          0x00000004
+#define HOSTCH_IN_FRONT_ADDR              0x00000008
+#define HOSTCH_IN_END_ADDR                0x0000000C
+#define HOSTCH_OUT_FRONT_ADDR             0x00000010
+#define HOSTCH_OUT_END_ADDR               0x00000014
+#define HOSTCH_IN_AVAIL                   0x00000018
+#define HOSTCH_OUT_AVAIL                  0x0000001C
+
+// Host Channel BAR0 Registers
+#define ACL_HOST_CHANNEL_BAR                     0
+#define ACL_HOST_CHANNEL_CTR_BASE           0x0000
+
+/// Name of channel 0
+//  Following values are used when
+//  initializing the channel
+#define ACL_HOST_CHANNEL_0 		   	 0
+#define ACL_HOST_CHANNEL_0_NAME   "host_to_device"
+
+// Handle for push channel
+#define ACL_HOST_CHANNEL_0_ID                   10
+
+// Checking if channel 0 is a Write Channel: true
+#define ACL_HOST_CHANNEL_0_WRITE                 1
+
+// Qsys address for push channel control registers
+#define ACL_HOST_CHANNEL_0_TXS_ADDR_LOW     0x0020
+#define ACL_HOST_CHANNEL_0_TXS_ADDR_HIGH    0x0024
+#define ACL_HOST_CHANNEL_0_HOST_ENDP        0x0028
+#define ACL_HOST_CHANNEL_0_LOGIC_EN         0x002C
+#define ACL_HOST_CHANNEL_0_IP_ADDR_HIGH     0x0030
+#define ACL_HOST_CHANNEL_0_IP_ADDR_LOW      0x0034
+#define ACL_HOST_CHANNEL_0_BUF_SIZE         0x0038
+
+// Qsys address of host channel circular buffer on FPGA
+#define ACL_HOST_CHANNEL_0_DMA_ADDR    0x100000000
+
+/// Name of channel 1
+//  Following values are used when
+//  initializing the channel
+#define ACL_HOST_CHANNEL_1 		         1
+#define ACL_HOST_CHANNEL_1_NAME   "device_to_host"
+
+// Handle for pull channel
+#define ACL_HOST_CHANNEL_1_ID                   11
+
+// Checking if channel 1 is a Write Channel: false
+#define ACL_HOST_CHANNEL_1_WRITE                 0
+
+// Qsys address for pull channel control registers
+#define ACL_HOST_CHANNEL_1_TXS_ADDR_LOW     0x0120
+#define ACL_HOST_CHANNEL_1_TXS_ADDR_HIGH    0x0124
+#define ACL_HOST_CHANNEL_1_HOST_FRONTP      0x0128
+#define ACL_HOST_CHANNEL_1_LOGIC_EN         0x012C
+#define ACL_HOST_CHANNEL_1_IP_ADDR_HIGH     0x0130
+#define ACL_HOST_CHANNEL_1_IP_ADDR_LOW      0x0134
+#define ACL_HOST_CHANNEL_1_BUF_SIZE         0x0138
+
+// Qsys address of host channel circular buffer on FPGA
+#define ACL_HOST_CHANNEL_1_DMA_ADDR    0x100000000
+
+// ERROR Values
+#define ERROR_CHANNEL_PREVIOUSLY_OPENED        -10
+#define ERROR_CHANNEL_CLOSED                   -11
+#define ERROR_INVALID_CHANNEL                  -12
+#define ERROR_INCORRECT_DIRECTION              -13
+
+#endif // HW_HOST_CHANNEL_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_constants.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_constants.h
new file mode 100755
index 0000000000000000000000000000000000000000..4a93a3cf4c1bfd1c00c28b6646d909bc28fbfa55
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_constants.h
@@ -0,0 +1,225 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+////////////////////////////////////////////////////////////
+//                                                        //
+// hw_pcie_constants.h                                    //
+// Constants to keep in sync with the HW board design     //
+//                                                        //
+// Note: This file *MUST* be kept in sync with any        //
+//       changes to the HW board design!                  //
+//                                                        //
+////////////////////////////////////////////////////////////
+
+#ifndef HW_PCIE_CONSTANTS_H
+#define HW_PCIE_CONSTANTS_H
+
+
+/***************************************************************/
+/********************* Branding/Naming the BSP *****************/
+/***************************************************************/
+
+// Branding/Naming the BSP
+#define ACL_BOARD_PKG_NAME                          "a10_ref"
+#define ACL_VENDOR_NAME                             "Intel(R) Corporation"
+#define ACL_BOARD_NAME                              "Arria 10 Reference Platform"
+
+/***************************************************************/
+/******************* PCI ID values (VID,DID,etc.) **************/
+/***************************************************************/
+
+// Required PCI ID's - DO NOT MODIFY 
+#define ACL_PCI_INTELFPGA_VENDOR_ID              0x1172
+#define ACL_PCI_CLASSCODE                   0x120001
+
+// PCI SubSystem ID's - MUST be customized by BSP
+//     - Must also match the HW string in acl_boards*.inf
+#define ACL_PCI_SUBSYSTEM_VENDOR_ID           0x1172
+#define ACL_PCI_SUBSYSTEM_DEVICE_ID           0xa151
+#define ACL_PCI_REVISION                           1
+
+// PCI Capability
+#define ACL_LINK_WIDTH                             8
+
+/***************************************************************/
+/*************** Address/Word/Bit Maps used by the HW **********/
+/***************************************************************/
+
+// Number of Base Address Registers in the PCIe core
+#define ACL_PCI_NUM_BARS 5
+
+// Host Control BAR used for security check in driver
+// All accesses from MMD can only go to BAR 4
+#define ACL_HOST_CTRL_BAR                          4
+ 
+// Global memory
+#define ACL_PCI_GLOBAL_MEM_BAR                     4
+
+// PCIe control register addresses
+#define ACL_PCI_CRA_BAR                            4
+#define ACL_PCI_CRA_OFFSET                         0
+#define ACL_PCI_CRA_SIZE                      0x4000
+
+// Kernel control/status register addresses
+#define ACL_KERNEL_CSR_BAR                         4
+#define ACL_KERNEL_CSR_OFFSET                 0x4000 
+
+// PCIE DMA Controller Registers on BAR0 (Hidden from QSYS)
+#define ACL_PCIE_DMA_INTERNAL_BAR                  0
+#define ACL_PCIE_DMA_INTERNAL_CTR_BASE        0x0000
+
+#define ACL_PCIE_DMA_RC_RD_DESC_BASE_LOW      0x0000
+#define ACL_PCIE_DMA_RC_RD_DESC_BASE_HIGH     0x0004
+#define ACL_PCIE_DMA_EP_RD_FIFO_BASE_LOW      0x0008
+#define ACL_PCIE_DMA_EP_RD_FIFO_BASE_HIGH     0x000C
+#define ACL_PCIE_DMA_RD_LAST_PTR              0x0010
+#define ACL_PCIE_DMA_RD_TABLE_SIZE            0x0014
+#define ACL_PCIE_DMA_RD_CONTROL               0x0018
+#define ACL_PCIE_DMA_RD_INT_CONTROL           0x001C
+
+#define ACL_PCIE_DMA_RC_WR_DESC_BASE_LOW      0x0100
+#define ACL_PCIE_DMA_RC_WR_DESC_BASE_HIGH     0x0104
+#define ACL_PCIE_DMA_EP_WR_FIFO_BASE_LOW      0x0108
+#define ACL_PCIE_DMA_EP_WR_FIFO_BASE_HIGH     0x010C
+#define ACL_PCIE_DMA_WR_LAST_PTR              0x0110
+#define ACL_PCIE_DMA_WR_TABLE_SIZE            0x0114
+#define ACL_PCIE_DMA_WR_CONTROL               0x0118
+#define ACL_PCIE_DMA_WR_INT_CONTROL           0x011C
+#define ACL_PCIE_DMA_RD_FIFO_BASE 0x00007fffffff0000
+#define ACL_PCIE_DMA_WR_FIFO_BASE 0x00007fffffff2000
+#define ACL_PCIE_DMA_DISABLE_INT                   0
+#define ACL_PCIE_DMA_ENABLE_INT               0xFFFF
+
+// PCIE descriptor offsets
+// Location of FIFO on qsys address where descriptor table is stored
+// Same space as memory. Memory starts at 0.
+#define ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_LO   0xffff0000
+#define ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_HI   0x00007fff
+#define ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_LO   0xffff2000
+#define ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_HI   0x00007fff
+
+#define ACL_PCIE_DMA_TABLE_SIZE                  128
+
+// DMA controller current descriptor ID
+#define ACL_PCIE_DMA_RESET_ID                   0xFF
+
+// Avalon Tx port address as seen by the DMA read/write masters
+#define ACL_PCIE_TX_PORT               0x2000000000ll
+
+// Global memory window slave address.  The host has different "view" of global
+// memory: it sees only 512megs segments of memory at a time for non-DMA xfers
+#define ACL_PCIE_MEMWINDOW_BAR                     4 
+#define ACL_PCIE_MEMWINDOW_CRA               0x0c870 
+#define ACL_PCIE_MEMWINDOW_BASE              0x10000 
+#define ACL_PCIE_MEMWINDOW_SIZE              0x10000 
+
+// PCI express control-register offsets
+#define PCIE_CRA_IRQ_STATUS                   0xcf90
+#define PCIE_CRA_IRQ_ENABLE                   0xcfa0
+#define PCIE_CRA_ADDR_TRANS                   0x1000
+
+// IRQ vector mappings (as seen by the PCIe RxIRQ port)
+#define ACL_PCIE_KERNEL_IRQ_VEC                    0
+
+// PLL related
+#define USE_KERNELPLL_RECONFIG                     1 
+#define ACL_PCIE_KERNELPLL_RECONFIG_BAR            4
+#define ACL_PCIE_KERNELPLL_RECONFIG_OFFSET   0x0b000
+
+// DMA descriptor control bits
+#define DMA_ALIGNMENT_BYTES                       64
+#define DMA_ALIGNMENT_BYTE_MASK                     (DMA_ALIGNMENT_BYTES-1)
+
+// Temperature sensor presence and base address macros
+#define ACL_PCIE_HAS_TEMP_SENSOR                   1
+#define ACL_PCIE_TEMP_SENSOR_ADDRESS          0xcff0
+
+// Version ID and Uniphy Status
+#define ACL_VERSIONID_BAR                          4
+#define ACL_VERSIONID_OFFSET                  0xcfc0
+#define ACL_VERSIONID                     0xA0C7C1E6
+// Current ACL_VERSIONID is backwards compatible with ACL_VERSIONID_COMPATIBLE
+#define ACL_VERSIONID_COMPATIBLE_171b	  0xA0C7C1E5
+#define ACL_VERSIONID_COMPATIBLE_171a     0xA0C7C1E4
+#define ACL_VERSIONID_COMPATIBLE_170      0xA0C7C1E3
+#define ACL_VERSIONID_COMPATIBLE_161      0xA0C7C1E2
+
+// Uniphy Status - used to confirm controller is calibrated
+#define ACL_UNIPHYRESET_BAR                        4
+#define ACL_UNIPHYRESET_OFFSET                0xcfd0
+#define ACL_UNIPHYSTATUS_BAR                       4
+#define ACL_UNIPHYSTATUS_OFFSET               0xcfe0
+
+// Partial reconfiguration IP	
+#define ACL_PRCONTROLLER_BAR                       4
+#define ACL_PRCONTROLLER_OFFSET               0xcf00
+
+// Base revision PR ID
+#define ACL_PRBASEID_BAR                           4
+#define ACL_PRBASEID_OFFSET                   0xcf80
+
+// Quartus Compile Version
+#define ACL_QUARTUSVER_BAR                         4
+#define ACL_QUARTUSVER_OFFSET                 0xd000
+#define ACL_QUARTUSVER_ROM_SIZE                   32
+
+// CADEID hardware added in ACL_VERSIONID 0xA0C7C1E3
+// Cade ID for USB auto detect
+#define ACL_CADEID_BAR                             4
+#define ACL_CADEID_OFFSET                     0xcf70
+
+// Host Channel Version ID
+#define ACL_HOSTCH_VERSION_BAR                     4
+#define ACL_HOSTCH_VERSION_OFFSET             0xd100
+// valid Host Channel Versions
+#define ACL_HOSTCH_TWO_CHANNELS              0xa10c1
+#define ACL_HOSTCH_ZERO_CHANNELS             0xa10c0
+
+// Handy macros
+#define ACL_PCIE_READ_BIT( w, b ) (((w) >> (b)) & 1)
+#define ACL_PCIE_READ_BIT_RANGE( w, h, l ) (((w) >> (l)) & ((1 << ((h) - (l) + 1)) - 1))
+#define ACL_PCIE_SET_BIT( w, b ) ((w) |= (1 << (b)))
+#define ACL_PCIE_CLEAR_BIT( w, b ) ((w) &= (~(1 << (b))))
+#define ACL_PCIE_GET_BIT( b ) (unsigned) (1 << (b))
+
+#endif // HW_PCIE_CONSTANTS_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_dma.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_dma.h
new file mode 100755
index 0000000000000000000000000000000000000000..eddf0adc9c18e9dbe5c139552ac337044deb95c6
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/hw_pcie_dma.h
@@ -0,0 +1,121 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef HW_PCIE_DMA_H
+#define HW_PCIE_DMA_H
+
+#if defined(WINDOWS)
+#define PACK( __Declaration__ ) __pragma( pack(push, 1) ) __Declaration__ __pragma( pack(pop) )
+#else
+#define PACK( __Declaration__ ) __Declaration__ __attribute__((__packed__))
+#endif
+
+#ifndef PAGE_SIZE
+#  define PAGE_SIZE                               0x1000
+#endif
+
+#if defined(WINDOWS)
+#  define ACL_PCIE_DMA_PAGES_LOCKED                 4096
+#else
+#  define ACL_PCIE_DMA_PAGES_LOCKED                  256
+#endif
+
+// Maximum number of entries in DMA descriptor controller when using internal descriptor controller
+// of Arria 10 PCIe HIP set to Avalon-MM with DMA type
+#define ACL_PCIE_DMA_DESC_MAX_ENTRIES                128
+
+// Host channel Maximum number of page entries
+#define HOSTCH_MAX_PAGE_ENTRIES			  0x1000
+
+
+// DMA parameters to tweak
+static const unsigned int ACL_PCIE_DMA_MAX_PINNED_MEM_SIZE = ACL_PCIE_DMA_PAGES_LOCKED*PAGE_SIZE;
+static const unsigned int ACL_PCIE_DMA_PAGE_ADDR_MASK = PAGE_SIZE-1;
+static const unsigned int ACL_PCIE_DMA_TIMEOUT = 0x1000000;
+static const unsigned int ACL_PCIE_DMA_CTRL_C_TIMEOUT = 1000;
+static const unsigned int ACL_PCIE_DMA_POLL_SLEEP_TIME_NS = 100;
+
+// This is log of the largest transfer size for non-aligned transfers, not aligned to 4KB.
+// Max non-aligned transfer = 2^11 Bytes
+static const unsigned int ACL_PCIE_DMA_NON_ALIGNED_TRANS_LOG = 11;
+
+#if defined(WINDOWS)
+PACK(
+struct DMA_DESC_ENTRY {                  
+    UINT32 src_addr_ldw;
+    UINT32 src_addr_udw;
+    UINT32 dest_addr_ldw;
+    UINT32 dest_addr_udw;
+    UINT32 ctl_dma_len;
+    UINT32 reserved[3];
+});
+
+PACK(
+struct DMA_DESC_HEADER {
+    volatile UINT32 flags[ACL_PCIE_DMA_DESC_MAX_ENTRIES];
+});
+
+
+PACK(
+struct DMA_DESC_TABLE {
+    struct DMA_DESC_HEADER header;
+    struct DMA_DESC_ENTRY descriptors[ACL_PCIE_DMA_DESC_MAX_ENTRIES];
+});
+
+// Host Channel
+PACK(
+struct HOSTCH_ENTRY {
+    UINT32 page_addr_ldw;
+    UINT32 page_addr_udw;
+    UINT32 page_num;
+    UINT32 reserved[5];
+});
+
+PACK(
+struct HOSTCH_TABLE {
+    struct HOSTCH_ENTRY page_entry[HOSTCH_MAX_PAGE_ENTRIES];
+});
+
+#endif // WINDOWS
+
+#endif // HW_PCIE_DMA_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/make_all.sh b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/make_all.sh
new file mode 100755
index 0000000000000000000000000000000000000000..dea5a0e74aeccd712fc43f5e6994b9ee5e3e908a
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/make_all.sh
@@ -0,0 +1,45 @@
+# Need to use the exact version of gcc that was used to compile the kernel
+# It's in /usr/bin, so put it at the front of the path
+export PATH=/usr/bin:$PATH
+SRC_PATH=/lib/modules/`uname -r`/build
+echo "Looking for kernel source files in $SRC_PATH"
+if [ ! -d "$SRC_PATH" ]
+then
+  SRC_PATH=/usr/src/kernels/`uname -r`
+  echo "Looking for kernel source files in $SRC_PATH"
+fi
+
+if [ ! -d "$SRC_PATH" ]
+then
+  echo
+  echo "Error: Failed to find kernel source files.  The PCIe driver requires"
+  echo "headers and Makefiles for your current Linux kernel, but these could"
+  echo "not be found on your system.  Please install these on the machine."
+  echo
+  echo "   For example:"
+  echo "      On RedHat: sudo apt-get source linux"
+  echo "      On Ubuntu: sudo yum install kernel-devel"
+  echo
+  exit 1
+fi
+
+echo "Using kernel source files from  $SRC_PATH"
+
+if [ $# -ne 1 ]
+then
+  echo "*** Incorrect number of args: make_all.sh <name>"
+  exit 1
+fi
+
+BSP_NAME=$1
+
+BSP_NAME_FROM_HEADER=`grep ACL_BOARD_PKG_NAME hw_pcie_constants.h |cut -f2 -d\"`
+
+if [ "$BSP_NAME" != "$BSP_NAME_FROM_HEADER" ]
+then
+  echo "BSP name $BSP_NAME in board_env.xml must match ACL_BOARD_PKG_NAME $BSP_NAME_FROM_HEADER set in hw_pcie_constants.h"
+  exit 1
+fi
+echo Building driver for BSP with name $BSP_NAME
+
+make -C $SRC_PATH M=`pwd` BSP_NAME=$BSP_NAME modules
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/pcie_linux_driver_exports.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/pcie_linux_driver_exports.h
new file mode 100755
index 0000000000000000000000000000000000000000..4f300b9728f59a17bfb7a42a7c89684a903bc161
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/pcie_linux_driver_exports.h
@@ -0,0 +1,177 @@
+/* 
+ * Copyright (c) 2018, Intel Corporation.
+ * Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack 
+ * words and logos are trademarks of Intel Corporation or its subsidiaries 
+ * in the U.S. and/or other countries. Other marks and brands may be 
+ * claimed as the property of others.   See Trademarks on intel.com for 
+ * full list of Intel trademarks or the Trademarks & Brands Names Database 
+ * (if Intel) or See www.Intel.com/legal (if Altera).
+ * All rights reserved
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * BSD 3-Clause license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *      - Neither Intel nor the names of its contributors may be 
+ *        used to endorse or promote products derived from this 
+ *        software without specific prior written permission.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* All defines necessary to communicate with the Linux PCIe driver.
+ * The actual communication functions are open()/close()/read()/write().
+ *
+ * Example read call (read single ushort from BAR 0, device address 0x2):
+ *   ssize_t f = open ("/dev/de4", O_RDWR);
+ *   unsigned short val;
+ *   struct acl_cmd read_cmd = { 0, ACLPCI_CMD_DEFAULT, 0x2, &val };
+ *   read (f, &read_cmd, sizeof(val));
+ *
+ * See user.c for a tester of all functions and more elaborate examples.
+ */
+
+#ifndef PCIE_LINUX_DRIVER_EXPORTS_H
+#define PCIE_LINUX_DRIVER_EXPORTS_H
+
+
+/* if bar_id in acl_cmd is set to this, this is a special command,
+ * not a usual read/write request. So the command field is used. Otherwise,
+ * command field is ignored. */
+#define ACLPCI_CMD_BAR 23
+
+/* A PCI device can have multiple address spaces accessible through each bar,
+ * but another possible address space is defined by the DMA controller.  It
+ * connects directly to all memory which the PCI device may not be able to do.
+ * Hence we define a special "bar id" to tell the driver these addresses are in
+ * the DMA space. */
+#define ACLPCI_DMA_BAR 25
+
+/* Values for 'command' field of acl_cmd. */
+
+/* Default value -- noop. */
+#define ACLPCI_CMD_DEFAULT                0
+
+/* Save/Restore all board PCI control registers to user_addr.
+ * Allows user program to reprogram the board without having root
+ * priviliges (which is required to change PCI control registers). */
+#define ACLPCI_CMD_SAVE_PCI_CONTROL_REGS  1
+#define ACLPCI_CMD_LOAD_PCI_CONTROL_REGS  2
+
+/* Lock/Unlock user_addr memory to physical RAM ("pin" it) */
+#define ACLPCI_CMD_PIN_USER_ADDR          3
+#define ACLPCI_CMD_UNPIN_USER_ADDR        4
+
+/* Get m_idle status of DMA */
+#define ACLPCI_CMD_GET_DMA_IDLE_STATUS    5
+#define ACLPCI_CMD_DMA_UPDATE             6
+
+/* Get vendor_id and device_id of loaded PCIe device */
+#define ACLPCI_CMD_GET_DEVICE_ID          7
+#define ACLPCI_CMD_GET_VENDOR_ID          8
+
+/* Change FPGA kernel region by using PR.
+ * The caller must provide the .core.rbf file loaded into memory */
+#define ACLPCI_CMD_DO_PR                  9
+
+/* PCIe link status queries (PCIe gen and number of lanes) */
+#define ACLPCI_CMD_GET_PCI_GEN            10
+#define ACLPCI_CMD_GET_PCI_NUM_LANES      11
+
+/* Set id to receive back on signal from kernel */
+#define ACLPCI_CMD_SET_SIGNAL_PAYLOAD     12
+
+/* Get full driver version, as string */
+#define ACLPCI_CMD_GET_DRIVER_VERSION     13
+
+#define ACLPCI_CMD_ENABLE_KERNEL_IRQ      14
+
+#define ACLPCI_CMD_REPROGRAM_VIA_FPGA_MANAGER 15
+
+/* Map virtual to physical address.
+ * Virtual address is passed in user_addr.
+ * Physical address is returned in device_addr */
+#define ACLPCI_CMD_GET_PHYS_PTR_FROM_VIRT 16
+
+#define ACLPCI_CMD_GET_PCI_DEV_ID         17
+
+#define ACLPCI_CMD_GET_PCI_SLOT_INFO      18
+
+#define ACLPCI_CMD_DMA_STOP               19
+
+#define ACLPCI_CMD_SET_SIGNAL_NUMBER      20
+
+#define ACLPCI_CMD_GET_SIGNAL_NUMBER      21
+
+/* Host Channel Commands
+ *
+ */
+#define ACLPCI_CMD_HOSTCH_CREATE_RD       22
+
+#define ACLPCI_CMD_HOSTCH_CREATE_WR       23
+
+#define ACLPCI_CMD_HOSTCH_DESTROY_RD      24
+
+#define ACLPCI_CMD_HOSTCH_DESTROY_WR      25
+
+#define ACLPCI_CMD_HOSTCH_THREAD_SYNC     26
+
+#define ACLPCI_CMD_MAX_CMD                27
+
+/* Signal from driver to user (hal) to notify about hw interrupt */
+/* This is now obsolete, when the MMD is opened it will dynamically
+   assign a signal number and send that to the driver */
+#define SIG_INT_NOTIFY 44
+
+/* Main structure to communicate any command (including read/write)
+ * from user space to the driver. */
+struct acl_cmd {
+
+  /* base address register of PCIe device. device_addr is interpreted
+   * as an offset from this BAR's start address. */
+  unsigned int bar_id;
+  
+  /* Special command to execute. Only used if bar_id is set
+   * to ACLPCI_CMD_BAR. */
+  unsigned int command;
+  
+  /* Address in device space where to read/write data. */
+  void* device_addr;
+  
+  /* Address in user space where to write/read data.
+   * Always virtual address. */
+  void* user_addr;
+  
+  /* Bypass system restrictions on file I/O size.
+   * Pass actual size of transfer here */
+  size_t size;
+  
+  /* Tell the system if the conversion of endianness is needed. This is only */
+  /* meaningful when the command is read/write to global memmory, so other   */
+  /* command can still function correctly without setting this value.        */
+  int is_diff_endian;
+};
+
+#endif /* PCIE_LINUX_DRIVER_EXPORTS_H */
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/version.h b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/version.h
new file mode 100755
index 0000000000000000000000000000000000000000..d10912a0c1061a583ceea26d294a08519c5d6515
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/driver/version.h
@@ -0,0 +1 @@
+#define ACL_DRIVER_VERSION "18.0.d5a579c45fb769cbc7902521b8a8d35a"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/lib/libaltera_a10_ref_mmd.so b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/lib/libaltera_a10_ref_mmd.so
new file mode 100755
index 0000000000000000000000000000000000000000..bc1c8a97979c55122c91ed414a5c557f3085803a
Binary files /dev/null and b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/lib/libaltera_a10_ref_mmd.so differ
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/diagnose b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/diagnose
new file mode 100755
index 0000000000000000000000000000000000000000..223e40ed67f282934fd33d46d36c48e1cecc4fa4
Binary files /dev/null and b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/diagnose differ
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash
new file mode 100755
index 0000000000000000000000000000000000000000..a12204bb75618a8475939f6e0231f34a30ff88ca
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash
@@ -0,0 +1,23 @@
+#! /bin/sh
+
+# ACL utility command
+#
+# Example:  acl help
+
+if [ "x$INTELFPGAOCLSDKROOT" = "x" ]; then
+  echo "Error: You must set environment variable INTELFPGAOCLSDKROOT to the absolute path of root of the Intel(R) FPGA SDK for OpenCL(TM) software installation"
+  exit 1
+fi 
+if [ "x$QUARTUS_ROOTDIR" = "x" ]; then
+  echo "Error: You must set environment variable QUARTUS_ROOTDIR to the absolute path of the quartus subdirectory inside ACDS"
+  exit 1
+fi 
+if [ ! -e "$QUARTUS_ROOTDIR/common/tcl/internal" ]; then
+  echo "Error: You must set environment variable QUARTUS_ROOTDIR to the absolute path of the quartus subdirectory inside ACDS"
+  exit 1
+fi 
+export PERL5LIB="${INTELFPGAOCLSDKROOT}"/share/lib/perl:"${INTELFPGAOCLSDKROOT}"/share/lib/perl/5.8.8:"${PERL5LIB}"
+export LD_LIBRARY_PATH="${INTELFPGAOCLSDKROOT}"/linux64/lib:"${LD_LIBRARY_PATH}"
+
+
+exec "${QUARTUS_ROOTDIR}"/linux64/perl/bin/perl "`aocl board-path`"/linux64/libexec/flash.pl "$@"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash.pl b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash.pl
new file mode 100755
index 0000000000000000000000000000000000000000..324983aeb516c0fa31eedc2ffdb7ef5320376976
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/flash.pl
@@ -0,0 +1,82 @@
+
+my $binfile = $ARGV[1];
+
+if ( $binfile =~ m/\.bin$/i ) {
+  -f $binfile or print "Error: can't find $binfile file needed for flashing." and exit 1;
+} else {
+  print "Error: Currently only .bin files are accepted.\n";
+  print "       Please use the .bin from the original compiled project\n";
+  exit 1;
+}
+
+my $soffile = "fpga_temp.sof";
+
+system ("aocl binedit $binfile get .acl.sof $soffile");
+$? == 0  or die "Error: aocl binedit failed";
+
+my $cof = <<END;
+<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
+<cof>
+	<eprom_name>CFI_2GB</eprom_name>
+	<output_filename>flash.pof</output_filename>
+	<n_pages>1</n_pages>
+	<width>1</width>
+	<mode>12</mode>
+	<sof_data>
+		<start_address>00200000</start_address>
+		<user_name>Page_0</user_name>
+		<page_flags>1</page_flags>
+		<bit0>
+			<sof_filename>$soffile</sof_filename> 
+		</bit0>
+	</sof_data>
+	<version>7</version>
+	<create_cvp_file>0</create_cvp_file>
+	<create_hps_iocsr>0</create_hps_iocsr>
+	<auto_create_rpd>0</auto_create_rpd>
+	<options>
+		<map_file>1</map_file>
+		<option_start_address>180000</option_start_address>
+		<dynamic_compression>0</dynamic_compression>
+	</options>
+	<advanced_options>
+		<ignore_epcs_id_check>0</ignore_epcs_id_check>
+		<ignore_condone_check>2</ignore_condone_check>
+		<plc_adjustment>0</plc_adjustment>
+		<post_chain_bitstream_pad_bytes>-1</post_chain_bitstream_pad_bytes>
+		<post_device_bitstream_pad_bytes>-1</post_device_bitstream_pad_bytes>
+		<bitslice_pre_padding>1</bitslice_pre_padding>
+	</advanced_options>
+</cof>
+END
+
+my $cdf = <<CDFEND;
+JedecChain;
+	FileRevision(JESD32A);
+	DefaultMfr(6E);
+
+	P ActionCode(Ign)
+		Device PartName(10AX115S2E2) MfrSpec(OpMask(0));
+	P ActionCode(Ign)
+		Device PartName(5M2210Z) MfrSpec(OpMask(0) SEC_Device(CFI_2GB) Child_OpMask(3 1 1 1) PFLPath("flash.pof"));
+
+ChainEnd;
+
+AlteraBegin;
+	ChainType(JTAG);
+AlteraEnd;
+CDFEND
+
+open COFFILE, ">flash.cof";
+print COFFILE $cof;
+close COFFILE;
+
+open CDFFILE, ">flash.cdf";
+print CDFFILE $cdf;
+close CDFFILE;
+
+system ("quartus_cpf --convert flash.cof");
+$? == 0  or die "Error: quartus_cpf failed";
+
+system ("quartus_pgm -c 1 flash.cdf");
+$? == 0  or die "Error: quartus_pgm failed";
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/install b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/install
new file mode 100755
index 0000000000000000000000000000000000000000..c9db5a688fd36519747cf896a75ee99d20a45ff2
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/install
@@ -0,0 +1,55 @@
+#! /bin/sh
+# This script compiles the Linux PCIe driver, load the driver, and setups the 
+# necessary files to allow automatically load the driver upon reboot. 
+# You need sudo access to load the driver.
+
+BSP_NAME=`aocl board-name`
+MODULE_NAME=aclpci_$BSP_NAME\_drv
+
+if [ "$MODULE_NAME" = "aclpci__drv" ]
+then
+  echo Failed to determine BSP name
+  exit 1
+fi
+
+MODULE_DEST=/lib/modules/`uname -r`/misc
+MODPROBE_FILE_DIR=/etc/sysconfig/modules
+RULE_FILE_DIR=/etc/udev/rules.d
+
+# Copy the Linux PCIe driver source code to a temporary folder
+TEMP_FOLDER=`mktemp -d /tmp/opencl_driver_XXXXXX`
+cp -r "`aocl board-path`"/linux64/driver/* $TEMP_FOLDER
+
+# Compile the Linux PCIe driver against your own kernel sources, 
+cd $TEMP_FOLDER && sh ./make_all.sh $BSP_NAME || exit 1
+
+# Copy the kernel module into destination directory and run '/sbin/depmod' 
+# so that '/sbin/modprobe' can find it 
+sudo mkdir -p $MODULE_DEST
+sudo cp ./$MODULE_NAME.ko $MODULE_DEST
+sudo /sbin/depmod -a
+
+# Create .modules file which is executed when reboot to load the driver
+cat > $TEMP_FOLDER/aclpci_$BSP_NAME.modules <<EOL
+#!/bin/sh
+exec /sbin/modprobe $MODULE_NAME >/dev/null 2>&1
+EOL
+sudo mkdir -p $MODPROBE_FILE_DIR
+sudo cp $TEMP_FOLDER/aclpci_$BSP_NAME.modules $MODPROBE_FILE_DIR
+sudo chmod +x $MODPROBE_FILE_DIR/aclpci_$BSP_NAME.modules
+
+# Write udev rules to change the access permission for the device nodes 
+cat > $TEMP_FOLDER/99-aclpci_$BSP_NAME.rules <<EOL
+KERNEL=="acl$BSP_NAME*", SUBSYSTEM=="aclpci_$BSP_NAME", MODE=="0600", MODE="0666"
+EOL
+sudo mkdir -p $RULE_FILE_DIR
+sudo cp $TEMP_FOLDER/99-aclpci_$BSP_NAME.rules $RULE_FILE_DIR
+
+# Load/reload the driver into kernel after all the setup
+if [ "`cat /proc/modules | grep "$MODULE_NAME"`" ]; then
+   sudo /sbin/modprobe -r $MODULE_NAME
+fi
+sudo /sbin/modprobe $MODULE_NAME
+
+# Remove the temporary folder
+rm -rf $TEMP_FOLDER
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/program b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/program
new file mode 100755
index 0000000000000000000000000000000000000000..8e2bcfaa1848f2d33edd33d069b7500d91e13c03
Binary files /dev/null and b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/program differ
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/uninstall b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/uninstall
new file mode 100755
index 0000000000000000000000000000000000000000..2ee8bd865abfbfad4eced9d974e10600e3c131bf
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/linux64/libexec/uninstall
@@ -0,0 +1,30 @@
+#! /bin/sh
+# This script unloads the Linux PCIe driver from the kernel and removes the module from the system.
+# You need sudo access to remove the driver.
+
+BSP_NAME=`aocl board-name`
+MODULE_NAME=aclpci_$BSP_NAME\_drv
+
+if [ "$MODULE_NAME" = "aclpci__drv" ]
+then
+  echo Failed to determine BSP name
+  exit 1
+fi
+
+MODULE_DEST=/lib/modules/`uname -r`/misc
+MODPROBE_FILE_DIR=/etc/sysconfig/modules
+RULE_FILE_DIR=/etc/udev/rules.d
+
+# Unload the driver from the kernel
+if [ "`cat /proc/modules | grep "$MODULE_NAME"`" ]; then
+   sudo /sbin/modprobe -r $MODULE_NAME
+fi
+
+# Remove device from udev rules
+sudo rm $RULE_FILE_DIR/99-aclpci_$BSP_NAME.rules
+
+# Remove .modules file
+sudo rm $MODPROBE_FILE_DIR/aclpci_$BSP_NAME.modules
+
+# Remove the kernel module
+sudo rm $MODULE_DEST/$MODULE_NAME.ko
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/scripts/find_jtag_cable.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/scripts/find_jtag_cable.tcl
new file mode 100755
index 0000000000000000000000000000000000000000..a518b319d3848fe66e00561fc088f5d354a34624
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/scripts/find_jtag_cable.tcl
@@ -0,0 +1,53 @@
+load_package insystem_source_probe
+
+if {$argc > 0} {post_message "Running find_jtag_cable.tcl to find CADE value: $argv" }
+
+set cable 1
+
+# check to exit when there is no cable attached
+if {[catch {get_hardware_names} err ]} {
+  post_message "No JTAG cable found!! check cable connection..."
+  exit 1
+}
+
+foreach usb [get_hardware_names] {
+  
+  foreach device_name [get_device_names -hardware_name $usb] {
+    
+    post_message "Looking in Cable ($usb) Device ($device_name)"
+    # Skip device if no sources and probes exit
+    if {[catch {get_insystem_source_probe_instance_info -hardware_name $usb -device_name $device_name} err ]} {
+      post_message "Doesn't contain sources and probes. Skipping..."
+      continue
+    } 
+   
+    # Sources and probes exit, hence look for "CADE" 
+    #post_message "Looking for CADE in sources and probes"
+    foreach instance [get_insystem_source_probe_instance_info -hardware_name $usb -device_name $device_name] {
+      
+      set probe_name [lindex $instance 3]
+      set probe_index [lindex $instance 0]
+      
+      if {[string match $probe_name "CADE"]} {
+        post_message "Found CADE in Probe Index:$probe_index. Probing for CADEID..."
+        start_insystem_source_probe -device_name $device_name -hardware_name $usb
+        set val [read_probe_data -instance_index $probe_index -value_in_hex ]
+        post_message "Expected CADEID=$argv, Probe return CADEID=$val"
+    
+        if {[string match $val "$argv"]} {
+          post_message "CADEID value matched. Found Cable!!!"
+          post_message "Matched Cable:$cable Device Name:$device_name"
+          exit 0
+        } else {
+          post_message "CADEID didn't match. Continue looking..."
+        }
+        end_insystem_source_probe
+      }
+    }
+  }
+  
+  #increment cable index while going through usb
+  incr cable
+}
+
+exit 1
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..4af43bb4bd8bf4822b4e5a84c3d2342d6cbe5e94
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile
@@ -0,0 +1,12 @@
+
+CUR_REL_PATH = .
+
+INSTALL_DIR = $(TOP_DEST_DIR)
+TARGET_FILES = 
+SUB_DIRS = host util
+CLEAN_DIR = 
+
+include $(CUR_REL_PATH)/Makefile.common
+
+util : host
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile.common b/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile.common
new file mode 100755
index 0000000000000000000000000000000000000000..c9251c678139b384fac7c8355fe7d24216a2bff3
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/Makefile.common
@@ -0,0 +1,100 @@
+# define shared variables in this package
+PACKAGE_NAME?= a10_ref
+MMD_LIB_NAME?= altera_a10_ref_mmd
+
+# define OS related commands
+ACL_COMPILER:= gcc
+MKDIR:= mkdir -p
+CP:= cp -rf
+RM:= rm -rf
+RMDIR:= rm -r
+
+# Path Separator
+PS:= /
+# Pre-Special Character - used for cancel the backslash effect before any special characters (e.x. %) for Windows
+PSC:= 
+
+# recursive wildcard function
+rwildcard=$(wildcard $1$2) $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2))
+
+TOP_DEST_DIR ?= $(INTELFPGAOCLSDKROOT)$(PS)board$(PS)$(PACKAGE_NAME)
+JUNGO_LICENSE?=
+ifneq ($(JUNGO_LICENSE),)
+CPPFLAGS:= $(CPPFLAGS) -DJUNGO_LICENSE=\"$(JUNGO_LICENSE)\"
+endif
+
+TARGET_FOLDERS:= $(patsubst %$(PS),%,$(sort $(dir $(addprefix $(INSTALL_DIR)$(PS),$(TARGET_FILES)) $(SPECIAL_INSTALL_FILE))))
+
+DLLEXPFILE:= $(basename $(DLLFILE)).exp
+DLLPDBFILE:= $(basename $(DLLFILE)).pdb
+
+EXIST_CLEAN_TMP:= $(strip $(EXEFILE) $(DLLFILE) $(DLLLIBFILE) $(DLLEXPFILE) $(DLLPDBFILE) vc90.pdb *.manifest)
+EXIST_CLEAN_OBJ:= $(strip $(wildcard $(addprefix $(INSTALL_DIR)$(PS),$(TARGET_FILES)) $(SPECIAL_INSTALL_FILE) $(OBJ_FILES)))
+EXIST_CLEAN_DIR:= $(strip $(wildcard $(CLEAN_DIR)))
+
+.DEFAULT_GOAL = all
+
+all : subdirs this
+this : $(TARGET_FOLDERS) $(addprefix $(INSTALL_DIR)$(PS),$(TARGET_FILES)) $(SPECIAL_INSTALL_FILE) cleantmp
+
+.PHONY : all this subdirs $(SUB_DIRS) clean cleanthis cleantmp
+
+subdirs : $(SUB_DIRS)
+
+$(SUB_DIRS) :
+	$(MAKE) -C $@ TOP_DEST_DIR=$(TOP_DEST_DIR) $(MAKECMDGOALS)
+
+# create directories
+$(TARGET_FOLDERS) :
+	$(MKDIR) $@
+
+# copy the $(SPECIAL_INSTALL_FILE) to its special install location
+ifneq ($(SPECIAL_INSTALL_FILE),)
+$(dir $(SPECIAL_INSTALL_FILE))$(PSC)% : %
+	$(CP) $< $@
+endif
+
+# copy all $(TARGET_FILES) to the $(INSTALL_DIR)
+$(INSTALL_DIR)$(PS)$(PSC)% : %
+	$(CP) $< $@
+
+
+$(EXEFILE) : $(OBJ_FILES)
+ifeq ($(ACL_COMPILER),gcc)
+	$(LINKER) $(CXXFLAGS) -o $@ $(OBJ_FILES) $(LINKER_LIBDIRARGS) $(LINKER_ARGS) $(INCORPORATE_LIBS) $(LINK_LIBS) $(PREBUILT_OBJS)
+endif
+ifeq ($(ACL_COMPILER),msvc)
+	$(LINKER) $(LINKER_LIBDIRARGS) $(LINKER_ARGS) -MANIFEST -MANIFESTFILE:"$@.intermediate.manifest" -out:$@ $(OBJ_FILES) $(PREBUILT_OBJS) $(INCORPORATE_LIBS) $(LINK_LIBS)
+endif
+
+
+$(DLLFILE) : $(DLLLIBFILE) $(OBJ_FILES)
+ifeq ($(ACL_COMPILER),gcc)
+	$(LINKER) -shared -Wl,-soname,$@ -o $@ $(OBJ_FILES) $(INCORPORATE_LIBS) $(PREBUILT_OBJS) $(LINKER_LIBDIRARGS) $(LINKER_ARGS) $(LINK_LIBS)
+endif
+ifeq ($(ACL_COMPILER),msvc)
+	$(LINKER) $(LINKER_LIBDIRARGS) $(LINKER_ARGS) /DLL $(DLLEXPFILE) -out:$@ -pdb:$(DLLPDBFILE) $(OBJ_FILES) $(PREBUILT_OBJS) $(INCORPORATE_LIBS) $(LINK_LIBS)
+endif
+
+
+$(DLLLIBFILE) : $(OBJ_FILES)
+	lib /nologo /out:$@ /def $(LINKER_LIBDIRARGS) $(OBJ_FILES) $(INCORPORATE_LIBS)
+
+
+$(OBJ_DIR)$(PS)$(PSC)%.$(OBJ_EXT) : %.cpp $(PERVASIVE_DEPENDENCIES) $(wildcard *.h)
+	$(ECHO)$(CXX)$@ -c $(CPPFLAGS) $(CXXFLAGS) $<
+
+clean: subdirs cleanthis
+
+cleanthis :
+ifneq ($(EXIST_CLEAN_OBJ),)
+	$(RM) $(EXIST_CLEAN_OBJ)
+endif
+ifneq ($(EXIST_CLEAN_DIR),)
+	$(RMDIR) $(EXIST_CLEAN_DIR)
+endif
+
+cleantmp:
+ifneq ($(strip $(EXEFILE) $(DLLFILE) $(DLLLIBFILE)),)
+	$(RM) $(EXIST_CLEAN_TMP)
+endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..3e3efaf2463df72772fa49c9f0132f5d5c4b8d46
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/Makefile
@@ -0,0 +1,8 @@
+
+CUR_REL_PATH = ..
+
+INSTALL_DIR = $(TOP_DEST_DIR)$(PS)
+TARGET_FILES = 
+SUB_DIRS = mmd
+
+include $(CUR_REL_PATH)/Makefile.common
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..cbcd455221d8b3b8cf3061512379f5f40edf55ca
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/Makefile
@@ -0,0 +1,31 @@
+ECHO = @
+CXX = g++ -o 
+CPPFLAGS = -DKERNEL_64BIT -O3 -DOPTION3=1 -DACL_USE_DMA=1 -DACL_COMPILER_IS_MSVC=0 -Wall -Wno-unknown-pragmas -Wno-delete-non-virtual-dtor -D__USE_XOPEN2K8 -Werror -DACL_HAS_STDLIB_STDIO -DACL_HOST_RUNTIME_IS_STATIC=0 -DACL_OPENCL_HOST_SYS=linux -DACL_OPENCL_HOST_BIT=64 -DACL_TARGET_SYS=linux -DACL_TARGET_BIT=64 -DLINUX -DACL_MAX_DEVICE=128 -I. -I../../include -I$(INTELFPGAOCLSDKROOT)/host/include/CL -I$(TOP_DEST_DIR)/linux64/driver
+CXXFLAGS = -fPIC -m64
+
+LINKER = g++
+LINKER_LIBDIRARGS = -Llib -L$(INTELFPGAOCLSDKROOT)/host/linux64/lib
+LINKER_ARGS = -lrt -pthread -z noexecstack -Wl,-z,relro,-z,now -Wl,-Bsymbolic -fPIC -Wl,--no-undefined -Wl,--exclude-libs,ALL -m64
+INCORPORATE_LIBS = -lpkg_editor
+PREBUILT_OBJS = 
+LINK_LIBS = -ldl    -lelf 
+
+DLLFILE = lib$(MMD_LIB_NAME).so
+DLLLIBFILE = 
+PERVASIVE_DEPENDENCIES = ../../include/aocl_mmd.h ../../include/pkg_editor.h $(TOP_DEST_DIR)/linux64/driver/hw_pcie_constants.h $(TOP_DEST_DIR)/linux64/driver/hw_pcie_dma.h $(TOP_DEST_DIR)/linux64/driver/pcie_linux_driver_exports.h $(TOP_DEST_DIR)/linux64/driver/version.h
+
+OBJ_EXT = o
+OBJS = $(patsubst %.cpp,%.$(OBJ_EXT),$(wildcard *.cpp))
+OBJ_DIR?= .
+OBJ_FILES = $(addprefix $(OBJ_DIR)$(PS),$(OBJS))
+
+
+
+CUR_REL_PATH = ../..
+
+INSTALL_DIR = $(TOP_DEST_DIR)$(PS)linux64$(PS)lib
+TARGET_FILES = $(DLLFILE)
+SPECIAL_INSTALL_FILE = 
+SUB_DIRS =
+
+include $(CUR_REL_PATH)/Makefile.common
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..b6aa9ac9623824289350e0d0a971d81479e0e097
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.cpp
@@ -0,0 +1,705 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie.cpp  ------------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the functions that are defined in aocl_mmd.h               */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+// common and its own header files
+#include "acl_pcie.h" 
+
+// other header files inside MMD driver
+#include "acl_pcie_device.h"
+#include "acl_pcie_debug.h"
+
+// other standard header files
+#include <string.h>
+#include <stdarg.h>
+#include <stdlib.h>
+           
+#include <map>
+#include <sstream>
+#include <string>
+
+#if defined(LINUX)
+#  include <unistd.h>
+#  include <signal.h>
+#  include <semaphore.h>
+#  include <fcntl.h>
+#endif   // LINUX
+
+// MAX size of line read from pipe-ing the output of system call to MMD
+#define BUF_SIZE 1024 
+// MAX size of command passed to system for invoking system call from MMD
+#define SYSTEM_CMD_SIZE 4*1024
+
+
+// static helper functions
+static bool   blob_has_elf_signature( void* data, size_t data_size );
+
+
+
+// global variables used for handling multi-devices and its helper functions
+static std::map<int, ACL_PCIE_DEVICE*> s_handle_map;
+static std::map<int, const std::string>     s_device_name_map;
+static int test_device_exception_signal_number = 63;
+
+static inline ACL_PCIE_DEVICE *get_pcie_device(int handle)
+{
+   std::map<int, ACL_PCIE_DEVICE*>::iterator it = s_handle_map.find(handle);
+   ACL_PCIE_ASSERT(it != s_handle_map.end(), "can't find handle %d -- aborting\n", handle);
+
+   return it->second;
+}
+
+static void discard_pcie_device_handle(int handle)
+{
+   ACL_PCIE_ASSERT(s_handle_map.find(handle) != s_handle_map.end(), "can't find handle %d\n", handle);
+   s_handle_map.erase(handle);
+   s_device_name_map.erase(handle);
+}
+
+static inline bool is_any_device_being_programmed()  
+{ 
+   bool ret = false; 
+   for( std::map<int, ACL_PCIE_DEVICE*>::iterator it = s_handle_map.begin(); it != s_handle_map.end(); it++) { 
+      if( it->second->is_being_programmed() ) { 
+         ret = true; 
+         break; 
+      }    
+   } 
+   return ret; 
+}
+
+// Functions for handling interrupts or signals for multiple devices 
+// This functions are used inside the ACL_PCIE_DEVICE class
+#if defined(WINDOWS)
+void pcie_interrupt_handler( void* data )
+{
+   ACL_PCIE_DEVICE* device = static_cast<ACL_PCIE_DEVICE*>(data);
+   device->service_interrupt();
+}
+
+BOOL ctrl_c_handler( DWORD fdwCtrlType ) 
+{ 
+   if( fdwCtrlType != CTRL_C_EVENT )      return FALSE; 
+
+   if( is_any_device_being_programmed() ) { 
+      ACL_PCIE_INFO("The device is still being programmed, cannot terminate at this point.\n"); 
+      return TRUE; 
+   }
+  
+   // On Windows, the signal handle function is executed by another thread,  
+   // so we cannot simply free all the open devices.  
+   // Just exit when received a ctrl-c event, the OS will take care of the clean-up. 
+   exit(1); 
+} 
+#endif // WINDOWS
+#if defined(LINUX)
+// On Linux, driver will send a SIG_INT_NOTIFY *signal* to notify about an interrupt.
+void pcie_linux_signal_handler (int sig, siginfo_t *info, void *unused)
+{  
+   // test_device_exception_signal_number is resereved for device exception testing
+   if (sig == test_device_exception_signal_number){
+      // Pick the last (most recent) handle for device exception testing
+      unsigned int handle = s_handle_map.rbegin()->first;
+      s_handle_map[handle]->test_trigger_device_interrupt();
+   } else {
+      // the last bit indicates the DMA completion
+      unsigned int irq_type_flag = info->si_int & 0x1;
+      // other bits shows the handle value of the device that sent the interrupt
+      unsigned int handle        = info->si_int >> 1;
+      if( s_handle_map.find(handle) == s_handle_map.end() ) {
+         ACL_PCIE_DEBUG_MSG(":: received an unknown handle %d in signal handler, ignore this.\n", handle);
+         return;
+      }
+
+      s_handle_map[handle]->service_interrupt(irq_type_flag);
+   }
+}
+
+// Function to free all ACL_PCIE_DEVICE struct allocated for open devices
+static inline void free_all_open_devices()
+{
+   for( std::map<int, ACL_PCIE_DEVICE*>::iterator it = s_handle_map.begin(); it != s_handle_map.end(); it++) {
+      delete it->second;
+   }
+}
+
+void ctrl_c_handler(int sig_num)
+{
+   if( is_any_device_being_programmed() ) {
+      ACL_PCIE_INFO("The device is still being programmed, cannot terminate at this point.\n");
+      return;
+   }
+
+   // Free all the resource allocated for open devices before exit the program.
+   // It also notifies the kernel driver about the termination of the program, 
+   // so that the kernel driver won't try to talk to any user-allocated memory
+   // space (mainly for the DMA) after the program exit.
+   free_all_open_devices();
+   exit(1);
+}
+
+void abort_signal_handler(int sig_num)
+{
+   free_all_open_devices();
+   exit(1);
+}
+
+int allocate_and_register_linux_signal_number_helper(int pid) {
+   char buffer[4096], *locOfSigCgt;
+   FILE *fp;
+   int bytes_read, status, ret = -1;
+   unsigned long long sigmask=0;
+   struct sigaction sigusr, oldsig, sigabrt;
+   
+   sprintf(buffer, "/proc/%d/status", pid);
+   fp = fopen(buffer, "rb");
+   ACL_PCIE_ERROR_IF ( fp == NULL, return -1, "Unable to open file %s\n", buffer);
+   bytes_read = fread(buffer, sizeof(buffer[0]), sizeof(buffer)-1, fp);
+   fclose(fp);
+   buffer[bytes_read] = 0;  //null terminate the string
+   locOfSigCgt = strstr(buffer, "SigCgt:"); //returns null if can't find, shouldn't happen
+   ACL_PCIE_ERROR_IF ( locOfSigCgt == NULL, return -1, "Did not find SigCgt: for PID %d\n", pid);
+   sscanf(locOfSigCgt+7, "%llx", &sigmask);
+   
+   // Find an unused signal number
+   for (int i = SIGRTMAX; i >= SIGRTMIN; i--) {
+      if (!((sigmask>>(i-1))&1)) {
+         ret = i;
+         break;
+      }
+   }
+   ACL_PCIE_ERROR_IF ( ret == -1, return -1, "Unable to find an unused signal number\n");
+   
+   // Enable if driver is using signals to communicate with the host.
+   sigusr.sa_sigaction = pcie_linux_signal_handler;
+   sigusr.sa_flags = SA_SIGINFO;
+   oldsig.sa_handler = NULL;
+   oldsig.sa_sigaction = NULL;
+   status = sigaction(ret, &sigusr, &oldsig);
+   if(getenv("ACL_MMD_TEST_INTELFPGA")){
+      ACL_PCIE_ERROR_IF ( ((sigmask>>(test_device_exception_signal_number-1))&1), return -1, "Signal number %i cannot be occupied\n", test_device_exception_signal_number);
+      status = sigaction(test_device_exception_signal_number, &sigusr, &oldsig);
+   }
+   ACL_PCIE_ERROR_IF ( status != 0, return -1, "sigaction failed with status %d, signal number %d\n", status, ret);
+   ACL_PCIE_ERROR_IF ( oldsig.sa_handler != NULL, return -1, "sigaction previous sa_handler not null\n");
+   ACL_PCIE_ERROR_IF ( oldsig.sa_sigaction != NULL, return -1, "sigaction previous sa_sigaction not null\n");
+   
+   // Install signal handler for SIGABRT from assertions in the upper layers
+   sigabrt.sa_handler = abort_signal_handler;
+   sigemptyset(&sigabrt.sa_mask);
+   sigabrt.sa_flags = 0;
+   status = sigaction(SIGABRT, &sigabrt, NULL);
+   ACL_PCIE_ERROR_IF ( status != 0, return -1, "sigaction failed with status %d, signal number %d\n", status, SIGABRT);
+   
+   //if it makes it here, the user got an unused signal number and we installed all signal handlers
+   return ret;
+}
+
+//returns an unused signal number, -1 means ran into some error
+int allocate_and_register_linux_signal_number(pthread_mutex_t *mutex) {
+   int pid, ret, err;
+   
+   pid = getpid();
+   err = pthread_mutex_lock(mutex);
+   ACL_PCIE_ERROR_IF ( err != 0, return -1, "pthread_mutex_lock error %d\n", err);
+   
+   //this has multiple return points, put in separate function so that we don't bypass releasing the mutex
+   ret = allocate_and_register_linux_signal_number_helper(pid);
+   
+   err = pthread_mutex_unlock(mutex);
+   ACL_PCIE_ERROR_IF ( err != 0, return -1, "pthread_mutex_unlock error %d\n", err);
+   
+   return ret;
+}
+#endif   // LINUX
+
+
+
+// Function to install the signal handler for Ctrl-C
+// If ignore_sig != 0, the ctrl-c signal will be ignored by the program
+// If ignore_sig  = 0, the custom signal handler (ctrl_c_handler) will be used
+int install_ctrl_c_handler(int ingore_sig)
+{
+#if defined(WINDOWS)
+   SetConsoleCtrlHandler( (ingore_sig ? NULL : (PHANDLER_ROUTINE) ctrl_c_handler), TRUE );
+#endif   // WINDOWS
+#if defined(LINUX)
+   struct sigaction sig;
+   sig.sa_handler = (ingore_sig ? SIG_IGN : ctrl_c_handler);
+   sigemptyset(&sig.sa_mask);
+   sig.sa_flags = 0;
+   sigaction(SIGINT, &sig, NULL);
+#endif   // LINUX
+
+   return 0;
+}
+
+// Function to return the number of boards installed in the system
+unsigned int get_offline_num_boards() 
+{
+   unsigned int num_boards = 0;
+
+   //These are for reading/parsing the environment variable
+   const char* override_count_string = 0;
+   long parsed_count;
+   char* endptr;
+   
+// Windows MMD will try to open all the devices
+#if defined(WINDOWS)
+   num_boards = ACL_MAX_DEVICE;
+#endif   // WINDOWS
+
+// Linux MMD will look into the number of devices
+#if defined(LINUX)
+   FILE *fp;
+   char str_line_in[BUF_SIZE];
+   char str_board_pkg_name[BUF_SIZE];
+   char str_cmd[SYSTEM_CMD_SIZE];
+
+   sprintf(str_board_pkg_name,"acl%s",ACL_BOARD_PKG_NAME);
+   sprintf(str_cmd, "ls /sys/class/aclpci_%s 2>/dev/null",ACL_BOARD_PKG_NAME);
+   
+   fp = popen(str_cmd, "r");
+
+   // Read every line from output
+   while (fgets(str_line_in, BUF_SIZE, fp) != NULL) {
+      
+      if (strncmp(str_board_pkg_name, str_line_in, strlen(str_board_pkg_name)) == 0) {
+         num_boards++;
+      }
+   }
+   
+   pclose(fp);
+   
+   // Fall back to the legacy behavior of opening all devices when
+   // no boards are found (which implies something else is broken)
+   if (num_boards == 0) {
+      num_boards = ACL_MAX_DEVICE;
+   }
+#endif   // LINUX
+
+   override_count_string = getenv("CL_OVERRIDE_NUM_DEVICES_INTELFPGA");
+   if(override_count_string) {
+      endptr = 0;
+      parsed_count = strtol( override_count_string, &endptr, 10 ); 
+      if (endptr == override_count_string // no valid characters
+         || *endptr // an invalid character
+         || ( parsed_count < 0 || parsed_count >= (long)ACL_MAX_DEVICE ) ) 
+      {
+         //malformed override string, do nothing
+      } else {
+         // Was ok.
+         num_boards = (unsigned int)parsed_count;
+      }
+   }
+
+
+   return num_boards;
+}
+
+
+
+
+// Get information about the board using the enum aocl_mmd_offline_info_t for
+// offline info (called without a handle), and the enum aocl_mmd_info_t for
+// info specific to a certain board. 
+#define RESULT_INT(X) {*((int*)param_value) = X; if (param_size_ret) *param_size_ret=sizeof(int);}
+#define RESULT_STR(X) do { \
+    size_t Xlen = strlen(X) + 1; \
+    memcpy((void*)param_value,X,(param_value_size <= Xlen) ? param_value_size : Xlen); \
+    if (param_size_ret) *param_size_ret=Xlen; \
+  } while(0)
+
+int aocl_mmd_get_offline_info(
+   aocl_mmd_offline_info_t requested_info_id,
+   size_t param_value_size,
+   void* param_value,
+   size_t* param_size_ret 
+)
+{
+   unsigned int num_boards;
+   switch(requested_info_id)
+   {
+      case AOCL_MMD_VERSION:     RESULT_STR(MMD_VERSION); break;
+      case AOCL_MMD_NUM_BOARDS:  
+      {
+         num_boards = get_offline_num_boards();
+         RESULT_INT(num_boards);
+         break;
+      }
+      case AOCL_MMD_BOARD_NAMES: 
+      {
+         // Construct a list of all possible devices supported by this MMD layer
+         std::ostringstream boards;
+         num_boards = get_offline_num_boards();
+         for (unsigned i=0; i<num_boards; i++) {
+            boards << "acl" << ACL_BOARD_PKG_NAME << i;
+            if (i<num_boards-1) boards << ";";
+         }
+         RESULT_STR(boards.str().c_str()); 
+         break;
+      }
+      case AOCL_MMD_VENDOR_NAME: 
+      {
+         RESULT_STR(ACL_VENDOR_NAME); 
+         break;
+      }
+      case AOCL_MMD_VENDOR_ID:  RESULT_INT(ACL_PCI_INTELFPGA_VENDOR_ID); break;
+      case AOCL_MMD_USES_YIELD:  RESULT_INT(0); break;
+      case AOCL_MMD_MEM_TYPES_SUPPORTED: RESULT_INT(AOCL_MMD_PHYSICAL_MEMORY); break;
+   }
+   return 0;
+}
+
+int aocl_mmd_get_info(
+   int handle,
+   aocl_mmd_info_t requested_info_id,
+   size_t param_value_size,
+   void* param_value,
+   size_t* param_size_ret 
+)
+{
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_get_info failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   switch(requested_info_id)
+   {
+     case AOCL_MMD_BOARD_NAME:
+       {
+         std::ostringstream board_name;
+         board_name << ACL_BOARD_NAME << " (" << s_device_name_map[ handle ] << ")";
+         RESULT_STR(board_name.str().c_str()); 
+         break;
+       }
+     case AOCL_MMD_NUM_KERNEL_INTERFACES: RESULT_INT(1); break;
+     case AOCL_MMD_KERNEL_INTERFACES:     RESULT_INT(AOCL_MMD_KERNEL); break;
+     case AOCL_MMD_PLL_INTERFACES:        RESULT_INT(AOCL_MMD_PLL); break;
+     case AOCL_MMD_MEMORY_INTERFACE:      RESULT_INT(AOCL_MMD_MEMORY); break;
+     case AOCL_MMD_PCIE_INFO:             RESULT_STR(pcie_dev->get_dev_pcie_info()); break;
+
+     case AOCL_MMD_TEMPERATURE:
+     {
+         float *r;
+         int temp;
+         pcie_dev->get_ondie_temp_slow_call( &temp );
+         r = (float*)param_value;
+         *r = ((708.0f * (float)temp) / 1024.0f) - 273.0f;
+         if (param_size_ret)
+           *param_size_ret = sizeof(float);
+         break;
+     }
+     
+     // currently not supported
+     case AOCL_MMD_BOARD_UNIQUE_ID:       return -1;
+   }
+   return 0;
+}
+
+#undef RESULT_INT
+#undef RESULT_STR 
+
+
+
+// Open and initialize the named device.
+int AOCL_MMD_CALL aocl_mmd_open(const char *name)
+{
+   static int signal_handler_installed = 0;
+   static int unique_id = 0;
+   int dev_num = -1;
+   static int user_signal_number = -1;
+#if defined(LINUX)
+   static pthread_mutex_t linux_signal_arb_mutex = PTHREAD_MUTEX_INITIALIZER;   //initializes as unlocked, static = no cleanup needed
+#endif   // LINUX
+
+   if (sscanf(name, "acl" ACL_BOARD_PKG_NAME "%d", &dev_num) != 1)     { return -1; }
+   if (dev_num < 0 || dev_num >= ACL_MAX_DEVICE) { return -1; }
+   if (++unique_id <= 0)                         { unique_id = 1; }
+
+   ACL_PCIE_ASSERT(s_handle_map.find(unique_id) == s_handle_map.end(), 
+      "unique_id %d is used before.\n", unique_id);
+
+   if(signal_handler_installed == 0) {
+#if defined(LINUX)
+      user_signal_number = allocate_and_register_linux_signal_number(&linux_signal_arb_mutex);
+      if (user_signal_number == -1) return -1;
+#endif   // LINUX
+
+      install_ctrl_c_handler(0 /* use the custom signal handler */);
+      signal_handler_installed = 1;
+   }
+
+   ACL_PCIE_DEVICE *pcie_dev = new ACL_PCIE_DEVICE( dev_num, name, unique_id, user_signal_number );
+   if ( !pcie_dev->is_valid() ){
+      delete pcie_dev;
+      return -1;
+   }
+
+   s_handle_map[ unique_id ] = pcie_dev;
+   s_device_name_map.insert( std::pair<int, const std::string>(unique_id, name));
+   if (pcie_dev->is_initialized()) {
+      return unique_id;
+   } else {
+      // Perform a bitwise-not operation to the unique_id if the device
+      // do not pass the initial test. This negative unique_id indicates
+      // a fail to open the device, but still provide actual the unique_id 
+      // to allow reprogram executable to get access to the device and 
+      // reprogram the board when the board is not usable. 
+      return ~unique_id; 
+   }
+}
+
+// Close an opened device, by its handle.
+int AOCL_MMD_CALL aocl_mmd_close(int handle)
+{
+   delete get_pcie_device(handle);  
+   discard_pcie_device_handle(handle);
+   
+   return 0;
+}
+
+
+
+// Set the interrupt handler for the opened device.
+int AOCL_MMD_CALL aocl_mmd_set_interrupt_handler( int handle, aocl_mmd_interrupt_handler_fn fn, void* user_data )
+{
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_set_interrupt_handler failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->set_kernel_interrupt(fn, user_data);
+}
+
+// Set the device interrupt handler for the opened device.
+int AOCL_MMD_CALL aocl_mmd_set_device_interrupt_handler( int handle, aocl_mmd_device_interrupt_handler_fn fn, void* user_data )
+{
+
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_set_interrupt_handler failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->set_device_interrupt(fn, user_data);
+}
+
+// Set the operation status handler for the opened device.
+int AOCL_MMD_CALL aocl_mmd_set_status_handler( int handle, aocl_mmd_status_handler_fn fn, void* user_data )
+{
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_set_status_handler failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->set_status_handler(fn, user_data);
+}
+
+
+
+// Called when the host is idle and hence possibly waiting for events to be
+// processed by the device  
+int AOCL_MMD_CALL aocl_mmd_yield(int handle)
+{
+   return get_pcie_device(handle)->yield();
+}
+
+
+
+// Read, write and copy operations on a single interface.
+int AOCL_MMD_CALL aocl_mmd_read(
+   int handle,
+   aocl_mmd_op_t op,
+   size_t len,
+   void* dst,
+   int mmd_interface, size_t offset )
+{
+   void * host_addr = dst;
+   size_t dev_addr  = offset;
+
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_read failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->read_block( op, (aocl_mmd_interface_t)mmd_interface, host_addr, dev_addr, len );
+}
+
+int AOCL_MMD_CALL aocl_mmd_write(
+   int handle,
+   aocl_mmd_op_t op,
+   size_t len,
+   const void* src,
+   int mmd_interface, size_t offset )
+{
+   void * host_addr = const_cast<void *>(src);
+   size_t dev_addr  = offset;
+
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_write failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->write_block( op, (aocl_mmd_interface_t)mmd_interface, host_addr, dev_addr, len );
+}
+
+int AOCL_MMD_CALL aocl_mmd_copy(
+    int handle,
+    aocl_mmd_op_t op,
+    size_t len,
+    int mmd_interface, size_t src_offset, size_t dst_offset )
+{
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_copy failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->copy_block( op, (aocl_mmd_interface_t)mmd_interface, src_offset, dst_offset, len );
+}
+
+
+// Initialize host channel specified in channel_name
+int AOCL_MMD_CALL aocl_mmd_hostchannel_create(
+    int handle,
+    char * channel_name,
+    size_t queue_depth,
+    int direction)
+{
+    ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+    ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1,
+       "aocl_mmd_create_hostchannel failed due to the target device (handle %d) is not properly initialized.\n", handle);
+       
+    return pcie_dev->create_hostchannel( channel_name, queue_depth, direction );
+}
+
+// reset the host channel specified with channel handle
+int AOCL_MMD_CALL aocl_mmd_hostchannel_destroy(
+      int handle,
+      int channel)
+{
+    ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+    ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1,
+       "aocl_mmd_create_hostchannel failed due to the target device (handle %d) is not properly initialized.\n", handle);
+       
+    return pcie_dev->destroy_channel(channel);
+}
+
+// Get the pointer to buffer the user can write/read from the kernel with
+AOCL_MMD_CALL void* aocl_mmd_hostchannel_get_buffer(
+   int handle,
+   int channel,
+   size_t *buffer_size,
+   int *status)
+{
+
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return NULL, 
+      "aocl_mmd_read failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->hostchannel_get_buffer(buffer_size , channel, status);
+}
+
+// Acknolwedge from the user that they have written/read send_size amount of buffer obtained from get_buffer
+size_t AOCL_MMD_CALL aocl_mmd_hostchannel_ack_buffer(
+   int handle,
+   int channel,
+   size_t send_size,
+   int *status)
+{
+
+   ACL_PCIE_DEVICE *pcie_dev = get_pcie_device(handle);
+   ACL_PCIE_ERROR_IF(!pcie_dev->is_initialized(), return -1, 
+      "aocl_mmd_read failed due to the target device (handle %d) is not properly initialized.\n", handle);
+
+   return pcie_dev->hostchannel_ack_buffer(send_size , channel, status);
+}
+
+// Reprogram the device
+int AOCL_MMD_CALL aocl_mmd_reprogram(int handle, void *data, size_t data_size)
+{
+   // assuming the an ELF-formatted blob.
+   if ( !blob_has_elf_signature( data, data_size ) ) {
+      ACL_PCIE_DEBUG_MSG("ad hoc fpga bin\n");
+      return -1;
+   }
+
+   if( get_pcie_device(handle)->reprogram( data, data_size ) ) {
+      return -1;
+   }
+
+   // Delete and re-open the device to reinitialize hardware
+   const std::string device_name = s_device_name_map[handle];
+   delete get_pcie_device(handle);  
+   discard_pcie_device_handle(handle);
+
+   return aocl_mmd_open(device_name.c_str());
+}
+
+
+
+// Shared memory allocator
+AOCL_MMD_CALL void* aocl_mmd_shared_mem_alloc( int handle, size_t size, unsigned long long *device_ptr_out )
+{
+   return get_pcie_device(handle)->shared_mem_alloc (size, device_ptr_out);
+}
+
+// Shared memory de-allocator
+AOCL_MMD_CALL void aocl_mmd_shared_mem_free ( int handle, void* host_ptr, size_t size )
+{
+   get_pcie_device(handle)->shared_mem_free (host_ptr, size);
+}
+
+// This function checks if the input data has an ELF-formatted blob.
+// Return true when it does.
+static bool blob_has_elf_signature( void* data, size_t data_size )
+{
+   bool result = false;
+   if ( data && data_size > 4 ) {
+      unsigned char* cdata = (unsigned char*)data;
+      const unsigned char elf_signature[4] = { 0177, 'E', 'L', 'F' }; // Little endian
+      result = (cdata[0] == elf_signature[0])
+            && (cdata[1] == elf_signature[1])
+            && (cdata[2] == elf_signature[2])
+            && (cdata[3] == elf_signature[3]);
+   }
+   return result;
+}
+
+
+// Return a positive number when single device open. Otherwise, return -1
+AOCL_MMD_CALL int get_open_handle()
+{
+   int open_devices = 0;
+   int handle = 0;
+   for (int i=0; i<30; i++)
+   {
+      if (s_handle_map.count(i) > 0)
+      {
+         open_devices++;
+         handle = i;
+      }
+   }
+   if (open_devices == 1)
+      return handle;
+   else
+      return -1;
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.h
new file mode 100755
index 0000000000000000000000000000000000000000..81fa151080f340723b74a9f904ffc2c3ddca31cc
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie.h
@@ -0,0 +1,128 @@
+#ifndef ACL_PCIE_H
+#define ACL_PCIE_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie.h  --------------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file defines macros and types that are used inside the MMD driver          */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#ifndef ACL_PCIE_EXPORT
+#  define ACL_PCIE_EXPORT __declspec(dllimport)
+#endif
+
+#define MMD_VERSION AOCL_MMD_VERSION_STRING
+#define KERNEL_DRIVER_VERSION_EXPECTED ACL_DRIVER_VERSION
+
+#include <stddef.h>
+#include <stdio.h>
+#include <assert.h>
+#include "cl_platform.h"
+#include "hw_pcie_constants.h"
+#include "aocl_mmd.h"
+
+#if defined(LINUX)
+#  include <version.h>
+#endif   // LINUX
+
+
+#if defined(WINDOWS)
+// Need DWORD, UINT32, etc.  
+// But windows.h spits out a lot of spurious warnings.
+#pragma warning( push )
+#pragma warning( disable : 4668 )
+#  include <windows.h>
+#pragma warning( pop )
+
+// WinDriver header files
+#  include "wdc_lib_wrapper.h"
+
+#  define INVALID_DEVICE (NULL)
+
+// define for the format string for size_t type
+#  define SIZE_FMT_U "%Iu"
+#  define SIZE_FMT_X "%Ix"
+
+#endif   // WINDOWS
+#if defined(LINUX)
+typedef uintptr_t            KPTR;
+typedef ssize_t WDC_DEVICE_HANDLE;
+
+typedef unsigned int        DWORD;
+typedef unsigned long long  QWORD;
+typedef char                 INT8;
+typedef unsigned char       UINT8;
+typedef int16_t             INT16;
+typedef uint16_t           UINT16;
+typedef int                 INT32;
+typedef unsigned int       UINT32;
+typedef long long           INT64;
+typedef unsigned long long UINT64;
+
+// Linux driver-specific exports
+#  include "pcie_linux_driver_exports.h"
+
+#  define INVALID_DEVICE (-1)
+#  define WD_STATUS_SUCCESS 0
+
+// define for the format string for size_t type
+#  define SIZE_FMT_U "%zu"
+#  define SIZE_FMT_X "%zx"
+
+#endif   // LINUX
+
+typedef enum {
+  AOCL_MMD_KERNEL = 0,      // Control interface into kernel interface
+  AOCL_MMD_MEMORY = 1,      // Data interface to device memory
+  AOCL_MMD_PLL = 2,         // Interface for reconfigurable PLL
+  AOCL_MMD_HOSTCH = 3
+} aocl_mmd_interface_t;
+
+// Describes the properties of key components in a standard ACL device
+struct ACL_PCIE_DEVICE_DESCRIPTION
+{
+   DWORD vendor_id;
+   DWORD device_id;
+   char  pcie_info_str[1024];
+};
+
+
+#define ACL_PCIE_ASSERT(COND,...) \
+   do { if ( !(COND) ) { \
+      printf("\nMMD FATAL: %s:%d: ",__FILE__,__LINE__); printf(__VA_ARGS__); fflush(stdout); assert(0); } \
+   } while(0)
+
+#define ACL_PCIE_ERROR_IF(COND,NEXT,...) \
+   do { if ( COND )  { \
+      printf("\nMMD ERROR: " __VA_ARGS__); fflush(stdout); NEXT; } \
+   } while(0)
+
+#define ACL_PCIE_INFO(...) \
+   do { \
+      printf("MMD INFO : " __VA_ARGS__); fflush(stdout); \
+   } while(0)
+
+#endif   // ACL_PCIE_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..89064fa7a7d0e070883ef35953a81a9069ac9fee
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.cpp
@@ -0,0 +1,761 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_config.cpp  ------------------------------------------ C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle functions that program the FPGA.       */
+/* The declaration of the class lives in the acl_pcie_config.h.                    */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_config.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_debug.h"
+
+// other standard header files
+#include <stdlib.h>
+#include <string.h>
+
+#if defined(LINUX)
+#  include <unistd.h>
+#endif   // LINUX
+
+#include "pkg_editor.h"
+
+// MAX size of line read from pipe-ing the output of find_jtag_cable.tcl to MMD
+#define READ_SIZE 1024 
+// MAX size of command passed to system for invoking find_jtag_cable.tcl from MMD
+#define SYSTEM_CMD_SIZE 4*1024
+
+
+
+// Function to install the signal handler for Ctrl-C
+// Implemented inside acl_pcie.cpp
+extern int install_ctrl_c_handler(int ingore_sig);
+
+
+
+ACL_PCIE_CONFIG::ACL_PCIE_CONFIG(WDC_DEVICE_HANDLE device)
+{
+   m_device = device;   
+
+#if defined(WINDOWS)
+   m_slot   = ((WDC_DEVICE *)device)->slot.pciSlot;
+   ACL_PCIE_ASSERT( find_upstream_slot(m_slot, &m_upstream), "cannot find the upstream slot.\n" ); 
+#endif   // WINDOWS
+   
+   return;
+}
+
+ACL_PCIE_CONFIG::~ACL_PCIE_CONFIG() 
+{
+}
+
+
+
+// Change the kernel region using PR only via PCIe, using an in-memory image of the core.rbf
+// For Linux, the actual implementation of PR is inside the kernel mode driver.
+// Return 0 on success.
+int ACL_PCIE_CONFIG::program_core_with_PR_file(char *core_bitstream, size_t core_rbf_len)
+{
+   int pr_result = 1;   // set to default - failure 
+
+   ACL_PCIE_ERROR_IF( core_bitstream == NULL, return 1, 
+      "core_bitstream is an NULL pointer.\n" );
+   ACL_PCIE_ERROR_IF( core_rbf_len < 1000000, return 1, 
+      "size of core rbf file is suspiciously small.\n" );
+
+#if defined(WINDOWS)
+  int i, result;
+  UINT32 to_send, status;
+  UINT32 *data;
+
+  ACL_PCIE_DEBUG_MSG(":: OK to proceed with PR!\n");
+
+  MemoryBarrier();
+  result = WDC_ReadAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET+4, &status);
+  ACL_PCIE_DEBUG_MSG(":: Reading 0x%08X from PR IP status register\n", (int) status);
+
+  to_send = 0x00000001; 
+  ACL_PCIE_DEBUG_MSG(":: Writing 0x%08X to PR IP status register\n", (int) to_send);
+  WDC_WriteAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET+4, to_send);
+
+  MemoryBarrier();
+  result = WDC_ReadAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET+4, &status);
+  ACL_PCIE_DEBUG_MSG(":: Reading 0x%08X from PR IP status register\n", (int) status);
+  if ((status != 0x10) && (status != 0x0)) {
+    ACL_PCIE_ERROR_IF(1, return 1, ":: PR IP not in an usable state.\n");
+  }
+
+  data = (UINT32 *)core_bitstream;
+  ACL_PCIE_DEBUG_MSG(":: Writing %d bytes of bitstream file to PR IP at BAR %d, OFFSET 0x%08X\n", (int)core_rbf_len, (int)ACL_PRCONTROLLER_BAR, (int)ACL_PRCONTROLLER_OFFSET);
+  for (i = 0; i < (int)core_rbf_len/4; i++) {
+    WDC_WriteAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET, data[i]);
+  }
+
+  result = WDC_ReadAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET, &status);
+  ACL_PCIE_DEBUG_MSG(":: Reading 0x%08X from PR IP data register\n", (int) status);
+
+  MemoryBarrier();
+  result = WDC_ReadAddr32(m_device, ACL_PRCONTROLLER_BAR, ACL_PRCONTROLLER_OFFSET+4, &status);
+  ACL_PCIE_DEBUG_MSG(":: Reading 0x%08X from PR IP status register\n", (int) status);
+  if (status == 0x14){
+    ACL_PCIE_DEBUG_MSG(":: PR done!: 0x%08X\n", (int) status);
+    pr_result = 0;
+  } else {
+    ACL_PCIE_DEBUG_MSG(":: PR error!: 0x%08X\n", (int) status);
+    pr_result = 1;
+  }
+
+  ACL_PCIE_DEBUG_MSG(":: PR completed!\n");
+
+#endif   // WINDOWS
+#if defined(LINUX)
+   struct acl_cmd cmd_pr = { ACLPCI_CMD_BAR, ACLPCI_CMD_DO_PR, NULL, NULL };
+
+   cmd_pr.user_addr = core_bitstream;
+   cmd_pr.size      = core_rbf_len;
+     
+   pr_result = read( m_device, &cmd_pr, sizeof(cmd_pr) );
+
+#endif   // LINUX
+
+   return pr_result;   
+}
+
+
+// Windows specific code to disable PCIe advanced error reporting on the
+// upstream port.
+// No-op in Linux because save_pcie_control_regs() has already disabled
+// AER on the upstream port.
+// Returns 0 on success
+int ACL_PCIE_CONFIG::disable_AER_windows( int *has_aer, DWORD *location_of_aer ) {
+#if defined(WINDOWS)
+  DWORD WD_status;
+
+  // Find location in extended config space of AER (id 0x0001) in upstream port
+  *has_aer = find_extended_capability( m_upstream, PCIE_AER_CAPABILITY_ID, location_of_aer);
+
+  // Disable AER by setting bit 5 (surprise down) in uncorrectable error mask register (offset 0x8, 4 bytes)
+  // This prevents the root complex from reporting the error further upstream
+  UINT32 data;
+  if (*has_aer) {
+    WD_status  = WDC_PciReadCfgBySlot (&m_upstream, (*location_of_aer)+PCIE_AER_UNCORRECTABLE_MASK_OFFSET, &data, 4);
+    data      |= PCIE_AER_SURPRISE_DOWN_BIT;
+    WD_status |= WDC_PciWriteCfgBySlot(&m_upstream, *(location_of_aer)+PCIE_AER_UNCORRECTABLE_MASK_OFFSET, &data, 4);
+
+    ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+        "WDC_PciReadCfgBySlot/WDC_PciWriteCfgBySlot failed when programming with SOF file.\n");
+  }
+#endif   // WINDOWS
+  return 0;
+}
+
+
+// Windows specific code to enable PCIe advanced error reporting on the
+// upstream port.
+// No-op in Linux because load_pcie_control_regs() has already enabled
+// AER on the upstream port.
+// Returns 0 on success
+int ACL_PCIE_CONFIG::enable_AER_and_retrain_link_windows( int has_aer, DWORD location_of_aer ) {
+#if defined(WINDOWS)
+  DWORD WD_status;
+  int status;
+
+  status = load_pci_control_regs();
+  ACL_PCIE_ERROR_IF(status, return -1, 
+      "load_pci_control_regs failed programming with SOF file.\n");
+
+  // Restore AER by resetting bit 5 (surprise down) in uncorrectable error mask register (offset 0x8)
+  // But first, need to clear the surprise down error (bit 5) in the status register (offsets 0x4 and 0x10)
+  // Errors are cleared by writing a 1 to that bit, so to clear all errors, write back the value just read
+  UINT32 data;
+  if (has_aer) {
+    WD_status  = WDC_PciReadCfgBySlot ( &m_upstream, location_of_aer+PCIE_AER_UNCORRECTABLE_STATUS_OFFSET, &data, 4 );
+    WD_status |= WDC_PciWriteCfgBySlot( &m_upstream, location_of_aer+PCIE_AER_UNCORRECTABLE_STATUS_OFFSET, &data, 4 );
+
+    WD_status |= WDC_PciReadCfgBySlot ( &m_upstream, location_of_aer+PCIE_AER_CORRECTABLE_STATUS_OFFSET, &data, 4 );
+    WD_status |= WDC_PciWriteCfgBySlot( &m_upstream, location_of_aer+PCIE_AER_CORRECTABLE_STATUS_OFFSET, &data, 4 );
+
+    WD_status |= WDC_PciReadCfgBySlot ( &m_upstream, location_of_aer+PCIE_AER_UNCORRECTABLE_MASK_OFFSET, &data, 4 );
+    data      &= ~PCIE_AER_SURPRISE_DOWN_BIT;
+    WD_status |= WDC_PciWriteCfgBySlot( &m_upstream, location_of_aer+PCIE_AER_UNCORRECTABLE_MASK_OFFSET, &data, 4 );
+
+    ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+        "WDC_PciReadCfgBySlot/WDC_PciWriteCfgBySlot failed when programming SOF file.\n");
+  }
+
+  // Retrain the link after reprogramming the FPGA
+  status = retrain_link(m_slot);
+  ACL_PCIE_ERROR_IF(status, return -1, 
+      "Failed link retraining after programming SOF file.\n");
+#endif   // WINDOWS
+
+  return 0;
+}
+
+
+// Program the FPGA using a given SOF file
+// Quartus is needed for this, because, 
+//   quartus_pgm is used to program the board through USB blaster
+// For Linux, when the kernel driver is asked to save/load_pcie_control_regs(),
+//   it will also disable/enable the aer on the upstream, so no need to 
+//   implement those here.
+// NOTE: This function only works with single device machines - if there
+// are multiple cards (and multiple USB-blasters) in the system, it doesn't
+// properly determine which card is which.  Only the first device will be
+// programmed.
+// Return 0 on success.
+int ACL_PCIE_CONFIG::program_with_SOF_file(const char *filename, const char *ad_cable, const char *ad_device_index) 
+{
+   const int MAX_ATTEMPTS   = 3;
+   int       program_failed = 1;
+   int   status;
+   bool use_cable_autodetect = true;
+
+   // If ad_cable value is "0", either JTAG cable autodetect failed or not
+   // supported, then use the default value
+   if (strcmp(ad_cable, "0") == 0)
+     use_cable_autodetect = false;
+ 
+   const char *cable = getenv("ACL_PCIE_JTAG_CABLE");
+   if ( !cable ) { 
+      if (use_cable_autodetect) {
+         cable = ad_cable;
+         ACL_PCIE_INFO("setting Cable to autodetect value %s\n",cable);
+      } else {
+         cable = "1";
+         ACL_PCIE_INFO("setting Cable to default value %s\n",cable);
+      }
+   }
+
+   const char *device_index = getenv("ACL_PCIE_JTAG_DEVICE_INDEX");
+   if ( !device_index ) {
+      if (use_cable_autodetect) { 
+         device_index = ad_device_index;
+         ACL_PCIE_INFO("setting Device Index to autodetect value %s\n",device_index);
+      } else {
+         device_index = "1";
+         ACL_PCIE_INFO("setting Device Index to default value %s\n",device_index);
+      }
+   }
+
+   char cmd[4*1024];
+   sprintf(cmd, "quartus_pgm -c %s -m jtag -o \"P;%s@%s\"", cable, filename, device_index);
+   ACL_PCIE_INFO("executing \"%s\"\n", cmd);
+
+   // Disable AER
+   int has_aer;
+   DWORD location_of_aer;
+   status = disable_AER_windows( &has_aer, &location_of_aer );
+   ACL_PCIE_ERROR_IF(status, return -1, 
+      "Failed to disable AER on Windows before programming SOF.\n");
+
+   // Set the program to ignore the ctrl-c signal
+   // This setting will be inherited by the systme() function call below,
+   // so that the quartus_pgm call won't be interrupt by the ctrl-c signal.
+   install_ctrl_c_handler(1 /* ignore the signal */);
+
+   // Program FPGA by executing the command
+   for( int attempts = 0; attempts < MAX_ATTEMPTS && program_failed; attempts++ ){
+      program_failed = system(cmd);
+#if defined(WINDOWS)
+      WDC_Sleep( 2000000, WDC_SLEEP_NON_BUSY );
+#endif   // WINDOWS
+#if defined(LINUX)
+      sleep(2);
+#endif   // LINUX
+   }
+
+   // Restore the original custom ctrl-c signal handler
+   install_ctrl_c_handler(0 /* use the custom signal handler */);
+
+   // Enable AER
+   status = enable_AER_and_retrain_link_windows( has_aer, location_of_aer );
+   ACL_PCIE_ERROR_IF(status, return -1, 
+      "Failed to enable AER and retrain link on Windows after programming SOF.\n");
+
+   return program_failed;
+}
+
+bool ACL_PCIE_CONFIG::find_cable_with_ISSP(unsigned int cade_id, char *ad_cable, char *ad_device_index ) 
+{
+   FILE *fp;
+   int status;
+   char line_in[READ_SIZE];
+   bool found_cable = false; 
+
+   char cmd[SYSTEM_CMD_SIZE];
+   const char *aocl_boardpkg_root = getenv("AOCL_BOARD_PACKAGE_ROOT");
+   if (!aocl_boardpkg_root) {
+      ACL_PCIE_INFO("AOCL_BOARD_PACKAGE_ROOT not set!!!");
+      return false;   
+   }
+   
+   sprintf(cmd, "quartus_stp -t %s/scripts/find_jtag_cable.tcl %X", aocl_boardpkg_root, cade_id);
+   ACL_PCIE_DEBUG_MSG("executing \"%s\"\n", cmd);
+   
+   // Open PIPE to tcl script
+#if defined(WINDOWS)
+   fp = _popen(cmd, "r");
+#endif   // WINDOWS
+#if defined(LINUX)
+   fp = popen(cmd, "r");
+#endif   // LINUX
+
+   if (fp == NULL) {
+      ACL_PCIE_INFO("Couldn't open fp file\n");
+   }
+  
+   // Read everyline and look for matching string from tcl script
+   while (fgets(line_in, READ_SIZE, fp) != NULL) {
+      ACL_PCIE_DEBUG_MSG("%s", line_in);
+      const char* str_match_cable = "Matched Cable:";
+      const char* str_match_dev_name = "Device Name:@";
+      const char* str_match_end = ":";
+      // parsing the string and extracting the cable/index value
+      // from the output of find_jtag_cable.tcl script
+      char* pos_cable = strstr(line_in, str_match_cable);
+      if (pos_cable) {
+         found_cable = true;
+         // find the sub-string locations in the line
+         char* pos_dev_name = strstr(line_in, str_match_dev_name);
+         char* pos_end = strstr(pos_dev_name + strlen(str_match_dev_name), str_match_end); //Find the last ":" 
+         // calculate the cable/index string size
+         int i_cable_str_len = pos_dev_name - pos_cable - strlen(str_match_cable);
+         int i_dev_index_str_len = pos_end - pos_dev_name - strlen(str_match_dev_name);
+         // extract the cable/index value from the line
+         sprintf(ad_cable,"%.*s", i_cable_str_len, pos_cable + strlen(str_match_cable));
+         sprintf(ad_device_index,"%.*s", i_dev_index_str_len, pos_dev_name + strlen(str_match_dev_name));
+         ACL_PCIE_INFO("JTAG Autodetect device found Cable:%s, Device Index:%s\n", ad_cable, ad_device_index); 
+         break;
+      } 
+   }
+   
+#if defined(WINDOWS)
+   status = _pclose(fp);
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = pclose(fp);
+#endif   // LINUX
+   if (status == -1) {
+      /* Error reported by pclose() */
+      ACL_PCIE_INFO("Couldn't close find_cable_with_ISSP file\n");
+   } else {
+      /* Use macros described under wait() to inspect `status' in order
+      *        to determine success/failure of command executed by popen()
+      *        */
+   }
+   
+   if (!found_cable) {
+      ACL_PCIE_INFO("Autodetect Cable not found!!\n");
+   }
+   return found_cable;
+}
+
+
+
+// Functions to save/load control registers form PCI Configuration Space
+// This saved registers are used to restore the PCIe link after reprogramming
+// through methods other than PR
+// For Windows, the register values are stored in this class, and do 
+//   nothing else
+// For Linux, the register values are stored inside the kernel driver, 
+//   And, it will disable the interrupt and the aer on the upstream, 
+//   when the save_pci_control_regs() function is called. They will 
+//   be enable when load_pci_control_regs() is called.  
+// Return 0 on success
+int ACL_PCIE_CONFIG::save_pci_control_regs() 
+{
+   int save_failed = 1;
+   
+#if defined(WINDOWS)
+   save_failed = (int)WDC_PciReadCfg(m_device, 0, m_config_space, CONFIG_SPACE_SIZE);
+#endif   // WINDOWS
+#if defined(LINUX)
+   struct acl_cmd cmd_save = { ACLPCI_CMD_BAR, ACLPCI_CMD_SAVE_PCI_CONTROL_REGS, NULL, NULL };
+   save_failed = read(m_device, &cmd_save, 0);
+#endif   // LINUX
+
+   return save_failed;
+}
+
+int ACL_PCIE_CONFIG::load_pci_control_regs() 
+{
+   int load_failed = 1;
+   
+#if defined(WINDOWS)
+   load_failed = (int)WDC_PciWriteCfg(m_device, 0, m_config_space, CONFIG_SPACE_SIZE);
+#endif   // WINDOWS
+#if defined(LINUX)
+   struct acl_cmd cmd_load = { ACLPCI_CMD_BAR, ACLPCI_CMD_LOAD_PCI_CONTROL_REGS, NULL, NULL };
+   load_failed = read(m_device, &cmd_load, 0);
+#endif   // LINUX
+
+   return load_failed;
+}
+
+
+
+// Functions to query the PCI related information 
+// Use NULL as input for the info that you don't care about 
+// Return 0 on success. 
+int ACL_PCIE_CONFIG::query_pcie_info(unsigned int *pcie_gen, unsigned int *pcie_num_lanes, char *pcie_slot_info_str) 
+{ 
+   int            status = 0; 
+#if defined(WINDOWS) 
+   const DWORD  LINK_STATUS_OFFSET = 0x12; 
+   DWORD        board_caps_offset; 
+   unsigned int read_value = 0; 
+
+   // Find the PCIe Capabilities Structure offset 
+   ACL_PCIE_ERROR_IF( find_capabilities(m_slot, &board_caps_offset) != 1, return -1,  
+      "cannot find capabilities when querying PCIE info.\n"); 
+
+   DWORD board_status = board_caps_offset + LINK_STATUS_OFFSET; 
+   DWORD WD_status = WDC_PciReadCfgBySlot( &m_slot, board_status, &read_value, 2 ); 
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1,  
+      "WDC_PciReadCfgBySlot failed when querying PCIE info.\n"); 
+
+   if( pcie_gen != NULL) { 
+      *pcie_gen = read_value & 0xf; 
+   } 
+
+   if( pcie_num_lanes != NULL ) { 
+      *pcie_num_lanes = (read_value & 0xf0) >> 4; 
+   } 
+
+   if( pcie_slot_info_str != NULL ) { 
+      sprintf(pcie_slot_info_str, "%02x:%02x.%02x",  
+         m_slot.dwBus, m_slot.dwSlot, m_slot.dwFunction); 
+   } 
+#endif   // WINDOWS 
+#if defined(LINUX) 
+   struct acl_cmd driver_cmd; 
+
+   if( pcie_gen != NULL ) { 
+      driver_cmd.bar_id      = ACLPCI_CMD_BAR; 
+      driver_cmd.command     = ACLPCI_CMD_GET_PCI_GEN; 
+      driver_cmd.device_addr = NULL; 
+      driver_cmd.user_addr   = pcie_gen; 
+      driver_cmd.size        = sizeof(*pcie_gen); 
+      status |= read (m_device, &driver_cmd, sizeof(driver_cmd)); 
+   }
+
+   if( pcie_num_lanes != NULL ) { 
+      driver_cmd.bar_id      = ACLPCI_CMD_BAR; 
+      driver_cmd.command     = ACLPCI_CMD_GET_PCI_NUM_LANES; 
+      driver_cmd.device_addr = NULL; 
+      driver_cmd.user_addr   = pcie_num_lanes; 
+      driver_cmd.size        = sizeof(*pcie_num_lanes); 
+      status |= read (m_device, &driver_cmd, sizeof(driver_cmd)); 
+   } 
+
+   if( pcie_slot_info_str != NULL ) { 
+      driver_cmd.bar_id      = ACLPCI_CMD_BAR; 
+      driver_cmd.command     = ACLPCI_CMD_GET_PCI_SLOT_INFO; 
+      driver_cmd.device_addr = NULL; 
+      driver_cmd.user_addr   = pcie_slot_info_str; 
+      driver_cmd.size        = sizeof(pcie_slot_info_str); 
+      status |= read (m_device, &driver_cmd, sizeof(driver_cmd)); 
+   } 
+#endif   // LINUX 
+   return status; 
+} 
+
+
+
+void ACL_PCIE_CONFIG::wait_seconds( unsigned seconds ) {
+ #if defined(WINDOWS)
+    WDC_Sleep( seconds * 1000000, WDC_SLEEP_NON_BUSY );
+  #endif   // WINDOWS
+  #if defined(LINUX)
+    sleep( seconds );
+  #endif   // LINUX
+}
+
+
+#if defined(WINDOWS)
+// Retrain the PCIe link after programming FPGA with SOF file (Windows only)
+// Return 0 on success
+int ACL_PCIE_CONFIG::retrain_link(WD_PCI_SLOT &slot) 
+{
+   const int DESIRED_WIDTH = 8;
+   const int GEN3_SPEED    = 3, GEN2_SPEED    = 2, GEN1_SPEED    = 1;
+
+   const DWORD LINK_STATUS_OFFSET       = 0x12;
+   const DWORD LINK_CONTROL_OFFSET      = 0x10;
+   const DWORD LINK_CAPABILITIES_OFFSET = 0x0c;
+   const DWORD RETRAIN_LINK_BIT         = (1 << 5);
+   const DWORD TRAINING_IN_PROGRESS_BIT = (1 << 11);
+
+   DWORD        WD_status;
+   DWORD        board_caps_offset, usa_caps_offset;
+
+   // Find the PCIe Capabilities Structure offset
+   ACL_PCIE_ERROR_IF( find_capabilities(slot, &board_caps_offset) != 1, return -1, 
+      "cannot find capabilities when retraining the link.\n");
+
+   // Find the PCIe Capabilities Structure offset for the upstream port
+   ACL_PCIE_ERROR_IF( find_capabilities(m_upstream, &usa_caps_offset)!= 1, return -1, 
+      "cannot find PCIe capabilities structure for upstream port.\n" );
+
+   // variables for checking status and link caps
+   unsigned int status;
+   UINT32       link_caps;
+
+   DWORD board_status    = board_caps_offset + LINK_STATUS_OFFSET; 
+   DWORD board_link_caps = board_caps_offset + LINK_CAPABILITIES_OFFSET;
+   DWORD usa_status      = usa_caps_offset   + LINK_STATUS_OFFSET;
+   DWORD usa_control     = usa_caps_offset   + LINK_CONTROL_OFFSET;
+   DWORD usa_link_caps   = usa_caps_offset   + LINK_CAPABILITIES_OFFSET;
+
+   // Check the current status for the board
+   WD_status = WDC_PciReadCfgBySlot( &slot, board_status, &status, 2);
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   if((status & 0xf) == GEN3_SPEED){ 
+      ACL_PCIE_INFO("Link currently operating at 8 GT/s.\n");
+   } else if((status & 0xf) == GEN2_SPEED){
+      ACL_PCIE_INFO("Link currently operating at 5 GT/s.\n");
+   } else if((status & 0xf) == GEN1_SPEED){
+      ACL_PCIE_INFO("Link currently operating at 2.5 GT/s\n");
+   } else{
+      ACL_PCIE_INFO("Link currently operating at an unknown speed. Status register is %x\n", status);
+   }
+
+   // check the current link caps for the board
+   WD_status = WDC_PciReadCfgBySlot( &slot, board_link_caps, &link_caps, 4 );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   unsigned int board_max_width       = (link_caps >> 4) & 0x3f;   // Link width: bits 9:4
+   unsigned int supported_speed_bits  = (link_caps & 0x0f);        // Link speed: bits 3:0
+   unsigned int desired_trained_speed = supported_speed_bits;
+
+   float board_max_speed = (supported_speed_bits == GEN1_SPEED) ? 2.5f :
+                           (supported_speed_bits == GEN2_SPEED) ? 5.0f :
+                           (supported_speed_bits == GEN3_SPEED) ? 8.0f : //gen 3
+                                                                  0.0f ;
+   ACL_PCIE_DEBUG_MSG("Board max upstream width: x%d\n",       board_max_width);
+   ACL_PCIE_DEBUG_MSG("Board max upstream speed: %.1f GT/s\n", board_max_speed);
+
+   // check the current link caps for the upstream port
+   WD_status = WDC_PciReadCfgBySlot( &m_upstream, usa_link_caps, &link_caps, 4 );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   unsigned int max_width = (link_caps >> 4) & 0x3f;   // Link width: bits 9:4
+   supported_speed_bits   = (link_caps & 0x0f);        // Link speed: bits 3:0
+   desired_trained_speed  = supported_speed_bits < desired_trained_speed ? 
+      supported_speed_bits : desired_trained_speed;
+
+   float max_speed = (supported_speed_bits == GEN1_SPEED) ? 2.5f :
+                     (supported_speed_bits == GEN2_SPEED) ? 5.0f :
+                     (supported_speed_bits == GEN3_SPEED) ? 8.0f : //gen 3
+                                                            0.0f ;
+   ACL_PCIE_DEBUG_MSG("Max upstream width: x%d\n",       max_width);
+   ACL_PCIE_DEBUG_MSG("Max upstream speed: %.1f GT/s\n", max_speed);
+
+   if(max_width < DESIRED_WIDTH) 
+      ACL_PCIE_WARN_MSG("PCIe slot does not support more than %d lanes, PCIe throughput will be adversely affected.\n", DESIRED_WIDTH);
+   if(supported_speed_bits < 2)
+      ACL_PCIE_WARN_MSG("PCIe slot does not support gen2 operation.  PCIe throughput will be adversely affected.\n");
+
+   // Retrain the link
+   UINT16       control;
+   WD_status  = WDC_PciReadCfgBySlot ( &m_upstream, usa_status,  &status,  2 );
+   WD_status |= WDC_PciReadCfgBySlot ( &m_upstream, usa_control, &control, 2 );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   ACL_PCIE_DEBUG_MSG("Upstream status before retrain: 0x%x\n",  status);
+   ACL_PCIE_DEBUG_MSG("Upstream control before retrain: 0x%x\n", control);
+
+   DWORD wdata = control | RETRAIN_LINK_BIT;
+   WD_status = WDC_PciWriteCfgBySlot( &m_upstream, usa_control, &wdata, 2 );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciWriteCfgBySlot failed when retraining the link.\n");
+
+   // Wait for training to complete
+   bool training = true;
+   UINT32 timeout = 0;
+   while(training && timeout < 50) {
+      WD_status |= WDC_PciReadCfgBySlot( &m_upstream, usa_status, &status, 2 );
+      training = (status & (TRAINING_IN_PROGRESS_BIT));
+      WDC_Sleep( 1000, WDC_SLEEP_BUSY ); // 1 ms
+      ++timeout;
+   }
+
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   ACL_PCIE_ERROR_IF(training, return -1, 
+      "Link training timed out, PCIe link not established. \n");
+
+   ACL_PCIE_DEBUG_MSG("Link training completed in %d ms.\n", timeout);
+
+   // Check the new link speed
+   WD_status = WDC_PciReadCfgBySlot( &slot, board_status, &status, 2 );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, 
+      "WDC_PciReadCfgBySlot failed when retraining the link.\n");
+
+   unsigned int lanes         = (status & 0xf0) >> 4;
+   unsigned int trained_speed = status & 0xf;
+   unsigned int real_trained_speed_per_lane = (trained_speed==GEN1_SPEED) ? 250U : 
+                                              (trained_speed==GEN2_SPEED) ? 500U : 
+                                              (trained_speed==GEN3_SPEED) ? 1000U : 
+                                                                            0U;
+   ACL_PCIE_INFO("Link operating at Gen %u with %u lanes.\n", trained_speed, lanes);
+   ACL_PCIE_INFO("Expected peak bandwidth = %u MB/s\n",lanes*real_trained_speed_per_lane);
+
+   unsigned int achievable_max_width = (board_max_width < max_width) ? 
+      board_max_width : max_width;   //max_width is that of upstream
+
+   if (lanes < achievable_max_width)
+      ACL_PCIE_WARN_MSG("Link trained %d lanes whereas %d were desired.\n", lanes, achievable_max_width);
+
+   ACL_PCIE_ERROR_IF(trained_speed < desired_trained_speed, return -1, 
+      "Link trained at gen %d whereas gen %d was desired.\n", trained_speed, desired_trained_speed);
+
+   return 0;  // success
+}
+
+
+
+// Try to find the upstream port for the current board slot
+// Return 1 when the target is found
+int ACL_PCIE_CONFIG::find_upstream_slot(WD_PCI_SLOT &slot, WD_PCI_SLOT *upstream) 
+{
+   int    found = 0;
+   UINT32 data;
+   DWORD  WD_status;
+
+   // Enumerate all devices
+   WDC_PCI_SCAN_RESULT scan_result;
+   WD_status = WDC_PciScanDevices(0, 0, &scan_result);
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return 0, 
+      "WDC_PciScanDevices failed when finding upstream slot.\n");
+
+   for(unsigned int i = 0; i < scan_result.dwNumDevices; i++) {
+      // Looking for a type 1 header
+      // The top bit indicates multi-function support, ignore it (mask with 0x7f, not 0xff)
+      WD_status = WDC_PciReadCfgBySlot( &(scan_result.deviceSlot[i]), 0x0C, &data, 4 );
+      if ( WD_status != WD_STATUS_SUCCESS || ((data >> 16) & 0x7f) != 1 ) {
+         continue;
+      }
+
+      // Check the secondary bus number - looking for the source of the bus with ID [bus]
+      WD_status = WDC_PciReadCfgBySlot( &(scan_result.deviceSlot[i]), 0x18, &data, 4 );
+      if ( WD_status != WD_STATUS_SUCCESS || ((data >> 8) & 0xff) != slot.dwBus ) {
+         continue;
+      }
+
+      // Found the source of this bus - verify there is only one
+      ACL_PCIE_ERROR_IF(found, return 0, 
+         "Found multiple sources(%d and %d) for bus %d!\n", 
+         upstream->dwBus, scan_result.deviceSlot[i], slot.dwBus);
+
+      found = 1;
+      *upstream = scan_result.deviceSlot[i];
+   }
+
+   return found;
+}
+
+// Try to find the PCIe capabilities structure offset
+// Return 1 when the target is found
+int ACL_PCIE_CONFIG::find_capabilities(WD_PCI_SLOT &slot, DWORD *offset)
+{
+   int    found = 0;
+   UINT32 data;
+   DWORD  WD_status;
+
+   // Read the head of the caps list
+   WD_status = WDC_PciReadCfgBySlot(&slot, 0x34, &data, 4);
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return 0, 
+      "WDC_PciReadCfgBySlot failed when finding capabilities.\n");
+   ACL_PCIE_ERROR_IF(data == 0xffffffff, return 0,
+      "get 0xffffffff when finding capabilities.\n");
+
+   DWORD cap_ptr = (data & 0xff);
+
+   // Walk the list of caps to find the PCIe caps structure
+   while(cap_ptr != 0 && !found) {
+      WD_status |= WDC_PciReadCfgBySlot(&slot, cap_ptr, &data, 4);
+
+      // Grab the current caps struct and link to the next one
+      *offset = cap_ptr;
+      cap_ptr = ((data >> 8) & 0xff);
+
+      // Looking for the PCIe caps ID
+      if( (data & 0xff) != 0x10 )
+         continue;
+
+      // Found it :)
+      found = 1;
+   }
+
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return 0, 
+      "WDC_PciReadCfgBySlot failed when finding capabilities.\n");
+
+   return found;
+}   
+
+// Try to find the location in extended config space of the given ID
+// Return 1 when the target is found
+int ACL_PCIE_CONFIG::find_extended_capability(WD_PCI_SLOT &slot, UINT16 ex_cap_id_to_find, DWORD *offset) 
+{
+   int found = 0;
+   UINT32 data;
+   DWORD WD_status = WD_STATUS_SUCCESS;
+
+   DWORD ex_cap_ptr = 0x100;
+
+   // Walk the link list of capabilities
+   while(ex_cap_ptr != 0 && !found) {
+      WD_status |= WDC_PciReadCfgBySlot( &slot, ex_cap_ptr, &data, 4 );
+
+      // Grab the current caps struct and link to the next one
+      *offset = ex_cap_ptr;
+      ex_cap_ptr = ((data >> 20) & 0xfff);	//next extended capability on bits 31:20
+
+      // extended capability id is on bottom 16 bits
+      if( (data & 0xffff) != ex_cap_id_to_find )
+         continue;
+
+      // Found it :)
+      found = 1;
+   }
+
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return 0, 
+      "WDC_PciReadCfgBySlot failed when finding extended capability.\n");
+
+   return found;
+}
+#endif   // WINDOWS
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.h
new file mode 100755
index 0000000000000000000000000000000000000000..53aff8cdf0277b3435a089bb061b4bde1a801851
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_config.h
@@ -0,0 +1,100 @@
+#ifndef ACL_PCIE_CONFIG_H
+#define ACL_PCIE_CONFIG_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_config.h  -------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle functions that program the FPGA.         */
+/* The actual implementation of the class lives in the acl_pcie_config.cpp,        */
+/* so look there for full documentation.                                           */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#define PCIE_AER_CAPABILITY_ID                  ((DWORD)0x0001)
+#define PCIE_AER_UNCORRECTABLE_STATUS_OFFSET    ((DWORD)0x4)
+#define PCIE_AER_UNCORRECTABLE_MASK_OFFSET      ((DWORD)0x8)
+#define PCIE_AER_CORRECTABLE_STATUS_OFFSET      ((DWORD)0x10)
+#define PCIE_AER_SURPRISE_DOWN_BIT              ((DWORD)(1<<5))
+
+class ACL_PCIE_CONFIG
+{
+   public:
+      ACL_PCIE_CONFIG(WDC_DEVICE_HANDLE device);
+      ~ACL_PCIE_CONFIG();
+      
+      // Change the core only via PCIe, using an in-memory image of the core.rbf
+      // This is supported only for Stratix V and newer devices. 
+      // Return 0 on success.
+      int program_core_with_PR_file(char *core_bitstream, size_t core_rbf_len);
+
+      // Program the FPGA using a given SOF file
+      // Input filename, autodetect cable, autodetect device index
+      // Return 0 on success.
+      int program_with_SOF_file(const char *filename, const char *ad_cable, const char *ad_device_index);
+      
+      // Look up CADEID using ISSP 
+      // Return TRUE with cable value in ad_cable, ad_device_index if cable found
+      // Otherwise return FALSE
+      bool find_cable_with_ISSP(unsigned int cade_id, char *ad_cable, char *ad_device_index );
+
+      // Functions to save/load control registers from PCI Configuration Space
+      // Return 0 on success.
+      int save_pci_control_regs();
+      int load_pci_control_regs();
+
+      // Functions to query the PCI related information 
+      // Use NULL as input for the info that you don't care about 
+      // Return 0 on success. 
+      int query_pcie_info(unsigned int *pcie_gen, unsigned int *pcie_num_lanes, char *pcie_slot_info_str);
+
+      // Windows-specific code to control AER, and retrain the link
+      int enable_AER_and_retrain_link_windows( int has_aer, DWORD location_of_aer );
+      int disable_AER_windows( int *has_aer, DWORD *location_of_aer );
+
+      // Platform agnostic sleep (in seconds)
+      void wait_seconds( unsigned seconds );
+
+   private:
+#if defined(WINDOWS)
+      // Retrain the PCIe link after programming FPGA with SOF file (Windows only)
+      // Return 0 on success.
+      int  retrain_link            (WD_PCI_SLOT &slot);
+
+      // Helper functions for finding the PCIe related stuff. (Windows only)
+      // Return 1 when target is found.
+      int  find_upstream_slot      (WD_PCI_SLOT &slot, WD_PCI_SLOT *upstream);
+      int  find_capabilities       (WD_PCI_SLOT &slot, DWORD *offset);      
+      int  find_extended_capability(WD_PCI_SLOT &slot, UINT16 ex_cap_id_to_find, DWORD *offset);  
+
+      static const unsigned int CONFIG_SPACE_SIZE = 0x1000;
+      char m_config_space[CONFIG_SPACE_SIZE];
+      WD_PCI_SLOT m_slot;
+      WD_PCI_SLOT m_upstream;      
+#endif   // WINDOWS
+      
+      WDC_DEVICE_HANDLE   m_device; 
+};
+
+#endif // ACL_PCIE_CONFIG_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..9c534e4d9b717f9e6240c622e81f856bf39157d9
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.cpp
@@ -0,0 +1,56 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_debug.cpp  ------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+int ACL_PCIE_DEBUG   = 0;
+int ACL_PCIE_WARNING = 1;  // turn on the warning message by default
+
+int ACL_PCIE_DEBUG_FLASH_DUMP_BOOT_SECTOR=0;
+
+void set_mmd_debug()
+{
+   char * mmd_debug_var = getenv("ACL_PCIE_DEBUG");
+   if (mmd_debug_var) {
+      ACL_PCIE_DEBUG = atoi(mmd_debug_var);
+      printf("\n:: MMD DEBUG LEVEL set to %d\n", ACL_PCIE_DEBUG );
+   }
+
+   char * hal_debug_dump_flash_bootsect = getenv("ACL_PCIE_DEBUG_FLASH_DUMP_BOOT_SECTOR");
+   if (hal_debug_dump_flash_bootsect)
+      ACL_PCIE_DEBUG_FLASH_DUMP_BOOT_SECTOR = atoi(hal_debug_dump_flash_bootsect);
+}
+
+void set_mmd_warn_msg()
+{
+   char * mmd_warn_var = getenv("ACL_PCIE_WARNING");
+   if(mmd_warn_var){
+      ACL_PCIE_WARNING = atoi(mmd_warn_var);
+   }
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.h
new file mode 100755
index 0000000000000000000000000000000000000000..8641ac9db39165820015c6b2df65abee13c367f4
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_debug.h
@@ -0,0 +1,64 @@
+#ifndef ACL_PCIE_DEBUG_H
+#define ACL_PCIE_DEBUG_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_debug.h  --------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+enum ACL_VERBOSITY 
+{ 
+   VERBOSITY_DEFAULT = 1,
+   VERBOSITY_INVOCATION = 2,     // Dump kernel invocation details
+   VERBOSITY_OP = 3,             // Dump operation invocation details
+   VERBOSITY_IRQ = 5,
+   VERBOSITY_BLOCKTX = 9,        // Dump PCIe block transfers
+   VERBOSITY_PCIE = 10,          // Dump all PCIe transactions
+   VERBOSITY_EVERYTHING = 100  
+};
+
+extern int ACL_PCIE_DEBUG;
+extern int ACL_PCIE_WARNING;
+extern int ACL_PCIE_DEBUG_FLASH_DUMP_BOOT_SECTOR;
+
+// This function gets the value of ACL_PCIE_DEBUG from the environment variable
+void set_mmd_debug();
+void set_mmd_warn_msg();
+
+#include <stdio.h>
+
+#define ACL_PCIE_DEBUG_MSG(m, ...) ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_DEFAULT,m, ## __VA_ARGS__)
+#define ACL_PCIE_DEBUG_MSG_VERBOSE(verbosity, m, ...) if ( (ACL_PCIE_DEBUG|0) >= verbosity) do { printf((m), ## __VA_ARGS__),fflush(stdout); } while (0)
+
+
+#define ACL_PCIE_WARN_MSG(...) \
+   do { if ( ACL_PCIE_WARNING ) { \
+      printf("** WARNING: " __VA_ARGS__); fflush(stdout); } \
+   } while(0)
+
+
+#endif  // ACL_PCIE_DEBUG_H
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..3f51527d9459bc2368982f662c66e320f6c47146
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.cpp
@@ -0,0 +1,1497 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_device.cpp  ------------------------------------------ C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle operations on a single device.         */
+/* The declaration of the class lives in the acl_pcie_device.h                     */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#if defined(WINDOWS)
+#define NOMINMAX
+#  include <time.h>
+#endif   // WINDOWS
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_device.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_config.h"
+#include "acl_pcie_dma.h"
+#include "acl_pcie_mm_io.h"
+#include "acl_pcie_debug.h"
+#include "pkg_editor.h"
+
+// other standard header files
+#include <sstream>
+#include <stdlib.h>
+#include <fstream>
+#include <string.h>
+#include <limits>
+#include "acl_pcie_hostch.h"
+
+#if defined(LINUX)
+#  include <sys/types.h>
+#  include <sys/stat.h>
+#  include <sys/time.h>
+#  include <sys/mman.h>
+#  include <fcntl.h>
+#  include <signal.h>
+#  include <unistd.h>
+#endif   // LINUX
+
+
+
+static int num_open_devices = 0;
+
+#if defined(WINDOWS)
+WDC_DEVICE_HANDLE open_device_windows(ACL_PCIE_DEVICE_DESCRIPTION *info, int dev_num);
+
+// Interrupt service routine for all interrupts on the PCIe interrupt line
+// PCIe interrupts in Windows XP are level-based.  The KMD is responsible for
+// masking off the interrupt until this routine can service the request at
+// user-mode priority.
+extern void pcie_interrupt_handler( void* data );
+#endif   // WINDOWS
+#if defined(LINUX)
+WDC_DEVICE_HANDLE open_device_linux(ACL_PCIE_DEVICE_DESCRIPTION *info, int dev_num);
+#endif   // LINUX
+
+
+
+ACL_PCIE_DEVICE::ACL_PCIE_DEVICE( int dev_num, const char *name, int handle, int user_signal_number ) :
+   kernel_interrupt(NULL),
+   kernel_interrupt_user_data(NULL),
+   device_interrupt(NULL),
+   device_interrupt_user_data(NULL),
+   event_update(NULL),
+   event_update_user_data(NULL),
+   m_io( NULL ),
+   m_dma( NULL ),
+   m_hostch( NULL ),
+   m_config( NULL ),
+   m_handle( -1 ),
+   m_device( INVALID_DEVICE ),
+#if ACL_USE_DMA==1
+   m_use_dma_for_big_transfers(true),
+#else
+   m_use_dma_for_big_transfers(false),
+#endif
+   m_mmd_irq_handler_enable( false ),
+   m_initialized( false ),
+   m_being_programmed( false )
+{
+   ACL_PCIE_ASSERT(name != NULL, "passed in an empty name pointer when creating device object.\n");
+
+   int status = 0;
+
+   // Set debug level from the environment variable ACL_PCIE_DEBUG
+   // Determine if warning messages should be disabled depends on ACL_PCIE_WARNING
+   if (num_open_devices == 0) {  
+      set_mmd_debug();
+      set_mmd_warn_msg();
+   }
+
+   strncpy( m_name, name, (MAX_NAME_LENGTH-1) );
+   m_name[(MAX_NAME_LENGTH-1)] = '\0';
+
+   m_handle         = handle;
+   m_info.vendor_id = ACL_PCI_INTELFPGA_VENDOR_ID;
+   m_info.device_id = 0;   // search for all device id   
+
+#if defined(WINDOWS)
+   m_device = open_device_windows(&m_info, dev_num);
+#endif   // WINDOWS
+#if defined(LINUX)
+   m_device = open_device_linux  (&m_info, dev_num);
+#endif   // LINUX
+
+   // Return to caller if this is simply an invalid device.
+   if (m_device == INVALID_DEVICE) {  return;  }
+   
+   // Initialize device IO and CONFIG objects
+   m_io     = new ACL_PCIE_MM_IO_MGR( m_device );
+   m_config = new ACL_PCIE_CONFIG   ( m_device );
+
+   // Set the segment ID to 0 first forcing cached "segment" to all 1s
+   m_segment=(size_t)~0;
+   if ( this->set_segment( 0x0 ) ) {  return;  }
+
+   // performance basic I/O tests
+   if ( this->version_id_test() ) {   return;   }
+   if ( this->wait_for_uniphy() ) {   return;   }
+
+   // Get PCIE information 
+   unsigned int pcie_gen, pcie_num_lanes; 
+   char pcie_slot_info_str[128] = {0}; 
+
+   status = m_config->query_pcie_info(&pcie_gen, &pcie_num_lanes, pcie_slot_info_str); 
+   ACL_PCIE_ERROR_IF(status, return,  
+      "[%s] fail to query PCIe related information.\n", m_name);    
+   sprintf(m_info.pcie_info_str, "dev_id = %04X, bus:slot.func = %s, Gen%u x%u",  
+      m_info.device_id, pcie_slot_info_str, pcie_gen, pcie_num_lanes); 
+
+   // Initialize the DMA object and enable interrupts on the DMA controller
+   m_dma    = new ACL_PCIE_DMA( m_device, m_io, this );
+
+   m_user_signal_number = user_signal_number;
+
+   // Initialize the Host Channel object
+   m_hostch = new ACL_PCIE_HOSTCH( m_device, m_io, this, m_dma );
+
+   if ( this->enable_interrupts(m_user_signal_number) ) {  return;  }
+   
+   m_skip_quartus_version_check = 0;
+   char *str_test_quartus_ver = getenv("ACL_SKIP_QUARTUS_VERSION_CHECK");
+   if (str_test_quartus_ver) m_skip_quartus_version_check = 1;
+   
+   // Done!
+   m_initialized = true;
+   ACL_PCIE_DEBUG_MSG(":: [%s] successfully initialized (device id: %x).\n", m_name, m_info.device_id);
+   ACL_PCIE_DEBUG_MSG("::           Using DMA for big transfers? %s\n", 
+            ( m_use_dma_for_big_transfers ? "yes" : "no" ) );
+
+}
+
+ACL_PCIE_DEVICE::~ACL_PCIE_DEVICE()
+{
+   int status = this->disable_interrupts();
+   ACL_PCIE_ERROR_IF(status, /* do nothing */ , 
+      "[%s] fail disable interrupt in device destructor.\n", m_name);
+
+   if(m_hostch)    { delete m_hostch; m_hostch = NULL; }
+   if(m_dma)       { delete m_dma;    m_dma = NULL;    }
+   if(m_config)    { delete m_config; m_config = NULL; }
+   if(m_io)        { delete m_io;     m_io = NULL;     }
+
+   if(is_valid()) { 
+      --num_open_devices;
+#if defined(WINDOWS)
+      DWORD WD_status = WDC_PciDeviceClose(m_device);
+      ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, return, 
+         "[%s] failed to close the device handle.\n", m_name);
+
+      if (num_open_devices == 0) {
+         WD_status = WDC_DriverClose();
+         ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, return, 
+            "failed to close the WinDriver library.\n" );
+      }
+#endif   // WINDOWS
+#if defined(LINUX)
+      close (m_device);
+#endif   // LINUX
+   }
+}
+
+
+
+#if defined(WINDOWS)
+WDC_DEVICE_HANDLE open_device_windows(ACL_PCIE_DEVICE_DESCRIPTION *info, int dev_num)
+{
+   DWORD WD_status;
+   WDC_PCI_SCAN_RESULT pci_scan_result;
+   WD_PCI_CARD_INFO    device_info;
+   WDC_DEVICE_HANDLE   device = INVALID_DEVICE;
+   DWORD pci_class_code_rev = 0;
+   DWORD pci_subsystem_ids = 0;
+
+   // Only open the WDC library handle once
+   if (num_open_devices == 0) {
+      const char *license = JUNGO_LICENSE;
+      WD_status = WDC_DriverOpen( WDC_DRV_OPEN_DEFAULT, license );
+      ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, return NULL, 
+         "can't load the WinDriver library.\n" );
+   }
+
+   // Scan for our PCIe device
+   WD_status = WDC_PciScanDevices( info->vendor_id, info->device_id, &pci_scan_result );
+   ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, goto fail, 
+      "failed to scan for the PCI device.\n");
+
+   if( (unsigned int)dev_num >= pci_scan_result.dwNumDevices || dev_num < 0) {
+      ACL_PCIE_DEBUG_MSG(":: [acl" ACL_BOARD_PKG_NAME "%d] Device not found\n", dev_num);
+      goto fail;
+   }
+
+   // Query the device information
+   device_info.pciSlot = pci_scan_result.deviceSlot[dev_num];
+   WD_status = WDC_PciGetDeviceInfo( &device_info );
+   ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, goto fail, 
+      "[acl" ACL_BOARD_PKG_NAME "%d] failed to query device info.\n", dev_num);
+
+   // Save the device id for the selected board
+   info->device_id = pci_scan_result.deviceId[dev_num].dwDeviceId;
+
+   // Open a device handle
+   WD_status = WDC_PciDeviceOpen( &device, &device_info, NULL, NULL, NULL, NULL );
+   ACL_PCIE_ERROR_IF( WD_status != WD_STATUS_SUCCESS, goto fail, 
+      "[acl" ACL_BOARD_PKG_NAME "%d] failed to open the device.\n", dev_num);
+
+   // Read SubSystem IDs out of PCI config space
+   WD_status = WDC_PciReadCfg( device, 0x2C, &pci_subsystem_ids, sizeof(pci_subsystem_ids) );
+   if ( (ACL_PCIE_READ_BIT_RANGE(pci_subsystem_ids,31,16) != ACL_PCI_SUBSYSTEM_DEVICE_ID) || 
+        (ACL_PCIE_READ_BIT_RANGE(pci_subsystem_ids,15,0) != ACL_PCI_SUBSYSTEM_VENDOR_ID) ) {
+     ACL_PCIE_DEBUG_MSG(":: [acl" ACL_BOARD_PKG_NAME "%d] PCI SubSystem IDs do not match, found %08x but expected %04x%04x\n", pci_subsystem_ids, ACL_PCI_SUBSYSTEM_DEVICE_ID, ACL_PCI_SUBSYSTEM_VENDOR_ID);
+     WDC_PciDeviceClose(device);
+     goto fail;
+   }
+
+   // Read Class code out of PCI config space
+   WD_status = WDC_PciReadCfg( device, 8, &pci_class_code_rev, sizeof(pci_class_code_rev) );
+   ACL_PCIE_DEBUG_MSG(":: [acl" ACL_BOARD_PKG_NAME "%d] PCI Class Code and Rev is: %x\n", dev_num, pci_class_code_rev);
+   if ( ( (pci_class_code_rev & (0xff00ff00)) >> 8 ) != ACL_PCI_CLASSCODE ) {
+     ACL_PCIE_DEBUG_MSG(":: [acl" ACL_BOARD_PKG_NAME "%d] PCI Class Code does not match, expected %x, read %d\n", dev_num, ACL_PCI_CLASSCODE, (pci_class_code_rev & 0xff00ff00) >> 8 );
+     WDC_PciDeviceClose(device);
+     goto fail;
+   }
+
+   // Check PCI Revision 
+   if ( (pci_class_code_rev & 0x0ff) != ACL_PCI_REVISION ) {
+     ACL_PCIE_DEBUG_MSG(":: [acl" ACL_BOARD_PKG_NAME "%d] PCI Revision does not match\n", dev_num);
+     WDC_PciDeviceClose(device);
+     goto fail;
+   }
+
+   ++num_open_devices;
+   return device;
+
+fail:
+   // get here after opening the driver and then failing something else.
+   if (num_open_devices == 0) WDC_DriverClose();
+   return INVALID_DEVICE;
+}
+#endif // WINDOWS
+#if defined(LINUX)
+WDC_DEVICE_HANDLE open_device_linux(ACL_PCIE_DEVICE_DESCRIPTION *info, int dev_num)
+{
+   char buf[128] = {0};
+   char expected_ver_string[128] = {0};
+
+   sprintf(buf,"/dev/acl" ACL_BOARD_PKG_NAME "%d", dev_num);
+   ssize_t device = open (buf, O_RDWR);
+
+   // Return INVALID_DEVICE when the device is not available
+   if (device == -1) {
+      return INVALID_DEVICE; 
+   }
+
+   // Make sure the Linux kernel driver is recent
+   struct acl_cmd driver_cmd = { ACLPCI_CMD_BAR, ACLPCI_CMD_GET_DRIVER_VERSION,
+                              NULL, buf, 0 };
+   read (device, &driver_cmd, 0);
+
+   sprintf(expected_ver_string, "%s.%s", ACL_BOARD_PKG_NAME, KERNEL_DRIVER_VERSION_EXPECTED);
+   ACL_PCIE_ERROR_IF( strstr(buf, expected_ver_string) != buf, return INVALID_DEVICE,
+      "Kernel driver mismatch: The board kernel driver version is %s, but\nthis host program expects %s.\n  Please reinstall the driver using aocl install.\n", buf, expected_ver_string );
+
+   // Save the device id for the selected board
+   driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+   driver_cmd.command        = ACLPCI_CMD_GET_PCI_DEV_ID;
+   driver_cmd.device_addr    = NULL;
+   driver_cmd.user_addr      = &info->device_id;
+   driver_cmd.size           = sizeof(info->device_id);
+   read (device, &driver_cmd, sizeof(driver_cmd));
+
+   // Set the FD_CLOEXEC flag for the file handle to disable the child to 
+   // inherit this file handle. So the jtagd will not hold the file handle
+   // of the device and keep sending bogus interrupts after we call quartus_pgm.
+   int oldflags = fcntl( device, F_GETFD, 0);
+   fcntl( device, F_SETFD, oldflags | FD_CLOEXEC );
+
+   ++num_open_devices;
+   return device;
+}
+
+#endif   // LINUX
+
+// This function can be used for triggering a fake device exception for testing
+void ACL_PCIE_DEVICE::test_trigger_device_interrupt()
+{
+   // Example:
+   // Raising ECC NON CORRECTABLE exception (exception code 2)
+   // Providing integer-type private_info (say, equals to 5)
+   unsigned long long int exception_type = 2;
+   int test_private_info = 5;
+   aocl_mmd_interrupt_info interrupt_data = {exception_type, &test_private_info, sizeof(test_private_info)};
+   this->device_interrupt(m_handle, &interrupt_data, this->device_interrupt_user_data);
+}
+
+
+// Perform operations required when an interrupt is received for this device
+void ACL_PCIE_DEVICE::service_interrupt(unsigned int irq_type_flag)
+{
+   unsigned int kernel_update = 0;
+   unsigned int dma_update    = 0;
+
+   int status = this->get_interrupt_type(&kernel_update, &dma_update, irq_type_flag);
+   ACL_PCIE_ERROR_IF(status, return, "[%s] fail to service the interrupt.\n", m_name);
+
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_IRQ,
+      ":: [%s] Irq service routine called, kernel_update=%d, dma_update=%d \n", 
+      m_name, kernel_update, dma_update);
+
+   if (kernel_update && kernel_interrupt != NULL) {
+      #if defined(WINDOWS)
+      status = this->mask_irqs();
+      ACL_PCIE_ERROR_IF(status, return, "[%s] failed to mask kernel interrupt.\n", m_name);   
+      #endif
+      // A kernel-status interrupt - update the status of running kernels
+      ACL_PCIE_ASSERT(kernel_interrupt, 
+         "[%s] received kernel interrupt before the handler is installed.\n", m_name);
+      kernel_interrupt(m_handle, kernel_interrupt_user_data);
+   } else if (dma_update) {
+      // A DMA-status interrupt - let the DMA object handle this
+      m_dma->service_interrupt();
+   }
+
+   // Unmask the kernel_irq to enable the interrupt again.
+   if(m_mmd_irq_handler_enable){
+      status = this->unmask_irqs();   
+   } else if(kernel_update) {
+      status = this->unmask_kernel_irq();  
+   }
+   ACL_PCIE_ERROR_IF(status, return, "[%s] fail to service the interrupt.\n", m_name);   
+
+   return;
+}
+
+
+
+// Enable all interrupts (DMA and Kernel)
+// Won't enable kernel irq unless kernel interrupt callback has been initialized
+// Return 0 on success
+int ACL_PCIE_DEVICE::unmask_irqs()
+{
+   int status = 0;
+   if ( kernel_interrupt == NULL ) {
+      // No masking for DMA interrupt.
+
+   } else {
+      status = m_io->pcie_cra->write32( PCIE_CRA_IRQ_ENABLE, 
+          ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC));
+   }
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] fail to unmask all interrupts.\n", m_name);
+
+   return 0; // success
+}
+
+// Disable all interrupts to service kernel that triggered interrupt
+// If other kernels finish while the interrupt is masked, MSI will trigger again when
+// interrupts are re-enabled.
+int ACL_PCIE_DEVICE::mask_irqs()
+{
+   int status = 0;
+   UINT32 val = 0;
+   status = m_io->pcie_cra->write32 ( PCIE_CRA_IRQ_ENABLE, val);
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] fail to mask the kernel interrupts.\n", m_name);
+   
+   return 0; // success
+}
+
+// Enable the kernel interrupt only
+// Return 0 on success
+int ACL_PCIE_DEVICE::unmask_kernel_irq()
+{
+   int status = 0;
+   UINT32 val = 0;
+
+   status |= m_io->pcie_cra->read32 ( PCIE_CRA_IRQ_ENABLE, &val);
+   val    |= ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC);
+   status |= m_io->pcie_cra->write32( PCIE_CRA_IRQ_ENABLE, val);
+
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] fail to unmask the kernel interrupts.\n", m_name);
+   
+   return 0; // success
+}
+
+// Disable the interrupt
+// Return 0 on success
+int ACL_PCIE_DEVICE::disable_interrupts()
+{
+   int status;
+
+   if(m_mmd_irq_handler_enable) {
+      ACL_PCIE_DEBUG_MSG(":: [%s] Disabling interrupts.\n", m_name);
+
+      status = m_io->pcie_cra->write32( PCIE_CRA_IRQ_ENABLE, 0 );
+      ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to disable pcie interrupt.\n", m_name);
+
+#if defined(WINDOWS)
+      // Disable KMD interrupt handling for Windows
+      DWORD WD_status = WDC_IntDisable(m_device);
+      ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, "[%s] failed to disable interrupt in KMD.\n", m_name);
+#endif   // WINDOWS
+      m_mmd_irq_handler_enable = false;
+   }
+   
+   return 0; // success
+}
+
+#if defined(WINDOWS)
+
+// Enable PCI express interrupts.  Set up the KMD to mask the interrupt enable bit when
+//    an interrupt is received to prevent the level-sensitive interrupt from immediately
+//    firing again.
+// Return 0 on success
+int ACL_PCIE_DEVICE::enable_interrupts(int user_signal_number)
+{
+   int status;
+   WDC_DEVICE *pDevice;
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Enabling PCIe interrupts.\n", m_name);
+
+   // Mask off hardware interrupts before enabling them
+   status = m_io->pcie_cra->write32( PCIE_CRA_IRQ_ENABLE, 0 );
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to mask off all interrupts before enabling them.\n", m_name);
+
+   // The device handle is actually just a pointer to the device object
+   pDevice = (WDC_DEVICE*)(m_device);
+
+   // Zero off the IRQ acknowledgement commands
+   memset( irq_ack_cmds, 0, NUM_ACK_CMDS * sizeof(WD_TRANSFER) );
+
+   // Set up the list of commands to mask out the interrupt until it is properly processed
+      // CMD0 - Read the IRQ status register
+   irq_ack_cmds[0].cmdTrans = RM_DWORD;
+   irq_ack_cmds[0].dwPort = pDevice->pAddrDesc[m_io->pcie_cra->bar_id()].kptAddr +
+                            m_io->pcie_cra->convert_to_bar_addr( PCIE_CRA_IRQ_STATUS );
+   irq_ack_cmds[0].dwBytes = 0;
+   irq_ack_cmds[0].fAutoinc = 0;
+   irq_ack_cmds[0].dwOptions = 0;
+   irq_ack_cmds[0].Data.Dword = 0;
+      // CMD1 - Verify that the RxmIRQ bit is enabled (i.e. we own this IRQ)
+   irq_ack_cmds[1].cmdTrans = CMD_MASK;
+   irq_ack_cmds[1].dwPort = 0;
+   irq_ack_cmds[1].dwBytes = 0;
+   irq_ack_cmds[1].fAutoinc = 0;
+   irq_ack_cmds[1].dwOptions = 0;
+   irq_ack_cmds[1].Data.Dword = ACL_PCIE_GET_BIT(ACL_PCIE_KERNEL_IRQ_VEC);
+      // CMD2 - Mask off RxmIRQ requests until we've processed this interrupt
+   irq_ack_cmds[2].cmdTrans = WM_DWORD;
+   irq_ack_cmds[2].dwPort = pDevice->pAddrDesc[m_io->pcie_cra->bar_id()].kptAddr +
+                            m_io->pcie_cra->convert_to_bar_addr( PCIE_CRA_IRQ_ENABLE );
+   irq_ack_cmds[2].dwBytes = 0;
+   irq_ack_cmds[2].fAutoinc = 0;
+   irq_ack_cmds[2].dwOptions = 0;
+   irq_ack_cmds[2].Data.Dword = 0;
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Interrupt handler:\n", m_name);
+   ACL_PCIE_DEBUG_MSG("::             KMD Bar%d addr 0x%p\n", 
+      m_io->pcie_cra->bar_id(), pDevice->pAddrDesc[m_io->pcie_cra->bar_id()].kptAddr);
+   ACL_PCIE_DEBUG_MSG("::             Read  <- 0x%x\n", irq_ack_cmds[0].dwPort);
+   ACL_PCIE_DEBUG_MSG("::             Mask     0x%x\n", irq_ack_cmds[1].Data.Dword);
+   ACL_PCIE_DEBUG_MSG("::             Write -> 0x%x\n", irq_ack_cmds[2].dwPort);
+
+   // Enable interrupts in the KMD
+   DWORD WD_status = WDC_IntEnable( 
+            m_device,                  // The device handle
+            NULL,              // Array of commands to execute in the KMD
+            0,              // Size of the above array
+            0,                         // Options
+            &pcie_interrupt_handler,   // Function pointer to the ISR
+            static_cast<void*>(this),  // Custom ISR arguments
+            FALSE                      // Custom kernal-mode ISR acceleration
+         );
+   ACL_PCIE_ERROR_IF(WD_status != WD_STATUS_SUCCESS, return -1, "[%s] failed to enable interrupts in the KMD.\n", m_name);
+
+   status = this->unmask_irqs();
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to enable interrupts.\n", m_name);
+
+   m_mmd_irq_handler_enable = true;
+   return 0; // success
+}
+
+// Use irq status to determine type of interrupt
+// Result is returned in kernel_update/dma_update arguments.
+// Return 0 on success
+int ACL_PCIE_DEVICE::get_interrupt_type (unsigned int *kernel_update, unsigned int *dma_update, unsigned int irq_type_flag)
+{
+   UINT32 irq_status;
+   unsigned int dma_status;
+   int    status;
+
+   status = m_io->pcie_cra->read32( PCIE_CRA_IRQ_STATUS, &irq_status );
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] fail to interrupt type.\n", m_name);
+
+   *kernel_update = ACL_PCIE_READ_BIT( irq_status, ACL_PCIE_KERNEL_IRQ_VEC );
+   
+   status = m_dma->check_dma_interrupt( &dma_status );
+   if (status != 1) {
+      *dma_update = dma_status;
+   }
+   
+   return 0; // success
+}
+
+#endif   // WINDOWS
+#if defined(LINUX)
+
+// For Linux, it will set-up a signal handler for signals for kernel driver
+// Return 0 on success
+int ACL_PCIE_DEVICE::enable_interrupts(int user_signal_number)
+{
+   int status;
+   ACL_PCIE_DEBUG_MSG(":: [%s] Enabling PCIe interrupts on Linux (via signals).\n", m_name);
+
+   // All interrupt controls are in the kernel driver.
+   m_mmd_irq_handler_enable = false;
+
+   // Send the globally allocated signal number to the driver
+   struct acl_cmd signal_number_cmd;
+   signal_number_cmd.bar_id         = ACLPCI_CMD_BAR;
+   signal_number_cmd.command        = ACLPCI_CMD_SET_SIGNAL_NUMBER;
+   signal_number_cmd.device_addr    = NULL;
+   signal_number_cmd.user_addr      = &user_signal_number;
+   signal_number_cmd.size           = sizeof(user_signal_number);
+   status = write (m_device, &signal_number_cmd, sizeof(signal_number_cmd));
+   ACL_PCIE_ERROR_IF( status, return -1, "[%s] failed to set signal number for interrupts.\n", m_name );
+   
+   // Sanity check, did the driver get it
+   int readback_signal_number;
+   signal_number_cmd.user_addr      = &readback_signal_number;
+   signal_number_cmd.command        = ACLPCI_CMD_GET_SIGNAL_NUMBER;
+   signal_number_cmd.size           = sizeof(readback_signal_number);
+   status = read (m_device, &signal_number_cmd, sizeof(signal_number_cmd));
+   ACL_PCIE_ERROR_IF( status, return -1, "[%s] failed to get signal number for interrupts.\n", m_name );
+   ACL_PCIE_ERROR_IF( readback_signal_number != user_signal_number, return -1,
+      "[%s] got wrong signal number %d, expected %d\n", m_name, readback_signal_number, user_signal_number );
+   
+   // Set "our" device id (the handle id received from acl_pcie.cpp) to correspond to 
+   // the device managed by the driver. Will get back this id 
+   // with signal from the driver. Will allow us to differentiate
+   // the source of kernel-done signals with multiple boards.
+
+   // the last bit is reserved as a flag for DMA completion
+   int result = m_handle << 1;
+   struct acl_cmd read_cmd = { ACLPCI_CMD_BAR, 
+                                 ACLPCI_CMD_SET_SIGNAL_PAYLOAD, 
+                                 NULL, 
+                                 &result };
+   status = write (m_device, &read_cmd, sizeof(result));
+   ACL_PCIE_ERROR_IF( status, return -1, "[%s] failed to enable interrupts.\n", m_name );
+
+   return 0; // success
+}
+
+// Determine the interrupt type using the irq_type_flag
+// Return 0 on success
+int ACL_PCIE_DEVICE::get_interrupt_type (unsigned int *kernel_update, unsigned int *dma_update, unsigned int irq_type_flag)
+{
+   // For Linux, the interrupt type is mutually exclusive
+   *kernel_update = irq_type_flag ? 0: 1;
+   *dma_update = 1 - *kernel_update;
+
+   return 0; // success
+}
+
+#endif // LINUX
+
+
+
+// Called by the host program when there are spare cycles
+int ACL_PCIE_DEVICE::yield()
+{
+   // Give the DMA object a chance to crunch any pending data
+   return m_dma->yield();
+}
+
+
+
+// Set kernel interrupt and event update callbacks
+// return 0 on success
+int ACL_PCIE_DEVICE::set_kernel_interrupt(aocl_mmd_interrupt_handler_fn fn, void * user_data) 
+{
+   int status;
+
+   kernel_interrupt = fn;
+   kernel_interrupt_user_data = user_data;
+ 
+   if ( m_device != INVALID_DEVICE ) {
+      status = this->unmask_kernel_irq();
+      ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to set kernel interrupt callback funciton.\n", m_name);
+   }
+   
+   return 0; // success
+}
+
+int ACL_PCIE_DEVICE::set_device_interrupt(aocl_mmd_device_interrupt_handler_fn fn, void * user_data) 
+{
+   int status;
+
+   device_interrupt = fn;
+   device_interrupt_user_data = user_data;
+ 
+   if ( m_device != INVALID_DEVICE ) {
+      status = this->unmask_kernel_irq();
+      ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to set device interrupt callback funciton.\n", m_name);
+   }
+   
+   return 0; // success
+}
+
+int ACL_PCIE_DEVICE::set_status_handler(aocl_mmd_status_handler_fn fn, void * user_data)
+{
+   event_update = fn;
+   event_update_user_data = user_data;
+   
+   return 0; // success
+}
+
+// The callback function set by "set_status_handler"
+// It's used to notify/update the host whenever an event is finished
+void ACL_PCIE_DEVICE::event_update_fn(aocl_mmd_op_t op, int status)
+{
+   ACL_PCIE_ASSERT(event_update, "[%s] event_update is called with a empty update function pointer.\n", m_name);
+
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_OP,":: [%s] Update for event e=%p.\n", m_name, op);
+   event_update(m_handle, event_update_user_data, op, status);
+}
+
+// Forward get buffer call to host channel
+void *ACL_PCIE_DEVICE::hostchannel_get_buffer( size_t *buffer_size, int channel, int *status)
+{
+    return m_hostch->get_buffer (buffer_size, channel, status);
+}
+// Forward ack call to host channel
+size_t ACL_PCIE_DEVICE::hostchannel_ack_buffer( size_t send_size , int channel, int *status)
+{
+    return m_hostch->ack_buffer (send_size, channel, status);
+}
+
+// Memory I/O
+// return 0 on success
+int ACL_PCIE_DEVICE::write_block( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, void *host_addr, size_t dev_addr, size_t size )
+{
+   ACL_PCIE_ASSERT(event_update, "[%s] event_update callback function is not provided.\n", m_name);
+   int status = -1; // assume failure
+
+   switch(mmd_interface)
+   {
+      case AOCL_MMD_KERNEL:
+         status = m_io->kernel_if->write_block( dev_addr, size, host_addr );
+         break;
+      case AOCL_MMD_MEMORY:
+         status = read_write_block (e, host_addr, dev_addr, size, false /*writing*/);
+         break;
+      case AOCL_MMD_PLL:
+         status = m_io->pll->write_block( dev_addr, size, host_addr );
+         break;
+      default:
+         ACL_PCIE_ASSERT(0, "[%s] unknown MMD interface.\n", m_name);
+   }
+   
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to write block.\n", m_name);
+   
+   return 0; // success
+}
+
+int ACL_PCIE_DEVICE::read_block( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, void *host_addr, size_t dev_addr, size_t size )
+{
+   ACL_PCIE_ASSERT(event_update, "[%s] event_update callback function is not provided.\n", m_name);
+   int status = -1; // assume failure
+
+   switch(mmd_interface)
+   {
+      case AOCL_MMD_KERNEL:
+         status = m_io->kernel_if->read_block( dev_addr, size, host_addr );
+         break;
+      case AOCL_MMD_MEMORY:
+         status = read_write_block (e, host_addr, dev_addr, size, true /*reading*/);
+         break;
+      case AOCL_MMD_PLL:
+         status = m_io->pll->read_block( dev_addr, size, host_addr );
+         break;
+      default:
+         ACL_PCIE_ASSERT(0, "[%s] unknown MMD interface.\n", m_name);
+   }
+   
+   ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to read block.\n", m_name);
+   
+   return 0; // success
+}
+
+// Copy a block between two locations in device memory
+// return 0 on success
+int ACL_PCIE_DEVICE::copy_block( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, size_t src, size_t dst, size_t size )
+{
+   ACL_PCIE_ASSERT(event_update, "[%s] event_update callback function is not provided.\n", m_name);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_OP,
+      ":: [%s] Copying " SIZE_FMT_U " bytes data from 0x" SIZE_FMT_X " (device) to 0x" SIZE_FMT_X " (device), with e=%p\n", 
+      m_name, size, src, dst, e);
+
+#define BLOCK_SIZE (8*1024*1024)
+#if defined(WINDOWS)
+   __declspec(align(128)) static unsigned char data[BLOCK_SIZE];
+#endif   // WINDOWS
+#if defined(LINUX)
+   static unsigned char data[BLOCK_SIZE] __attribute__((aligned(128)));
+#endif   // LINUX
+
+   do {
+      size_t transfer_size = (size > BLOCK_SIZE) ? BLOCK_SIZE : size;
+      read_block ( NULL /* blocking read  */, mmd_interface, data, src, transfer_size );
+      write_block( NULL /* blocking write */, mmd_interface, data, dst, transfer_size );
+
+      src  += transfer_size;
+      dst  += transfer_size;
+      size -= transfer_size;
+   } while (size > 0);
+
+   if (e)  { this->event_update_fn(e, 0); }
+
+   return 0; // success
+}
+
+// Forward create hostchannel call to host channel
+int ACL_PCIE_DEVICE::create_hostchannel( char * name, size_t queue_depth, int direction)
+{
+    return m_hostch->create_hostchannel(name, queue_depth, direction);
+}
+
+// Forward destroy hostchannel call to host channel
+int ACL_PCIE_DEVICE::destroy_channel(int channel)
+{
+    return m_hostch->destroy_hostchannel(channel);
+}
+
+
+// Read or Write a block of data to device memory. 
+// Use either DMA or directly read/write through BAR
+// Return 0 on success
+int ACL_PCIE_DEVICE::read_write_block( aocl_mmd_op_t e, void *host_addr, size_t dev_addr, size_t size, bool reading )
+{
+   const uintptr_t uintptr_host = reinterpret_cast<uintptr_t>(host_addr);
+
+   int    status   = 0;
+   size_t dma_size = 0;
+   
+   if(reading){
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_OP,
+         ":: [%s] Reading " SIZE_FMT_U " bytes data from 0x" SIZE_FMT_X " (device) to %p (host), with e=%p\n", 
+         m_name, size, dev_addr, host_addr, e);
+   } else {
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_OP,
+         ":: [%s] Writing " SIZE_FMT_U " bytes data from %p (host) to 0x" SIZE_FMT_X " (device), with e=%p\n", 
+         m_name, size, host_addr, dev_addr, e);
+   }
+
+   // Return immediately if size is zero
+   if( size == 0 ) {
+      if (e)  { this->event_update_fn(e, 0); }
+      return 0;
+   }
+
+   bool aligned = ((uintptr_host & DMA_ALIGNMENT_BYTE_MASK) | (dev_addr & DMA_ALIGNMENT_BYTE_MASK)) == 0;
+   if ( m_use_dma_for_big_transfers && aligned && (size >= 1024) )
+   {
+      // DMA transfers must END at aligned boundary.
+      // If that's not the case, use DMA up to such boundary, and regular
+      // read/write for the remaining part.
+      dma_size = size - (size & DMA_ALIGNMENT_BYTE_MASK);
+   } else if( m_use_dma_for_big_transfers && (size >= 1024) ) {
+      ACL_PCIE_WARN_MSG("[%s] NOT using DMA to transfer " SIZE_FMT_U " bytes from %s to %s because of lack of alignment\n" 
+         "**                 host ptr (%p) and/or dev offset (0x" SIZE_FMT_X ") is not aligned to %u bytes\n", 
+         m_name, size, (reading ? "device":"host"), (reading ? "host":"device"), host_addr, dev_addr, DMA_ALIGNMENT_BYTES);
+   }
+
+   // Perform read/write through BAR if the data is not fit for DMA or if there is remaining part from DMA
+   if ( dma_size < size ) {
+      void * host_addr_new = reinterpret_cast<void *>(uintptr_host + dma_size);
+      size_t dev_addr_new  = dev_addr + dma_size;
+      size_t remain_size   = size - dma_size;
+
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_OP,
+         ":: [%s] Perform read/write through BAR for remaining " SIZE_FMT_U " bytes (out of " SIZE_FMT_U " bytes)\n", 
+         m_name, remain_size, size); 
+
+      status = read_write_block_bar( host_addr_new, dev_addr_new, remain_size, reading );
+      ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to perform read/write through BAR.\n", m_name);
+   }
+
+   if ( dma_size != 0 ) {
+      m_dma->read_write (host_addr, dev_addr, dma_size, e, reading);
+
+      // Block if event is NULL
+      if (e == NULL) {  m_dma->stall_until_idle();  }
+   } else {
+      if (e != NULL) {  this->event_update_fn(e, 0);  }
+   }
+
+   return 0; // success
+}
+
+// Read or Write a block of data to device memory through BAR
+// Return 0 on success
+int ACL_PCIE_DEVICE::read_write_block_bar( void *host_addr, size_t dev_addr, size_t size, bool reading )
+{
+   void * cur_host_addr = host_addr;
+   size_t cur_dev_addr  = dev_addr;
+   size_t bytes_transfered = 0;
+
+   for (bytes_transfered=0; bytes_transfered<size; )
+   {
+      // decide the size to transfer for current iteration
+      size_t cur_size = ACL_PCIE_MEMWINDOW_SIZE - ( cur_dev_addr%ACL_PCIE_MEMWINDOW_SIZE );
+      if (bytes_transfered + cur_size >= size) {
+         cur_size = size - bytes_transfered;
+      }
+
+      // set the proper window segment
+      set_segment( cur_dev_addr );
+      size_t window_rel_ptr_start = cur_dev_addr % ACL_PCIE_MEMWINDOW_SIZE;
+      size_t window_rel_ptr       = window_rel_ptr_start;
+
+      // A simple blocking read
+      // The address should be in the global memory range, we assume
+      // any offsets are already accounted for in the offset
+      ACL_PCIE_ASSERT( window_rel_ptr + cur_size <= ACL_PCIE_MEMWINDOW_SIZE, 
+         "[%s] trying to access out of the range of the memory window.\n", m_name);
+
+      // Workaround a bug in Jungo driver.
+      // First, transfer the non 8 bytes data at the front, one byte at a time
+      // Then, transfer multiple of 8 bytes (size of size_t) using read/write_block
+      // At the end, transfer the remaining bytes, one byte at a time
+      size_t dev_odd_start = std::min (sizeof(size_t) - window_rel_ptr % sizeof(size_t), cur_size);
+      if (dev_odd_start != sizeof(size_t)) {
+         read_write_small_size( cur_host_addr, window_rel_ptr, dev_odd_start, reading );
+         incr_ptrs (&cur_host_addr, &window_rel_ptr, &bytes_transfered, dev_odd_start );
+         cur_size -= dev_odd_start;
+      }
+
+      size_t tail_size  = cur_size % sizeof(size_t);
+      size_t size_mul_8 = cur_size - tail_size;
+
+      if (size_mul_8 != 0) {
+         if ( reading ) {
+            m_io->mem->read_block ( window_rel_ptr, size_mul_8, cur_host_addr );
+         } else {
+            m_io->mem->write_block( window_rel_ptr, size_mul_8, cur_host_addr );
+         }
+         incr_ptrs (&cur_host_addr, &window_rel_ptr, &bytes_transfered, size_mul_8);
+      }
+
+      if (tail_size != 0) {
+         read_write_small_size( cur_host_addr, window_rel_ptr, tail_size, reading );
+         incr_ptrs (&cur_host_addr, &window_rel_ptr, &bytes_transfered, tail_size );
+         cur_size -= tail_size;
+      }
+
+      // increase the current device address to be transferred
+      cur_dev_addr += (window_rel_ptr - window_rel_ptr_start);
+   }
+
+   return 0; // success
+}
+
+// Read or Write a small size of data to device memory, one byte at a time
+// Return 0 on success
+int ACL_PCIE_DEVICE::read_write_small_size (void *host_addr, size_t dev_addr, size_t size, bool reading)
+{
+   UINT8 *ucharptr_host = static_cast<UINT8 *>(host_addr);
+   int status;
+
+   for(size_t i = 0; i < size; ++i) {
+      if(reading) {
+         status = m_io->mem->read8 ( dev_addr+i, ucharptr_host+i);
+      } else {
+         status = m_io->mem->write8( dev_addr+i, ucharptr_host[i]);
+      }
+      ACL_PCIE_ERROR_IF(status, return -1, "[%s] failed to read write with odd size.\n", m_name);
+   }
+
+   return 0; // success
+}
+
+// Set the segment that the memory windows is accessing to
+// Return 0 on success
+int ACL_PCIE_DEVICE::set_segment( size_t addr )
+{
+   UINT64 segment_readback;
+   UINT64 cur_segment = addr & ~(ACL_PCIE_MEMWINDOW_SIZE-1);
+   DWORD  status = 0;
+
+   // Only execute the PCI write if we need to *change* segments
+   if ( cur_segment != m_segment )
+   {
+      // PCIe reordering rules could cause the segment change to get reordered,
+	   // so read before and after!
+      status |= m_io->window->read64 ( 0 , &segment_readback );
+
+      status |= m_io->window->write64( 0 , cur_segment );
+      m_segment = cur_segment;
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX,":::::: [%s] Changed segment id to %llu.\n", m_name, m_segment);
+
+      status |= m_io->window->read64 ( 0 , &segment_readback );
+   }
+
+   ACL_PCIE_ERROR_IF(status, return -1, 
+      "[%s] failed to set segment for memory access windows.\n", m_name);
+
+   return 0; // success
+}
+
+void ACL_PCIE_DEVICE::incr_ptrs (void **host, size_t *dev, size_t *counter, size_t incr)
+{
+   const uintptr_t uintptr_host = reinterpret_cast<uintptr_t>(*host);
+
+   *host     = reinterpret_cast<void *>(uintptr_host+incr);
+   *dev     += incr;
+   *counter += incr;
+}
+
+
+
+// Query the on-chip temperature sensor
+bool ACL_PCIE_DEVICE::get_ondie_temp_slow_call( cl_int *temp )
+{
+   cl_int read_data;
+   
+   // We assume this during read later
+   ACL_PCIE_ASSERT( sizeof(cl_int) == sizeof(INT32), "sizeof(cl_int) != sizeof(INT32)" );
+
+   if (! ACL_PCIE_HAS_TEMP_SENSOR) {
+      ACL_PCIE_DEBUG_MSG(":: [%s] On-chip temperature sensor not supported by this board.\n", m_name);
+      return false;
+   }
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Querying on-chip temperature sensor...\n", m_name);
+   
+   // read temperature sensor
+   m_io->temp_sensor->read32(0, (UINT32 *)&read_data);
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Read temp sensor data.  Value is: %i\n", m_name, read_data);
+   *temp = read_data;
+   return true;
+}
+
+
+
+void *ACL_PCIE_DEVICE::shared_mem_alloc ( size_t size, unsigned long long *device_ptr_out )
+{
+#if defined(WINDOWS)
+   return NULL;
+#endif   // WINDOWS
+#if defined(LINUX)
+   #ifdef ACL_HOST_MEMORY_SHARED
+      void *host_ptr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, m_device, 0); 
+      
+      if (device_ptr_out != NULL && host_ptr == (void*)-1) {
+         // when mmap fails, it returns (void*)-1, not NULL
+         host_ptr = NULL;
+         *device_ptr_out = (unsigned long long)0;
+         
+      } else if (device_ptr_out != NULL) {
+      
+         /* map received host_ptr to FPGA-usable address. */
+         void* dev_ptr = NULL;
+         struct acl_cmd read_cmd = { ACLPCI_CMD_BAR, 
+               ACLPCI_CMD_GET_PHYS_PTR_FROM_VIRT, 
+               &dev_ptr,
+               &host_ptr,   
+               sizeof(dev_ptr) };
+               
+         bool failed_flag = (read (m_device, &read_cmd, sizeof(dev_ptr)) != 0);
+         ACL_PCIE_DEBUG_MSG("  Mapped vaddr %p to phys addr %p. %s\n", 
+                  host_ptr, dev_ptr, failed_flag==0 ? "OK" : "FAILED");
+         if (failed_flag) {
+            *device_ptr_out = (unsigned long long)NULL;
+         } else {
+            /* When change to 64-bit pointers on the device, update driver code
+             * to deal with larger-than-void* ptrs. */
+            *device_ptr_out = (unsigned long long)dev_ptr;
+            
+            /* Now need to add offset of the shared system. */
+         } 
+      }
+      
+      return host_ptr;
+   #else
+      return NULL;
+   #endif
+#endif   // LINUX
+}
+
+void ACL_PCIE_DEVICE::shared_mem_free ( void* vptr, size_t size )
+{
+#if defined(WINDOWS)
+   return;
+#endif   // WINDOWS
+#if defined(LINUX)
+   if (vptr != NULL) {
+      munmap (vptr, size);
+   }
+#endif   // LINUX
+}
+
+// perform PR reprogram by attempting to program the board using an RBF. If this is not possible due to
+// 1) Envoking the user of JTAG_PROGRAMMING via ACL_PCIE_USE_JTAG_PROGRAMMING
+// 2) RBF or HASH are not present
+// 3) PR Base ID does not match that with which the RBF was compiled
+// 4) UniPhy fails to calibrate
+// Then returns 1. Returns 0 on success. Always returns flag from arguments indicating source of failure
+int ACL_PCIE_DEVICE::pr_reprogram(struct acl_pkg_file * pkg, const char * SOFNAME, int * rbf_or_hash_not_provided, int * hash_mismatch,
+                  unsigned * use_jtag_programming, int * quartus_compile_version_mismatch) {
+   // Environment variable to control when to use JTAG instead of PR (overriding the default programming method: PR)
+   int reprogram_failed = 0;
+   size_t core_rbf_len = 0, pr_import_version_len = 0, quartus_version_len = 0;
+   *use_jtag_programming = 0;
+   char *str_use_jtag_programming = getenv("ACL_PCIE_USE_JTAG_PROGRAMMING");
+   if (str_use_jtag_programming) *use_jtag_programming = 1;
+
+   // 1. Default programming method: PR
+   if( !*use_jtag_programming) {
+     // checking that rbf and hash sections exist in fpga.bin
+     if( acl_pkg_section_exists( pkg, ACL_PKG_SECTION_CORE_RBF, &core_rbf_len ) &&
+         acl_pkg_section_exists( pkg, ACL_PKG_SECTION_HASH, &pr_import_version_len ) &&
+         (acl_pkg_section_exists( pkg, ACL_PKG_SECTION_QVERSION, &quartus_version_len ) || m_skip_quartus_version_check)) {
+       *rbf_or_hash_not_provided = 0;
+       ACL_PCIE_DEBUG_MSG(":: [%s] Programming kernel region using PR with rbf file size %i\n", m_name, (UINT32) core_rbf_len);
+
+       // read rbf and hash from fpga.bin
+       char *core_rbf = NULL;
+       int read_core_rbf_ok = acl_pkg_read_section_transient( pkg, ACL_PKG_SECTION_CORE_RBF, &core_rbf );
+      
+       if (!m_skip_quartus_version_check) {
+         char *quartus_compile_version_str = (char *)malloc(quartus_version_len + 1);
+         if (quartus_compile_version_str) {
+           int quartus_compile_version_ok = acl_pkg_read_section( pkg, ACL_PKG_SECTION_QVERSION, quartus_compile_version_str, quartus_version_len+1);
+
+           if (quartus_compile_version_ok) {
+             if (quartus_compile_version_str[quartus_version_len - 1] == '\n') {
+               quartus_compile_version_str[quartus_version_len - 1] = '\0';
+             }
+             quartus_version_len = ACL_QUARTUSVER_ROM_SIZE;
+             *quartus_compile_version_mismatch = quartus_ver_test(quartus_compile_version_str, &quartus_version_len);
+           } else {
+             *quartus_compile_version_mismatch = 1;
+           }
+           free(quartus_compile_version_str);
+           quartus_compile_version_str = NULL;
+         } else {
+           *quartus_compile_version_mismatch = 1;
+         }
+       } else {
+         *quartus_compile_version_mismatch = 0;
+       }
+
+       if (*quartus_compile_version_mismatch == 0) {
+
+         char *pr_import_version_str = (char *)malloc(pr_import_version_len + 1);
+         if (pr_import_version_str) {
+           int pr_import_version_ok = acl_pkg_read_section( pkg, ACL_PKG_SECTION_HASH, pr_import_version_str, pr_import_version_len+1 );
+   
+           // checking that hash was successfully read from section .acl.hash within fpga.bin
+           if ( pr_import_version_ok ) {
+             unsigned int pr_import_version = (unsigned int) strtol(pr_import_version_str, NULL, 10);
+           
+             // checking that base revision hash matches import revision hash and aocx and programmed sof is from same Quartus version
+             if ( pr_base_id_test(pr_import_version) == 0 ) {
+               *hash_mismatch = 0;
+           
+               // Kernel driver wants it aligned to 4 bytes.
+               int aligned_to_4_bytes( 0 == ( 3 & (uintptr_t)(core_rbf) ) );
+               reprogram_failed = 1;  // Default to fail before PRing
+           
+               // checking that rbf was successfully read from section .acl.core.rbf within fpga.bin
+               if(read_core_rbf_ok && !(core_rbf_len % 4) && aligned_to_4_bytes && !version_id_test()) {
+           
+                 ACL_PCIE_DEBUG_MSG(":: [%s] Starting PR programming of the device...\n", m_name);
+                 reprogram_failed = m_config->program_core_with_PR_file((char *)core_rbf, core_rbf_len);
+                 ACL_PCIE_DEBUG_MSG(":: [%s] Finished PR programming of the device.\n", m_name);
+           
+                 if ( reprogram_failed ) {
+                   ACL_PCIE_DEBUG_MSG(":: [%s] PR programming failed.\n", m_name);
+                 }
+                 if ( version_id_test() ) {
+                   ACL_PCIE_DEBUG_MSG(":: [%s] version_id_test() failed.\n", m_name);
+                   reprogram_failed = 1;
+                 }
+                 if ( wait_for_uniphy() ) {
+                   ACL_PCIE_DEBUG_MSG(":: [%s] Uniphy failed to calibrate.\n", m_name);
+                   reprogram_failed = 1;
+                 }
+                 if ( !(reprogram_failed) ) {
+                   ACL_PCIE_DEBUG_MSG(":: [%s] PR programming passed.\n", m_name);
+                 }
+               }
+             }
+           }
+           free(pr_import_version_str);
+           pr_import_version_str = NULL;
+         }
+       }
+     }
+   }
+   return reprogram_failed;
+}
+
+// Reprogram the device with given binary file.
+// There are two ways to program:
+// 1. PR to replace the OpenCL kernel partition
+// 2. JTAG full-chip programming (using quartus_pgm via USB-Blaster) to replace periphery + core
+// Return 0 on success
+int ACL_PCIE_DEVICE::reprogram(void *data, size_t data_size)
+{
+   int reprogram_failed = 1; // assume failure
+   int rbf_or_hash_not_provided = 1; // assume no rbf or hash are provided in fpga.bin
+   int hash_mismatch = 1; // assume base revision and import revision hashes do not match
+   unsigned use_jtag_programming = 0; // assume no need for jtag programming
+   int quartus_compile_version_mismatch = 1;
+   size_t quartus_version_len;
+
+   const char *SOFNAME = "reprogram_temp.sof";
+   size_t sof_len = 0;
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Starting to program device...\n", m_name);
+
+   struct acl_pkg_file *pkg = acl_pkg_open_file_from_memory( (char*)data, data_size, ACL_PKG_SHOW_ERROR );
+   ACL_PCIE_ERROR_IF(pkg == NULL, return reprogram_failed, "cannot open file from memory using pkg editor.\n");
+   
+   // set the being_programmed flag
+   m_being_programmed = true;
+
+   // 1. Default to PR reprogramming
+   reprogram_failed = pr_reprogram(pkg, SOFNAME, &rbf_or_hash_not_provided, &hash_mismatch, &use_jtag_programming, &quartus_compile_version_mismatch);
+
+   // Autodetect JTAG cable & device index
+   // Cable and Index value should't overflow
+   char ad_cable[10];
+   char ad_device_index[10];
+
+   // 2. Fallback programming method: JTAG full-chip programming
+   if( use_jtag_programming || rbf_or_hash_not_provided || hash_mismatch || (quartus_compile_version_mismatch && !m_skip_quartus_version_check)) {
+
+     // checking that sof section exist in fpga.bin
+     if( acl_pkg_section_exists(pkg, ACL_PKG_SECTION_SOF, &sof_len) ) {
+
+       // check if aocx is fast-compiled or not - if so, then sof is a base revision,
+       // and does not necessarily contain the desired kernel. Requires sof with
+       // matching pr_base.id to be programmed (base.sof) followed by PR programming
+       // with the given .rbf
+       size_t fast_compile_len = 0;
+       char * fast_compile_contents = NULL;
+       int fast_compile = 0;
+       if( acl_pkg_section_exists(pkg, ACL_PKG_SECTION_FAST_COMPILE, &fast_compile_len) &&
+           acl_pkg_read_section_transient(pkg, ACL_PKG_SECTION_FAST_COMPILE, &fast_compile_contents) ) {
+         fast_compile = 1;
+         ACL_PCIE_DEBUG_MSG(":: [%s] Fast-compile fpga.bin detected.\n", m_name);
+       }
+       // Find jtag cable for the board
+       // Returns 0 for both ad_cable,ad_device_index if not found
+       // or if Autodetect is disabled
+       this->find_jtag_cable(ad_cable,ad_device_index);
+
+       // disable interrupt and save control registers
+       this->disable_interrupts();
+       m_config->save_pci_control_regs();
+
+       // write out a SOF file
+       const int wrote_sof = acl_pkg_read_section_into_file(pkg, ACL_PKG_SECTION_SOF, SOFNAME);
+       ACL_PCIE_ERROR_IF( !wrote_sof, return reprogram_failed, "could not write %s.\n", SOFNAME);
+
+       // JTAG programming the device
+       ACL_PCIE_DEBUG_MSG(":: [%s] Starting JTAG programming of the device...\n", m_name);
+       reprogram_failed = m_config->program_with_SOF_file(SOFNAME,ad_cable,ad_device_index);
+
+       #if defined(LINUX)
+         m_config->load_pci_control_regs();
+       #endif
+
+       if (!m_skip_quartus_version_check && acl_pkg_section_exists( pkg, ACL_PKG_SECTION_QVERSION, &quartus_version_len )) {
+         char *quartus_compile_version_str = (char *)malloc(quartus_version_len + 1);
+         if (quartus_compile_version_str) {
+           int quartus_compile_version_ok = acl_pkg_read_section( pkg, ACL_PKG_SECTION_QVERSION, quartus_compile_version_str, quartus_version_len+1 );
+           if (quartus_compile_version_ok) {
+             if (quartus_compile_version_str[quartus_version_len - 1] == '\n') {
+               quartus_compile_version_str[quartus_version_len - 1] = '\0';
+             }
+             m_io->quartus_ver->write_block(0, quartus_version_len, quartus_compile_version_str);
+           }
+           free(quartus_compile_version_str);
+           quartus_compile_version_str = NULL;
+         }
+       }
+         
+       if ( reprogram_failed ) {
+         ACL_PCIE_DEBUG_MSG(":: [%s] JTAG programming failed.\n", m_name);
+       }
+       if ( version_id_test() ) {
+         ACL_PCIE_DEBUG_MSG(":: [%s] version_id_test() failed.\n", m_name);
+         reprogram_failed = 1;
+       }
+       if ( wait_for_uniphy() ) {
+         ACL_PCIE_DEBUG_MSG(":: [%s] Uniphy failed to calibrate.\n", m_name);
+         reprogram_failed = 1;
+       }
+       if( fast_compile ) {
+         // need to rerun pr_reprogram because design should be loaded now
+         hash_mismatch = 0;
+         rbf_or_hash_not_provided = 0;
+         reprogram_failed = pr_reprogram(pkg, SOFNAME, &rbf_or_hash_not_provided, &hash_mismatch, &use_jtag_programming, &quartus_compile_version_mismatch);
+       }
+       if ( !(reprogram_failed) ) {
+         ACL_PCIE_DEBUG_MSG(":: [%s] JTAG programming passed.\n", m_name);
+       }
+
+     } else {
+       ACL_PCIE_DEBUG_MSG(":: [%s] Could not read SOF file from fpga.bin.\n", m_name);
+       reprogram_failed = 1;
+     }
+   } 
+   
+   // Clean up
+   if ( pkg ) acl_pkg_close_file(pkg);
+   m_being_programmed = false;
+
+   return reprogram_failed;
+}
+
+
+
+// Perform a simple version id read to test the basic PCIe read functionality
+// Return 0 on success
+int ACL_PCIE_DEVICE::version_id_test()
+{    
+   unsigned int version = ACL_VERSIONID ^ 1; // make sure it's not what we hope to find. 
+   unsigned int iattempt;
+   unsigned int max_attempts = 1;
+   unsigned int usleep_per_attempt = 20;     // 20 ms per.
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Doing PCIe-to-fabric read test ...\n", m_name);
+   for( iattempt = 0; iattempt < max_attempts; iattempt ++){
+      m_io->version->read32(0, &version);
+      // COMPATIBLE version ID needs to be removed when everyone migrates to
+      // the latest verison ID FB #410932
+      if( (version == (unsigned int)ACL_VERSIONID)
+              || (version == (unsigned int)ACL_VERSIONID_COMPATIBLE_161)
+              || (version == (unsigned int)ACL_VERSIONID_COMPATIBLE_170)
+              || (version == (unsigned int)ACL_VERSIONID_COMPATIBLE_171a)
+              || (version == (unsigned int)ACL_VERSIONID_COMPATIBLE_171b)) {
+         ACL_PCIE_DEBUG_MSG(":: [%s] PCIe-to-fabric read test passed\n", m_name);
+         return 0;
+      }
+#if defined(WINDOWS)
+      Sleep(  usleep_per_attempt  );
+#endif   // WINDOWS
+#if defined(LINUX)
+      usleep( usleep_per_attempt*1000 );
+#endif   // LINUX
+   }
+
+   // Kernel read command succeed, but got bad data. (version id doesn't match)
+   ACL_PCIE_INFO("[%s] PCIe-to-fabric read test failed, read 0x%0x after %u attempts\n",
+      m_name, version, iattempt);
+   return -1;
+}
+
+// Quartus Compile Version check
+// Return 0 on success
+int ACL_PCIE_DEVICE::quartus_ver_test(char *version_str, size_t *version_length)
+{
+   unsigned int *quartus_version;
+   unsigned int version;
+   
+   // Check version ID to ensure feature supported in HW
+   m_io->version->read32(0, &version);
+   if (version <= (unsigned int)ACL_VERSIONID_COMPATIBLE_170) {
+      ACL_PCIE_DEBUG_MSG(":: [%s] Programming on board without Quartus Version RAM\n", m_name);
+      return 1;
+   }  
+   
+   quartus_version = (unsigned int *) malloc(*version_length + 1);
+   memset(quartus_version, 0, *version_length + 1); // Make sure it's not what we hope to find
+
+   m_io->quartus_ver->read_block(0, *version_length, quartus_version);
+   
+   
+   char *quartus_version_str;
+   quartus_version_str = (char *) quartus_version;
+   
+   size_t version_length_programmed = strlen(quartus_version_str);
+   size_t version_length_aocx = strlen(version_str);
+   
+   if (version_length_programmed != version_length_aocx) {
+      // Kernel read command succeed, but got bad data. (Quartus Version doesn't match)
+      ACL_PCIE_INFO("[%s] Quartus versions for base and import compile do not match\n", m_name);
+      ACL_PCIE_INFO("[%s] Board is currently programmed with sof from Quartus %s\n", m_name, quartus_version_str);
+      ACL_PCIE_INFO("[%s] PR import was compiled with Quartus %s\n", m_name, version_str);
+      ACL_PCIE_INFO("[%s] Falling back to JTAG programming instead of PR\n", m_name);
+      return 1;
+   }
+    
+   *version_length = version_length_programmed;
+
+   if (strncmp(version_str, quartus_version_str, *version_length - 1) == 0) {
+     ACL_PCIE_DEBUG_MSG(":: [%s] Quartus versions for base and import compile match\n", m_name);
+     ACL_PCIE_DEBUG_MSG(":: [%s] Board is currently programmed with sof from Quartus %s\n", m_name, quartus_version_str);
+     ACL_PCIE_DEBUG_MSG(":: [%s] PR import was compiled with Quartus %s\n", m_name, version_str);
+     
+     return 0;
+   }
+   
+   // Kernel read command succeed, but got bad data. (Quartus Version doesn't match)
+   ACL_PCIE_INFO("[%s] Quartus versions for base and import compile do not match\n", m_name);
+   ACL_PCIE_INFO("[%s] Board is currently programmed with sof from Quartus %s\n", m_name, quartus_version_str);
+   ACL_PCIE_INFO("[%s] PR import was compiled with Quartus %s\n", m_name, version_str);
+   ACL_PCIE_INFO("[%s] Falling back to JTAG programming instead of PR\n", m_name);
+   
+   return 1;
+} 
+
+// Perform a simple read to the PR base ID in the static region and compare it with the given ID
+// Return 0 on success
+int ACL_PCIE_DEVICE::pr_base_id_test(unsigned int pr_import_version)
+{    
+   unsigned int pr_base_version = 0; // make sure it's not what we hope to find. 
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Reading PR base ID from fabric ...\n", m_name);
+   m_io->pr_base_id->read32(0, &pr_base_version);
+   if( pr_base_version == pr_import_version ){
+     ACL_PCIE_DEBUG_MSG(":: [%s] PR base and import compile IDs match\n", m_name);
+     ACL_PCIE_DEBUG_MSG(":: [%s] PR base ID currently configured is 0x%0x\n", m_name, pr_base_version);
+     ACL_PCIE_DEBUG_MSG(":: [%s] PR import compile ID is 0x%0x\n", m_name, pr_import_version);
+     return 0;
+   };
+ 
+   // Kernel read command succeed, but got bad data. (version id doesn't match)
+   ACL_PCIE_INFO("[%s] PR base and import compile IDs do not match\n", m_name);
+   ACL_PCIE_INFO("[%s] PR base ID currently configured is 0x%0x\n", m_name, pr_base_version);
+   ACL_PCIE_INFO("[%s] PR import compile expects ID to be 0x%0x\n", m_name, pr_import_version); 
+   ACL_PCIE_INFO("[%s] Falling back to JTAG programming instead of PR\n", m_name);
+   return -1;
+}
+
+// 1. Write a random value to cade_id register, do a read to confirm the write
+// 2. Use the random value to find the JTAG cable for that board
+// 3. Return "0" on ad_cable,ad_device_index if cable not found
+void ACL_PCIE_DEVICE::find_jtag_cable(char *ad_cable, char *ad_device_index)
+{ 
+   bool jtag_ad_disabled = false;
+   bool jtag_ad_cable_found = false;
+   unsigned int version = 0;
+
+   // Check if Autodetect is disabled
+   const char *cable = getenv("ACL_PCIE_JTAG_CABLE");
+   const char *device_index = getenv("ACL_PCIE_JTAG_DEVICE_INDEX");
+   if (cable ||  device_index) {
+      jtag_ad_disabled = true;
+      ACL_PCIE_DEBUG_MSG(":: [%s] JTAG cable autodetect disabled!!!\n", m_name);
+   }
+
+   // Check version ID to ensure feature supported in HW
+   m_io->version->read32(0, &version);
+   if (version <= (unsigned int)ACL_VERSIONID_COMPATIBLE_161) {
+      jtag_ad_disabled = true;     
+      ACL_PCIE_DEBUG_MSG(":: [%s] JTAG cable autodetect disabled due to old HW version!!!\n", m_name);
+   }  
+
+   // If JTAG autodetect is enabled, program the CADEID register
+   // and look for the value using in system sources and probes
+   if (!jtag_ad_disabled) {
+      srand(time(NULL)); 
+      unsigned int cade_id_write = rand() & 0xFFFFFFFF; 
+      cade_id_write = cade_id_write | 0x80000000; //Write a full 32 bit value  
+      unsigned int cade_id_read = 0x0;  
+      
+      ACL_PCIE_DEBUG_MSG(":: [%s] Writing Cade ID to fabric ...\n", m_name);
+      m_io->cade_id->write32(0, cade_id_write);
+      
+      ACL_PCIE_DEBUG_MSG(":: [%s] Reading Cade ID from fabric ...\n", m_name);
+      m_io->cade_id->read32(0, &cade_id_read);
+      
+      if( cade_id_write == cade_id_read ){
+         ACL_PCIE_DEBUG_MSG(":: [%s] Cade ID write/read success ...\n", m_name);
+         ACL_PCIE_DEBUG_MSG(":: [%s] Cade ID  cade_id_write 0x%0x, cade_id_read 0x%0x\n", m_name, cade_id_write, cade_id_read);
+      
+         // Returns NULL on ad_cable,ad_device_index if no cable found
+         jtag_ad_cable_found = m_config->find_cable_with_ISSP(cade_id_write,ad_cable,ad_device_index);
+      
+         if (!jtag_ad_cable_found) {
+            ACL_PCIE_DEBUG_MSG(":: [%s] Using default cable 1 ...\n", m_name);
+         } else {
+            ACL_PCIE_DEBUG_MSG(":: [%s] Found Cable ...\n", m_name);
+         }
+      } else {
+         ACL_PCIE_DEBUG_MSG(":: [%s] Cade ID write/read failed. Check BSP version or PCIE link...\n", m_name);
+         ACL_PCIE_DEBUG_MSG(":: [%s] Cade ID  cade_id_write 0x%0x, cade_id_read 0x%0x\n", m_name, cade_id_write, cade_id_read);
+      }
+   }//if (!jtag_ad_disabled
+
+   if (jtag_ad_disabled || !jtag_ad_cable_found) {
+      sprintf(ad_cable,"%s", "0");
+      sprintf(ad_device_index,"%s", "0");
+   }
+}
+
+
+// Wait until the uniphy calibrated
+// Return 0 on success
+int ACL_PCIE_DEVICE::wait_for_uniphy()
+{
+   const unsigned int ACL_UNIPHYSTATUS = 0;
+   unsigned int status = 1, retries = 0; 
+   
+   while( retries++ < 8){
+      m_io->uniphy_status->read32(0, &status);
+
+      if( status == ACL_UNIPHYSTATUS){
+         ACL_PCIE_DEBUG_MSG(":: [%s] Uniphys are calibrated\n", m_name);
+         return 0;   // success
+      }
+
+      ACL_PCIE_DEBUG_MSG(":: [%s] Uniphy status read was %x\n", m_name, status); 
+      ACL_PCIE_DEBUG_MSG(":: [%s] Resetting Uniphy try %d\n", m_name, retries);
+      m_io->uniphy_reset->write32( 0, 1 );
+
+#if defined(WINDOWS)
+      Sleep( 400 );
+#endif   // WINDOWS
+#if defined(LINUX)
+      usleep(400*1000);
+#endif   // LINUX
+   }
+
+   ACL_PCIE_INFO("[%s] uniphy(s) did not calibrate.  Expected 0 but read %x\n",
+      m_name, status);
+
+   // Failure! Was it communication error or actual calibration failure?
+   if ( ACL_PCIE_READ_BIT( status , 3) )  // This bit is hardcoded to 0
+      ACL_PCIE_INFO("                Uniphy calibration status is corrupt.  This is likely a communication error with the board and/or uniphy_status module.\n");
+   else {
+      // This is a 32-bit interface with the first 4 bits aggregating the
+      // various calibration signals.  The remaining 28-bits would indicate
+      // failure for their respective memory core.  Tell users which ones
+      // failed
+      for (int i = 0; i < 32-4; i++) {
+         if ( ACL_PCIE_READ_BIT( status , 4+i) )
+            ACL_PCIE_INFO("  Uniphy core %d failed to calibrate\n",i );
+      }
+      ACL_PCIE_INFO("     If there are more failures than Uniphy controllers connected, \n");
+      ACL_PCIE_INFO("     ensure the uniphy_status core is correctly parameterized.\n" );
+   }
+
+   return -1;   // failure
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.h
new file mode 100755
index 0000000000000000000000000000000000000000..f8b7fac546e20323f6f88b685a0f68ce165a39ca
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_device.h
@@ -0,0 +1,180 @@
+#ifndef ACL_PCIE_DEVICE_H
+#define ACL_PCIE_DEVICE_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_device.h  -------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle operations on a single device.           */
+/* The actual implementation of the class lives in the acl_pcie_device.cpp         */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+
+// Forward declaration for classes used by ACL_PCIE_DEVICE
+class ACL_PCIE_DMA;
+class ACL_PCIE_CONFIG;
+class ACL_PCIE_MM_IO_MGR;
+class ACL_PCIE_HOSTCH;
+
+// Encapsulates the functionality of an ACL device connected to the host
+// through a PCI express bus.
+class ACL_PCIE_DEVICE
+{
+   public:
+      ACL_PCIE_DEVICE( int dev_num, const char *name, int handle, int user_signal_number );
+      ~ACL_PCIE_DEVICE();
+
+      bool is_valid()            { return m_device!=INVALID_DEVICE; };
+      bool is_initialized()      { return m_initialized;            };
+      bool is_being_programmed() { return m_being_programmed;       };
+
+      // Perform operations required when an interrupt is received for this device
+      void service_interrupt(unsigned int irq_type_flag = 0);
+      // This function can be used for triggering a fake device exception for 
+      void test_trigger_device_interrupt();
+      
+      // The callback function set by "set_status_handler"
+      // It's used to notify/update the host whenever an event is finished
+      void event_update_fn  (aocl_mmd_op_t op, int status);
+
+      // Called by the host program when there are spare cycles
+      int  yield();
+
+      // Memory I/O
+      // return 0 on success
+      int write_block( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, void *host_addr, size_t dev_addr, size_t size );
+      int read_block ( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, void *host_addr, size_t dev_addr, size_t size );
+      int copy_block ( aocl_mmd_op_t e, aocl_mmd_interface_t mmd_interface, size_t src, size_t dst, size_t size );
+
+      // Create channel. return handle to channel on success, negative otherwise
+      int create_hostchannel( char * name, size_t queue_depth, int direction );
+      
+      // return 0 on success
+      int destroy_channel(int channel);
+      
+      // return pointer that user can write to for write channel, and read from for read channel
+      void *hostchannel_get_buffer( size_t *buffer_size, int channel, int *status);
+      
+      // return the size in bytes of the amount of buffer that was acknlowedged to channel
+      size_t hostchannel_ack_buffer( size_t send_size , int channel, int *status);
+      
+      // Set kernel, device interrupts and event update callbacks
+      // return 0 on success
+      int set_kernel_interrupt(aocl_mmd_interrupt_handler_fn fn, void * user_data);
+      int set_device_interrupt(aocl_mmd_device_interrupt_handler_fn fn, void * user_data);
+      int set_status_handler  (aocl_mmd_status_handler_fn    fn, void * user_data);
+  
+      // Query PCIe information of the device 
+      char *get_dev_pcie_info() { return m_info.pcie_info_str; }; 
+
+      // Query on-die temperature sensor, if available
+      bool get_ondie_temp_slow_call( cl_int *temp );
+      
+      // Shared memory manipulation functions
+      void *shared_mem_alloc ( size_t size, unsigned long long *device_ptr_out );
+      void shared_mem_free ( void* host_ptr, size_t size );
+
+      // Reprogram the device with given binary file
+      // return 0 on success
+      int reprogram(void *data, size_t data_size);
+
+   private:
+      // Helper routines for interrupts
+      // return 0 on success, negative on error
+      int  mask_irqs();
+      int  unmask_irqs();
+      int  unmask_kernel_irq();
+      int  disable_interrupts();
+      int  enable_interrupts(int user_signal_number);
+      int  get_interrupt_type(unsigned int *kernel_update, unsigned int *dma_update, unsigned int irq_type_flag);
+
+      // Helper routines for read or write operations
+      // return 0 on success, negative on error (except for the "incr_ptrs" routine)
+      int  read_write_block     ( aocl_mmd_op_t e, void *host_addr, size_t dev_addr, size_t size, bool reading );
+      int  read_write_block_bar ( void *host_addr, size_t dev_addr, size_t size, bool reading );
+      int  read_write_small_size( void *host_addr, size_t dev_addr, size_t size, bool reading );
+      int  set_segment( size_t addr );
+      void incr_ptrs  ( void **host, size_t *dev, size_t *counter, size_t incr );
+      int  does_base_periph_match_new_periph( struct acl_pkg_file *pkg, const char* dev_name );
+
+      // Helper routines for simple functionality test
+      // return 0 on success, negative on error
+      int  version_id_test();
+      int  wait_for_uniphy();
+      int  pr_base_id_test(unsigned int pr_import_version);
+      int  quartus_ver_test(char *version_str, size_t *version_length);
+      // Write a random value to cade_id register, do a read to confirm the write
+      // Use the random value to find the JTAG cable for that board
+      // Return 0 on ad_cable,ad_device_index if cable not found
+      void  find_jtag_cable(char *ad_cable, char *ad_device_index);
+
+      // Performs PR reprogramming if possible, and returns different statuses on
+      // PR Hash, JTAG programming, RBF or Hash Presence
+      // Returns 0 on success, 1 on reprogram fail
+      int  pr_reprogram(struct acl_pkg_file * pkg, const char * SOFNAME,
+                        int * rbf_or_hash_not_provided, int * hash_mismatch,
+                        unsigned * use_jtag_programming,
+                        int * quartus_compile_version_mismatch);
+
+      // Kernel interrupt handler and event update callbacks
+      aocl_mmd_interrupt_handler_fn kernel_interrupt;
+      void * kernel_interrupt_user_data;
+      aocl_mmd_device_interrupt_handler_fn device_interrupt;
+      void * device_interrupt_user_data;
+      aocl_mmd_status_handler_fn event_update;
+      void * event_update_user_data;
+      int m_user_signal_number;
+
+      ACL_PCIE_MM_IO_MGR *m_io;
+      ACL_PCIE_DMA       *m_dma;
+      ACL_PCIE_HOSTCH    *m_hostch;
+      ACL_PCIE_CONFIG    *m_config;
+
+      static const int    MAX_NAME_LENGTH = 32;
+      int                 m_handle;
+      char                m_name[MAX_NAME_LENGTH];
+      WDC_DEVICE_HANDLE   m_device;
+      ACL_PCIE_DEVICE_DESCRIPTION m_info;
+
+      bool m_use_dma_for_big_transfers;
+      bool m_mmd_irq_handler_enable;
+      bool m_initialized;
+      bool m_being_programmed;
+      bool m_skip_quartus_version_check;
+
+      // IRQ acknowledgement commands in the KMD
+      static const unsigned int NUM_ACK_CMDS = 3;
+      #if defined(WINDOWS)
+         WD_TRANSFER irq_ack_cmds[NUM_ACK_CMDS];
+      #endif   // WINDOWS
+
+      // For the host, memory is segmented.  This stores the last used segment
+      // ID so we don't needlessly update it in hardware
+      UINT64 m_segment;
+
+};
+
+#endif // ACL_PCIE_DEVICE_H
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma.h
new file mode 100755
index 0000000000000000000000000000000000000000..051ff015b0f60111672e3424a8f4a31c01e1e425
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma.h
@@ -0,0 +1,38 @@
+#ifndef ACL_PCIE_DMA_H
+#define ACL_PCIE_DMA_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_dma.h  ----------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+#if defined(WINDOWS)
+#  include "acl_pcie_dma_windows.h"
+#endif   // WINDOWS
+#if defined(LINUX)
+#  include "acl_pcie_dma_linux.h"
+#endif   // LINUX
+
+#endif // ACL_PCIE_DMA_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..d89f25530f1b7e3c7e8244971a1099991a2e1ce4
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.cpp
@@ -0,0 +1,139 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_dma_linux.cpp  --------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle Linux-specific DMA operations.         */
+/* The declaration of the class lives in the acl_pcie_dma_linux.h                  */
+/* The actual implementation of DMA operation is inside the Linux kernel driver.   */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#if defined(LINUX)
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_dma_linux.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_device.h"
+#include "acl_pcie_mm_io.h"
+
+// other standard header files
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/time.h>
+
+
+
+ACL_PCIE_DMA::ACL_PCIE_DMA( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie )
+{
+   ACL_PCIE_ASSERT(dev  != INVALID_DEVICE, "passed in an invalid device when creating dma object.\n");
+   ACL_PCIE_ASSERT(io   != NULL, "passed in an empty pointer for io when creating dma object.\n");
+   ACL_PCIE_ASSERT(pcie != NULL, "passed in an empty pointer for pcie when creating dma object.\n");
+
+   m_device = dev;
+   m_pcie   = pcie;
+   m_io     = io;
+   m_event  = NULL;
+}
+
+ACL_PCIE_DMA::~ACL_PCIE_DMA()
+{
+   struct acl_cmd driver_cmd = { ACLPCI_CMD_BAR, ACLPCI_CMD_DMA_STOP, NULL, NULL };
+   read(m_device, &driver_cmd, sizeof(driver_cmd));
+}
+
+
+
+bool ACL_PCIE_DMA::is_idle( )
+{
+   unsigned int result = 0;
+
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id      = ACLPCI_CMD_BAR;
+   driver_cmd.command     = ACLPCI_CMD_GET_DMA_IDLE_STATUS;
+   driver_cmd.device_addr = NULL;
+   driver_cmd.user_addr   = &result;
+   driver_cmd.size        = sizeof(result);
+   read (m_device, &driver_cmd, sizeof(driver_cmd));
+
+   return (result != 0);
+}
+
+
+
+// Perform operations required when a DMA interrupt comes
+// For Linux, 
+//    All of the DMA related interrupts are handled inside the kernel driver, 
+//    so when MMD gets a signal from the kernel driver indicating DMA is finished, 
+//    it only needs to call the event_update_fn when it's needed.
+void ACL_PCIE_DMA::service_interrupt()
+{
+   if (m_event)
+   {
+      // Use a temporary variable to save the event data and reset m_event
+      // before calling event_update_fn to avoid race condition that the main
+      // thread may start a new DMA transfer before this work-thread is able to
+      // reset the m_event.
+      aocl_mmd_op_t temp_event = m_event;
+      m_event = NULL;
+
+      m_pcie->event_update_fn( temp_event, 0 );
+   }
+}
+
+
+
+// relinquish the CPU to let any other thread to run
+// return 0 since there is no useful work to be performed here
+int ACL_PCIE_DMA::yield()
+{
+   usleep(0);
+   return 0;
+}
+
+
+
+// Transfer data between host and device
+// This function returns right after the transfer is scheduled
+// Return 0 on success
+int ACL_PCIE_DMA::read_write(void *host_addr, size_t dev_addr, size_t bytes, aocl_mmd_op_t e, bool reading)
+{
+   m_event = e;
+
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id      = ACLPCI_DMA_BAR;
+   driver_cmd.command     = ACLPCI_CMD_DEFAULT;
+   driver_cmd.device_addr = reinterpret_cast<void *>(dev_addr);
+   driver_cmd.user_addr   = host_addr;
+   driver_cmd.size        = bytes;
+   if (reading)
+      read (m_device, &driver_cmd, sizeof(driver_cmd));
+   else
+      write(m_device, &driver_cmd, sizeof(driver_cmd));
+   return 0; // success
+}
+
+#endif // LINUX
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.h
new file mode 100755
index 0000000000000000000000000000000000000000..729f1ccd24e6ba8b4f2a7752e3503daf8770f032
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_linux.h
@@ -0,0 +1,70 @@
+#ifndef ACL_PCIE_DMA_LINUX_H
+#define ACL_PCIE_DMA_LINUX_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_dma_linux.h  ----------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle Linux-specific DMA operations.           */
+/* The actual implementation of the class lives in the acl_pcie_dma_linux.cpp      */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#if defined(LINUX)
+
+class ACL_PCIE_DEVICE;
+class ACL_PCIE_MM_IO_MGR;
+
+class ACL_PCIE_DMA
+{
+   public:
+      ACL_PCIE_DMA( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie );
+      ~ACL_PCIE_DMA();
+
+      bool is_idle();
+      void stall_until_idle(){ while(!is_idle()) yield(); };
+
+      // Perform operations required when a DMA interrupt comes
+      void service_interrupt();
+
+      // Relinquish the CPU to let any other thread to run
+      // Return 0 since there is no useful work to be performed here
+      int  yield();
+
+      // Transfer data between host and device
+      // This function returns right after the transfer is scheduled
+      // Return 0 on success
+      int read_write(void *host_addr, size_t dev_addr, size_t bytes, aocl_mmd_op_t e, bool reading);
+
+   private:
+      aocl_mmd_op_t       m_event;
+
+      WDC_DEVICE_HANDLE   m_device;
+      ACL_PCIE_DEVICE    *m_pcie;
+      ACL_PCIE_MM_IO_MGR *m_io;
+};
+
+#endif // LINUX
+
+#endif // ACL_PCIE_DMA_LINUX_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..38222c09ae673465f663c835750fe7e21c898ee4
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.cpp
@@ -0,0 +1,1213 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_dma_windows.cpp  ------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle Windows-specific DMA operations.       */
+/* The declaration of the class lives in the acl_pcie_dma_windows.h                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#if defined(WINDOWS)
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_dma_windows.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_device.h"
+#include "acl_pcie_mm_io.h"
+#include "acl_pcie_timer.h"
+#include "acl_pcie_debug.h"
+#include <iostream>
+#include <stdlib.h>
+
+
+#define ACL_PCIE_DMA_DEBUG(m, ...)  ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, m, __VA_ARGS__)
+
+
+
+// The callback function to be scheduled inside the interrupt handler
+// It will release the semaphore to allow new work to be scheduled and 
+// perform the dma update function
+void CALLBACK myWorkCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work){
+   ACL_PCIE_DMA *m_dma = (ACL_PCIE_DMA *)context;
+
+   ReleaseSemaphore(m_dma->m_workqueue_semaphore, 1, NULL);
+   
+   m_dma->update(true);
+}
+
+void CALLBACK myWorkUnpinCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work) {
+   ACL_PCIE_DMA *m_dma = (ACL_PCIE_DMA *)context;
+   
+   m_dma->unpin_from_queue();
+}
+
+void CALLBACK myWorkPinCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work) {
+   ACL_PCIE_DMA *m_dma = (ACL_PCIE_DMA *)context;
+   
+   m_dma->prepin_memory();
+}
+
+ACL_PCIE_DMA::ACL_PCIE_DMA( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie ) :
+   m_event( NULL ),
+   m_pcie( NULL ),
+   m_io( NULL ),
+   m_timer( NULL )
+{
+   ACL_PCIE_ASSERT(dev  != INVALID_DEVICE, "passed in an invalid device when creating dma object.\n");
+   ACL_PCIE_ASSERT(io   != NULL, "passed in an empty pointer for io when creating dma object.\n");
+   ACL_PCIE_ASSERT(pcie != NULL, "passed in an empty pointer for pcie when creating dma object.\n");
+   
+   m_device = dev;
+   m_io     = io;
+   m_pcie   = pcie;
+   
+   HOSTCH_DESC *h = &hostch_data;
+
+   const char *use_msi = getenv("ACL_PCIE_DMA_USE_MSI");
+   if ( use_msi ) 
+      m_use_polling = 0;
+   else 
+      m_use_polling = 1;
+
+   memset( &m_active_mem, 0, sizeof(PINNED_MEM) );
+   memset( &m_pre_pinned_mem, 0, sizeof(PINNED_MEM) );
+   memset( &m_done_mem, 0, sizeof(PINNED_MEM) );
+    
+   // Initialize Host Channel
+   memset( &h->m_hostch_rd_mem, 0, sizeof(PINNED_MEM) );
+   memset( &h->m_hostch_wr_mem, 0, sizeof(PINNED_MEM) );
+   memset( &h->m_hostch_rd_pointer, 0, sizeof(PINNED_MEM) );
+   memset( &h->m_hostch_wr_pointer, 0, sizeof(PINNED_MEM) );
+   memset( &h->m_sync_thread_pointer, 0, sizeof(PINNED_MEM) );
+   h->push_valid = 0;
+   h->pull_valid = 0;
+
+   m_timer = new ACL_PCIE_TIMER();
+
+   // create the threadpool to perform work the interrupt
+   m_threadpool = CreateThreadpool(NULL);
+   ACL_PCIE_ERROR_IF( m_threadpool == NULL, return, "failed to create threadpool.\n" );
+
+   // set the number of work threads to 1 
+   // so that no scheduled work will be running in parallel between them
+   SetThreadpoolThreadMaximum(m_threadpool, 1);  
+   bool status = SetThreadpoolThreadMinimum(m_threadpool, 1);
+   ACL_PCIE_ERROR_IF( status == false, return, "failed to set # of work thread to 1.\n" );
+
+   // create the work for threadpool and its semaphore
+   InitializeThreadpoolEnvironment(&m_callback_env);   
+   SetThreadpoolCallbackPool(&m_callback_env, m_threadpool);
+
+   m_work = CreateThreadpoolWork(myWorkCallback, (void *)this, &m_callback_env);
+   ACL_PCIE_ERROR_IF( m_work == NULL, return, "failed to create work for threadpool.\n" );
+   
+   m_workqueue_semaphore = CreateSemaphore(NULL, 1, 1, NULL);
+   ACL_PCIE_ERROR_IF( m_workqueue_semaphore == NULL, return, "failed to create semaphore.\n" );
+   
+   ///////////////////////////////////////////////////////////////////////////////////////////
+   // Unpin thread
+   m_unpin_threadpool = CreateThreadpool(NULL);
+   ACL_PCIE_ERROR_IF( m_unpin_threadpool == NULL, return, "failed to create threadpool.\n" );
+
+   // set the number of work threads to 1 
+   // so that no scheduled work will be running in parallel between them
+   SetThreadpoolThreadMaximum(m_unpin_threadpool, 1);  
+   status = SetThreadpoolThreadMinimum(m_unpin_threadpool, 1);
+   ACL_PCIE_ERROR_IF( status == false, return, "failed to set # of work thread to 1.\n" );
+
+   // create the work for threadpool and its semaphore
+   InitializeThreadpoolEnvironment(&m_unpin_callback_env);   
+   SetThreadpoolCallbackPool(&m_unpin_callback_env, m_unpin_threadpool);
+
+   m_unpin_work = CreateThreadpoolWork(myWorkUnpinCallback, (void *)this, &m_unpin_callback_env);
+   ACL_PCIE_ERROR_IF( m_unpin_work == NULL, return, "failed to create work for unpin threadpool.\n" );
+   
+   ///////////////////////////////////////////////////////////////////////////////////////////
+   // pin thread
+   m_pin_threadpool = CreateThreadpool(NULL);
+   ACL_PCIE_ERROR_IF( m_pin_threadpool == NULL, return, "failed to create threadpool.\n" );
+
+   // set the number of work threads to 1 
+   // so that no scheduled work will be running in parallel between them
+   SetThreadpoolThreadMaximum(m_pin_threadpool, 1);  
+   status = SetThreadpoolThreadMinimum(m_pin_threadpool, 1);
+   ACL_PCIE_ERROR_IF( status == false, return, "failed to set # of work thread to 1.\n" );
+
+   // create the work for threadpool and its semaphore
+   InitializeThreadpoolEnvironment(&m_pin_callback_env);   
+   SetThreadpoolCallbackPool(&m_pin_callback_env, m_pin_threadpool);
+
+   m_pin_work = CreateThreadpoolWork(myWorkPinCallback, (void *)this, &m_pin_callback_env);
+   ACL_PCIE_ERROR_IF( m_pin_work == NULL, return, "failed to create work for unpin threadpool.\n" );
+   
+   
+   ///////////////////////////////////////////////////////////////////////////////////////////
+   // Contiguous DMA'able memory allocation for descriptor table
+   
+   DWORD WD_status;
+   DWORD lock_options = static_cast<DWORD>(DMA_TO_FROM_DEVICE | DMA_ALLOW_64BIT_ADDRESS);
+   size_t desc_table_size = sizeof(struct DMA_DESC_TABLE);
+   size_t page_table_size = sizeof(struct HOSTCH_TABLE);
+
+   // Lock DMA_DESC_TABLE
+   WD_status = WDC_DMAContigBufLock(m_device, (PVOID *) &m_table_virt_addr, lock_options, (DWORD)desc_table_size, &m_table_dma_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMAContigBufLock function failed.\n" );
+   WD_status = WDC_DMASyncCpu( m_table_dma_addr );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncCpu function failed.\n" );
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Successfully locked DMA descriptor table memory.\n" );
+   ACL_PCIE_ASSERT( m_table_dma_addr->dwPages == 1, "WDC_DMAContigBufLock function allocated more than 1 page.\n" );
+   m_table_dma_phys_addr = m_table_dma_addr->Page[0].pPhysicalAddr;
+
+   // Lock HOSTCH_TABLE push channel
+   WD_status = WDC_DMAContigBufLock(m_device, (PVOID *) &h->push_page_table, lock_options, (DWORD)page_table_size, &hostch_data.push_page_table_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMAContigBufLock function for Hostchannel failed. \n");
+   WD_status = WDC_DMASyncCpu( hostch_data.push_page_table_addr );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncCpu function for Hostchannel failed\n");
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Successfully locked descriptor table for Hostchannel memory.\n" );
+   ACL_PCIE_ASSERT( hostch_data.push_page_table_addr->dwPages == 1, "WDC_DMAContigBufLock function for HostChannel allocated more than 1 page.\n");
+   hostch_data.push_page_table_bus_addr = hostch_data.push_page_table_addr->Page[0].pPhysicalAddr;
+
+   // Lock HOSTCH_TABLE pull channel
+   WD_status = WDC_DMAContigBufLock(m_device, (PVOID *) &h->pull_page_table, lock_options, (DWORD)page_table_size, &hostch_data.pull_page_table_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMAContigBufLock function for Hostchannel failed. \n");
+   WD_status = WDC_DMASyncCpu( hostch_data.pull_page_table_addr );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncCpu function for Hostchannel failed\n");
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Successfully locked descriptor table memory.\n" );
+   ACL_PCIE_ASSERT( hostch_data.pull_page_table_addr->dwPages == 1, "WDC_DMAContigBufLock function for HostChannel allocated more than 1 page.\n");
+   hostch_data.pull_page_table_bus_addr = hostch_data.pull_page_table_addr->Page[0].pPhysicalAddr;
+
+   // set idle status to true when finish initialization
+   m_idle = true;
+}
+
+ACL_PCIE_DMA::~ACL_PCIE_DMA()
+{
+   DWORD WD_status;
+   stall_until_idle();
+   
+   // make sure no more work queued for threadpool
+   WaitForThreadpoolWorkCallbacks(m_work, FALSE);
+
+   // hostch_destroy is expected to be called by user but to make sure, call in the destructor
+   hostch_destroy(ACL_HOST_CHANNEL_0);
+   hostch_destroy(ACL_HOST_CHANNEL_1);
+
+   // Unlock all the previously allocated tables from the constructor
+   WD_status = WDC_DMABufUnlock(m_table_dma_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMABufUnlock was not successful\n");
+   WD_status = WDC_DMABufUnlock(hostch_data.push_page_table_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMABufUnlock for HostChannel push page table addr was not successful\n");
+   WD_status = WDC_DMABufUnlock(hostch_data.pull_page_table_addr);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMABufUnlock for HostChannel pull page table addr was not successful\n");
+
+   CloseHandle(m_workqueue_semaphore);
+   CloseThreadpoolWork(m_work);
+   CloseThreadpool(m_threadpool);
+   
+   CloseThreadpoolWork(m_unpin_work);
+   CloseThreadpool(m_unpin_threadpool);
+   
+   CloseThreadpoolWork(m_pin_work);
+   CloseThreadpool(m_pin_threadpool);
+   
+   if( m_timer ) { delete m_timer;  m_timer = NULL; }
+}
+
+int ACL_PCIE_DMA::check_dma_interrupt(unsigned int *dma_update)
+{
+   if (!m_use_polling) {
+      if (m_last_id > 0 && m_last_id <= ACL_PCIE_DMA_DESC_MAX_ENTRIES) {
+         *dma_update = (m_table_virt_addr->header.flags[m_last_id-1]);
+      } else {
+         return 1;
+      }
+   }
+   return 0;
+}
+
+void ACL_PCIE_DMA::unpin_from_queue()
+{
+   DWORD WD_status;
+   ACL_PCIE_ASSERT( !m_dma_unpin_pending.empty(), "m_dma_unpin_pending is empty but unpin mem thread was called\n" );
+   
+   WD_DMA *dma = m_dma_unpin_pending.front();
+   m_dma_unpin_pending.pop();
+   
+   WD_status = WDC_DMASyncIo(dma);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncIo function failed.\n" );      
+   WD_status = WDC_DMABufUnlock(dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMABufUnlock function failed.\n" );
+}
+
+void ACL_PCIE_DMA::prepin_memory()
+{
+   pin_memory(&m_pre_pinned_mem, true);
+}
+
+void ACL_PCIE_DMA::wait_finish()
+{
+   UINT32 wait_timer;
+   
+   while (1) {
+      wait_timer = ACL_PCIE_DMA_TIMEOUT;
+      while (wait_timer > 0)
+      {
+         wait_timer--;
+
+         if (m_table_virt_addr->header.flags[m_last_id-1] == 1) {
+            ACL_PCIE_DMA_DEBUG( ":::: [DMA] Wait done\n" );
+            set_desc_table_header();
+            if( WaitForSingleObject(m_workqueue_semaphore, 0L) == WAIT_OBJECT_0 ){
+               SubmitThreadpoolWork(m_work);
+            }
+            return;
+         }
+      }
+      
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] Wait timed out. Sleeping for 1ms.\n" );
+      Sleep(1);
+  }
+}
+
+void ACL_PCIE_DMA::send_dma_desc()
+{
+   // Disabling interrupt is used in hostch_create function during polling
+
+   if (m_read) {
+      m_io->dma->write32(ACL_PCIE_DMA_RC_WR_DESC_BASE_LOW, m_table_dma_phys_addr & 0xffffffffUL);
+      m_io->dma->write32(ACL_PCIE_DMA_RC_WR_DESC_BASE_HIGH, m_table_dma_phys_addr >> 32);
+      m_io->dma->write32(ACL_PCIE_DMA_EP_WR_FIFO_BASE_LOW, ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_LO);
+      m_io->dma->write32(ACL_PCIE_DMA_EP_WR_FIFO_BASE_HIGH, ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_HI);
+      m_io->dma->write32(ACL_PCIE_DMA_WR_TABLE_SIZE, ACL_PCIE_DMA_TABLE_SIZE-1);
+      if (m_interrupt_disabled)
+         m_io->dma->write32(ACL_PCIE_DMA_WR_INT_CONTROL, ACL_PCIE_DMA_DISABLE_INT);
+      else
+         m_io->dma->write32(ACL_PCIE_DMA_WR_INT_CONTROL, ACL_PCIE_DMA_ENABLE_INT);
+      MemoryBarrier();
+      m_io->dma->write32(ACL_PCIE_DMA_WR_LAST_PTR, m_last_id-1);
+   } else {
+      m_io->dma->write32(ACL_PCIE_DMA_RC_RD_DESC_BASE_LOW, m_table_dma_phys_addr & 0xffffffffUL);
+      m_io->dma->write32(ACL_PCIE_DMA_RC_RD_DESC_BASE_HIGH, m_table_dma_phys_addr >> 32);
+      m_io->dma->write32(ACL_PCIE_DMA_EP_RD_FIFO_BASE_LOW, ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_LO);
+      m_io->dma->write32(ACL_PCIE_DMA_EP_RD_FIFO_BASE_HIGH, ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_HI);
+      m_io->dma->write32(ACL_PCIE_DMA_RD_TABLE_SIZE, ACL_PCIE_DMA_TABLE_SIZE-1);
+      if (m_interrupt_disabled)
+         m_io->dma->write32(ACL_PCIE_DMA_RD_INT_CONTROL, ACL_PCIE_DMA_DISABLE_INT);
+      else
+         m_io->dma->write32(ACL_PCIE_DMA_RD_INT_CONTROL, ACL_PCIE_DMA_ENABLE_INT);
+      MemoryBarrier();
+      m_io->dma->write32(ACL_PCIE_DMA_RD_LAST_PTR, m_last_id-1);
+   }
+}
+
+void ACL_PCIE_DMA::setup_dma_desc()
+{
+   m_io->dma->write32(ACL_PCIE_DMA_RC_WR_DESC_BASE_LOW, m_table_dma_phys_addr & 0xffffffffUL);
+   m_io->dma->write32(ACL_PCIE_DMA_RC_WR_DESC_BASE_HIGH, m_table_dma_phys_addr >> 32);
+   m_io->dma->write32(ACL_PCIE_DMA_EP_WR_FIFO_BASE_LOW, ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_LO);
+   m_io->dma->write32(ACL_PCIE_DMA_EP_WR_FIFO_BASE_HIGH, ACL_PCIE_DMA_ONCHIP_WR_FIFO_BASE_HI);
+   m_io->dma->write32(ACL_PCIE_DMA_WR_TABLE_SIZE, ACL_PCIE_DMA_TABLE_SIZE-1);
+
+   m_io->dma->write32(ACL_PCIE_DMA_RC_RD_DESC_BASE_LOW, m_table_dma_phys_addr & 0xffffffffUL);
+   m_io->dma->write32(ACL_PCIE_DMA_RC_RD_DESC_BASE_HIGH, m_table_dma_phys_addr >> 32);
+   m_io->dma->write32(ACL_PCIE_DMA_EP_RD_FIFO_BASE_LOW, ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_LO);
+   m_io->dma->write32(ACL_PCIE_DMA_EP_RD_FIFO_BASE_HIGH, ACL_PCIE_DMA_ONCHIP_RD_FIFO_BASE_HI);
+   m_io->dma->write32(ACL_PCIE_DMA_RD_TABLE_SIZE, ACL_PCIE_DMA_TABLE_SIZE-1);  
+}
+
+void ACL_PCIE_DMA::set_read_desc(DMA_ADDR source, UINT64 dest, UINT32 ctl_dma_len)
+{
+   m_active_descriptor->src_addr_ldw = (source & 0xffffffffUL);
+   m_active_descriptor->src_addr_udw = (source >> 32);
+   m_active_descriptor->dest_addr_ldw = (dest & 0xffffffffUL);
+   m_active_descriptor->dest_addr_udw = (dest >> 32);
+   m_active_descriptor->ctl_dma_len = (ctl_dma_len | (m_last_id << 18));
+   m_active_descriptor->reserved[0] = 0;
+   m_active_descriptor->reserved[1] = 0;
+   m_active_descriptor->reserved[2] = 0;
+}
+
+void ACL_PCIE_DMA::set_write_desc(UINT64 source, DMA_ADDR dest, UINT32 ctl_dma_len)
+{
+   m_active_descriptor->src_addr_ldw = (source & 0xffffffffUL);
+   m_active_descriptor->src_addr_udw = (source >> 32);
+   m_active_descriptor->dest_addr_ldw = (dest & 0xffffffffUL);
+   m_active_descriptor->dest_addr_udw = (dest >> 32);
+   m_active_descriptor->ctl_dma_len = (ctl_dma_len | (m_last_id << 18));
+   m_active_descriptor->reserved[0] = 0;
+   m_active_descriptor->reserved[1] = 0;
+   m_active_descriptor->reserved[2] = 0;
+}
+
+void ACL_PCIE_DMA::set_hostch_page_entry(HOSTCH_ENTRY *page_entry, UINT64 page_addr, UINT32 page_num)
+{
+   page_entry->page_addr_ldw = (page_addr & 0xffffffffUL);
+   page_entry->page_addr_udw = (page_addr >> 32);
+   page_entry->page_num = page_num;
+   page_entry->reserved[0] = 0;
+   page_entry->reserved[1] = 0;
+   page_entry->reserved[2] = 1;
+   page_entry->reserved[3] = 0;
+   page_entry->reserved[4] = 0;
+}
+
+void ACL_PCIE_DMA::set_desc_table_header()
+{
+   int i;
+   for (i = 0; i < ACL_PCIE_DMA_DESC_MAX_ENTRIES; i++)
+      m_table_virt_addr->header.flags[i] = 0;
+}
+
+// Perform operations required when a DMA interrupt comes
+void ACL_PCIE_DMA::service_interrupt()
+{
+   if (!m_use_polling) {
+      // only submit a new work to the pool when there is not work in queued
+      if( WaitForSingleObject(m_workqueue_semaphore, 0L) == WAIT_OBJECT_0 ){
+         set_desc_table_header();
+         SubmitThreadpoolWork(m_work);
+      }
+   }
+}
+
+void ACL_PCIE_DMA::spin_loop_ns(UINT64 wait_ns)
+{
+   cl_ulong start = m_timer->get_time_ns();
+   cl_ulong finish;
+   
+   do {
+      finish = m_timer->get_time_ns();
+   } while(finish-start < wait_ns);
+}
+
+
+void ACL_PCIE_DMA::check_last_id(UINT32 *last_id)
+{
+   ACL_PCIE_ASSERT( *last_id <= (ACL_PCIE_DMA_RESET_ID+1), "last id was greater than 255.\n" );
+   
+   if (*last_id == (ACL_PCIE_DMA_RESET_ID+1)) {
+      *last_id = 0;
+      return;
+   } else if (*last_id == ACL_PCIE_DMA_TABLE_SIZE) {
+      *last_id = 0;
+      return;
+   }
+   ACL_PCIE_ASSERT( *last_id < (ACL_PCIE_DMA_TABLE_SIZE), "last id was greater than 127.\n" );
+}
+
+// Relinquish the CPU to let any other thread to run
+// Return 0 since there is no useful work to be performed here
+int ACL_PCIE_DMA::yield()
+{
+   Sleep(0);
+   return 0;
+}
+
+// Add a byte-offset to a void* pointer
+inline void *ACL_PCIE_DMA::compute_address( void* base, uintptr_t offset )
+{
+   uintptr_t p = reinterpret_cast<uintptr_t>(base);
+   return reinterpret_cast<void*>(p + offset);
+}
+
+int ACL_PCIE_DMA::hostch_buffer_lock(void *addr, size_t len, PINNED_MEM *new_mem, int direction)
+{ 
+   DWORD WD_status;
+   // No active segment of pinned memory - pin one
+   DWORD lock_options = static_cast<DWORD>((direction?DMA_FROM_DEVICE:DMA_TO_DEVICE) | DMA_ALLOW_64BIT_ADDRESS);
+   
+   WD_status = WDC_DMASGBufLock(m_device, addr, lock_options, (DWORD)len, &new_mem->dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "HostCh : WDC_DMAContigBufLock function for Hostchannel failed.\n" );
+   WD_status = WDC_DMASyncCpu( new_mem->dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "HostCh: WDC_DMASyncCpu function for Hostchannel failed.\n" );
+
+   new_mem->pages_rem = new_mem->dma->dwPages;
+   new_mem->next_page = new_mem->dma->Page;
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh Pinning 0x%x bytes at 0x%p.\n", len, addr );
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh Pinned %d pages for 0x%x bytes of memory.\n", new_mem->dma->dwPages, new_mem->dma->dwBytes );
+    
+   return 0;
+}
+
+
+// Only 1 pin_memory can be running at a time
+void ACL_PCIE_DMA::pin_memory(PINNED_MEM *new_mem, bool prepin)
+{
+   DWORD WD_status;
+   // No active segment of pinned memory - pin one
+   DWORD lock_options = static_cast<DWORD>((m_read?DMA_FROM_DEVICE:DMA_TO_DEVICE) | DMA_ALLOW_64BIT_ADDRESS);
+   m_bytes_rem    = prepin ? (m_bytes_rem-m_last_pinned_size) : (m_bytes-m_bytes_sent);
+   UINT32 last_id = prepin ? 0 : m_last_id;
+   check_last_id(&last_id);
+   size_t last_id_size_offset = last_id*PAGE_SIZE;
+   size_t lock_size    = (m_bytes_rem > ACL_PCIE_DMA_MAX_PINNED_MEM_SIZE-last_id_size_offset) ? ACL_PCIE_DMA_MAX_PINNED_MEM_SIZE-last_id_size_offset : m_bytes_rem;
+   void* lock_addr    = prepin ? compute_address(m_last_pinned_addr, m_last_pinned_size) : compute_address(m_host_addr, m_bytes_sent);
+   uintptr_t last_page_portion = (reinterpret_cast<uintptr_t>(lock_addr) + lock_size) & ACL_PCIE_DMA_PAGE_ADDR_MASK;
+   // If doing max pinning, check if will *end* on page boundary. If not, better
+   // to pin a bit less and end up on the boundary. This way, will have fewer
+   // descriptors to send.
+   if (lock_size == (ACL_PCIE_DMA_MAX_PINNED_MEM_SIZE-last_id_size_offset) && last_page_portion != 0) {
+      lock_size -= (size_t)last_page_portion;
+      m_prepin_handle_last = 0;
+      m_handle_last = prepin ? m_handle_last : 0;
+   } else if (last_page_portion != 0) {
+      m_prepin_handle_last = prepin ? 1 : 0;
+      m_handle_last = prepin ? m_handle_last : 1;
+   } else {
+      m_prepin_handle_last = 0;
+      m_handle_last = prepin ? m_handle_last : 0;
+   }
+   
+   assert(lock_size < MAXDWORD);
+   WD_status = WDC_DMASGBufLock(m_device, lock_addr, lock_options, (DWORD)lock_size, &new_mem->dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASGBufLock function failed.\n" );
+   WD_status = WDC_DMASyncCpu( new_mem->dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncCpu function failed.\n" );
+
+   new_mem->pages_rem = new_mem->dma->dwPages;
+   new_mem->next_page = new_mem->dma->Page;
+   
+   m_last_pinned_size = lock_size;
+   m_last_pinned_addr = lock_addr;
+
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Pinning 0x%x bytes at 0x%p.\n", lock_size, lock_addr );
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Pinned %d pages for 0x%x bytes of memory.\n", new_mem->dma->dwPages, new_mem->dma->dwBytes );
+
+}
+
+// Unpin Memory
+void ACL_PCIE_DMA::unpin_memory(PINNED_MEM *old_mem)
+{
+   WD_DMA *dma = old_mem->dma;
+   DWORD WD_status;
+   
+   WD_status = WDC_DMASyncIo(dma);
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMASyncIo function failed.\n" );      
+   WD_status = WDC_DMABufUnlock(dma );
+   ACL_PCIE_ASSERT( WD_status == WD_STATUS_SUCCESS, "WDC_DMABufUnlock function failed.\n" );
+   old_mem->dma = NULL;
+}
+
+// Handle pages unaligned to 4KB.
+// DMA engine can only transfer power of 2 sizes.
+// Transfer 2KB, 1KB, 512B, 256B, 128B then 64B.
+void ACL_PCIE_DMA::non_aligned_page_handler()
+{
+   DWORD i;
+   UINT32 max_transfer;
+   UINT32 transfer_bytes_w, transfer_bytes, transfer_words, largest_remaining_chunk;
+   
+   check_last_id(&m_last_id);
+   max_transfer = ACL_PCIE_DMA_TABLE_SIZE - m_last_id;
+   
+   largest_remaining_chunk = 0;
+   transfer_bytes_w = ACL_PCIE_DMA_NON_ALIGNED_TRANS_LOG;
+   largest_remaining_chunk = m_remaining_first_page >> transfer_bytes_w;
+   while (largest_remaining_chunk == 0)
+   {
+      ACL_PCIE_ASSERT( transfer_bytes_w > 1, "DMA engine detected less than 4Bytes transfer. Not supported.\n" );
+      transfer_bytes_w--;
+      largest_remaining_chunk = m_remaining_first_page >> transfer_bytes_w;
+   }
+   
+   transfer_bytes = 1i64 << transfer_bytes_w;
+   transfer_words = transfer_bytes/4;
+   
+   if (largest_remaining_chunk >= max_transfer) {
+      for (i = 0; i < max_transfer; i++) {
+         m_active_descriptor = &(m_table_virt_addr->descriptors[i]);
+         if (m_read) {
+            set_write_desc(m_dev_addr, m_first_page.pPhysicalAddr, transfer_words);
+         } else {
+            set_read_desc(m_first_page.pPhysicalAddr, m_dev_addr, transfer_words);
+         }
+         m_last_id++;
+         m_dev_addr += transfer_bytes;
+         m_first_page.pPhysicalAddr += transfer_bytes;
+      }
+      largest_remaining_chunk = max_transfer;
+      m_remaining_first_page -= transfer_bytes*max_transfer;
+   } else if (largest_remaining_chunk > 0) {
+      for (i = 0; i < largest_remaining_chunk; i++) {
+         m_active_descriptor = &(m_table_virt_addr->descriptors[i]);
+         if (m_read) {
+            set_write_desc(m_dev_addr, m_first_page.pPhysicalAddr, transfer_words);
+         } else {
+            set_read_desc(m_first_page.pPhysicalAddr, m_dev_addr, transfer_words);
+         }
+         m_last_id++;
+         m_dev_addr += transfer_bytes;
+         m_first_page.pPhysicalAddr += transfer_bytes;
+      }
+      m_remaining_first_page -= transfer_bytes*largest_remaining_chunk;
+   }
+   
+   m_bytes_sent += transfer_bytes*largest_remaining_chunk;
+   MemoryBarrier();
+   m_interrupt_disabled = FALSE;
+   send_dma_desc();
+   MemoryBarrier();
+   
+   if (m_remaining_first_page == 0)
+   {
+      ++m_active_mem.next_page;
+      --m_active_mem.pages_rem;
+   }
+}
+
+// Check if user's 'ack' API updated end pointer of circular buf
+// Update end pointer in IP
+int ACL_PCIE_DMA::hostch_push_update ()
+{
+   HOSTCH_DESC *h = &hostch_data;
+
+   if (h->rd_buf_end_pointer != *h->user_rd_end_pointer){
+      h->rd_buf_end_pointer = *h->user_rd_end_pointer;
+   } else {
+      h->loop_counter = (h->loop_counter > 0) ? h->loop_counter - 1 : h->loop_counter;
+      return 1;
+   }
+   h->loop_counter = HOSTCH_LOOP_COUNTER;
+
+   m_io->dma->write32(ACL_HOST_CHANNEL_0_HOST_ENDP, (UINT32) h->rd_buf_end_pointer);
+
+   return 0;
+}
+
+// Check if user's 'ack' API updated front pointer of circular buf
+// Update end pointer in IP
+int ACL_PCIE_DMA::hostch_pull_update ()
+{
+   HOSTCH_DESC *h = &hostch_data;
+
+   if (h->wr_buf_front_pointer != *h->user_wr_front_pointer){
+      h->wr_buf_front_pointer = *h->user_wr_front_pointer;
+   } else {
+      h->loop_counter = (h->loop_counter > 0) ? h->loop_counter - 1 : h->loop_counter;
+      return 1;
+   }
+   h->loop_counter = HOSTCH_LOOP_COUNTER;
+
+   m_io->dma->write32(ACL_HOST_CHANNEL_1_HOST_FRONTP, h->wr_buf_front_pointer);
+   return 0;
+}
+
+
+// Transfer data between host and device
+// This function returns right after the transfer is scheduled
+// Return 0 on success
+int ACL_PCIE_DMA::read_write(void *host_addr, size_t dev_addr, size_t bytes, aocl_mmd_op_t e, bool reading)
+{
+   ACL_PCIE_ASSERT( m_event == NULL, "non-empty event before a new DMA read/write.\n" );
+   ACL_PCIE_ASSERT( m_active_mem.dma == NULL, "there is still active pinned memory before a new DMA read/write.\n" );
+
+
+   // Copy the parameters over and mark the job as running
+   m_event     = e;
+   m_read      = reading;
+   m_bytes     = bytes;
+   m_host_addr = host_addr;
+   m_dev_addr  = dev_addr;
+
+   // Start processing the request
+   m_bytes_sent               = 0;
+   m_handle_last              = 0;
+   m_last_id                  = ACL_PCIE_DMA_RESET_ID;
+   m_prepinned                = 0;
+   
+   if (m_read) {
+      m_io->dma->read32( ACL_PCIE_DMA_WR_LAST_PTR, &m_last_id );
+      m_last_id++;
+   }
+   else {
+      m_io->dma->read32( ACL_PCIE_DMA_RD_LAST_PTR, &m_last_id );
+      m_last_id++;
+   }
+
+   m_idle                     = false;
+
+   // setup the work inside the threadpool to perform the first DMA transaction
+   ACL_PCIE_ERROR_IF( WaitForSingleObject(m_workqueue_semaphore, 0L) != WAIT_OBJECT_0, return -1, 
+            "failed to schedule the first work for DMA read/write.\n" );
+
+   SubmitThreadpoolWork(m_work);
+  
+   return 0; // success
+}
+
+
+// function to be scheduled to execute whenever an interrupt arrived
+bool ACL_PCIE_DMA::update( bool forced )
+{
+   cl_ulong start;
+   int status;
+   UINT32 max_transfer;
+   unsigned int i;
+   HOSTCH_DESC *h = &hostch_data;
+
+
+   if(!forced)
+      return false;
+
+   if (h->pull_valid && m_idle) {
+      // Check user memory to see if there was update to user buffer pointer for pull
+      status = hostch_pull_update();
+   }
+   
+   if (h->push_valid && m_idle) {
+      // Check user memory to see if there was update to user buffer pointer for push
+      status = hostch_push_update();
+   }
+   
+   if ((h->push_valid | h->pull_valid) && m_idle && (h->thread_sync_valid && h->loop_counter > 0)) {
+      // setup the work inside the threadpool to perform the first DMA transaction
+      ACL_PCIE_ERROR_IF( WaitForSingleObject(m_workqueue_semaphore, 0L) != WAIT_OBJECT_0, return false, 
+               "HostCh : failed to schedule the first work for DMA read/write.\n" );
+      SubmitThreadpoolWork(m_work);
+      return false;
+
+   } else if (m_idle && (h->thread_sync_valid && h->loop_counter == 0)) {
+      *h->user_thread_sync = 0;
+      return false;
+
+   } else if (m_idle) {
+      return false;
+   }
+
+
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Bytes left %u\n", m_bytes-m_bytes_sent );
+   // Process any descriptors that have completed
+   set_desc_table_header();
+   cl_ulong finish = 0;
+   if ( ACL_PCIE_DEBUG >= VERBOSITY_BLOCKTX )
+     finish = m_timer->get_time_ns();
+
+   // Check if the transaction is complete
+   if(m_bytes_sent == m_bytes)
+   {
+      if (m_active_mem.dma != NULL)
+         unpin_memory(&m_active_mem);
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] Transaction complete!\n" );
+      ACL_PCIE_ASSERT( m_active_mem.dma == NULL, "there is still active pinned memory after the DMA read/write.\n" );
+      WaitForThreadpoolWorkCallbacks(m_unpin_work, false);
+      if (!m_dma_unpin_pending.empty()) {
+         ACL_PCIE_DMA_DEBUG( ":::: [DMA] Done, but pinned memory still in queue. Wait until queue is empty.\n");
+         if( WaitForSingleObject(m_workqueue_semaphore, 0L) == WAIT_OBJECT_0 ){
+            SubmitThreadpoolWork(m_work);
+         }
+         Sleep(0);
+         return true;
+      }
+      
+      m_last_id = ACL_PCIE_DMA_RESET_ID;
+      m_idle = true;
+      
+      if (m_event) 
+      {
+         // Use a temporary variable to save the event data and reset m_event before calling event_update_fn 
+         // to avoid race condition that the main thread may start a new DMA transfer before this work-thread
+         // is able to reset the m_event.
+         aocl_mmd_op_t temp_event = m_event;
+         m_event = NULL; 
+
+         m_pcie->event_update_fn( temp_event, 0 );  
+      }
+
+     if ((h->push_valid | h->pull_valid) && (h->thread_sync_valid && h->loop_counter > 0)) {
+         ACL_PCIE_ERROR_IF(WaitForSingleObject(m_workqueue_semaphore, 0L) != WAIT_OBJECT_0, return false, 
+            "HostCh : failed to schedule the first work for DMA read/write.\n");
+         SubmitThreadpoolWork(m_work);
+      }
+
+      return true;
+   }
+   
+   // Check if we are done with previously pinned memory.
+   if (m_active_mem.dma == NULL || m_active_mem.pages_rem == 0)
+   {
+      m_done_mem = m_active_mem;
+      
+      WaitForThreadpoolWorkCallbacks(m_pin_work, false);
+      
+      // Get pre-pinned memory if there are any.
+      if (m_pre_pinned_mem.dma != NULL) {
+         m_active_mem = m_pre_pinned_mem;
+         m_pre_pinned_mem.dma = NULL;
+         m_handle_last = m_prepin_handle_last;
+         m_prepinned = 0;
+      } else if (m_prepinned) {
+         if( WaitForSingleObject(m_workqueue_semaphore, 0L) == WAIT_OBJECT_0 ){
+            SubmitThreadpoolWork(m_work);
+         }
+         Sleep(1);
+         return true;
+      } else {
+         pin_memory(&m_active_mem, false);
+      }
+      
+      // Check if the first page is aligned to 4KB
+      m_first_page.pPhysicalAddr = m_active_mem.next_page->pPhysicalAddr;
+      // If we begin with an offset, we can't use the full page
+      m_first_page.dwBytes =  m_active_mem.next_page->dwBytes;
+      m_remaining_first_page = m_active_mem.next_page->dwBytes;
+      m_aligned = true;
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] First page has %u bytes\n", m_remaining_first_page );
+   }
+   
+   // Transfer non-aligned first page.
+   if ((m_remaining_first_page&ACL_PCIE_DMA_PAGE_ADDR_MASK) != 0)
+   {
+      m_aligned = false;
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] Non-aligned page transfer. %u bytes left\n", m_remaining_first_page );
+      non_aligned_page_handler();
+      if (m_use_polling)
+         wait_finish();
+      return true;
+   }
+   
+   // Transfer non-aligned last page.
+   if (m_handle_last && (m_active_mem.pages_rem == 1))
+   {
+      m_first_page.pPhysicalAddr = m_active_mem.next_page->pPhysicalAddr;
+      m_first_page.dwBytes =  m_active_mem.next_page->dwBytes;
+      m_remaining_first_page = m_active_mem.next_page->dwBytes;
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] Last page has %u bytes\n", m_remaining_first_page );
+      non_aligned_page_handler();
+      if (m_use_polling)
+         wait_finish();
+      return true;
+   }
+   
+   // Main DMA execution
+   // 1. Transfers up to 128 4KB aligned pages
+   // 2. Launch a thread to unpin memory
+   // 3. Launch a thread to pre-pin next memory
+   if (m_active_mem.pages_rem > m_handle_last) {
+      
+      // Calculate how many descriptors can be sent
+      check_last_id(&m_last_id);
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] last id was %u\n", m_last_id );
+      max_transfer = (m_active_mem.pages_rem - m_handle_last > ACL_PCIE_DMA_TABLE_SIZE - m_last_id) ?
+            ACL_PCIE_DMA_TABLE_SIZE - m_last_id : m_active_mem.pages_rem - m_handle_last;
+            
+      ACL_PCIE_DMA_DEBUG( ":::: [DMA] max_transfer %u\n", max_transfer );
+
+      // Build descriptor table
+      for (i = 0; i < max_transfer; i++) {
+         m_active_descriptor = &(m_table_virt_addr->descriptors[i]);
+         if (m_read) {
+            set_write_desc(m_dev_addr, m_active_mem.next_page->pPhysicalAddr, PAGE_SIZE/4);
+            if ( m_active_mem.next_page->dwBytes == PAGE_SIZE) {
+               ++m_active_mem.next_page;
+               m_active_mem.pages_rem--;
+            }
+            else {
+               ACL_PCIE_DMA_DEBUG( ":::: [DMA] page size is larger than 4K for read. Page size is %u bytes\n", m_active_mem.next_page->dwBytes );
+               m_active_mem.next_page->dwBytes -= PAGE_SIZE;
+               m_active_mem.next_page->pPhysicalAddr += PAGE_SIZE;
+            }
+            
+            m_dev_addr += PAGE_SIZE;
+            m_bytes_sent += PAGE_SIZE;
+            
+         } else {
+            set_read_desc(m_active_mem.next_page->pPhysicalAddr, m_dev_addr, PAGE_SIZE/4);
+            if ( m_active_mem.next_page->dwBytes == PAGE_SIZE) {
+               ++m_active_mem.next_page;
+               m_active_mem.pages_rem--;
+            }
+            else {
+               ACL_PCIE_DMA_DEBUG( ":::: [DMA] page size is larger than 4K for write. Page size is %u bytes\n", m_active_mem.next_page->dwBytes );
+               m_active_mem.next_page->dwBytes -= PAGE_SIZE;
+               m_active_mem.next_page->pPhysicalAddr += PAGE_SIZE;
+            }
+            
+            m_dev_addr += PAGE_SIZE;
+            m_bytes_sent += PAGE_SIZE;
+         }
+         m_last_id++;
+      }
+     
+      MemoryBarrier();
+      // Send descriptor table to DMA
+      start = m_timer->get_time_ns();
+      m_interrupt_disabled = FALSE;
+      send_dma_desc();
+      int pinning = 0;
+      int unpinning = 0;
+      cl_ulong unpin_start = 0, unpin_finish = 0;
+      
+      // Launch unpin thread
+      if (m_done_mem.dma != NULL)
+      {
+         unpin_start = m_timer->get_time_ns();
+         unpinning = 1;
+         
+         // wait for previous unpin to finish
+         WaitForThreadpoolWorkCallbacks(m_unpin_work, false);
+         m_dma_unpin_pending.push( m_done_mem.dma );
+         
+         // Make sure Push into unpin queue comes before launching unpin thread
+         MemoryBarrier();
+         
+         // Launch unpin thread
+         SubmitThreadpoolWork(m_unpin_work);
+         m_done_mem.dma = NULL;
+         unpin_finish = m_timer->get_time_ns();
+      }
+      
+      // Launch pre-pin thread
+      cl_ulong pin_start=0, pin_finish=0;
+      if (((m_bytes_rem-m_last_pinned_size) > 0) && (m_prepinned == 0) && (m_aligned))
+      {
+         pin_start = m_timer->get_time_ns();
+         pinning = 1;
+         m_prepinned = 1;
+         
+         // This wait should pass right through.
+         // There is another wait above, before switching active and prepin memory
+         WaitForThreadpoolWorkCallbacks(m_pin_work, false);
+         SubmitThreadpoolWork(m_pin_work);
+         pin_finish = m_timer->get_time_ns();
+      }
+      
+      if (m_use_polling) {
+         wait_finish();
+         finish = m_timer->get_time_ns();
+         ACL_PCIE_DMA_DEBUG(":::: [DMA] Descriptor (%d bytes) completed in %.2f us - %.2f MB/s :: pinning %i in %.2f us :: unpinning %i in %.2f us :: pages rem %i :: handle last %i\n", 
+               max_transfer*4096,
+               (finish - start) / 1000.0,
+               1000000000.0 * max_transfer*4096 / (finish - start) / (1024.0 * 1024.0),
+               pinning,
+               (pin_finish - pin_start) / 1000.0,
+               unpinning,
+               (unpin_finish - unpin_start) / 1000.0,
+               m_active_mem.pages_rem,
+               m_handle_last);
+      }
+
+      return true;
+   }
+   
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] Nothing happened\n" );
+   return true;
+}
+
+// Poll DMA transfer
+// Only used during host channel create
+// Used to transfer the page table of pinned down MMD circular buffer to host channel IP
+// The size of this transfer is known to be small
+void ACL_PCIE_DMA::poll_wait() {
+   UINT32 wait_timer;
+
+   while (1) {
+      wait_timer = ACL_PCIE_DMA_TIMEOUT;
+      while (wait_timer > 0)
+      {
+         wait_timer--;
+
+         if(m_table_virt_addr->header.flags[m_last_id-1] == 1) {
+            ACL_PCIE_DMA_DEBUG(":::: [DMA] HostCh : Wait done\n");
+            set_desc_table_header();
+            
+            if(m_read)
+               m_io->dma->write32(ACL_PCIE_DMA_WR_INT_CONTROL, ACL_PCIE_DMA_ENABLE_INT);
+            else
+               m_io->dma->write32(ACL_PCIE_DMA_RD_INT_CONTROL, ACL_PCIE_DMA_ENABLE_INT);
+            m_interrupt_disabled = FALSE;
+            
+            return;
+         }
+         // Delay the CPU from checking the memory for 1us. CPU is still running this thread.
+         // but reduces memory access from CPU
+         spin_loop_ns(1000);
+      }
+
+     // If DMA hasn't finished yet, free up the CPU for 1ms
+     ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh : Poll wait failed while transferring host channel page table to IP. Sleeping for 1ms.\n");
+     Sleep(1);
+   }
+}
+
+// Set IP's parameters for host channel.
+// Parameters are txs address to write updated front/end pointer to on host memory,
+// Address to DMA data to, to stream data into kernel
+void ACL_PCIE_DMA::hostch_start(int channel)
+{
+   HOSTCH_DESC *h = &hostch_data;  
+
+   if (channel == (int) ACL_HOST_CHANNEL_0_ID) {
+      h->user_rd_front_pointer_bus_addr = h->m_hostch_rd_pointer.dma->Page[0].pPhysicalAddr;
+
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_TXS_ADDR_LOW, h->user_rd_front_pointer_bus_addr & 0xffffffffUL);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_TXS_ADDR_HIGH, (h->user_rd_front_pointer_bus_addr)>>32);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_IP_ADDR_LOW, ACL_HOST_CHANNEL_0_DMA_ADDR & 0xffffffffUL);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_IP_ADDR_HIGH, ACL_HOST_CHANNEL_0_DMA_ADDR>>32);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_BUF_SIZE, h->buffer_size);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_HOST_ENDP, 0);
+      m_io->dma->write32(ACL_HOST_CHANNEL_0_LOGIC_EN, 1);
+
+   } else if (channel == (int) ACL_HOST_CHANNEL_1_ID) {  
+      h->user_wr_end_pointer_bus_addr = h->m_hostch_wr_pointer.dma->Page[0].pPhysicalAddr + sizeof(size_t);
+
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_TXS_ADDR_LOW, h->user_wr_end_pointer_bus_addr & 0xffffffffUL);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_TXS_ADDR_HIGH, (h->user_wr_end_pointer_bus_addr)>>32);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_IP_ADDR_LOW, ACL_HOST_CHANNEL_1_DMA_ADDR & 0xffffffffUL);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_IP_ADDR_HIGH, ACL_HOST_CHANNEL_1_DMA_ADDR>>32);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_BUF_SIZE, h->buffer_size);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_HOST_FRONTP, 0);
+      m_io->dma->write32(ACL_HOST_CHANNEL_1_LOGIC_EN, 1);
+   }
+}
+
+void ACL_PCIE_DMA::hostch_thread_sync(void *user_addr)
+{
+   int status;
+   HOSTCH_DESC *h = &hostch_data;
+
+   if ((user_addr == NULL) & (h->thread_sync_valid)) {
+      if ((h->push_valid | h->pull_valid) && m_idle && (*h->user_thread_sync == 0)) {
+         h->loop_counter = HOSTCH_LOOP_COUNTER;
+         SubmitThreadpoolWork(m_work);
+         *h->user_thread_sync = 1;
+      }
+   } else {
+      status = hostch_buffer_lock(user_addr, sizeof(size_t), &(h->m_sync_thread_pointer), 1);
+      h->user_thread_sync =  (size_t *) h->m_sync_thread_pointer.dma->pUserAddr;
+      h->loop_counter = HOSTCH_LOOP_COUNTER;
+      *h->user_thread_sync = 0;
+      h->thread_sync_valid = 1;
+   }
+}
+
+
+int ACL_PCIE_DMA::hostch_create(void *user_addr, void *buf_pointer, size_t size, int reading)
+{
+   int status, i;
+   HOSTCH_DESC *h = &hostch_data;
+
+   DMA_ADDR dma_address;
+   h->buffer_size = size;
+
+   setup_dma_desc();
+
+   m_io->dma->read32( ACL_PCIE_DMA_RD_LAST_PTR, &m_last_id);
+   ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh: read dma_rd_last_id %u\n", (unsigned) m_last_id);
+
+   // Set variables before calling dma helper functions
+   m_last_id++;
+   m_read = 0;
+
+   // Only create push channel if it's not already open
+   if (reading && !h->push_valid) {
+      h->user_rd_buffer = user_addr;
+
+      // Pin push user buffer
+      status = hostch_buffer_lock(user_addr, size, &(h->m_hostch_rd_mem), reading);
+      status |= hostch_buffer_lock(buf_pointer, 2*sizeof(size_t), &(h->m_hostch_rd_pointer), 1); 
+
+      // Map circular push buffer's end pointer so that the driver can poll on it for update from user space
+      h->user_rd_front_pointer = (size_t *) h->m_hostch_rd_pointer.dma->pUserAddr;
+      h->user_rd_end_pointer = h->user_rd_front_pointer+ 1;
+
+      // Send the circular push buffer's pinned address to IP, so IP can initiate DMA transfer by itself.
+      for (i = 0; i < (size/PAGE_SIZE); i++) {
+         dma_address = h->m_hostch_rd_mem.next_page->pPhysicalAddr;
+         set_hostch_page_entry(&(h->push_page_table->page_entry[i]), (UINT64) dma_address, (UINT32) i);
+         ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh: push page entry[%u] = %#016x size = %#016x\n", (unsigned) i, (UINT64) dma_address, h->m_hostch_rd_mem.next_page->dwBytes);
+
+         // Make 4KB pages from an array of pages of m_hostch_rd_mem
+         // WDC_DMASGBufLock might have allocated 8KB instead of 4KB
+         if(h->m_hostch_rd_mem.next_page->dwBytes == PAGE_SIZE) {
+            ++h->m_hostch_rd_mem.next_page;
+            h->m_hostch_rd_mem.pages_rem--;
+         } else {
+            h->m_hostch_rd_mem.next_page->dwBytes -= PAGE_SIZE;
+            h->m_hostch_rd_mem.next_page->pPhysicalAddr += PAGE_SIZE;
+         }
+      }
+
+      set_desc_table_header();
+      check_last_id(&m_last_id);
+
+      // Set variable before calling dma helper functions
+      m_active_descriptor = &(m_table_virt_addr->descriptors[0]);
+      set_read_desc(h->push_page_table_bus_addr, (UINT64)(ACL_PCIE_DMA_RD_FIFO_BASE), (32*size/PAGE_SIZE)/4);
+      m_last_id++;
+
+      // Read Interrupt will be disabled from send_dma_desc till poll_wait
+      m_interrupt_disabled = TRUE;
+      send_dma_desc();
+      poll_wait();
+
+      // Reset and enable the push channel on IP
+      UINT32 data;
+      m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PUSH + HOSTCH_BASE, 0);
+      m_io->pcie_cra->read32(HOSTCH_CONTROL_ADDR_PUSH + HOSTCH_BASE, &data);
+      m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PUSH + HOSTCH_BASE, 1);
+      m_io->pcie_cra->read32(HOSTCH_CONTROL_ADDR_PUSH + HOSTCH_BASE, &data);
+
+      // Set IP's control registers for push channel
+      hostch_start((int) ACL_HOST_CHANNEL_0_ID);
+
+      h->push_valid = 1;
+
+      // Only launch queue if pull channel is not open and if there is no DMA transfer
+      if (!h->pull_valid && m_idle) {
+         ACL_PCIE_ERROR_IF( WaitForSingleObject(m_workqueue_semaphore, 0L) != WAIT_OBJECT_0, return -1, 
+                  "HostCh : failed to schedule the first work for DMA read/write.\n" );
+         SubmitThreadpoolWork(m_work);
+      } 
+      return 0;
+
+   } else if ((reading == 0) && !h->pull_valid) {
+      h->user_wr_buffer = user_addr;
+
+      // Pin pull user buffer
+      status = hostch_buffer_lock(user_addr, size, &(h->m_hostch_wr_mem), reading);
+      status |= hostch_buffer_lock(buf_pointer, 2*sizeof(size_t), &(h->m_hostch_wr_pointer), 1);
+
+      // Map circular pull buffer's end pointer so that the driver can poll on it for update from user space
+      h->user_wr_front_pointer = (size_t *) h->m_hostch_wr_pointer.dma->pUserAddr;
+      h->user_wr_end_pointer = h->user_wr_front_pointer + 1;
+
+      // Send the circular pull buffer's pinned address to IP, so IP can initiate DMA transfer by itself.
+      for (i = 0; i < (size/PAGE_SIZE); i++) {
+         dma_address = h->m_hostch_wr_mem.next_page->pPhysicalAddr;
+         set_hostch_page_entry(&(h->pull_page_table->page_entry[i]), (UINT64) dma_address, (UINT32) i);
+         ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh: pull page entry[%u] = %#016x size = %#016x\n", (unsigned) i, (UINT64) dma_address, h->m_hostch_wr_mem.next_page->dwBytes);
+
+         // Make 4KB pages from an array of pages of m_hostch_wr_mem
+         // WDC_DMASGBufLock might have allocated 8KB instead of 4KB
+         if(h->m_hostch_wr_mem.next_page->dwBytes == PAGE_SIZE) {
+            ++h->m_hostch_wr_mem.next_page;
+            h->m_hostch_wr_mem.pages_rem--;
+         } else {  
+            h->m_hostch_wr_mem.next_page->dwBytes -= PAGE_SIZE;
+            h->m_hostch_wr_mem.next_page->pPhysicalAddr += PAGE_SIZE;      
+         }
+      }
+
+      set_desc_table_header();
+      check_last_id(&m_last_id);
+
+      // Set variable before calling dma helper functions
+      m_active_descriptor = &(m_table_virt_addr->descriptors[0]);
+      set_read_desc(h->pull_page_table_bus_addr, (UINT64)(ACL_PCIE_DMA_WR_FIFO_BASE), (32*size/PAGE_SIZE)/4);
+      m_last_id++;
+
+      // Read Interrupt will be disabled from send_dma_desc till poll_wait
+      m_interrupt_disabled = TRUE;
+      send_dma_desc();
+      poll_wait();
+
+      // Reset and enable the pull channel on IP
+      UINT32 temp;
+      m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PULL + HOSTCH_BASE, 0);
+      m_io->pcie_cra->read32(HOSTCH_CONTROL_ADDR_PULL + HOSTCH_BASE, &temp);
+      m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PULL + HOSTCH_BASE, 1);
+      m_io->pcie_cra->read32(HOSTCH_CONTROL_ADDR_PULL + HOSTCH_BASE, &temp);
+
+      // Set IP's control registers for pull channel
+      hostch_start((int) ACL_HOST_CHANNEL_1_ID);
+
+      h->pull_valid = 1;
+
+      // Only launch queue if push channel is not open and if there is no DMA transfer
+      if (!h->push_valid && m_idle) {
+      ACL_PCIE_ERROR_IF( WaitForSingleObject(m_workqueue_semaphore, 0L) != WAIT_OBJECT_0, return -1, 
+               "HostCh : failed to schedule the first work for DMA read/write.\n" );
+      SubmitThreadpoolWork(m_work);
+
+      }
+      return 0;
+
+   } else {
+      return ERROR_INVALID_CHANNEL;
+   }
+}
+
+// Destroy channel call from user.
+// Unlock all buffers and reset IP
+int ACL_PCIE_DMA::hostch_destroy(int reading) {
+   HOSTCH_DESC *h = &hostch_data;
+
+   if (reading) {
+      if (h->pull_valid) {
+         ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh: destroying pull host channel.");
+         m_io->dma->write32(ACL_HOST_CHANNEL_0_LOGIC_EN, 0);
+         MemoryBarrier();
+         m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PULL + HOSTCH_BASE, 0);
+         MemoryBarrier();
+
+         if (h->m_hostch_wr_mem.dma != NULL)
+            unpin_memory(&h->m_hostch_wr_mem);
+         if (h->m_hostch_wr_pointer.dma != NULL)
+            unpin_memory(&h->m_hostch_wr_pointer);
+         h->pull_valid = 0;
+
+         if (!h->push_valid) {
+            if (h->thread_sync_valid) {
+               h->thread_sync_valid = 0;
+               if (h->m_sync_thread_pointer.dma != NULL)
+                  unpin_memory(&h->m_sync_thread_pointer);
+            }
+         if (m_idle)
+            WaitForThreadpoolWorkCallbacks(m_work, false);
+         }
+      }
+   } else if (!reading) {
+      if (h->push_valid) {
+         ACL_PCIE_DMA_DEBUG( ":::: [DMA] HostCh: destroying push host channel.");
+         m_io->dma->write32(ACL_HOST_CHANNEL_1_LOGIC_EN, 0);
+         MemoryBarrier();
+         m_io->pcie_cra->write32(HOSTCH_CONTROL_ADDR_PUSH + HOSTCH_BASE, 0);
+         MemoryBarrier();
+
+         if (h->m_hostch_rd_mem.dma != NULL)
+            unpin_memory(&h->m_hostch_rd_mem);
+         if (h->m_hostch_rd_pointer.dma != NULL)
+            unpin_memory(&h->m_hostch_rd_pointer);
+         h->push_valid = 0;
+
+         if (!h->pull_valid) {
+            if (h->thread_sync_valid) {
+               h->thread_sync_valid = 0;
+               if (h->m_sync_thread_pointer.dma != NULL)
+                  unpin_memory(&h->m_sync_thread_pointer);
+            }
+         if (m_idle)
+            WaitForThreadpoolWorkCallbacks(m_work, false);
+         }
+      }
+   }
+
+   return 0;
+}
+
+
+#endif // WINDOWS
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.h
new file mode 100755
index 0000000000000000000000000000000000000000..95264f26bc107306c3e85e942ef396c44187d29d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_dma_windows.h
@@ -0,0 +1,249 @@
+#ifndef ACL_PCIE_DMA_WINDOWS_H
+#define ACL_PCIE_DMA_WINDOWS_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_dma_windows.h  --------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle Windows-specific DMA operations.         */
+/* The actual implementation of the class lives in the acl_pcie_dma_windows.cpp      */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+#if defined(WINDOWS)
+
+#include "hw_pcie_dma.h"
+#include "hw_host_channel.h"
+
+#include <queue>
+#include <windows.h>
+
+class ACL_PCIE_DEVICE;
+class ACL_PCIE_MM_IO_MGR;
+class ACL_PCIE_TIMER;
+
+class ACL_PCIE_DMA
+{
+   public:
+      ACL_PCIE_DMA( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie );
+      ~ACL_PCIE_DMA();
+
+      bool is_idle() { return m_idle; };
+      void stall_until_idle(){ while(!is_idle()) yield(); };
+
+      // Called by acl_pcie_device to check dma interrupt status
+      int check_dma_interrupt(unsigned int *dma_update);
+      
+      // Perform operations required when a DMA interrupt comes
+      void service_interrupt();
+
+      // Relinquish the CPU to let any other thread to run
+      // Return 0 since there is no useful work to be performed here
+      int  yield();
+
+      // Transfer data between host and device
+      // This function returns right after the transfer is scheduled
+      // Return 0 on success
+      int read_write(void *host_addr, size_t dev_addr, size_t bytes, aocl_mmd_op_t e, bool reading);
+
+      // the callback function to be scheduled inside the interrupt handler
+      friend void CALLBACK myWorkCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work);
+      
+      // Seperate function to unpin memory
+      friend void CALLBACK myWorkUnpinCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work);
+      
+      // Seperate function to pin memory
+      friend void CALLBACK myWorkPinCallback(PTP_CALLBACK_INSTANCE instance, void *context, PTP_WORK work);
+
+      // Host channel functions
+      int hostch_create(void *user_addr, void *buf_pointer, size_t size, int reading);
+      int hostch_destroy(int reading);
+      void hostch_thread_sync(void *m_sync_thread);
+
+   private:
+
+      struct PINNED_MEM
+      {
+         WD_DMA_PAGE *next_page;
+         DWORD pages_rem;
+         WD_DMA *dma;
+      };
+
+      struct HOSTCH_DESC {
+          size_t buffer_size;
+          unsigned int loop_counter;
+
+          // Host channel valid
+          // If channel is open, equal to 1
+          int push_valid;
+          int pull_valid;
+
+          // User memory circular buffer
+          void *user_rd_buffer;
+          void *user_wr_buffer;
+
+          // Array of physical addresses of locked hostch pages 
+          HOSTCH_TABLE *push_page_table;
+          HOSTCH_TABLE *pull_page_table;
+
+          WD_DMA *push_page_table_addr;
+          WD_DMA *pull_page_table_addr;
+
+          // Physical address of the page table
+          DMA_ADDR push_page_table_bus_addr;
+          DMA_ADDR pull_page_table_bus_addr;
+
+          PINNED_MEM m_hostch_rd_mem;
+          PINNED_MEM m_hostch_wr_mem;
+
+          // User memory circular buffer front and end pointers
+          size_t *user_rd_front_pointer;
+          size_t *user_rd_end_pointer;
+          size_t *user_wr_front_pointer;
+          size_t *user_wr_end_pointer;
+
+          DMA_ADDR user_rd_front_pointer_bus_addr;
+          DMA_ADDR user_wr_end_pointer_bus_addr;
+
+          PINNED_MEM m_hostch_rd_pointer;
+          PINNED_MEM m_hostch_wr_pointer;
+
+          // Keep track of push end pointer
+          size_t rd_buf_end_pointer;
+
+          // Keep track of pull front pointer
+          size_t wr_buf_front_pointer;
+
+          // User and driver thread synchronizer
+          int thread_sync_valid;
+          size_t *user_thread_sync;
+          DMA_ADDR user_thread_sync_bus_addr;
+          PINNED_MEM m_sync_thread_pointer;
+      };
+
+      // function to be scheduled to execute whenever an interrupt arrived
+      bool update( bool force_update=false );
+
+      // Helper functions
+      inline void   *compute_address( void* base, uintptr_t offset );
+      void           set_read_desc(DMA_ADDR source, UINT64 dest, UINT32 ctl_dma_len);
+      void           set_write_desc(UINT64 source, DMA_ADDR dest, UINT32 ctl_dma_len);
+      void           set_desc_table_header();
+      void           send_dma_desc();
+      void           check_last_id(UINT32 *last_id);
+      void           non_aligned_page_handler();
+      void           pin_memory(PINNED_MEM *new_mem, bool prepin);
+      void           unpin_memory(PINNED_MEM *old_mem);
+      void           wait_finish();
+      void           unpin_from_queue();
+      void           prepin_memory();
+    
+      // Hostchannel helper function
+      void           hostch_start(int channel);
+      int            hostch_push_update();
+      int            hostch_pull_update();      
+      int            hostch_buffer_lock(void *addr, size_t len, PINNED_MEM *new_mem, int direction);
+      void           poll_wait();
+      void           set_hostch_page_entry(HOSTCH_ENTRY *page_entry, UINT64 page_addr, UINT32 page_num);
+      void           setup_dma_desc();
+      void           spin_loop_ns(UINT64 wait_ns);
+
+      // From environment variable
+      int m_use_polling;
+
+      // The dma object we are currently building transactions for
+      PINNED_MEM m_active_mem;
+      PINNED_MEM m_pre_pinned_mem;
+      PINNED_MEM m_done_mem;
+      
+      // Hostchannel Struct
+      HOSTCH_DESC hostch_data;
+
+      // The transaction we are currently working on
+      DMA_DESC_TABLE *m_table_virt_addr;
+      WD_DMA *m_table_dma_addr;
+      DMA_ADDR m_table_dma_phys_addr;
+      DMA_DESC_ENTRY *m_active_descriptor;
+      
+      size_t m_last_pinned_size;
+      void * m_last_pinned_addr;
+      unsigned int m_prepin_handle_last;
+      
+      // Signal to stop multiple pre-pinning from running
+      bool m_prepinned;
+      bool m_aligned;
+      
+      // First dma page info
+      WD_DMA_PAGE m_first_page;
+      UINT32 m_remaining_first_page;
+      
+      // Local copy of last transfer id. Read once when DMA transfer starts
+      UINT32 m_last_id;
+      
+      // Current transaction
+      unsigned int m_handle_last;
+
+      // variables for the read/write request
+      aocl_mmd_op_t m_event;
+      size_t        m_dev_addr;
+      void*         m_host_addr;
+      size_t        m_bytes;
+      size_t        m_bytes_sent;
+      size_t        m_bytes_rem;
+      bool          m_read;
+      bool          m_idle;
+      bool          m_interrupt_disabled;
+
+      WDC_DEVICE_HANDLE   m_device;
+      ACL_PCIE_DEVICE    *m_pcie;
+      ACL_PCIE_MM_IO_MGR *m_io;
+      ACL_PCIE_TIMER     *m_timer;
+
+      // variables needed for the threadpool and works that submitted to it
+      TP_CALLBACK_ENVIRON m_callback_env;
+      PTP_POOL            m_threadpool;
+      PTP_WORK            m_work;
+
+      // This variable is accessed by the callback function defined in acl_pcie_dma_windows.cpp
+      // This semaphore is intended to keep at most 1 work in queued (not running)
+      HANDLE m_workqueue_semaphore;
+      
+      // Seperate thread to unpin
+      
+      std::queue< WD_DMA* >                m_dma_unpin_pending;
+      
+      TP_CALLBACK_ENVIRON m_unpin_callback_env;
+      PTP_POOL            m_unpin_threadpool;
+      PTP_WORK            m_unpin_work;
+
+      // Separate thread to pre-pin
+      
+      TP_CALLBACK_ENVIRON m_pin_callback_env;
+      PTP_POOL            m_pin_threadpool;
+      PTP_WORK            m_pin_work;
+};
+
+#endif // WINDOWS
+
+#endif // ACL_PCIE_DMA_WINDOWS_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..3e9bdf0c813b915f384a7b08408578e2445dfc8a
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.cpp
@@ -0,0 +1,744 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_hostch.cpp  ------------------------------------------ C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle Linux-specific DMA operations.         */
+/* The declaration of the class lives in the acl_pcie_dma_linux.h                  */
+/* The actual implementation of DMA operation is inside the Linux kernel driver.   */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_hostch.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_device.h"
+#include "acl_pcie_mm_io.h"
+#include "acl_pcie_timer.h"
+#include "acl_pcie_debug.h"
+#include "hw_host_channel.h"
+
+// other standard header files
+#include <stdio.h>
+#include <string.h>
+#include <iostream>
+#include <stdlib.h>
+#include <math.h>
+
+#if defined (LINUX)
+# include <unistd.h>
+#endif  // LINUX
+#if defined (WINDOWS)
+# include "acl_pcie_dma_windows.h"
+#endif  // WINDOWS
+
+
+void acl_aligned_malloc (void **result, size_t size) {
+#if defined (LINUX)
+  *result = NULL;
+  posix_memalign (result, PAGE_SIZE, size);
+#endif  // LINUX
+#if defined (WINDOWS)
+  *result = _aligned_malloc (size, PAGE_SIZE);
+#endif  // WINDOWS
+}
+
+void acl_aligned_free (void *ptr) {
+#if defined (LINUX)
+  free (ptr);
+#endif  // LINUX
+#if defined (WINDOWS)
+  _aligned_free (ptr);
+#endif  // WINDOWS
+}
+
+
+ACL_PCIE_HOSTCH::ACL_PCIE_HOSTCH( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie, ACL_PCIE_DMA *dma ) {
+   ACL_PCIE_ASSERT(dev  != INVALID_DEVICE, "passed in an invalid device when creating dma object.\n");
+   ACL_PCIE_ASSERT(io   != NULL, "passed in an empty pointer for io when creating dma object.\n");
+   ACL_PCIE_ASSERT(pcie != NULL, "passed in an empty pointer for pcie when creating dma object.\n");
+   ACL_PCIE_ASSERT(dma  != NULL, "passed in an empty pointer for dma when creating dma object.\n");
+
+   m_device = dev;
+   m_pcie   = pcie;
+   m_io     = io;
+   m_dma    = dma;
+   m_timer  = new ACL_PCIE_TIMER();
+   
+   // Set the valid for all the channels and helper function that checks status of driver thread
+   // to 0
+   m_hostch_push_valid = 0;
+   m_hostch_pull_valid = 0;
+   m_sync_thread_valid = 0;
+   
+   const char *dma_timer = getenv("ACL_PCIE_DMA_TIMER");
+   if ( dma_timer ) 
+      m_use_timer = 1;
+   else 
+      m_use_timer = 0;
+}
+
+ACL_PCIE_HOSTCH::~ACL_PCIE_HOSTCH()
+{
+   // If push channel (channel 0) is valid, reset its IP and unpin the MMD buffer
+   if (m_hostch_push_valid) {
+
+#if defined (LINUX)
+      struct acl_cmd driver_cmd;
+      // Save the device id for the selected board
+      driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+      driver_cmd.command        = ACLPCI_CMD_HOSTCH_DESTROY_RD;
+      driver_cmd.device_addr    = NULL;
+      driver_cmd.user_addr      = NULL;
+      driver_cmd.size           = 0;
+      read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+      m_dma->hostch_destroy(ACL_HOST_CHANNEL_1);
+#endif  // WINDOWS
+
+      if (m_push_queue) {
+        acl_aligned_free(m_push_queue);
+        m_push_queue = NULL;
+      }
+      
+      if (m_push_queue_pointer) {
+        acl_aligned_free(m_push_queue_pointer);
+        m_push_queue_pointer = NULL;
+      }
+     
+      m_hostch_push_valid = 0;
+   }
+   
+   // If pull channel (channel 1) is valid, reset its IP and unpin the MMD buffer
+   if (m_hostch_pull_valid) {
+
+#if defined (LINUX)
+      struct acl_cmd driver_cmd;
+      // Save the device id for the selected board
+      driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+      driver_cmd.command        = ACLPCI_CMD_HOSTCH_DESTROY_WR;
+      driver_cmd.device_addr    = NULL;
+      driver_cmd.user_addr      = NULL;
+      driver_cmd.size           = 0;
+      read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif // LINUX
+#if defined (WINDOWS)
+      m_dma->hostch_destroy(ACL_HOST_CHANNEL_0);
+#endif // WINDOWS
+
+      if (m_pull_queue) {
+        acl_aligned_free(m_pull_queue);
+        m_pull_queue = NULL;
+      }
+   
+      if (m_pull_queue_pointer) {
+        acl_aligned_free(m_pull_queue_pointer);
+        m_pull_queue_pointer = NULL;
+      }
+      
+      m_hostch_pull_valid = 0;
+   }
+}
+
+// Get host channel version of currently programmed device
+unsigned int ACL_PCIE_HOSTCH::get_hostch_version()
+{
+  // Make sure version is not what you expect
+  unsigned int version = ACL_VERSIONID ^ 1;
+  unsigned int hostch_version = ACL_HOSTCH_ZERO_CHANNELS ^ 1;
+
+  // Read device version
+  m_io->version->read32(0, &version);
+
+  // If BSP version ID is from prior to host channels,
+  // return host channel version as a10gx's
+  if (version <= (unsigned int)ACL_VERSIONID_COMPATIBLE_171a) {
+    return ACL_HOSTCH_ZERO_CHANNELS;
+  }
+
+  // Read hostchannel version
+  m_io->hostch_ver->read32(0, &hostch_version);
+
+  return hostch_version;
+}
+
+// Function to check that the driver thread that update host channel IP with
+// user's updates to MMD buffer's end and front index, is still running.
+// Ack call will call sync_thread() if driver thread has timed out.
+// Linux kernel space driver thread is set to timeout in 1ms
+// if there hasn't been any changes to circular buffer pointer from the host.
+int ACL_PCIE_HOSTCH::launch_sync_thread()
+{
+   if (m_sync_thread_valid == 0) {
+    acl_aligned_malloc((void **) &m_sync_thread, sizeof(size_t));
+
+    if (m_sync_thread == NULL) {
+       ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Internal buffer memory allocation failed.\n");
+       return -1;
+    }
+
+#if defined (LINUX)
+    // Save the device id for the selected board
+    struct acl_cmd driver_cmd;
+    driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+    driver_cmd.command        = ACLPCI_CMD_HOSTCH_THREAD_SYNC;
+    driver_cmd.device_addr    = NULL;
+    driver_cmd.user_addr      = m_sync_thread;
+    driver_cmd.size           = 0;
+    read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+    m_dma->hostch_thread_sync(m_sync_thread);
+#endif  // WINDOWS
+
+    m_sync_thread_valid = 1;
+  } else {
+    return 1;
+  }
+  return 0;
+}
+
+int ACL_PCIE_HOSTCH::sync_thread()
+{
+
+  if (m_sync_thread_valid && (*m_sync_thread == 0)) {
+
+#if defined (LINUX)
+    // Save the device id for the selected board
+    struct acl_cmd driver_cmd;
+    driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+    driver_cmd.command        = ACLPCI_CMD_HOSTCH_THREAD_SYNC;
+    driver_cmd.device_addr    = NULL;
+    driver_cmd.user_addr      = NULL;
+    driver_cmd.size           = 0;
+    read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+    m_dma->hostch_thread_sync(NULL);
+#endif  // WINDOWS
+
+    return 0;
+  }
+  return 1;
+}
+
+
+// This is called only when there aren't any host channels open
+// m_sync_thread is unpinned as part of destroy call to driver. Now free it.
+void ACL_PCIE_HOSTCH::destroy_sync_thread()
+{
+  if (m_sync_thread_valid) {
+    if (m_sync_thread != NULL)
+      acl_aligned_free(m_sync_thread);
+
+    m_sync_thread_valid = 0;
+    m_sync_thread = NULL;
+  }
+}
+
+
+// Create host channel. Allocate circular buffer and pin it.
+// Then set channel to valid.
+int ACL_PCIE_HOSTCH::create_hostchannel(char * name, size_t queue_depth, int direction)
+{
+   int status;
+   unsigned int hostch_version;
+
+   hostch_version = get_hostch_version();
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel version read was %u\n", hostch_version);
+   
+   // Check if channel name user wants to open exists
+   if ((strlen(name) == strlen(ACL_HOST_CHANNEL_0_NAME)) &&
+       (strncmp(ACL_HOST_CHANNEL_0_NAME, name, strlen(ACL_HOST_CHANNEL_0_NAME)) == 0))
+   {
+      // Check if hostchannel version is one that has ACL_HOST_CHANNEL_0
+      if (hostch_version != ACL_HOSTCH_TWO_CHANNELS) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s does not exist in currently programmed device.\n",
+              ACL_HOST_CHANNEL_0_NAME);
+         return ERROR_INVALID_CHANNEL;
+      }
+
+      // check if the direction for the channel is correct
+      if (direction != ACL_HOST_CHANNEL_0_WRITE)
+         return ERROR_INCORRECT_DIRECTION;
+      
+      // Check if channel was already opened previously
+      if (m_hostch_push_valid) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel '%s' already open\n", ACL_HOST_CHANNEL_0_NAME);
+         return ERROR_CHANNEL_PREVIOUSLY_OPENED;
+      }
+      
+      // Make sure the channel depth is at most 1MB, power-of-2, and divisible by page_size
+      size_t queue_depth_upper_pow2 = pow(2, ceil(log((double) queue_depth)/log(2.)));
+      size_t channel_depth = (queue_depth_upper_pow2 >= HOSTCH_MAX_BUF_SIZE) ? HOSTCH_MAX_BUF_SIZE :
+          queue_depth_upper_pow2&(HOSTCH_MAX_BUF_SIZE-PAGE_SIZE);
+      
+      // Make sure the channel depth is at least 4KB
+      if (!channel_depth)
+         channel_depth = PAGE_SIZE;
+
+      // Create circular buffer for push
+      acl_aligned_malloc(&m_push_queue, channel_depth);
+
+      if (m_push_queue == NULL) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Internal buffer memory allocation failed.\n");
+         return -1;
+      }
+      
+      // Create buffer to hold front and end pointer for the circular buffer
+      acl_aligned_malloc((void **) &m_push_queue_pointer, sizeof(size_t)*2);
+
+      if (m_push_queue_pointer == NULL) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Internal buffer memory allocation failed.\n");
+         acl_aligned_free(m_push_queue);
+         return -1;
+      }
+
+      // Set parameters for the push channel
+      m_push_queue_size = channel_depth;
+      m_push_queue_local_end_p = 0;
+
+      m_push_queue_front_p = m_push_queue_pointer;
+      m_push_queue_end_p = (m_push_queue_pointer + 1);
+
+      *m_push_queue_front_p = 0;
+      *m_push_queue_end_p = 0;
+      
+      // sync_thread() used to check if kernel thread is still running when user has additional data available.
+      status = launch_sync_thread();
+      if (status == -1) {
+        acl_aligned_free(m_push_queue);
+        acl_aligned_free(m_push_queue_pointer);
+        return -1;
+      }
+
+#if defined (LINUX)
+      struct acl_cmd driver_cmd;
+
+      // Send the pointers for the 2 buffers to driver, along with queue size
+      driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+      driver_cmd.command        = ACLPCI_CMD_HOSTCH_CREATE_RD;
+      driver_cmd.device_addr    = m_push_queue_pointer;
+      driver_cmd.user_addr      = m_push_queue;
+      driver_cmd.size           = channel_depth;
+      read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+      m_dma->hostch_create(m_push_queue, m_push_queue_pointer, channel_depth, ACL_HOST_CHANNEL_1);
+#endif  // WINDOWS
+   
+      m_hostch_push_valid = 1;
+      return ACL_HOST_CHANNEL_0_ID;
+   } else if ((strlen(name) == strlen(ACL_HOST_CHANNEL_1_NAME)) &&
+       (strncmp(ACL_HOST_CHANNEL_1_NAME, name, strlen(ACL_HOST_CHANNEL_1_NAME)) == 0))
+   {
+
+      // Check if hostchannel version is one that has ACL_HOST_CHANNEL_1
+      if (hostch_version != ACL_HOSTCH_TWO_CHANNELS) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s does not exist in currently programmed device.\n",
+              ACL_HOST_CHANNEL_1_NAME);
+         return ERROR_INVALID_CHANNEL;
+      }
+
+      // Check if direction is correct
+      if (direction != ACL_HOST_CHANNEL_1_WRITE)
+         return ERROR_INCORRECT_DIRECTION;
+
+      // Make sure the channel depth is at most 1MB, power-of-2, and divisible by page_size
+      size_t queue_depth_upper_pow2 = pow(2, ceil(log((double) queue_depth)/log(2.)));
+      size_t channel_depth = (queue_depth_upper_pow2 >= HOSTCH_MAX_BUF_SIZE) ? HOSTCH_MAX_BUF_SIZE :
+          queue_depth_upper_pow2&(HOSTCH_MAX_BUF_SIZE-PAGE_SIZE);
+
+      // Make sure the circular buffer is at least 4KB
+      if (!channel_depth)
+         channel_depth = PAGE_SIZE;
+      
+      // Check if pull channel was previously opened
+      if (m_hostch_pull_valid) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel '%s' already open\n", ACL_HOST_CHANNEL_1_NAME);
+         return ERROR_CHANNEL_PREVIOUSLY_OPENED;
+      }
+      
+      // Create circular buffer
+      acl_aligned_malloc(&m_pull_queue, channel_depth);
+
+      if (m_pull_queue == NULL) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Internal buffer memory allocation failed.\n");
+         return -1;
+      }
+      
+      // Create buffer to hold front and end pointer of the circular buffer
+      acl_aligned_malloc((void**) &m_pull_queue_pointer, sizeof(size_t)*2);
+
+      if (m_pull_queue_pointer == NULL) {
+         ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Internal buffer memory allocation failed.\n");
+         acl_aligned_free(m_pull_queue);
+         return -1;
+      }
+      
+      // Set pull channel parameters
+      m_pull_queue_size = channel_depth;
+      m_pull_queue_available = 0;
+      m_pull_queue_local_front_p = 0;
+      
+      m_pull_queue_front_p = m_pull_queue_pointer;
+      m_pull_queue_end_p = (m_pull_queue_pointer + 1);
+
+      *m_pull_queue_front_p = 0;
+      *m_pull_queue_end_p = 0;
+      
+      // sync_thread() used to check if kernel thread is dead or alive when user pulls data
+      status = launch_sync_thread();
+      if (status == -1) {
+        acl_aligned_free(m_pull_queue);
+        acl_aligned_free(m_pull_queue_pointer);
+        return -1;
+      }
+
+#if defined (LINUX)
+      // Send the pointers for the 2 buffers to driver, along with queue size, and initiate IP
+      struct acl_cmd driver_cmd;
+      driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+      driver_cmd.command        = ACLPCI_CMD_HOSTCH_CREATE_WR;
+      driver_cmd.device_addr    = m_pull_queue_pointer;
+      driver_cmd.user_addr      = m_pull_queue;
+      driver_cmd.size           = channel_depth;
+      read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+      m_dma->hostch_create(m_pull_queue, m_pull_queue_pointer, channel_depth, ACL_HOST_CHANNEL_0);
+#endif  // WINDOWS
+
+      m_hostch_pull_valid = 1;
+      return ACL_HOST_CHANNEL_1_ID;
+   } else
+   {
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Channel does not exist.\n");
+      return ERROR_INVALID_CHANNEL;
+   }
+      
+}
+
+// Destroy Channel. Unlock all buffer, and set channel to invalid.
+int ACL_PCIE_HOSTCH::destroy_hostchannel(int channel)
+{
+   if (channel == ACL_HOST_CHANNEL_0_ID) {
+     if (m_hostch_push_valid) {
+
+        // set pull IP to reset and unlock all buffers
+#if defined (LINUX)
+        struct acl_cmd driver_cmd;
+        driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+        driver_cmd.command        = ACLPCI_CMD_HOSTCH_DESTROY_RD;
+        driver_cmd.device_addr    = NULL;
+        driver_cmd.user_addr      = NULL;
+        driver_cmd.size           = 0;
+        read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+        m_dma->hostch_destroy(ACL_HOST_CHANNEL_1);
+#endif  // WINDOWS
+
+        if (m_push_queue) {
+          acl_aligned_free(m_push_queue);
+          m_push_queue = NULL;
+        }
+        if (m_push_queue_pointer) {
+          acl_aligned_free(m_push_queue_pointer);
+          m_push_queue_pointer = NULL;
+        }
+
+        m_hostch_push_valid = 0;
+        if (m_hostch_pull_valid == 0) {
+          destroy_sync_thread();
+        }
+        return 0;
+     } else {
+       ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_0_NAME);
+       return ERROR_CHANNEL_CLOSED;
+     }
+   }
+   else if (channel == ACL_HOST_CHANNEL_1_ID) {
+     if (m_hostch_pull_valid) {
+
+#if defined (LINUX)
+        // set push IP to reset and unlock all buffers
+        struct acl_cmd driver_cmd;
+        driver_cmd.bar_id         = ACLPCI_CMD_BAR;
+        driver_cmd.command        = ACLPCI_CMD_HOSTCH_DESTROY_WR;
+        driver_cmd.device_addr    = NULL;
+        driver_cmd.user_addr      = NULL;
+        driver_cmd.size           = 0;
+        read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif  // LINUX
+#if defined (WINDOWS)
+        m_dma->hostch_destroy(ACL_HOST_CHANNEL_0);
+#endif  // WINDOWS
+
+        if (m_pull_queue) {
+          acl_aligned_free(m_pull_queue);
+          m_pull_queue = NULL;
+        }
+     
+        if (m_pull_queue_pointer) {
+          acl_aligned_free(m_pull_queue_pointer);
+          m_pull_queue_pointer = NULL;
+        }
+
+        m_hostch_pull_valid = 0;
+        
+        if (m_hostch_push_valid == 0) {
+          destroy_sync_thread();
+        }
+        
+        return 0;
+     } else {
+       ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_1_NAME);
+       return ERROR_CHANNEL_CLOSED;
+     }
+   }
+   else {
+     ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Channel with ID %i does not exist.\n", channel);
+   }
+   
+   return ERROR_INVALID_CHANNEL;
+}
+
+// Call for user to get pointer to location in circular buffer
+// User can then write data or read data from the buffer, depending on direction.
+void *ACL_PCIE_HOSTCH::get_buffer( size_t *buffer_size, int channel, int *status)
+{
+   // Check if channel exists
+   if (channel == ACL_HOST_CHANNEL_0_ID)
+   {
+      // Check if channel was created
+      if (m_hostch_push_valid == 0) {
+        ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_0_NAME);
+        *status = ERROR_CHANNEL_CLOSED;
+        *buffer_size = 0;
+        return NULL;
+      }
+      *status = 0;
+      
+      char *temp_input_queue = (char *) m_push_queue;
+   
+      size_t push_queue_end, push_queue_front;
+
+      // m_push_queue_front_p is directly updated by host channel IP
+      // through write over Txs. Save value in local variable,
+      // so it doesn't get modified in middle of get_buffer call
+      push_queue_end = *m_push_queue_end_p;
+      push_queue_front = *m_push_queue_front_p;
+
+      // Calculate available free space in host to device push buffer
+      size_t push_buf_avail;
+      if (push_queue_end > push_queue_front)
+         push_buf_avail = m_push_queue_size - push_queue_end + push_queue_front - 32;
+      else if (push_queue_end < push_queue_front)
+         push_buf_avail = push_queue_front - push_queue_end - 32;
+      else
+         push_buf_avail = m_push_queue_size - 32;
+   
+      // Calculate how much of the free space is before loop around and after loop around
+      size_t cont_push = (m_push_queue_size > m_push_queue_local_end_p + push_buf_avail) ? push_buf_avail : m_push_queue_size - m_push_queue_local_end_p;
+      size_t loop_push = (m_push_queue_size > m_push_queue_local_end_p + push_buf_avail) ? 0 : (m_push_queue_local_end_p + push_buf_avail - m_push_queue_size);
+      
+      // Return to user the pointer to circular buffer for
+      // space that's available without loop around
+      if (cont_push > 0)
+      {
+         *buffer_size = cont_push;
+         return temp_input_queue + m_push_queue_local_end_p;
+      } else if (loop_push > 0)
+      {
+         *buffer_size = loop_push;
+         return temp_input_queue;
+      } else
+      {
+         *status = 0;
+         *buffer_size = 0;
+         
+         // See if the driver thread is still running
+         sync_thread();
+         
+         return NULL;
+      }
+   } else if (channel == ACL_HOST_CHANNEL_1_ID)
+   {
+      if (m_hostch_pull_valid == 0) {
+        ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_1_NAME);
+        *status = ERROR_CHANNEL_CLOSED;
+        *buffer_size = 0;
+        return NULL;
+      }
+      *status = 0;
+      
+      char *temp_output_queue = (char *) m_pull_queue;
+      
+      size_t pull_queue_end, pull_queue_front;
+      
+      // m_pull_queue_end_p is directly updated by host channel IP
+      // through write over Txs. Save value in local variable,
+      // so it doesn't get modified in middle of get_buffer call
+      pull_queue_end = *m_pull_queue_end_p;
+      pull_queue_front = *m_pull_queue_front_p;
+      
+      // Calculate available new data in device to host pull buffer
+      if (pull_queue_end > pull_queue_front)
+         m_pull_queue_available = pull_queue_end - pull_queue_front;
+      else if (pull_queue_end < pull_queue_front)
+         m_pull_queue_available = m_pull_queue_size - pull_queue_front + pull_queue_end;
+      else
+         m_pull_queue_available = 0;
+   
+      // Calculate how much of the data is before loop around and after loop around
+      size_t cont_pull = (m_pull_queue_size > m_pull_queue_local_front_p + m_pull_queue_available) ? m_pull_queue_available : (m_pull_queue_size - m_pull_queue_local_front_p);
+      size_t loop_pull = (m_pull_queue_size > m_pull_queue_local_front_p + m_pull_queue_available) ? 0 : (m_pull_queue_local_front_p + m_pull_queue_available - m_pull_queue_size);
+      
+      // Return to user the pointer to circular buffer for
+      // data that's available without loop around
+      if (cont_pull > 0)
+      {
+         *buffer_size = cont_pull;
+         return  temp_output_queue + m_pull_queue_local_front_p;
+      } else if (loop_pull > 0)
+      {
+         *buffer_size = loop_pull;
+         return temp_output_queue;
+      } else
+      {
+         *buffer_size = 0;
+         
+         // See if the driver thread is still running
+         sync_thread();
+         
+         return NULL;
+      }
+   } else
+   {
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Channel with ID %i does not exist.\n", channel);
+      *status = ERROR_INVALID_CHANNEL;
+      *buffer_size = 0;
+      return NULL;
+   }
+}
+
+// User has acknowledged the buffer, meaning data was written to or read from the buffter.
+// Hand off to API using end pointer if push channel, and front pointer if pull channel.
+size_t ACL_PCIE_HOSTCH::ack_buffer( size_t send_size , int channel, int *status)
+{
+   if (channel == ACL_HOST_CHANNEL_0_ID)
+   {
+      if (m_hostch_push_valid == 0) {
+        ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_0_NAME);
+        *status = ERROR_CHANNEL_CLOSED;
+        return 0;
+      }
+      *status = 0;
+      
+      size_t push_queue_end, push_queue_front;
+      
+      // Same calculations as get buffer call to see how much
+      // space is available in MMD circular buffer
+      push_queue_end = *m_push_queue_end_p;
+      push_queue_front = *m_push_queue_front_p;
+      
+      size_t push_buf_avail;
+      if (push_queue_end > push_queue_front)
+         push_buf_avail = m_push_queue_size - push_queue_end + push_queue_front - 32;
+      else if (push_queue_end < push_queue_front)
+         push_buf_avail = push_queue_front - push_queue_end - 32;
+      else
+         push_buf_avail = m_push_queue_size - 32;
+      
+      // Check to see if user wants to send more than the space available in buffer
+      // Chose lesser of the two to send
+      size_t user_words = send_size/32;
+      size_t current_push = ((user_words*32)  > push_buf_avail) ? push_buf_avail : (user_words*32);
+      
+      // User can't write back to beginning of MMD buffer, since they can't loop around from the pointer
+      // they got from get_buffer. Only send up to the end of MMD circular buffer to host channel IP
+      size_t cont_push = (m_push_queue_size > m_push_queue_local_end_p + current_push) ? current_push : (m_push_queue_size - m_push_queue_local_end_p);
+      
+      // Update the end index that the driver thread will read, to write the update to host channel IP
+      // and loop around
+      m_push_queue_local_end_p = (m_push_queue_local_end_p + current_push >= m_push_queue_size ) ? 0 : m_push_queue_local_end_p + current_push;
+      *m_push_queue_end_p = m_push_queue_local_end_p;
+      
+      // See if the driver thread is still running
+      sync_thread();
+      
+      return cont_push;
+   } else if(channel == ACL_HOST_CHANNEL_1_ID)
+   {
+      if (m_hostch_pull_valid == 0) {
+        ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Host Channel %s is not open.\n", ACL_HOST_CHANNEL_1_NAME);
+        *status = ERROR_CHANNEL_CLOSED;
+        return 0;
+      }
+      *status = 0;
+      
+      size_t driver_pulled;
+      
+      size_t pull_queue_end, pull_queue_front;
+      
+      // Same calculations as get buffer call to see how much
+      // data is available in MMD circular buffer
+      pull_queue_end = *m_pull_queue_end_p;
+      pull_queue_front = *m_pull_queue_front_p;
+      
+      if (pull_queue_end > pull_queue_front)
+         m_pull_queue_available = pull_queue_end - pull_queue_front;
+      else if (pull_queue_end < pull_queue_front)
+         m_pull_queue_available = m_pull_queue_size - pull_queue_front + pull_queue_end;
+      else
+         m_pull_queue_available = 0;
+      
+      // Check to see if user read more than the data available in buffer
+      // Chose lesser of the two to tell the user how much was actually
+      // freed up for host channel IP to write to.
+      driver_pulled = (send_size > m_pull_queue_available) ? m_pull_queue_available : send_size;
+      
+      // User can't loop around and read from the beginning of MMD buffer
+      // Tell the host channel IP that the buffer is free, only up to the end of the circular buffer
+      size_t cont_pull = (m_pull_queue_size > m_pull_queue_local_front_p + driver_pulled) ? driver_pulled : (m_pull_queue_size - m_pull_queue_local_front_p);
+      
+      // Update the front index that the driver thread will read, to write the update to host channel IP
+      // and loop around
+      m_pull_queue_local_front_p = (m_pull_queue_local_front_p + driver_pulled >= m_pull_queue_size ) ? 0 : m_pull_queue_local_front_p + driver_pulled;
+      *m_pull_queue_front_p = m_pull_queue_local_front_p;
+      
+      // See if the driver thread is still running
+      sync_thread();
+      
+      return cont_pull;
+   } else
+   {
+      ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_BLOCKTX, ":::: [HOST CHANNEL] Channel with ID %i does not exist.\n", channel);
+      *status = ERROR_INVALID_CHANNEL;
+      return 0;
+   }
+}
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.h
new file mode 100755
index 0000000000000000000000000000000000000000..e8a7f99e0be2eed2d57847e878884014218fdc9d
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_hostch.h
@@ -0,0 +1,125 @@
+#ifndef ACL_PCIE_HOSTCH_H
+#define ACL_PCIE_HOSTCH_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_hostch.h  -------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle Linux-specific DMA operations.           */
+/* The actual implementation of the class lives in the acl_pcie_dma_linux.cpp      */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+class ACL_PCIE_DEVICE;
+class ACL_PCIE_MM_IO_MGR;
+class ACL_PCIE_TIMER;
+class ACL_PCIE_DMA;
+
+class ACL_PCIE_HOSTCH
+{
+   public:
+     
+      ACL_PCIE_HOSTCH( WDC_DEVICE_HANDLE dev, ACL_PCIE_MM_IO_MGR *io, ACL_PCIE_DEVICE *pcie, ACL_PCIE_DMA *dma );
+
+      ~ACL_PCIE_HOSTCH();
+
+      // Initialize host channel specified by name, and return handle to it
+      int create_hostchannel( char * name, size_t queue_depth, int direction );
+      
+      // Destroy host channel specified by channel handle
+      // return 0 on success and negative otherwise
+      int destroy_hostchannel(int channel);
+      
+      // Provide pointer to user with pointer to write and read to host channel
+      // IP with. Pointer is pointer to MMD circular buffer, that's pre-pinned.
+      // Address of this pre-pinned memory is transferred to IP during create
+      void *get_buffer( size_t *buffer_size, int channel, int *status);
+      
+      // Acknowledge from user that send_size bytes of data has be written to
+      // or read from host channel MMD buffer, that's provided by the channel
+      // handle. This will move end index for push channel, and front index for
+      // pull channel
+      size_t ack_buffer( size_t send_size , int channel, int *status);
+      
+
+   private:
+      // Host Channel version of programmed device
+      unsigned int get_hostch_version();
+   
+      // Helper functions to see if the thread that updates
+      // host channel IP with user's buffer updates, is still running
+      int launch_sync_thread();
+      int sync_thread();
+      void destroy_sync_thread();
+   
+      WDC_DEVICE_HANDLE   m_device;
+      ACL_PCIE_DEVICE    *m_pcie;
+      ACL_PCIE_MM_IO_MGR *m_io;
+      ACL_PCIE_DMA       *m_dma;
+      
+      ACL_PCIE_TIMER     *m_timer;
+      int                 m_use_timer;
+      
+      // Host Channel valid
+      // If channel is open, equal to 1
+      int                 m_hostch_push_valid;
+      int                 m_hostch_pull_valid;
+      
+      // Input Queue
+      // Write data into circular buffer in MMD, that host channel
+      // can read from
+      void               *m_push_queue;
+      size_t              m_push_queue_local_end_p;
+      size_t              m_push_queue_size;
+      
+      // Information to track input queue
+      void               *m_pull_queue;
+      size_t              m_pull_queue_local_front_p;
+      size_t              m_pull_queue_size;
+      size_t              m_pull_queue_available;
+      
+      // Shared front and end pointer with driver
+      // Circular buffer in MMD that the host channel IP can
+      // write into. Host will then read from it
+      size_t             *m_pull_queue_pointer;
+      size_t             *m_push_queue_pointer;
+      
+      size_t             *m_pull_queue_front_p;
+      size_t             *m_pull_queue_end_p;
+      size_t             *m_push_queue_front_p;
+      size_t             *m_push_queue_end_p;
+      
+      // User space memory that Linux kernel space has write
+      // access to. Since the MMD buffer is circular, whenever
+      // user writes to reads from it, the index for end and front
+      // changes, respectively. This needs to be sent to host channel IP
+      // and the thread in driver handles that. However, this thread will
+      // die after 1ms of inactivity to free up the CPU. When it does that,
+      // it will write to m_sync_thread with value of 0, so that MMD knows to
+      // launch it again, for subsequent get_buffer and ack_buffer calls.
+      int                 m_sync_thread_valid;
+      size_t             *m_sync_thread;
+      
+};
+
+#endif // ACL_PCIE_HOSTCH_H
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..ce1579e1e2ecbe47587972e50ff156fef40e4a0f
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.cpp
@@ -0,0 +1,461 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_mm_io.cpp  ------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to handle memory mapped IO over PCIe.            */
+/* The declaration of the class lives in the acl_pcie_mm_io.h.                     */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_mm_io.h"
+
+// other header files inside MMD driver
+#include "acl_pcie_debug.h"
+
+// other standard header files
+#include <string.h>
+
+#if defined(LINUX)
+#  include <unistd.h>   // template
+#endif   // LINUX
+
+
+
+ACL_PCIE_MM_IO_DEVICE::ACL_PCIE_MM_IO_DEVICE
+(
+   WDC_DEVICE_HANDLE device, 
+   DWORD bar, 
+   KPTR device_offset,
+   const char* name,
+   bool diff_endian
+)
+{
+   ACL_PCIE_ASSERT(device != INVALID_DEVICE, "passed in an invalid device when creating mm_io object.\n");
+   ACL_PCIE_ASSERT(name != NULL, "passed in an empty name pointer when creating mm_io object.\n");
+
+   strncpy(m_name, name, (MAX_NAME_LENGTH-1));
+   m_name[(MAX_NAME_LENGTH-1)] = '\0';
+
+   m_device        = device;
+   m_bar           = bar;
+   m_offset        = device_offset;
+   m_diff_endian   = diff_endian; 
+
+   ACL_PCIE_DEBUG_MSG(":: [%s] Init: Bar %d, Total offset 0x" SIZE_FMT_X ", diff_endian is %d \n", 
+               m_name, m_bar, (size_t) m_offset, m_diff_endian?1:0 );
+}
+
+ACL_PCIE_MM_IO_DEVICE::~ACL_PCIE_MM_IO_DEVICE()
+{
+}
+
+
+#if defined(LINUX)
+// Helper functions to implement all other read/write functions
+template<typename T>
+DWORD linux_read ( WDC_DEVICE_HANDLE device, DWORD bar, KPTR address, T *data )
+{
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id         = bar;
+   driver_cmd.command        = ACLPCI_CMD_DEFAULT;
+   driver_cmd.device_addr    = reinterpret_cast<void *>(address);
+   driver_cmd.user_addr      = data;
+   driver_cmd.size           = sizeof(*data);
+   // function invoke linux_read will not write to global memory. 
+   // So is_diff_endian is always false
+   driver_cmd.is_diff_endian = 0; 
+
+   return read (device, &driver_cmd, sizeof(driver_cmd));
+}
+
+template<typename T>
+DWORD linux_write ( WDC_DEVICE_HANDLE device, DWORD bar, KPTR address, T data )
+{
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id         = bar;
+   driver_cmd.command        = ACLPCI_CMD_DEFAULT;
+   driver_cmd.device_addr    = reinterpret_cast<void *>(address);
+   driver_cmd.user_addr      = &data;
+   driver_cmd.size           = sizeof(data);
+   // function invoke linux_write will not write to global memory. 
+   // So is_diff_endian is always false
+   driver_cmd.is_diff_endian = 0;
+
+   return write (device, &driver_cmd, sizeof(driver_cmd));
+}
+#endif // LINUX
+
+
+int ACL_PCIE_MM_IO_DEVICE::read8   ( size_t addr, UINT8  *data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_ReadAddr8( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_read   ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Read 8 bits from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Read 8 bits (0x%x) from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, *data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::write8  ( size_t addr, UINT8   data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_WriteAddr8( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_write   ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Writing 8 bits to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Wrote 8 bits (0x%x) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+
+int ACL_PCIE_MM_IO_DEVICE::read16 ( size_t addr, UINT16 *data)
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_ReadAddr16( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_read   ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+         "[%s] Read 16 bits from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+         m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+         ":::::: [%s] Read 16 bits (0x%x) from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+         m_name, *data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::write16 ( size_t addr, UINT16 data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_WriteAddr16( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_write   ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Writing 16 bits to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Wrote 16 bits (0x%x) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::read32  ( size_t addr, UINT32 *data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_ReadAddr32( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_read    ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Read 32 bits from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Read 32 bits (0x%x) from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, *data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::write32 ( size_t addr, UINT32  data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_WriteAddr32( m_device, m_bar, bar_addr, data );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_write    ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Writing 32 bits to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Wrote 32 bits (0x%x) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, data, addr, (size_t) bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::read64  ( size_t addr, UINT64 *data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_ReadAddrBlock( m_device, m_bar, bar_addr, 8, data, WDC_MODE_32, WDC_ADDR_RW_DEFAULT );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_read    ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Read 64 bits from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Read 64 bits (0x%llx) from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, *data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+int ACL_PCIE_MM_IO_DEVICE::write64 ( size_t addr, UINT64  data )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+#if defined(WINDOWS)
+   status = WDC_WriteAddrBlock( m_device, m_bar, bar_addr, 8, &data, WDC_MODE_32, WDC_ADDR_RW_DEFAULT );
+#endif   // WINDOWS
+#if defined(LINUX)
+   status = linux_write    ( m_device, m_bar, bar_addr, data );
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Writing 64 bits to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, bar_addr, (size_t)bar_addr);
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Wrote 64 bits (0x%llx) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, data, addr, (size_t)bar_addr);
+
+   return 0; // success
+}
+
+
+int ACL_PCIE_MM_IO_DEVICE::write_block ( size_t addr, size_t size, void *src )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Writing block (" SIZE_FMT_U " bytes) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n", 
+      m_name, size, addr, (size_t)bar_addr);
+
+#if defined(WINDOWS)
+   DWORD WD_size = static_cast<DWORD>(size);
+   size_t alignment_size = size%4;
+   DWORD WD_alignment_size = static_cast<DWORD>(alignment_size);
+   
+   status = WDC_WriteAddrBlock( m_device, m_bar, bar_addr, WD_size-WD_alignment_size, src, WDC_MODE_32, WDC_ADDR_RW_DEFAULT );
+   if (alignment_size) {
+      void * alignment_addr = compute_address(src, size-alignment_size);
+      KPTR alignment_bar_addr = bar_addr+size-alignment_size;
+      status |= WDC_WriteAddrBlock( m_device, m_bar, alignment_bar_addr, WD_alignment_size, alignment_addr, WDC_MODE_8, WDC_ADDR_RW_DEFAULT );
+   }
+
+#endif   // WINDOWS
+#if defined(LINUX)
+   // Can't use templated linux_write here because *src doesn't give you the size to read.
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id         = m_bar;
+   driver_cmd.device_addr    = reinterpret_cast<void *>(bar_addr);
+   driver_cmd.user_addr      = src;
+   driver_cmd.size           = size;
+   // Notify the driver if the host and device's memory have different endianess.
+   driver_cmd.is_diff_endian = m_diff_endian?1:0;
+   status = write (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Writing block (" SIZE_FMT_U " bytes) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, size, addr, (size_t)bar_addr);
+   return 0; // success
+}
+
+inline void *ACL_PCIE_MM_IO_DEVICE::compute_address( void* base, uintptr_t offset )
+{
+   uintptr_t p = reinterpret_cast<uintptr_t>(base);
+   return reinterpret_cast<void*>(p + offset);
+}
+
+int ACL_PCIE_MM_IO_DEVICE::read_block ( size_t addr, size_t size, void *dst )
+{
+   DWORD status;
+   KPTR  bar_addr = convert_to_bar_addr(addr);
+
+   ACL_PCIE_DEBUG_MSG_VERBOSE(VERBOSITY_PCIE,
+      ":::::: [%s] Reading block (" SIZE_FMT_U " bytes) from 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, size, addr, (size_t)bar_addr);
+
+#if defined(WINDOWS)
+   DWORD WD_size = static_cast<DWORD>(size);
+   size_t alignment_size = size%4;
+   DWORD WD_alignment_size = static_cast<DWORD>(alignment_size);
+   
+   status = WDC_ReadAddrBlock( m_device, m_bar, bar_addr, WD_size-WD_alignment_size, dst, WDC_MODE_32, WDC_ADDR_RW_DEFAULT );
+   if (alignment_size) {
+      void * alignment_addr = compute_address(dst, size-alignment_size);
+      KPTR alignment_bar_addr = bar_addr+size-alignment_size;
+      status |= WDC_ReadAddrBlock( m_device, m_bar, alignment_bar_addr, WD_alignment_size, alignment_addr, WDC_MODE_8, WDC_ADDR_RW_DEFAULT );
+   }
+   
+#endif   // WINDOWS
+#if defined(LINUX)
+   // Can't use templated linux_write here because *src doesn't give you the size to read.
+   struct acl_cmd driver_cmd;
+   driver_cmd.bar_id         = m_bar;
+   driver_cmd.device_addr    = reinterpret_cast<void *>(bar_addr);
+   driver_cmd.user_addr      = dst;
+   driver_cmd.size           = size;
+   // Notify the driver if the host and device's memory have different endianess.
+   driver_cmd.is_diff_endian = m_diff_endian?1:0;
+   status = read (m_device, &driver_cmd, sizeof(driver_cmd));
+#endif   // LINUX
+
+   ACL_PCIE_ERROR_IF(status != WD_STATUS_SUCCESS, return -1, 
+      "[%s] Reading block (" SIZE_FMT_U " bytes) to 0x" SIZE_FMT_X " (0x" SIZE_FMT_X " with offset)\n",
+      m_name, size, addr, (size_t)bar_addr);
+   return 0; // success
+}
+
+
+
+ACL_PCIE_MM_IO_MGR::ACL_PCIE_MM_IO_MGR( WDC_DEVICE_HANDLE device ) :
+   mem (NULL),
+   pcie_cra (NULL),
+   window (NULL),
+   version (NULL),
+   pr_base_id (NULL),
+   quartus_ver (NULL),
+   cade_id (NULL),
+   uniphy_status (NULL),
+   uniphy_reset (NULL),
+   kernel_if (NULL),
+   pll (NULL),
+   temp_sensor (NULL),
+   hostch_ver (NULL)
+{
+   ACL_PCIE_ASSERT(device != INVALID_DEVICE, "passed in an invalid device when creating mm_io_mgr.\n");
+   
+   // This is the PCIe's interface for directly accessing memory (which is
+   // significantly slower than using DMA).  This view of memory is segmented
+   // so that the size of this address space can be smaller than the amount of
+   // physical device memory.  The window interface controls which region of
+   // physical memory this interface currently maps to.
+   // The last flag indicate if the device on both side of transferring have
+   // different endianess.
+#ifdef ACL_BIG_ENDIAN
+   mem = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCI_GLOBAL_MEM_BAR, (KPTR)ACL_PCIE_MEMWINDOW_BASE, "GLOBAL-MEM" , true );
+#else
+   mem = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCI_GLOBAL_MEM_BAR, (KPTR)ACL_PCIE_MEMWINDOW_BASE, "GLOBAL-MEM" , false);
+#endif
+
+   // This is the CRA port of our PCIe controller.  Used for configuring
+   // interrupts and things like that.
+   pcie_cra = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCI_CRA_BAR, ACL_PCI_CRA_OFFSET, "PCIE-CRA" );
+
+   // This interface sets the high order address bits for the PCIe's direct
+   // memory accesses via "mem" (above).
+   window = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCIE_MEMWINDOW_BAR, ACL_PCIE_MEMWINDOW_CRA, "MEMWINDOW" );
+
+   // DMA interfaces
+   dma = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCIE_DMA_INTERNAL_BAR, ACL_PCIE_DMA_INTERNAL_CTR_BASE, "DMA-CTR" );
+
+   // Version ID check
+   version = new ACL_PCIE_MM_IO_DEVICE( device, ACL_VERSIONID_BAR, ACL_VERSIONID_OFFSET, "VERSION" );
+
+   // PR base ID check
+   pr_base_id = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PRBASEID_BAR, ACL_PRBASEID_OFFSET, "PRBASEID" );
+
+   // Quartus Version
+   quartus_ver = new ACL_PCIE_MM_IO_DEVICE( device, ACL_QUARTUSVER_BAR, ACL_QUARTUSVER_OFFSET, "QUARTUS-VERSION" );
+
+   // Quartus Version
+   hostch_ver = new ACL_PCIE_MM_IO_DEVICE( device, ACL_HOSTCH_VERSION_BAR, ACL_HOSTCH_VERSION_OFFSET, "HOSTCH-VERSION" );
+
+   // Cable auto detect ID
+   cade_id = new ACL_PCIE_MM_IO_DEVICE( device, ACL_CADEID_BAR, ACL_CADEID_OFFSET, "CADEID" );
+
+   // Uniphy Status
+   uniphy_status = new ACL_PCIE_MM_IO_DEVICE( device, ACL_UNIPHYSTATUS_BAR, ACL_UNIPHYSTATUS_OFFSET, "UNIPHYSTATUS" );
+
+   // Uniphy Reset
+   uniphy_reset = new ACL_PCIE_MM_IO_DEVICE( device, ACL_UNIPHYRESET_BAR, ACL_UNIPHYRESET_OFFSET, "UNIPHYRESET" );
+
+   // Kernel interface
+   kernel_if = new ACL_PCIE_MM_IO_DEVICE( device, ACL_KERNEL_CSR_BAR, ACL_KERNEL_CSR_OFFSET, "KERNEL" );
+
+   // PLL interface
+   pll = new ACL_PCIE_MM_IO_DEVICE( device, ACL_PCIE_KERNELPLL_RECONFIG_BAR, ACL_PCIE_KERNELPLL_RECONFIG_OFFSET, "PLL" );
+
+   // temperature sensor
+   if( ACL_PCIE_HAS_TEMP_SENSOR ) {
+      temp_sensor = new ACL_PCIE_MM_IO_DEVICE( device, ACL_VERSIONID_BAR, ACL_PCIE_TEMP_SENSOR_ADDRESS, "TEMP-SENSOR");
+   }
+
+}
+
+ACL_PCIE_MM_IO_MGR::~ACL_PCIE_MM_IO_MGR()
+{
+   if(mem)              { delete mem;              mem = NULL;              }
+   if(pcie_cra)         { delete pcie_cra;         pcie_cra = NULL;         }
+   if(window)           { delete window;           window = NULL;           }
+   if(version)          { delete version;          version = NULL;          }
+   if(pr_base_id)       { delete pr_base_id;       pr_base_id = NULL;       }
+   if(quartus_ver)      { delete quartus_ver;      quartus_ver = NULL;      }
+   if(cade_id)          { delete cade_id;          cade_id = NULL;          }
+   if(uniphy_status)    { delete uniphy_status;    uniphy_status = NULL;    }
+   if(uniphy_reset)     { delete uniphy_reset;     uniphy_reset = NULL;     }
+   if(kernel_if)        { delete kernel_if;        kernel_if = NULL;        }
+   if(pll)              { delete pll;              pll = NULL;              }
+   if(temp_sensor)      { delete temp_sensor;      temp_sensor = NULL;      }
+   if(hostch_ver)       { delete hostch_ver;       hostch_ver = NULL;       }
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.h
new file mode 100755
index 0000000000000000000000000000000000000000..90e9adcad898c57ad16ec0486fe1dc36687b9a24
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_mm_io.h
@@ -0,0 +1,99 @@
+#ifndef ACL_PCIE_MM_IO_H
+#define ACL_PCIE_MM_IO_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_mm_io.h  --------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to handle memory mapped IO over PCIe.              */
+/* The actual implementation of the class lives in the acl_pcie_mm_io.cpp,         */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+/*
+ *
+ */
+class ACL_PCIE_MM_IO_DEVICE
+{
+   public: 
+      ACL_PCIE_MM_IO_DEVICE (WDC_DEVICE_HANDLE device, DWORD bar, KPTR device_offset, const char* name , bool diff_endian = false);
+      ~ACL_PCIE_MM_IO_DEVICE();
+
+      DWORD bar_id()                           { return m_bar; };
+      KPTR  convert_to_bar_addr( size_t addr ) { return addr + m_offset; };
+
+      // read/write functions to the memory-mapped io device
+      // return 0 on success, negative on error
+      int read8  ( size_t addr, UINT8  *data );
+      int write8 ( size_t addr, UINT8   data );
+      int read16 ( size_t addr, UINT16 *data );
+      int write16( size_t addr, UINT16  data );
+      int read32 ( size_t addr, UINT32 *data );
+      int write32( size_t addr, UINT32  data );
+      int read64 ( size_t addr, UINT64 *data );
+      int write64( size_t addr, UINT64  data );
+
+      int read_block ( size_t addr, size_t size, void *dst );
+      int write_block( size_t addr, size_t size, void *src );
+
+   private:
+      static const int MAX_NAME_LENGTH = 32;
+      
+      // Helper functions
+      inline void   *compute_address( void* base, uintptr_t offset );
+
+      char              m_name[MAX_NAME_LENGTH];
+      WDC_DEVICE_HANDLE m_device;
+      DWORD             m_bar;
+      KPTR              m_offset;
+      bool              m_diff_endian;  //indicates if the host and this device have different endianess
+};
+
+/*
+ * Utility functions to clean up the various address translations for reads/writes
+ */
+class ACL_PCIE_MM_IO_MGR
+{
+   public:
+      ACL_PCIE_MM_IO_MGR( WDC_DEVICE_HANDLE device );
+      ~ACL_PCIE_MM_IO_MGR();
+
+      ACL_PCIE_MM_IO_DEVICE *mem;
+      ACL_PCIE_MM_IO_DEVICE *pcie_cra;
+      ACL_PCIE_MM_IO_DEVICE *dma;
+      ACL_PCIE_MM_IO_DEVICE *window;
+      ACL_PCIE_MM_IO_DEVICE *version;
+      ACL_PCIE_MM_IO_DEVICE *pr_base_id;
+      ACL_PCIE_MM_IO_DEVICE *quartus_ver;
+      ACL_PCIE_MM_IO_DEVICE *cade_id;
+      ACL_PCIE_MM_IO_DEVICE *uniphy_status;
+      ACL_PCIE_MM_IO_DEVICE *uniphy_reset;
+      ACL_PCIE_MM_IO_DEVICE *kernel_if;
+      ACL_PCIE_MM_IO_DEVICE *pll;
+      ACL_PCIE_MM_IO_DEVICE *temp_sensor;
+      ACL_PCIE_MM_IO_DEVICE *hostch_ver;
+};
+
+#endif // ACL_PCIE_MM_IO_H
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..434ad048f46cc1235a07f88062b508109aaf6cfd
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.cpp
@@ -0,0 +1,78 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/* ===- acl_pcie_timer.cpp  ------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file implements the class to query the host's system timer.                */
+/* The declaration of the class lives in the acl_pcie_timer.h                      */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+
+// common and its own header files
+#include "acl_pcie.h"
+#include "acl_pcie_timer.h"
+
+// other standard header files
+#include <fstream>
+
+
+ACL_PCIE_TIMER::ACL_PCIE_TIMER() : m_ticks_per_second(0)
+{
+#if defined(WINDOWS)
+   // Cache the performance counter frequency
+   LARGE_INTEGER li;
+   QueryPerformanceFrequency( &li );
+   m_ticks_per_second = li.QuadPart;
+
+   ACL_PCIE_ASSERT(m_ticks_per_second != 0, "m_ticks_per_second == 0!\n");   
+#endif   // WINDOWS
+}
+
+ACL_PCIE_TIMER::~ACL_PCIE_TIMER()
+{
+}
+
+
+cl_ulong ACL_PCIE_TIMER::get_time_ns()
+{
+#if defined(WINDOWS)
+   const INT64 NS_PER_S = 1000000000;
+   LARGE_INTEGER li;
+
+   QueryPerformanceCounter( &li );
+   INT64 ticks = li.QuadPart;
+   double seconds = ticks / (double)m_ticks_per_second;
+
+   return static_cast<cl_ulong>(seconds * NS_PER_S + 0.5);   
+#endif   // WINDOWS
+#if defined(LINUX)
+   struct timespec a;
+   const cl_ulong NS_PER_S = 1000000000;
+   clock_gettime (CLOCK_REALTIME, &a);
+
+   return static_cast<cl_ulong>(a.tv_nsec) + static_cast<cl_ulong>(a.tv_sec * NS_PER_S);   
+#endif   // LINUX
+}
+
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.h
new file mode 100755
index 0000000000000000000000000000000000000000..b3d7d34249f3d114942483ea1579fd980dd55f71
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/acl_pcie_timer.h
@@ -0,0 +1,47 @@
+#ifndef ACL_PCIE_TIMER_H
+#define ACL_PCIE_TIMER_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+/* ===- acl_pcie_timer.h  --------------------------------------------- C++ -*-=== */
+/*                                                                                 */
+/*                         Intel(R) OpenCL MMD Driver                                */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+/*                                                                                 */
+/* This file declares the class to query the host's system timer.                  */
+/* The actual implementation of the class lives in the acl_pcie_timer.cpp          */
+/*                                                                                 */
+/* ===-------------------------------------------------------------------------=== */
+
+class ACL_PCIE_TIMER
+{
+   public:
+      ACL_PCIE_TIMER();
+      ~ACL_PCIE_TIMER();
+
+      // function to query the host's system timer
+      cl_ulong get_time_ns();
+
+   private:
+      INT64 m_ticks_per_second;
+};
+
+#endif   // ACL_PCIE_TIMER_H
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/lib/libpkg_editor.a b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/lib/libpkg_editor.a
new file mode 100755
index 0000000000000000000000000000000000000000..391eb4200b04625ddaeb027fccf4130d48b89900
Binary files /dev/null and b/applications/ta2/libraries/ta2_unb2b_bsp/source/host/mmd/lib/libpkg_editor.a differ
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/include/aocl_mmd.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/include/aocl_mmd.h
new file mode 100755
index 0000000000000000000000000000000000000000..0c96b00b800141439adaad0c10dd016971d9d948
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/include/aocl_mmd.h
@@ -0,0 +1,469 @@
+#ifndef AOCL_MMD_H
+#define AOCL_MMD_H
+
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Support for memory mapped ACL devices.
+ *
+ * Typical API lifecycle, from the perspective of the caller.
+ *
+ *    1. aocl_mmd_open must be called first, to provide a handle for further
+ *    operations.
+ *
+ *    2. The interrupt and status handlers must be set.
+ *   
+ *    3. Read and write operations are performed.
+ *
+ *    4. aocl_mmd_close may be called to shut down the device.  No further
+ *    operations are permitted until a subsequent aocl_mmd_open call.
+ *
+ * aocl_mmd_get_offline_info can be called anytime including before
+ * open. aocl_mmd_get_info can be called anytime between open and close.
+ */
+
+#ifndef AOCL_MMD_CALL
+#if defined(_WIN32)
+#define AOCL_MMD_CALL   __declspec(dllimport)
+#else
+#define AOCL_MMD_CALL
+#endif
+#endif
+
+#ifndef WEAK
+#if defined(_WIN32)
+#define WEAK 
+#else
+#define WEAK  __attribute__((weak))
+#endif
+#endif
+
+/* The MMD API's version - the runtime expects this string when
+ * AOCL_MMD_VERSION is queried.  This changes only if the API has changed */
+#define AOCL_MMD_VERSION_STRING "14.1"
+
+/* Memory types that can be supported - bitfield. Other than physical memory 
+ * these types closely align with the OpenCL SVM types.
+ *
+ * AOCL_MMD_PHYSICAL_MEMORY - The vendor interface includes IP to communicate 
+ * directly with physical memory such as DDR, QDR, etc.
+ *
+ * AOCL_MMD_SVM_COARSE_GRAIN_BUFFER - The vendor interface includes support for 
+ * caching SVM pointer data andy requires explicit function calls from the user 
+ * to sychronize the cache between the host processor and the FPGA. This level
+ * of SVM is not currently supported by Altera except as a subset of 
+ * SVM_FINE_GAIN_SYSTEM support.
+ *
+ * AOCL_MMD_SVM_FINE_GRAIN_BUFFER - The vendor interface includes support for 
+ * caching SVM pointer data and requires additional information from the user 
+ * and/or host runtime that can be collected during pointer allocation in order
+ * to sychronize the cache between the host processor and the FPGA. Once this 
+ * additional data is provided for an SVM pointer, the vendor interface handles 
+ * cache synchronization between the host processor & the FPGA automatically. 
+ * This level of SVM is not currently supported by Altera except as a subset
+ * of SVM_FINE_GRAIN_SYSTEM support.
+ *
+ * AOCL_MMD_SVM_FINE_GRAIN_SYSTEM - The vendor interface includes support for 
+ * caching SVM pointer data and does not require any additional information to 
+ * sychronize the cache between the host processor and the FPGA. The vendor 
+ * interface handles cache synchronization between the host processor & the 
+ * FPGA automatically for all SVM pointers. This level of SVM support is
+ * currently under development by Altera and some features may not be fully 
+ * supported.
+ */
+#define AOCL_MMD_PHYSICAL_MEMORY (1 << 0)
+#define AOCL_MMD_SVM_COARSE_GRAIN_BUFFER (1 << 1)
+#define AOCL_MMD_SVM_FINE_GRAIN_BUFFER (1 << 2)
+#define AOCL_MMD_SVM_FINE_GRAIN_SYSTEM (1 << 3)
+
+typedef void* aocl_mmd_op_t;
+
+typedef struct {
+   unsigned lo; /* 32 least significant bits of time value. */
+   unsigned hi; /* 32 most significant bits of time value. */
+} aocl_mmd_timestamp_t;
+
+
+/* Defines the set of characteristics that can be probed about the board before
+ * opening a device.  The type of data returned by each is specified in
+ * parentheses in the adjacent comment.
+ *
+ * AOCL_MMD_NUM_BOARDS and AOCL_MMD_BOARD_NAMES
+ *   These two fields can be used to implement multi-device support.  The MMD
+ *   layer may have a list of devices it is capable of interacting with, each
+ *   identified with a unique name.  The length of the list should be returned
+ *   in AOCL_MMD_NUM_BOARDS, and the names of these devices returned in
+ *   AOCL_MMD_BOARD_NAMES.  The OpenCL runtime will try to call aocl_mmd_open 
+ *   for each board name returned in AOCL_MMD_BOARD_NAMES.
+ *
+ * */
+typedef enum {
+   AOCL_MMD_VERSION = 0,       /* Version of MMD (char*)*/
+   AOCL_MMD_NUM_BOARDS = 1,    /* Number of candidate boards (int)*/
+   AOCL_MMD_BOARD_NAMES = 2,   /* Names of boards available delimiter=; (char*)*/
+   AOCL_MMD_VENDOR_NAME = 3,   /* Name of vendor (char*) */
+   AOCL_MMD_VENDOR_ID = 4,     /* An integer ID for the vendor (int) */
+   AOCL_MMD_USES_YIELD = 5,    /* 1 if yield must be called to poll hw (int) */
+   /* The following can be combined in a bit field: 
+    * AOCL_MMD_PHYSICAL_MEMORY, AOCL_MMD_SVM_COARSE_GRAIN_BUFFER, AOCL_MMD_SVM_FINE_GRAIN_BUFFER, AOCL_MMD_SVM_FINE_GRAIN_SYSTEM.
+    * Prior to 14.1, all existing devices supported physical memory and no types of SVM memory, so this
+    * is the default when this operation returns '0' for board MMDs with a version prior to 14.1
+    */
+   AOCL_MMD_MEM_TYPES_SUPPORTED = 6, 
+} aocl_mmd_offline_info_t;
+
+/* Defines the set of characteristics that can be probed about the board after
+ * opening a device.  This can involve communication to the device 
+ *
+ * AOCL_MMD_NUM_KERNEL_INTERFACES - The number of kernel interfaces, usually 1
+ *
+ * AOCL_MMD_KERNEL_INTERFACES - the handle for each kernel interface.  
+ *      param_value will have size AOCL_MMD_NUM_KERNEL_INTERFACES * sizeof int
+ *
+ * AOCL_MMD_PLL_INTERFACES - the handle for each pll associated with each
+ * kernel interface.  If a kernel interface is not clocked by acl_kernel_clk
+ * then return -1
+ *
+ * */
+typedef enum {
+   AOCL_MMD_NUM_KERNEL_INTERFACES = 1,  /* Number of Kernel interfaces (int) */
+   AOCL_MMD_KERNEL_INTERFACES = 2,      /* Kernel interface (int*) */
+   AOCL_MMD_PLL_INTERFACES = 3,         /* Kernel clk handles (int*) */
+   AOCL_MMD_MEMORY_INTERFACE = 4,       /* Global memory handle (int) */
+   AOCL_MMD_TEMPERATURE = 5,            /* Temperature measurement (float) */
+   AOCL_MMD_PCIE_INFO = 6,              /* PCIe information (char*) */
+   AOCL_MMD_BOARD_NAME = 7,             /* Name of board (char*) */
+   AOCL_MMD_BOARD_UNIQUE_ID = 8,        /* Unique ID of board (int) */
+} aocl_mmd_info_t;
+
+
+typedef struct {
+  unsigned long long int exception_type;
+  void *user_private_info;
+  size_t user_cb;
+}aocl_mmd_interrupt_info;
+
+typedef void (*aocl_mmd_interrupt_handler_fn)( int handle, void* user_data );
+typedef void (*aocl_mmd_device_interrupt_handler_fn)( int handle, aocl_mmd_interrupt_info* data_in, void* user_data );
+typedef void (*aocl_mmd_status_handler_fn)( int handle, void* user_data, aocl_mmd_op_t op, int status );
+
+
+/* Get information about the board using the enum aocl_mmd_offline_info_t for
+ * offline info (called without a handle), and the enum aocl_mmd_info_t for
+ * info specific to a certain board.  
+ * Arguments:
+ *
+ *   requested_info_id - a value from the aocl_mmd_offline_info_t enum
+ *
+ *   param_value_size - size of the param_value field in bytes.  This should
+ *     match the size of the return type expected as indicated in the enum
+ *     definition.  For example, the AOCL_MMD_TEMPERATURE returns a float, so
+ *     the param_value_size should be set to sizeof(float) and you should
+ *     expect the same number of bytes returned in param_size_ret.
+ *
+ *   param_value - pointer to the variable that will receive the returned info
+ *
+ *   param_size_ret - receives the number of bytes of data actually returned
+ *
+ * Returns: a negative value to indicate error.
+ */
+AOCL_MMD_CALL int aocl_mmd_get_offline_info(
+    aocl_mmd_offline_info_t requested_info_id,
+    size_t param_value_size,
+    void* param_value,
+    size_t* param_size_ret ) WEAK;
+
+AOCL_MMD_CALL int aocl_mmd_get_info(
+    int handle,
+    aocl_mmd_info_t requested_info_id,
+    size_t param_value_size,
+    void* param_value,
+    size_t* param_size_ret ) WEAK;
+
+/* Open and initialize the named device.  
+ *
+ * The name is typically one specified by the AOCL_MMD_BOARD_NAMES offline
+ * info.
+ * 
+ * Arguments:
+ *    name - open the board with this name (provided as a C-style string, 
+ *           i.e. NUL terminated ASCII.)
+ *
+ * Returns: the non-negative integer handle for the board, otherwise a
+ * negative value to indicate error.  Upon receiving the error, the OpenCL
+ * runtime will proceed to open other known devices, hence the MMD mustn't
+ * exit the application if an open call fails.
+ */
+AOCL_MMD_CALL int aocl_mmd_open(const char *name) WEAK; 
+
+/* Close an opened device, by its handle.
+ * Returns: 0 on success, negative values on error. 
+ */
+AOCL_MMD_CALL int aocl_mmd_close(int handle) WEAK;
+
+/* Set the interrupt handler for the opened device.
+ * The interrupt handler is called whenever the client needs to be notified
+ * of an asynchronous event signalled by the device internals.
+ * For example, the kernel has completed or is stalled.
+ *
+ * Important: Interrupts from the kernel must be ignored until this handler is
+ * set
+ *
+ * Arguments:
+ *   fn - the callback function to invoke when a kernel interrupt occurs
+ *   user_data - the data that should be passed to fn when it is called.
+ *
+ * Returns: 0 if successful, negative on error
+ */
+AOCL_MMD_CALL int aocl_mmd_set_interrupt_handler( int handle, aocl_mmd_interrupt_handler_fn fn, void* user_data ) WEAK;
+
+/* Set the device interrupt handler for the opened device.
+ * The device interrupt handler is called whenever the client needs to be notified
+ * of a device event signalled by the device internals.
+ * For example, an ECC error has been reported.
+ *
+ * Important: Interrupts from the device must be ignored until this handler is
+ * set
+ *
+ * Arguments:
+ *   fn - the callback function to invoke when a device interrupt occurs
+ *   user_data - the data that should be passed to fn when it is called.
+ *
+ * Returns: 0 if successful, negative on error
+ */
+AOCL_MMD_CALL int aocl_mmd_set_device_interrupt_handler( int handle, aocl_mmd_device_interrupt_handler_fn fn, void* user_data ) WEAK;
+
+/* Set the operation status handler for the opened device.
+ * The operation status handler is called with
+ *    status 0 when the operation has completed successfully.
+ *    status negative when the operation completed with errors.
+ *
+ * Arguments:
+ *   fn - the callback function to invoke when a status update is to be
+ *   performed.
+ *   user_data - the data that should be passed to fn when it is called.
+ *
+ * Returns: 0 if successful, negative on error
+ */
+AOCL_MMD_CALL int aocl_mmd_set_status_handler( int handle, aocl_mmd_status_handler_fn fn, void* user_data ) WEAK;
+
+/* If AOCL_MMD_USES_YIELD is 1, this function is called when the host is idle
+ * and hence possibly waiting for events to be processed by the device.  
+ * If AOCL_MMD_USES_YIELD is 0, this function is never called and the MMD is
+ * assumed to provide status/event updates via some other execution thread
+ * such as through an interrupt handler.
+ *
+ * Returns: non-zero if the yield function performed useful work such as
+ * processing DMA transactions, 0 if there is no useful work to be performed
+ *
+ * NOTE: yield may be called continuously as long as it reports that it has useful work
+ */
+AOCL_MMD_CALL int aocl_mmd_yield(int handle) WEAK;
+
+/* Read, write and copy operations on a single interface.
+ * If op is NULL
+ *    - Then these calls must block until the operation is complete.
+ *    - The status handler is not called for this operation.
+ *
+ * If op is non-NULL, then:
+ *    - These may be non-blocking calls
+ *    - The status handler must be called upon completion, with status 0
+ *    for success, and a negative value for failure.
+ *
+ * Arguments:
+ *   op - the operation object used to track this operations progress
+ *
+ *   len - the size in bytes to transfer
+ *
+ *   src - the host buffer being read from
+ *
+ *   dst - the host buffer being written to
+ *
+ *   mmd_interface - the handle to the interface being accessed.  E.g. To
+ *   access global memory this handle will be whatever is returned by
+ *   aocl_mmd_get_info when called with AOCL_MMD_MEMORY_INTERFACE.
+ *
+ *   offset/src_offset/dst_offset - the byte offset within the interface that
+ *   the transfer will begin at.
+ *
+ * The return value is 0 if the operation launch was successful, and
+ * negative otherwise.
+ */
+AOCL_MMD_CALL int aocl_mmd_read(
+      int handle,
+      aocl_mmd_op_t op,
+      size_t len,
+      void* dst,
+      int mmd_interface, size_t offset ) WEAK;
+AOCL_MMD_CALL int aocl_mmd_write(
+      int handle,
+      aocl_mmd_op_t op,
+      size_t len,
+      const void* src,
+      int mmd_interface, size_t offset ) WEAK;
+AOCL_MMD_CALL int aocl_mmd_copy(
+      int handle,
+      aocl_mmd_op_t op,
+      size_t len,
+      int mmd_interface, size_t src_offset, size_t dst_offset ) WEAK;
+
+/* Host Channel create operation
+ * Opens channel between host and kernel.
+ *
+ * Arguments:
+ *   channel_name - name of channel to initialize. Same name as used in board_spec.xml
+ *
+ *   queue_depth - the size in bytes of pinned memory queue in system memory
+ *
+ *   direction - the direction of the channel
+ *
+ * The return value is negative if initialization was unsuccessful, and
+ * positive otherwise. Positive return value is handle to the channel to be used for 
+ * subsequent calls for the channel.
+ */
+AOCL_MMD_CALL int aocl_mmd_hostchannel_create(
+      int handle,
+      char *channel_name,
+      size_t queue_depth,
+      int direction) WEAK;
+      
+/* Host Channel destroy operation
+ * Closes channel between host and kernel.
+ *
+ * Arguments:
+ *   channel - the handle to the channel to close, that was obtained with
+ *             create channel
+ *
+ * The return value is 0 if the destroy was successful, and negative
+ * otherwise.
+ */
+AOCL_MMD_CALL int aocl_mmd_hostchannel_destroy(
+      int handle,
+      int channel) WEAK;
+
+/* Host Channel get buffer operation
+ * Provide host with pointer to buffer they can access to to write or
+ * read from kernel, along with space or data available in the buffer
+ * in bytes.
+ *
+ * Arguments:
+ *   channel - the handle to the channel to get the buffer for
+ *
+ *   buffer_size - the address that this call will write the amount of
+ *                 space or data that's available in the buffer,
+ *                 depending on direction of the channel, in bytes
+ *
+ *   status - the address that this call will write to for result of this
+ *            call. Value will be 0 for success, and negative otherwise
+ *
+ * The return value is the pointer to the buffer that host can write
+ * to or read from. NULL if the status is negative.
+ */
+AOCL_MMD_CALL void *aocl_mmd_hostchannel_get_buffer(
+      int handle,
+      int channel,
+      size_t *buffer_size,
+      int *status) WEAK;
+      
+/* Host Channel acknowledge buffer operation
+ * Acknowledge to the channel that the user has written or read data from
+ * it. This will make the data or additional buffer space available to
+ * write to or read from kernel.
+ *
+ * Arguments:
+ *   channel - the handle to the channel that user is acknowledging
+ *
+ *   send_size - the size in bytes that the user is acknowledging
+ *
+ *   status - the address that this call will write to for result of this
+ *            call. Value will be 0 for success, and negative otherwise
+ *
+ * The return value is equal to send_size if send_size was less than or
+ * equal to the buffer_size from get buffer call. If send_size was
+ * greater, then return value is the amount that was actually sent.
+ */
+AOCL_MMD_CALL size_t aocl_mmd_hostchannel_ack_buffer(
+      int handle,
+      int channel,
+      size_t send_size,
+      int *status) WEAK;
+
+/* Reprogram the device 
+ *
+ * The host will guarantee that no operations are currently executing on the
+ * device.  That means the kernels will be idle and no read/write/copy
+ * commands are active.  Interrupts should be disabled and the FPGA should
+ * be reprogrammed with the data from user_data which has size size.  The host
+ * will then call aocl_mmd_set_status_handler and aocl_mmd_set_interrupt_handler
+ * again.  At this point interrupts can be enabled.
+ *
+ * The new handle to the board after reprogram does not have to be the same as
+ * the one before.
+ *
+ * Arguments:
+ *   user_data - The binary contents of the fpga.bin file created during
+ *   Quartus II compilation.
+ *   size - the size in bytes of user_data
+ *
+ * Returns: the new non-negative integer handle for the board, otherwise a 
+ * negative value to indicate error.
+ */
+AOCL_MMD_CALL int aocl_mmd_reprogram( int handle, void * user_data , size_t size) WEAK;
+
+/* Shared memory allocator
+ * Allocates memory that is shared between the host and the FPGA.  The 
+ * host will access this memory using the pointer returned by
+ * aocl_mmd_shared_mem_alloc, while the FPGA will access the shared memory
+ * using device_ptr_out.  If shared memory is not supported this should return
+ * NULL.
+ *
+ * Shared memory survives FPGA reprogramming if the CPU is not rebooted.
+ *
+ * Arguments:
+ *   size - the size of the shared memory to allocate
+ *   device_ptr_out - will receive the pointer value used by the FPGA (the device)
+ *                    to access the shared memory.  Cannot be NULL.  The type is
+ *                    unsigned long long to handle the case where the host has a 
+ *                    smaller pointer size than the device.
+ *
+ * Returns: The pointer value to be used by the host to access the shared
+ * memory if successful, otherwise NULL.
+ */
+AOCL_MMD_CALL void * aocl_mmd_shared_mem_alloc( int handle, size_t size, unsigned long long *device_ptr_out ) WEAK;
+
+/* Shared memory de-allocator
+ * Frees previously allocated shared memory.  If shared memory is not supported,
+ * this function should do nothing.
+ * 
+ * Arguments: 
+ *   host_ptr - the host pointer that points to the shared memory, as returned by 
+ *              aocl_mmd_shared_mem_alloc
+ *   size     - the size of the shared memory to free. Must match the size
+ *              originally passed to aocl_mmd_shared_mem_alloc
+ */
+AOCL_MMD_CALL void aocl_mmd_shared_mem_free ( int handle, void* host_ptr, size_t size ) WEAK;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/include/pkg_editor.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/include/pkg_editor.h
new file mode 100755
index 0000000000000000000000000000000000000000..e8bfc32dec64e5667197f660fc779e0abfc68486
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/include/pkg_editor.h
@@ -0,0 +1,181 @@
+/* Editor for Altera OpenCL package files
+ *
+ * Dmitry Denisenko, June 2012.
+ *
+ * This provides higher-level functions for ELF work.
+ * The idea is to put content into sections, one "piece" of content
+ * per section, and use section names to identify the content.
+ * The interface enforces unique section names (not true for generic ELFs)
+ * and hides all the ugly ELF interface calls and structures.
+ */
+
+#ifndef PKG_FILE_EDITOR_H
+#define PKG_FILE_EDITOR_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Modes for open_struct acl_pkg_file() call. 
+ * Exactly one of ACL_PKG_READ, ACL_PKG_READ_WRITE must be supplied.
+ * Other flags may be bitwise OR'd into the mode.
+ *
+ * You can combine other modes with ACL_PKG_SHOW_* to control messages.
+ */
+#define ACL_PKG_READ          (1<<0)  /* Only reading the package */
+#define ACL_PKG_READ_WRITE    (1<<1)  /* Expect to read and write the binary. File must already exist. */
+#define ACL_PKG_CREATE        (1<<2)  /* Also creating.  Can only be used with ACL_PKG_READ_WRITE */
+
+#define ACL_PKG_SHOW_ERROR    (1<<8)  /*print errors to stderr*/
+#define ACL_PKG_SHOW_INFO     (1<<9) /*print info messages to stdout*/
+
+#define ACL_PKG_SECTION_ACL_VERSION    ".acl.version"
+#define ACL_PKG_SECTION_ACL_BUILD      ".acl.build"
+#define ACL_PKG_SECTION_QVERSION       ".acl.qversion"
+#define ACL_PKG_SECTION_HASH           ".acl.hash"
+#define ACL_PKG_SECTION_BOARD          ".acl.board"
+#define ACL_PKG_SECTION_COMPILEOPTIONS ".acl.compileoptions"
+#define ACL_PKG_SECTION_SOURCE         ".acl.source"
+#define ACL_PKG_SECTION_LLVMIR         ".acl.llvmir"
+#define ACL_PKG_SECTION_VERILOG        ".acl.verilog"
+#define ACL_PKG_SECTION_PROFILE_BASE   ".acl.profile_base"
+#define ACL_PKG_SECTION_AUTODISCOVERY  ".acl.autodiscovery"
+#define ACL_PKG_SECTION_RBF            ".acl.rbf"
+#define ACL_PKG_SECTION_CORE_RBF       ".acl.core.rbf"
+#define ACL_PKG_SECTION_PERIPH_RBF     ".acl.periph.rbf"
+#define ACL_PKG_SECTION_BASE_RBF       ".acl.base_revision.rbf"
+#define ACL_PKG_SECTION_SOF            ".acl.sof"
+#define ACL_PKG_SECTION_VFABRIC        ".acl.vfabric"
+#define ACL_PKG_SECTION_PLL_CONFIG     ".acl.pll_config"
+#define ACL_PKG_SECTION_FPGA_BIN       ".acl.fpga.bin"
+#define ACL_PKG_SECTION_EMULATOR_OBJ_LINUX   ".acl.emulator_object.linux"
+#define ACL_PKG_SECTION_EMULATOR_OBJ_WINDOWS ".acl.emulator_object.windows"
+#define ACL_PKG_SECTION_AUTODISCOVERY_XML    ".acl.autodiscovery.xml"
+#define ACL_PKG_SECTION_BOARDSPEC_XML  ".acl.board_spec.xml"
+#define ACL_PKG_SECTION_PERIPH_HASH    ".acl.periph.hash"
+#define ACL_PKG_SECTION_PROFILER_XML   ".acl.profiler.xml"
+#define ACL_PKG_SECTION_COMPILE_REV    ".acl.compile_revision"
+#define ACL_PKG_SECTION_PCIE_DEV_ID    ".acl.pcie.dev_id"
+#define ACL_PKG_SECTION_BASE_PERIPH_HASH    ".acl.base_revision.periph.hash"
+#define ACL_PKG_SECTION_ADJUST_PLLS_OUTPUT ".acl.quartus_report"
+#define ACL_PKG_SECTION_KERNEL_ARG_INFO_XML ".acl.kernel_arg_info.xml"
+#define ACL_PKG_SECTION_FAST_COMPILE ".acl.fast_compile"
+
+/* Minimum alignment in memory. */
+#define ACL_PKG_MIN_SECTION_ALIGNMENT  128
+
+
+/* printf format for printing size_t on both platforms */
+#if defined(_MSC_VER)
+  #define SIZE_T    "%Iu"
+  #define SSIZE_T   "%Id"
+  #define PTRDIFF_T "%Id"
+#elif defined(__GNUC__)
+  #define SIZE_T    "%zu"
+  #define SSIZE_T   "%zd"
+  #define PTRDIFF_T "%zd"
+#endif
+
+
+/* Open and close the pkg file */
+struct acl_pkg_file *acl_pkg_open_file (const char *fname, int mode);
+/* You can call close on a NULL pointer: it will do nothing.
+ * Closing the package file will also free its memory, so you better lose
+ * the pointer reference.
+ */
+void acl_pkg_close_file (struct acl_pkg_file *pkg);
+
+/* Set message output mode: show_mode is some combination of the bits
+ * in ACL_PKG_SHOW_INFO and ACL_PKG_SHOW_ERROR
+ */
+void acl_pkg_set_show_mode( struct acl_pkg_file* pkg, int show_mode );
+
+/* Open memory image of pkg file. Only good for reading! 
+ * The show_mode argument is an OR combination of zero or more of
+ *    ACL_PKG_SHOW_INFO,
+ *    ACL_PKG_SHOW_ERROR.
+ */ 
+struct acl_pkg_file *acl_pkg_open_file_from_memory (char *pkg_image, size_t pkg_image_size, int show_mode);
+
+
+/* Does the given named section exist?
+ * Returns 1 for yes, 0 for no.
+ * If the section exists, and size_ret is not-NULL, then the size (in bytes) of the
+ * section is stored into *size_ret. The size does NOT include NULL terminator, just like strlen().
+ */
+int acl_pkg_section_exists (const struct acl_pkg_file *pkg, const char *sect_name, size_t* size_ret);
+
+/* Return list of ALL (useful) section names in the package. 
+ * The buffer must be pre-allocated by the caller upto max_len bytes.
+ * Each section name is separated by '\n'
+ * Returns 1 on success, 0 on failure.
+ */
+int acl_pkg_section_names (const struct acl_pkg_file *pkg, char *buf, size_t max_len);
+
+
+/* Add a new section with specified content.
+ * If a section with such name already exists, nothing is done. 
+ * Returns 0 on failure, non-zero on success.
+ */
+int acl_pkg_add_data_section           (struct acl_pkg_file *pkg, const char *sect_name, const void* content, size_t len);
+int acl_pkg_add_data_section_from_file (struct acl_pkg_file *pkg, const char *sect_name, const char *in_file);
+
+/* Read content of an existing section.
+ * For read_section(), the buffer must be pre-allocated by caller to hold at least len bytes.
+ * This function will add '\0' at the end, therefore, the 'len' argument passed to this function
+ * must be one larger than the value returned by acl_pkg_section_exists.
+ * Returns 0 on failure, non-zero on success.
+ */
+int acl_pkg_read_section              (const struct acl_pkg_file *pkg, const char *sect_name, char *buf, size_t len);
+int acl_pkg_read_section_into_file    (struct acl_pkg_file *pkg, const char *sect_name, const char *out_file);
+
+/* Get a transient pointer to a section's data, via buf_ptr.
+ * The pointer is transient: It might move if you update the package in any way.
+ * This is a "fast" path in comparison to acl_pkg_read_section, so you
+ * don't have to allocate space to copy into.
+ * Returns 0 on failure, non-zero on success.
+ */
+int acl_pkg_read_section_transient(const struct acl_pkg_file *pkg, const char *sect_name, char** buf_ptr);
+
+/* Update content of an existing section.
+ * Old content is discarded. The section must already exist.
+ * Returns 0 on failure, non-zero on success.
+ */
+int acl_pkg_update_section            (struct acl_pkg_file *pkg, const char *sect_name, const void *new_content, size_t new_len);
+int acl_pkg_update_section_from_file  (struct acl_pkg_file *pkg, const char *sect_name, const char *in_file);
+
+/* List all pkg sections to stdout.
+ * Returns 0 on failure, non-zero on success.
+ */
+int acl_pkg_list_file_sections   (struct acl_pkg_file *pkg);
+
+/* Read full content of file into a buffer.
+ * The buffer is allocated by this function but must be freed by the caller.
+ * File length is returned in the second argument */
+void *acl_pkg_read_file_into_buffer (const char *in_file, size_t *file_size_out);
+
+/* support for package/unpackage */
+
+/* Package the input files and directory trees (NULL terminated list in input_files_dirs)
+ * and put them into the output file (out_file).
+ * Returns 0 on failure, non-zero on success
+ */
+int acl_pkg_pack (const char* out_file, const char** input_files_dirs);
+
+/* Unpack the input file (or stdin if filename is ACL_PKG_UNPACKAGE_STDIN)
+ * created by acl_pkg_pack into directory out_dir.
+ * Returns 0 on failure, non-zero on success
+ */
+#define ACL_PKG_UNPACKAGE_STDIN "-"
+int acl_pkg_unpack (const char* in_file, const char* out_dir);
+
+/* Unpack the buffer created by acl_pkg_pack into directory out_dir.
+ * Returns 0 on failure, non-zero on success
+ */
+int acl_pkg_unpack_buffer (const char* buffer, size_t buffer_size, const char* out_dir);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PKG_FILE_EDITOR_H */
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..6255bbb049e4a5f5c7126dc02818cbb4d78d0e67
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/Makefile
@@ -0,0 +1,8 @@
+
+CUR_REL_PATH = ..
+
+INSTALL_DIR = $(TOP_DEST_DIR)$(PS)
+TARGET_FILES = 
+SUB_DIRS = diagnostic reprogram
+
+include $(CUR_REL_PATH)/Makefile.common
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..79dbd43355563c2bf36a5ccf702b749bffe9a59b
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/Makefile
@@ -0,0 +1,33 @@
+ECHO = @
+CXX = g++ -o 
+CPPFLAGS = -DOPTION3=1 -DACL_USE_DMA=1 -DACL_COMPILER_IS_MSVC=0 -Wall -Wno-unknown-pragmas -Wno-delete-non-virtual-dtor -D__USE_XOPEN2K8 -Werror -DACL_HAS_STDLIB_STDIO -DACL_HOST_RUNTIME_IS_STATIC=0 -DACL_OPENCL_HOST_SYS=linux -DACL_OPENCL_HOST_BIT=64 -DACL_TARGET_SYS=linux -DACL_TARGET_BIT=64 -DLINUX -I. -I../../include -I$(INTELFPGAOCLSDKROOT)/host/include
+CXXFLAGS = -fPIC -m64
+
+LINKER = g++
+LINKER_LIBDIRARGS = -L$(TOP_DEST_DIR)/linux64/lib -L$(INTELFPGAOCLSDKROOT)/host/linux64/lib
+LINKER_ARGS = -z noexecstack -Wl,-z,relro,-z,now -Wl,-Bsymbolic -fPIC -Wl,--no-undefined -Wl,--exclude-libs,ALL -m64
+LINK_LIBS = -lalteracl -lelf -lalterahalmmd -l$(MMD_LIB_NAME)
+INCORPORATE_LIBS = 
+PREBUILT_OBJS = 
+
+PERVASIVE_DEPENDENCIES = ../../include/aocl_mmd.h
+
+MT = 
+
+EXEFILE = diagnose 
+
+OBJ_EXT = o
+OBJS = $(patsubst %.cpp,%.$(OBJ_EXT),$(wildcard *.cpp))
+OBJ_DIR?= .
+OBJ_FILES = $(addprefix $(OBJ_DIR)$(PS),$(OBJS))
+
+
+
+
+CUR_REL_PATH = ../..
+
+INSTALL_DIR = $(TOP_DEST_DIR)$(PS)linux64$(PS)libexec
+TARGET_FILES = $(EXEFILE)
+SUB_DIRS =
+
+include $(CUR_REL_PATH)/Makefile.common
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..1212cb0d4657c30d1cfc15b4c44184af6d0cf3a0
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.cpp
@@ -0,0 +1,55 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Min good alignment for DMA
+#define ACL_ALIGNMENT 64
+
+#ifdef LINUX
+#include <stdlib.h>
+void* acl_util_aligned_malloc (size_t size) {
+  void *result = NULL;
+  posix_memalign (&result, ACL_ALIGNMENT, size);
+  return result;
+}
+void acl_util_aligned_free (void *ptr) {
+  free (ptr);
+}
+
+#else // WINDOWS
+
+#include <malloc.h>
+
+void* acl_util_aligned_malloc (size_t size) {
+  return _aligned_malloc (size, ACL_ALIGNMENT);
+}
+void acl_util_aligned_free (void *ptr) {
+  _aligned_free (ptr);
+}
+
+#endif // LINUX
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.h
new file mode 100755
index 0000000000000000000000000000000000000000..728c58e47774cdaeb231ac0d4bbe665add0274e7
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/acl_aligned.h
@@ -0,0 +1,28 @@
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+#ifdef __cplusplus
+extern "C" { 
+#endif
+
+void* acl_util_aligned_malloc (size_t size);
+void acl_util_aligned_free (void *ptr);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/main.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/main.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..2d344df9941368b50585beedf8ee28939543bbf9
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/main.cpp
@@ -0,0 +1,387 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+/********
+ * The diagnostic program go through a few steps to test if the board is 
+ * working properly
+ *
+ * 1. Driver Installation Check
+ *
+ * 2. Board Installation Check
+ *
+ * 3. Basic Functionality Check
+ *
+ * 4. Large Size DMA transmission between host and the device
+ *
+ * 5. Measure PCIe bandwidth:
+ *
+ * Fastest: Max speed of any one Enqueue call
+ * Slowest: Min speed of any one Enqueue call
+ * Average: Sum of transfer times from Queued-End of each request divided
+ * by total bytes
+ * Total: Queue time of first Enqueue call to End time of last Enqueue call
+ * divided by total bytes
+ *
+ * Final "Throughput" value is average of max read and max write speeds.
+ ********/
+
+#define _GNU_SOURCE 1
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <malloc.h>
+#include <time.h>
+
+#include <sstream>   // std::ostringstream
+#include <iomanip>   // std::setw
+
+#include "ocl.h"
+#include "acl_aligned.h"
+#undef _GNU_SOURCE 
+
+#include "aocl_mmd.h"
+
+#if defined(WINDOWS)
+#  include "wdc_lib_wrapper.h"
+#endif   // WINDOWS
+
+#if defined(LINUX)
+#  include "../../linux64/driver/hw_pcie_constants.h"
+#endif   // LINU
+
+
+// WARNING: host runs out of events if MAXNUMBYTES is much greater than
+// MINNUMBYTES!!!
+#define INT_KB (1024)
+#define INT_MB (1024 * 1024)
+#define INT_GB (1024 * 1024 * 1024)
+#define DEFAULT_MAXNUMBYTES (256ULL * INT_MB)
+#define DEFAULT_MINNUMBYTES (512ULL * INT_KB)
+
+bool check_results(unsigned int * buf, unsigned int * output, unsigned n)
+{
+  bool result=true;
+  int prints=0;
+  for (unsigned j=0; j<n; j++)
+    if (buf[j]!=output[j])
+    {
+      if (prints++ < 512)
+        printf("Error! Mismatch at element %d: %8x != %8x, xor = %08x\n",
+          j,buf[j],output[j], buf[j]^output[j]);
+      result=false;
+    }
+  return result;
+}
+
+#define MMD_STRING_RETURN_SIZE 1024
+int general_basic_tests()
+{
+#if defined(WINDOWS)
+   const char *license = JUNGO_LICENSE;
+   DWORD status        = WDC_DriverOpen( WDC_DRV_OPEN_DEFAULT, license );
+   if(status == WD_STATUS_SUCCESS) {
+      WDC_DriverClose();   
+   } else {
+      printf("\nUnable to open the kernel mode driver.\n");
+      printf("\nPlease make sure you have properly installed the driver. To install the driver, run\n");
+      printf("      aocl install\n");
+      return -1;   
+   }
+#endif   // WINDOWS
+#if defined(LINUX)
+   if ( system("cat /proc/modules | grep \"aclpci_" ACL_BOARD_PKG_NAME "_drv\" > /dev/null") ) {
+      printf("\nUnable to find the kernel mode driver.\n");
+      printf("\nPlease make sure you have properly installed the driver. To install the driver, run\n");
+      printf("      aocl install\n");
+      return -1;
+   }
+#endif   // LINUX
+
+   return 0;
+}
+
+int scan_devices ( const char * device_name )
+{
+   static char vendor_name[MMD_STRING_RETURN_SIZE];
+   aocl_mmd_get_offline_info(AOCL_MMD_VENDOR_NAME, sizeof(vendor_name), vendor_name, NULL);
+   printf("Vendor: %s\n", vendor_name);
+
+   // create a output string stream for information of the list of devices
+   // this information will be output to stdout at the end to form a nice looking list
+   std::ostringstream o_list_stream;
+
+   // get all supported board names from MMD
+   static char boards_name[MMD_STRING_RETURN_SIZE];
+   aocl_mmd_get_offline_info(AOCL_MMD_BOARD_NAMES, sizeof(boards_name), boards_name, NULL);
+
+   // query through all possible device name
+   static char board_name[MMD_STRING_RETURN_SIZE];
+   static char pcie_info[MMD_STRING_RETURN_SIZE];
+   char       *dev_name;
+   int         handle;
+   int         first_row_printed = 0;
+   int         num_active_boards = 0;
+   float       temperature;
+   for(dev_name = strtok(boards_name, ";"); dev_name != NULL; dev_name = strtok(NULL, ";")) {
+      if ( device_name != NULL && strcmp(dev_name,device_name) != 0 ) continue;
+
+      handle = aocl_mmd_open(dev_name);
+
+      // print out the first row of the table when needed
+      if( handle != -1 && !first_row_printed) {
+         o_list_stream << "\nPhys Dev Name  Status   Information\n";
+         first_row_printed = 1;
+      }
+
+      // when handle < -1, a supported device exists, but it failed the initial tests. 
+      if( handle < -1 ) {
+         o_list_stream << std::left << std::setw(14) << dev_name << "Failed   Board name not available.\n";
+         o_list_stream << "                       Failed initial tests, so not working as expected.\n"; 
+         o_list_stream << "                       Please try again after reprogramming the device.\n";
+         o_list_stream << "\n";
+      }
+
+      // skip to next dev_name
+      if( handle < 0 ){   continue;   }
+
+      // found a working supported device
+      num_active_boards++;
+      o_list_stream << "\n";
+      aocl_mmd_get_info(handle,AOCL_MMD_BOARD_NAME, sizeof(board_name), board_name, NULL);
+      o_list_stream << std::left << std::setw(14) << dev_name << "Passed   " << board_name << "\n";
+
+      aocl_mmd_get_info(handle, AOCL_MMD_PCIE_INFO, sizeof(pcie_info), pcie_info, NULL);
+      o_list_stream << "                       PCIe " << pcie_info << "\n";
+
+      aocl_mmd_get_info(handle, AOCL_MMD_TEMPERATURE, sizeof(float), &temperature,NULL);
+      o_list_stream << "                       FPGA temperature = " << temperature << " degrees C.\n";
+   }
+
+   if(num_active_boards > 0) {
+      if ( device_name == NULL)
+      {
+         o_list_stream << "\nFound " << num_active_boards 
+            << " active device(s) installed on the host machine. To perform a full diagnostic on a specific device, please run\n";
+         o_list_stream << "      aocl diagnose <device_name>\n";
+      }
+   } else {
+      o_list_stream << "\nFound no active device installed on the host machine.\n";
+      o_list_stream << "\nPlease make sure to: \n";
+      o_list_stream << "      1. Set the environment variable AOCL_BOARD_PACKAGE_ROOT to the correct board package.\n";
+      o_list_stream << "      2. Install the driver from the selected board package.\n";
+      o_list_stream << "      3. Properly install the device in the host machine.\n";
+      o_list_stream << "      4. Configure the device with a supported OpenCL design.\n";
+      o_list_stream << "      5. Reboot the machine if the PCI Express link failed.\n";
+   }
+
+   // output all characters in ostringstream
+   std::string s = o_list_stream.str();
+   printf("%s", s.c_str());
+
+   return num_active_boards > 0 ? 0 : 1;
+}
+
+int main (int argc, char *argv[])
+{
+   char * device_name = NULL;
+   bool probe = false;
+   
+   bool use_polling = true;
+   bool os_windows = false;
+#if defined(WINDOWS)
+   const char *msi_env = getenv("ACL_PCIE_DMA_USE_MSI");
+   os_windows = true;
+   if (msi_env)
+      use_polling = false;
+#endif
+
+   for ( int i = 1 ; i < argc; i ++ ) {
+     if (strcmp(argv[i],"-probe") == 0) 
+       probe = true;
+     else 
+       device_name=argv[i];
+   }
+
+
+   // Run driver check only if not run in -probe <no-arg> mode
+   if( !(probe && device_name == NULL) ){
+     if( general_basic_tests() != 0 ){
+       printf("\nDIAGNOSTIC_FAILED\n");
+       return -1;
+     }
+   }
+
+   // we scan all the device installed on the host machine and print
+   // preliminary information about all or just the one specified
+   if ( (!probe && device_name == NULL) || (probe && device_name != NULL) ) {
+      if( scan_devices(device_name) == 0 ){
+         printf("\nDIAGNOSTIC_PASSED\n");
+      } else {
+         printf("\nDIAGNOSTIC_FAILED\n");
+         return -1;
+      }
+      return 0;
+   }
+
+
+   // get all supported board names from MMD
+   //   if probing all device just print them and exit
+   //   if diagnosing a particular device, check if it exists
+   char boards_name[MMD_STRING_RETURN_SIZE];
+   aocl_mmd_get_offline_info(AOCL_MMD_BOARD_NAMES, sizeof(boards_name), boards_name, NULL);
+   char *dev_name;
+   bool device_exists = false;
+   for(dev_name = strtok(boards_name, ";"); dev_name != NULL; dev_name = strtok(NULL, ";")) {
+      if ( probe )
+         printf("%s\n",dev_name);
+      else
+         device_exists |= ( strcmp(dev_name,argv[1]) == 0 );
+   }
+
+   // If probing all devices we're done here
+   if ( probe )
+      return 0;
+
+   // Full diagnosis of a particular device begins here
+
+   // get device number provided in the argument
+   if ( !device_exists ) {
+      printf("Unable to open the device %s.\n", argv[1]);
+      printf("Please make sure you have provided a proper <device_name>.\n");
+      printf("  Expected device names = %s\n", boards_name);
+      return -1;
+   }
+
+
+   srand ( unsigned(time(NULL)) );
+
+   int maxbytes = int((argc>=3) ? atoi(argv[2]) : DEFAULT_MAXNUMBYTES);
+   unsigned maxints = unsigned(maxbytes/sizeof(int));
+
+
+   unsigned iterations=1;
+   for (unsigned i=maxbytes/DEFAULT_MINNUMBYTES; i>>1 ; i=i>>1)
+     iterations++;
+
+   struct speed *readspeed = new struct speed[iterations];
+   struct speed *writespeed = new struct speed[iterations];
+
+   bool result=true;
+
+   unsigned int *buf = (unsigned int*) acl_util_aligned_malloc (maxints * sizeof(unsigned int));
+   unsigned int *output = (unsigned int*) acl_util_aligned_malloc (maxints * sizeof(unsigned int));
+  
+   // Create sequence: 0 rand1 ~2 rand2 4 ...
+   for (unsigned j=0; j<maxints; j++)
+     if (j%2==0)
+       buf[j]=(j&2) ? ~j : j;
+     else
+       buf[j]=unsigned(rand()*rand());
+
+   ocl_device_init(device_name, maxbytes);
+
+   int block_bytes=DEFAULT_MINNUMBYTES;
+
+   // Warm up
+   ocl_writespeed((char*)buf,block_bytes,maxbytes);
+   ocl_readspeed((char*)output,block_bytes,maxbytes);
+
+   for (unsigned i=0; i<iterations; i++, block_bytes*=2)
+   {
+     printf("Transferring %d KBs in %d %d KB blocks ...",maxbytes/1024,maxbytes/block_bytes,block_bytes/1024);
+     writespeed[i] = ocl_writespeed((char*)buf,block_bytes,maxbytes);
+     readspeed[i] = ocl_readspeed((char*)output,block_bytes,maxbytes);
+     result &= check_results(buf,output,maxints);
+     printf(" %.2f MB/s\n",(writespeed[i].fastest > readspeed[i].fastest) ? writespeed[i].fastest : readspeed[i].fastest);
+   }
+   
+   printf("\nAs a reference:\n");
+   printf("PCIe Gen1 peak speed: 250MB/s/lane\n");
+   printf("PCIe Gen2 peak speed: 500MB/s/lane\n");
+   printf("PCIe Gen3 peak speed: 985MB/s/lane\n");
+
+   printf("\n");
+   printf("Writing %d KBs with block size (in bytes) below:\n",maxbytes/1024);
+
+   printf("\nBlock_Size Avg    Max    Min    End-End (MB/s)\n");
+
+   float write_topspeed = 0;
+   block_bytes=DEFAULT_MINNUMBYTES;
+   for (unsigned i=0; i<iterations; i++, block_bytes*=2)
+   {
+     printf("%8d %.2f %.2f %.2f %.2f\n", block_bytes, 
+         writespeed[i].average,
+         writespeed[i].fastest,
+         writespeed[i].slowest,
+         writespeed[i].total);
+
+     if (writespeed[i].fastest > write_topspeed)
+       write_topspeed = writespeed[i].fastest;
+     if (writespeed[i].total > write_topspeed)
+       write_topspeed = writespeed[i].total;
+   }
+
+   float read_topspeed = 0;
+   block_bytes=DEFAULT_MINNUMBYTES;
+
+   printf("\n");
+
+   printf("Reading %d KBs with block size (in bytes) below:\n",maxbytes/1024);
+   printf("\nBlock_Size Avg    Max    Min    End-End (MB/s)\n");
+   for (unsigned i=0; i<iterations; i++, block_bytes*=2)
+   {
+     printf("%8d %.2f %.2f %.2f %.2f\n", block_bytes, 
+         readspeed[i].average,
+         readspeed[i].fastest,
+         readspeed[i].slowest,
+         readspeed[i].total);
+
+     if (readspeed[i].fastest > read_topspeed)
+       read_topspeed = readspeed[i].fastest;
+     if (readspeed[i].total > read_topspeed)
+       read_topspeed = readspeed[i].total;
+   }
+
+   printf("\nWrite top speed = %.2f MB/s\n",write_topspeed);
+   printf("Read top speed = %.2f MB/s\n",read_topspeed);
+   printf("Throughput = %.2f MB/s\n",(read_topspeed+write_topspeed)/2);
+   
+   if (use_polling && os_windows) {
+      printf("\nUsing polling for DMA transfers.\n");
+      printf("Bandwidth is higher at the cost of CPU utilization\n");
+      printf("When using interrupts for DMA, bandwidth is limited by the maximum number of interrupts per second that the driver can process.\n");
+      printf("To use interrupts for DMA Set environment variable 'ACL_PCIE_DMA_USE_MSI'.\n");
+   } else if (os_windows) {
+      printf("\nUsing MSI interrupts for DMA transfers.\n");
+      printf("Bandwidth will be limited by the maximum number of interrupts per second that the driver can process.\n");
+      printf("Remove environment variable 'ACL_PCIE_DMA_USE_MSI' for better DMA performance.\n");
+   }
+
+
+   if (result)
+     printf("\nDIAGNOSTIC_PASSED\n");
+   else
+     printf("\nDIAGNOSTIC_FAILED\n");
+
+   acl_util_aligned_free (buf);
+   acl_util_aligned_free (output);
+
+
+   return (result) ? 0 : -1;
+}
+#undef MMD_STRING_RETURN_SIZE
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..9da6dca89163c342239155d48c6c132a675d41c9
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.cpp
@@ -0,0 +1,435 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <string>
+#include <math.h>
+#include <assert.h>
+
+#include "acl_aligned.h"
+#include "ocl.h"
+
+
+// ACL specific includes
+#include "CL/opencl.h"
+
+#if defined(WINDOWS)
+#include <limits>
+#define INFINITY std::numeric_limits<double>::infinity()
+#endif   // WINDOWS
+
+#if defined(WINDOWS)
+#define cl_ulong_printf "%llu"
+#define cl_ulong_printfx "%llx"
+#endif   // WINDOWS
+#if defined(LINUX)
+#define cl_ulong_printf "%lu"
+#define cl_ulong_printfx "%lx"
+#endif   // LINUX
+
+// ACL runtime configuration
+static cl_platform_id platform;
+static cl_device_id device;
+static cl_context context;
+static cl_command_queue queue;
+static cl_kernel kernel;
+static cl_program program;
+static cl_int status;
+
+static cl_mem kernel_input;
+
+float ocl_get_exec_time_ns(cl_event evt);
+
+// free the resources allocated during initialization
+static void freeResources() {
+  if(kernel) 
+    clReleaseKernel(kernel);  
+  if(program) 
+    clReleaseProgram(program);
+  if(queue) 
+    clReleaseCommandQueue(queue);
+  if(context) 
+    clReleaseContext(context);
+  if(kernel_input) 
+    clReleaseMemObject(kernel_input);
+}
+
+
+static void dump_error(const char *str, cl_int status) {
+  printf("%s\n", str);
+  printf("Error code: %d\n", status);
+  freeResources();
+  exit(-1);
+}
+
+
+void ocl_device_init( char * device_name, int maxbytes )
+{
+  const unsigned int BUF_SIZE = 1000;
+
+  char buf[BUF_SIZE];
+  memset(buf, 0, BUF_SIZE);
+
+  cl_uint num_platforms=0;
+  cl_uint num_devices;
+  cl_device_id *device_list = NULL;
+
+  // get the platform ID
+  status = clGetPlatformIDs(0, NULL, &num_platforms);
+  if(status != CL_SUCCESS) dump_error("Failed clGetPlatformIDs.", status);
+  status = clGetPlatformIDs(1, &platform, NULL);
+  if(status != CL_SUCCESS) dump_error("Failed clGetPlatformIDs.", status);
+  if(num_platforms != 1) {
+    printf("Warning: Found %d platforms, using the first!\n", num_platforms);
+  }
+  char platform_name[256];
+  clGetPlatformInfo(platform,CL_PLATFORM_NAME,256,platform_name,NULL);
+  printf("Using platform: %s\n",platform_name);
+
+  // get the number of devices available
+  status = clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, 0, NULL, &num_devices);
+  if(status != CL_SUCCESS) dump_error("Failed clGetDeviceIDs.", status);
+  
+  // Allocate buffer for the number of devices
+  device_list = (cl_device_id *) malloc(num_devices * sizeof(cl_device_id));
+  if (device_list == NULL) dump_error("Failed to allocate buffer for devices.", status);
+
+  // get the device ID
+  status = clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, num_devices, device_list, NULL);
+  if(status != CL_SUCCESS) {
+    free(device_list);
+    dump_error("Failed clGetDeviceIDs.", status);
+  }
+
+  // Find the ID of the device we are targetting
+  std::string current_device_name;
+  std::string target_device_name = device_name;
+  target_device_name = "(" + target_device_name + ")";
+  unsigned dev_num = num_devices;
+
+  for (unsigned i = 0; i < num_devices; i++) {
+    device = device_list[i];
+    status = clGetDeviceInfo(device, CL_DEVICE_NAME, sizeof(buf), (void*)&buf, NULL);
+    current_device_name = buf;
+
+    if (current_device_name.find(target_device_name) != std::string::npos) {
+      dev_num = i;
+      break;
+    }
+  }
+
+  if(dev_num >= num_devices) {
+    printf("Can't open device #%d\n", dev_num);
+    free(device_list);
+    freeResources();
+    exit(-1);
+  }
+  device = device_list[dev_num];
+  
+  free(device_list);
+
+  status = clGetDeviceInfo(device, CL_DEVICE_NAME, sizeof(buf), (void*)&buf, NULL);
+  printf("Using Device with name: %s\n",buf);
+  status = clGetDeviceInfo(device, CL_DEVICE_VENDOR, sizeof(buf), (void*)&buf, NULL);
+  printf("Using Device from vendor: %s\n",buf);
+
+  // create a context
+  context = clCreateContext(0, 1, &device, NULL, NULL, &status);
+  if(status != CL_SUCCESS) dump_error("Failed clCreateContext.", status);
+
+  // create a command queue
+  queue = clCreateCommandQueue(context, device, CL_QUEUE_PROFILING_ENABLE, &status);
+  if(status != CL_SUCCESS) dump_error("Failed clCreateCommandQueue.", status);
+
+  if (ocl_test_all_global_memory() != 0 )
+    dump_error("Error: Global memory test failed\n", 0);
+
+  // create the input buffer
+  kernel_input = clCreateBuffer(context, CL_MEM_READ_WRITE, (size_t)maxbytes, NULL, &status);
+  if(status != CL_SUCCESS) dump_error("Failed clCreateBuffer.", status);
+}
+
+int ocl_test_all_global_memory( )
+{
+  cl_mem mem;
+  cl_ulong max_buffer_size;
+  cl_ulong max_alloc_size;
+  const cl_ulong MB = 1024*1024;
+  const cl_ulong MAX_HOST_CHUNK = 1024 * MB;
+  const cl_ulong MINIMUM_HOST_CHUNK = 128 * MB;
+
+  // 1. Get maximum size buffer
+  status = clGetDeviceInfo(device, CL_DEVICE_GLOBAL_MEM_SIZE, sizeof(max_buffer_size), (void*)&max_buffer_size, NULL);
+  status = clGetDeviceInfo(device,  CL_DEVICE_MAX_MEM_ALLOC_SIZE , sizeof(max_alloc_size), (void*)&max_alloc_size, NULL);
+
+#ifdef SMALL_MAX_ALLOC_SIZE
+  max_alloc_size = 128*1024*1024;
+  max_buffer_size = 128*1024*1024;
+#endif
+
+  printf("clGetDeviceInfo CL_DEVICE_GLOBAL_MEM_SIZE = " cl_ulong_printf "\n",max_buffer_size);
+  printf("clGetDeviceInfo CL_DEVICE_MAX_MEM_ALLOC_SIZE = " cl_ulong_printf "\n",max_alloc_size);
+  if (max_buffer_size > max_alloc_size)
+    printf("Memory consumed for internal use = " cl_ulong_printf "\n",max_buffer_size-max_alloc_size);
+
+  // 2. GetDeviceInfo may lie - so binary search to find true largest buffer
+  cl_ulong low = 1;
+  cl_ulong high = (max_buffer_size>max_alloc_size) ? max_buffer_size : max_alloc_size;
+  status = CL_OUT_OF_RESOURCES;
+
+  while (status != CL_SUCCESS || (low + 1 < high)){
+    cl_ulong mid = (low+high) / 2;
+
+    mem = clCreateBuffer(context, CL_MEM_READ_WRITE, mid, NULL, &status);
+    clReleaseMemObject(mem);
+    if (status==CL_SUCCESS)
+      low = mid;
+    else
+      high = mid;
+  }
+
+  mem = clCreateBuffer(context, CL_MEM_READ_WRITE, high, NULL, &status);
+  clReleaseMemObject(mem);
+  if (status != CL_SUCCESS)
+    high=low;
+  else
+    printf("Allocated " cl_ulong_printf " bytes\n",high);
+  cl_ulong max_size = high;
+  printf("Actual maximum buffer size = " cl_ulong_printf " bytes\n", max_size);
+
+  // 3. Allocate the buffer (should consume all of memory)
+  mem = clCreateBuffer(context, CL_MEM_READ_WRITE, max_size, NULL, &status);
+  assert(status==CL_SUCCESS);
+
+  // 4. Initialize memory with data = addr
+  printf("Writing " cl_ulong_printf " MB to global memory ...\n", max_size / MB);
+  cl_ulong bytes_rem = max_size;
+  cl_ulong offset = 0;
+  double sum_time = 0;
+  double max_bw = 0;
+  double min_bw = INFINITY;
+  cl_ulong *hostbuf = (cl_ulong*) acl_util_aligned_malloc(MAX_HOST_CHUNK);
+  cl_ulong aligned_buf_size = MAX_HOST_CHUNK;
+  
+  while((hostbuf == NULL) & (aligned_buf_size > MINIMUM_HOST_CHUNK)) {
+    aligned_buf_size = aligned_buf_size/2;
+    hostbuf = (cl_ulong*) acl_util_aligned_malloc((size_t)aligned_buf_size);
+  }
+  if (hostbuf == NULL) {
+    printf("Insufficient host memory for %lu Byte aligned buffer allocation\n", (long unsigned) aligned_buf_size);
+    assert(hostbuf != NULL);
+  }
+  printf("Allocated %lu Bytes host buffer for large transfers\n", (long unsigned) aligned_buf_size);
+
+  while(bytes_rem > 0) {
+    cl_event e;
+    cl_ulong chunk = bytes_rem;
+    if(chunk > aligned_buf_size) chunk = aligned_buf_size;
+    for(cl_ulong i=0; i<chunk/sizeof(cl_ulong); ++i) {
+      hostbuf[i] = offset + i;
+    }
+    status = clEnqueueWriteBuffer(queue, mem, CL_TRUE, offset, chunk, (void*)hostbuf, 0, NULL, &e);
+    assert(status==CL_SUCCESS);
+
+    // Transfer speed
+    double write_time_ns = ocl_get_exec_time_ns(e);
+    double bw = chunk * 1000.0 / write_time_ns;
+    if(bw > max_bw) max_bw = bw;
+    if(bw < min_bw) min_bw = bw;
+    sum_time += write_time_ns;
+
+    // Next iteration...
+    clReleaseEvent(e);
+    offset += chunk;
+    bytes_rem -= chunk;
+  }
+  printf("Write speed: %.2lf MB/s [%.2lf -> %.2lf]\n", max_size * 1000.0 / sum_time, min_bw, max_bw);
+
+  // Read-back and verify
+  printf("Reading and verifying " cl_ulong_printf " MB from global memory ...\n", max_size / MB);
+  bytes_rem = max_size;
+  offset = 0;
+  cl_ulong errors=0;
+  sum_time = 0;
+  max_bw = 0;
+  min_bw = INFINITY;
+  while(bytes_rem > 0) {
+    cl_event e;
+    cl_ulong chunk = bytes_rem;
+    if(chunk > aligned_buf_size) chunk = aligned_buf_size;
+    status = clEnqueueReadBuffer(queue, mem, CL_TRUE, offset, chunk, (void*)hostbuf, 0, NULL, &e);
+    assert(status==CL_SUCCESS);
+
+    // Transfer speed
+    double read_time_ns = ocl_get_exec_time_ns(e);
+    double bw = chunk * 1000.0 / read_time_ns;
+    if(bw > max_bw) max_bw = bw;
+    if(bw < min_bw) min_bw = bw;
+    sum_time += read_time_ns;
+
+    // Verify
+    for(cl_ulong i=0; i<chunk/sizeof(cl_ulong); ++i) {
+      if(hostbuf[i] != (i + offset)) {
+        ++errors;
+        if (errors <= 32)
+          printf("Verification failure at element " cl_ulong_printf ", expected " cl_ulong_printfx " but read back " cl_ulong_printfx "\n", i, i, hostbuf[i]);
+        if (errors == 32)
+          printf("Suppressing error output, counting # of errors ...\n");
+        if (errors == 1)
+          printf ("First failure at address " cl_ulong_printfx "\n",i*(cl_ulong)sizeof(cl_ulong)+(max_buffer_size-max_size));
+      }
+    }
+
+    // Next iteration...
+    clReleaseEvent(e);
+    offset += chunk;
+    bytes_rem -= chunk;
+  }
+  printf("Read speed: %.2lf MB/s [%.2lf -> %.2lf]\n", max_size * 1000.0 / sum_time, min_bw, max_bw);
+
+  acl_util_aligned_free(hostbuf);
+  clReleaseMemObject(mem);
+  
+  // 5. Do Verification
+  if (errors == 0)
+    printf ("Successfully wrote and readback " cl_ulong_printf " MB buffer\n", max_size/1024/1024);
+  else
+    printf ("Failed write/readback test with " cl_ulong_printf " errors\n",errors);
+  printf("\n");
+
+  return (int) errors;
+}
+
+float ocl_get_exec_time_ns(cl_event evt)
+{
+  cl_ulong kernelEventQueued;
+  cl_ulong kernelEventSubmit;
+  cl_ulong kernelEventStart;
+  cl_ulong kernelEventEnd;
+  clGetEventProfilingInfo(evt, CL_PROFILING_COMMAND_QUEUED, sizeof(unsigned long long), &kernelEventQueued, NULL);
+  clGetEventProfilingInfo(evt, CL_PROFILING_COMMAND_SUBMIT, sizeof(unsigned long long), &kernelEventSubmit, NULL);
+  clGetEventProfilingInfo(evt, CL_PROFILING_COMMAND_START, sizeof(unsigned long long), &kernelEventStart, NULL);
+  clGetEventProfilingInfo(evt, CL_PROFILING_COMMAND_END, sizeof(unsigned long long), &kernelEventEnd, NULL);
+  cl_ulong exectime_ns = kernelEventEnd-kernelEventQueued;
+  return (float)exectime_ns;
+}
+
+// Get execution time between Queueing of first and ending of last
+float ocl_get_exec_time2_ns(cl_event evt_first, cl_event evt_last)
+{
+  cl_ulong firstQueued;
+  cl_ulong lastEnd;
+  clGetEventProfilingInfo(evt_first, CL_PROFILING_COMMAND_QUEUED, sizeof(unsigned long long), &firstQueued, NULL);
+  clGetEventProfilingInfo(evt_last, CL_PROFILING_COMMAND_END, sizeof(unsigned long long), &lastEnd, NULL);
+  cl_ulong exectime_ns = lastEnd-firstQueued;
+  return (float)exectime_ns;
+}
+
+struct speed ocl_readspeed(char * buf,int block_bytes,int bytes) 
+{
+  int num_xfers = bytes / block_bytes;
+
+  assert(num_xfers>0);
+
+  cl_event *evt = new cl_event[(size_t)num_xfers];
+
+  for (int i = 0 ; i < num_xfers; i++)
+  {
+
+    // read the input
+    status = clEnqueueReadBuffer(queue, kernel_input, CL_TRUE, (size_t)(i*block_bytes), (size_t)block_bytes, (void*)&buf[i*block_bytes], 0, NULL, &evt[i]);
+    if(status != CL_SUCCESS) dump_error("Failed to enqueue buffer.", status);
+
+  }
+
+  // Make sure everything is done
+  clFinish(queue);
+
+  struct speed speed;
+  speed.average = 0.0f;
+  speed.fastest = 0.0f;
+  speed.slowest = 10000000.0f;
+  speed.total = (float)((float)bytes * 1000.0f / 
+      ocl_get_exec_time2_ns(evt[0],evt[num_xfers-1]));
+
+  for (int i = 0 ; i < num_xfers; i++)
+  {
+    float time_ns = ocl_get_exec_time_ns(evt[i]);
+    float speed_MBps = (float)block_bytes * 1000.0f / time_ns;
+
+    if ( speed_MBps > speed.fastest)
+      speed.fastest = speed_MBps;
+    if ( speed_MBps < speed.slowest)
+      speed.slowest = speed_MBps;
+
+    speed.average += time_ns;
+    clReleaseEvent(evt[i]);
+  }
+  speed.average = (float)((float)bytes * 1000.0f / speed.average);
+
+  delete [] evt;
+  return speed;
+}
+
+struct speed ocl_writespeed(char * buf,int block_bytes,int bytes)
+{
+  int num_xfers = bytes / block_bytes;
+
+  assert(num_xfers>0);
+
+  cl_event *evt = new cl_event[(size_t)num_xfers];
+
+  for (int i = 0 ; i < num_xfers; i++)
+  {
+    // Write the input
+    status = clEnqueueWriteBuffer(queue, kernel_input, CL_TRUE, (size_t)(i*block_bytes), (size_t)block_bytes, (void*)&buf[i*block_bytes], 0, NULL, &evt[i]);
+    if(status != CL_SUCCESS) dump_error("Failed to enqueue buffer write.", status);
+  }
+
+  // Make sure everything is done
+  clFinish(queue);
+
+  struct speed speed;
+  speed.average = 0.0f;
+  speed.fastest = 0.0f;
+  speed.slowest = 10000000.0f;
+
+  speed.total = (float)((float)bytes * 1000.0f / 
+      ocl_get_exec_time2_ns(evt[0],evt[num_xfers-1]));
+
+  for (int i = 0 ; i < num_xfers; i++)
+  {
+    float time_ns = ocl_get_exec_time_ns(evt[i]);
+    float speed_MBps = (float)block_bytes * 1000.0f / time_ns;
+
+    if ( speed_MBps > speed.fastest)
+      speed.fastest = speed_MBps;
+    if ( speed_MBps < speed.slowest)
+      speed.slowest = speed_MBps;
+
+    speed.average += time_ns;
+    clReleaseEvent(evt[i]);
+  }
+  speed.average = (float)((float)bytes * 1000.0f / speed.average);
+
+  delete [] evt;
+  return speed;
+}
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.h
new file mode 100755
index 0000000000000000000000000000000000000000..2839328a0141a08eb16bbc881841badb11348d1a
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/diagnostic/ocl.h
@@ -0,0 +1,29 @@
+/* (C) 1992-2018 Intel Corporation.                             */
+/* Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words     */
+/* and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.   */
+/* and/or other countries. Other marks and brands may be claimed as the property   */
+/* of others. See Trademarks on intel.com for full list of Intel trademarks or     */
+/* the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera)  */
+/* Your use of Intel Corporation's design tools, logic functions and other         */
+/* software and tools, and its AMPP partner logic functions, and any output        */
+/* files any of the foregoing (including device programming or simulation          */
+/* files), and any associated documentation or information are expressly subject   */
+/* to the terms and conditions of the Altera Program License Subscription          */
+/* Agreement, Intel MegaCore Function License Agreement, or other applicable       */
+/* license agreement, including, without limitation, that your use is for the      */
+/* sole purpose of programming logic devices manufactured by Intel and sold by     */
+/* Intel or its authorized distributors.  Please refer to the applicable           */
+/* agreement for further details.                                                  */
+
+
+struct speed {
+  float fastest;
+  float slowest;
+  float average;
+  float total;
+};
+
+void ocl_device_init( char * device_name, int maxbytes);
+struct speed ocl_readspeed(char * buf,int block_bytes,int bytes);
+struct speed ocl_writespeed(char * buf,int block_bytes,int bytes);
+int ocl_test_all_global_memory( );
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/Makefile b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/Makefile
new file mode 100755
index 0000000000000000000000000000000000000000..19b4b60c123f45feba2dfd5b862bafb13dd71522
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/Makefile
@@ -0,0 +1,34 @@
+ECHO = @
+CXX = g++ -o 
+CPPFLAGS = -DOPTION3=1 -DACL_USE_DMA=1 -DACL_COMPILER_IS_MSVC=0 -Wall -Wno-unknown-pragmas -Wno-delete-non-virtual-dtor -D__USE_XOPEN2K8 -Werror -DACL_HAS_STDLIB_STDIO -DACL_HOST_RUNTIME_IS_STATIC=0 -DACL_OPENCL_HOST_SYS=linux -DACL_OPENCL_HOST_BIT=64 -DACL_TARGET_SYS=linux -DACL_TARGET_BIT=64 -DLINUX -I. -I../../include -I$(INTELFPGAOCLSDKROOT)/host/include
+CXXFLAGS = -fPIC -m64
+
+LINKER = g++
+LINKER_LIBDIRARGS = -L$(TOP_DEST_DIR)/linux64/lib -L$(INTELFPGAOCLSDKROOT)/host/linux64/lib
+LINKER_ARGS = -z noexecstack -Wl,-z,relro,-z,now -Wl,-Bsymbolic -fPIC -Wl,--no-undefined -Wl,--exclude-libs,ALL -m64
+LINK_LIBS = -lalteracl -lelf -lalterahalmmd -l$(MMD_LIB_NAME)
+INCORPORATE_LIBS = 
+PREBUILT_OBJS = 
+
+PERVASIVE_DEPENDENCIES = ../../include/aocl_mmd.h
+
+MT = 
+
+EXEFILE = program 
+
+OBJ_EXT = o
+OBJS = $(patsubst %.cpp,%.$(OBJ_EXT),$(wildcard *.cpp))
+OBJ_DIR?= .
+OBJ_FILES = $(addprefix $(OBJ_DIR)$(PS),$(OBJS))
+
+
+
+
+CUR_REL_PATH = ../..
+
+INSTALL_DIR = $(TOP_DEST_DIR)$(PS)linux64$(PS)libexec
+TARGET_FILES = $(EXEFILE)
+SUB_DIRS =
+
+include $(CUR_REL_PATH)/Makefile.common
+
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/board.h b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/board.h
new file mode 100755
index 0000000000000000000000000000000000000000..61f166a64c718c4fc8d88a1c2b79bc7400e139fb
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/board.h
@@ -0,0 +1,22 @@
+#ifndef __BOARD_H
+#define __BOARD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "CL/opencl.h"
+
+extern CL_API_ENTRY cl_program CL_API_CALL
+clCreateProgramWithBinaryAndProgramDeviceIntelFPGA(cl_context                     /* context */,
+                                 cl_uint                        /* num_devices */,
+                                 const cl_device_id *           /* device_list */,
+                                 const size_t *                 /* lengths */,
+                                 const unsigned char **         /* binaries */,
+                                 cl_int *                       /* binary_status */,
+                                 cl_int *                       /* errcode_ret */) CL_API_SUFFIX__VERSION_1_0;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/reprogram.cpp b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/reprogram.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..d27c78d8fa830c0f0cb2f229c6dce9ae318a8e41
--- /dev/null
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/source/util/reprogram/reprogram.cpp
@@ -0,0 +1,231 @@
+// (C) 1992-2018 Intel Corporation.                            
+// Intel, the Intel logo, Intel, MegaCore, NIOS II, Quartus and TalkBack words    
+// and logos are trademarks of Intel Corporation or its subsidiaries in the U.S.  
+// and/or other countries. Other marks and brands may be claimed as the property  
+// of others. See Trademarks on intel.com for full list of Intel trademarks or    
+// the Trademarks & Brands Names Database (if Intel) or See www.Intel.com/legal (if Altera) 
+// Your use of Intel Corporation's design tools, logic functions and other        
+// software and tools, and its AMPP partner logic functions, and any output       
+// files any of the foregoing (including device programming or simulation         
+// files), and any associated documentation or information are expressly subject  
+// to the terms and conditions of the Altera Program License Subscription         
+// Agreement, Intel MegaCore Function License Agreement, or other applicable      
+// license agreement, including, without limitation, that your use is for the     
+// sole purpose of programming logic devices manufactured by Intel and sold by    
+// Intel or its authorized distributors.  Please refer to the applicable          
+// agreement for further details.                                                 
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+// ACL specific includes
+#include "board.h"
+
+// ACL runtime configuration
+static cl_platform_id platform;
+static cl_device_id device;
+static cl_context context;
+static cl_program program;
+static cl_int status;
+
+/* return 1 if given filename has given extension */
+int filename_has_ext (const char *filename, const char *ext)
+{
+   size_t ext_len = strlen (ext);  
+   return (strcmp (filename + strlen(filename) - ext_len, ext) == 0);
+}
+
+int is_fpga_bin( const char* filename)
+{
+  if (filename_has_ext (filename, ".bin") || 
+      filename_has_ext (filename, ".BIN") ) {
+    return 1;
+  }
+  return 0;
+}
+
+int is_aocx( const char* filename)
+{
+  if (filename_has_ext (filename, ".aocx") || 
+      filename_has_ext (filename, ".AOCX") ) {
+    return 1;
+  }
+  return 0;
+}
+
+/* given filename, load its content into memory.
+ * Returns file size in file_size_out ptr and ptr to buffer (allocated
+ * with malloc() by this function that contains the content of the file.*/
+unsigned char *acl_loadFileIntoMemory (const char *in_file, size_t *file_size_out) {
+
+  FILE *f = NULL;
+  unsigned char *buf;
+  size_t file_size;
+  
+  // When reading as binary file, no new-line translation is done.
+  f = fopen (in_file, "rb");
+  if (f == NULL) {
+    fprintf (stderr, "Couldn't open file %s for reading\n", in_file);
+    return NULL;
+  }
+  
+  // get file size
+  fseek (f, 0, SEEK_END);
+  file_size = (size_t)ftell (f);
+  rewind (f);
+  
+  // slurp the whole file into allocated buf
+  buf = (unsigned char*) malloc (sizeof(char) * file_size);
+  *file_size_out = fread (buf, sizeof(char), file_size, f);
+  fclose (f);
+  
+  if (*file_size_out != file_size) {
+    fprintf (stderr, "Error reading %s. Read only %lu out of %lu bytes\n", 
+                     in_file, *file_size_out, file_size);
+    return NULL;
+  }
+  return buf;
+}
+
+static void dump_error(const char *str, cl_int status) {
+  printf("%s\n", str);
+  printf("Error code: %d\n", status);
+}
+
+// Set to false to temporarily disable printing of error notification callbacks
+bool g_enable_notifications = true;
+void ocl_notify(
+    const char *errinfo, 
+    const void *private_info, 
+    size_t cb, 
+    void *user_data) {
+  if(g_enable_notifications) {
+    printf("  OpenCL Notification Callback:");
+    printf(" %s\n", errinfo);
+  }
+}
+
+
+
+int main(int argc, char ** argv){
+
+   char *device_name = NULL;
+   char *fpga_bin_filename_from_cmd = NULL;
+   char *aocx_filename_from_cmd = NULL;
+
+   unsigned char *fpga_bin_file = NULL;
+   size_t fpga_bin_filesize;
+  
+   unsigned char *aocx_file = NULL;
+   size_t aocx_filesize;
+
+   cl_uint num_platforms;
+   cl_uint num_devices;
+
+   if ( argc != 4 ) {
+      printf("Error: Invalid number of arguments.\n");
+      return 1;
+   }
+
+   device_name = argv[1];
+   fpga_bin_filename_from_cmd = argv[2];
+   aocx_filename_from_cmd = argv[3];  
+ 
+   if ( !is_fpga_bin(fpga_bin_filename_from_cmd) ) {
+      printf("Error: No binary loaded to create program.\n");
+      return 1;
+   }
+
+   fpga_bin_file = acl_loadFileIntoMemory(fpga_bin_filename_from_cmd, &fpga_bin_filesize);   
+   if ( fpga_bin_file == NULL ) {
+      printf("Error: Unable to load BIN file into memory.\n");
+      return 1;
+   }
+
+   aocx_file = acl_loadFileIntoMemory(aocx_filename_from_cmd,&aocx_filesize); 
+   if (aocx_file == NULL) 
+   {
+     printf("Error: Failed to find aocx\n");
+     exit(-1);
+   }
+
+   // get the platform ID
+   status = clGetPlatformIDs(1, &platform, &num_platforms);
+   if(status != CL_SUCCESS) {
+     dump_error("Failed clGetPlatformIDs.", status);
+   }
+
+   // get the number of devices
+   status = clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, 0, NULL, &num_devices);
+   if(status != CL_SUCCESS) {
+     dump_error("Failed clGetDeviceIDs.", status);
+   }
+
+   cl_device_id * devices = (cl_device_id*) malloc(num_devices*sizeof(cl_device_id));
+
+   // get the device IDs
+   status = clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, num_devices, devices, NULL);
+   if(status != CL_SUCCESS) {
+     dump_error("Failed clGetDeviceIDs.", status);
+   }
+
+   bool found = false;
+
+   // Look through all the devices for the one that ends with
+   // "(device_name)" since we know that the MMD as implemented in
+   // acl_pcie.cpp tacks this on to the ACL_BOARD_NAME in hw_pcie_constants.h
+   for ( unsigned d = 0; d < num_devices; d++ ) {
+
+     char dev_name_string[1024];
+     status = clGetDeviceInfo(devices[d], CL_DEVICE_NAME, sizeof(dev_name_string), (void*)&dev_name_string[0], NULL);
+
+     char phys_dev_substring[256];
+     strcpy(phys_dev_substring,"(");
+     strcat(phys_dev_substring,device_name);
+     strcat(phys_dev_substring,")");
+
+     char * found_substr = NULL;
+     if ( (found_substr = strstr(dev_name_string, phys_dev_substring)) != NULL  &&
+          *(found_substr + strlen(phys_dev_substring)) == '\0' ) {
+       device = devices[d];
+       found = true;
+
+       printf("Programming device: %s\n",dev_name_string);
+
+       break;
+     }
+
+   }
+
+   // Error out if none found
+   if( ! found ) {
+     printf("Failed to find requested device %s from %d devices\n", device_name, num_devices);
+     return 1;
+   }
+
+   // create a context
+   context = clCreateContext(0, 1, &device, &ocl_notify, NULL, &status);
+   if(status != CL_SUCCESS) {
+     dump_error("Failed clCreateContext.", status);
+     return 1;
+   }
+
+   // create the program
+   // 
+   // This is a special function that works the same as clCreateProgramWithBinary,
+   // but always forces a device program operation at the end and returns whether
+   // the device program operation was successful.
+   // 
+   cl_int kernel_status;
+   program = clCreateProgramWithBinaryAndProgramDeviceIntelFPGA(context, 1, &device,
+     &aocx_filesize, (const unsigned char**) &aocx_file, &kernel_status, &status);
+   if(status != CL_SUCCESS) {
+     dump_error("Failed clCreateProgramWithBinary.", status);
+     return 1;
+   }
+
+   printf("Program succeed. \n");
+   return 0;
+}
diff --git a/boards/uniboard2b/designs/unb2b_minimal/doc/README b/boards/uniboard2b/designs/unb2b_minimal/doc/README
index eb5cae66ce7da505c28e903530687f401ab34072..489b8ccd8e3bfb93ead3b70436a8a570d7d28850 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/doc/README
+++ b/boards/uniboard2b/designs/unb2b_minimal/doc/README
@@ -5,8 +5,9 @@ On uni-boards 26287-001..26287-005 (unb2b) the used FPGA is '10AX115U2F45E1SG'
 
 
 -> In case of a new installation, the IP's have to be generated for Arria10.
-   In the: $RADIOHDL_WORK/libraries/technology/ip_arria10
-   directory; run the bash script: ./generate-all-ip.sh
+   cd ~/git/hdl
+   . init_hdl.sh
+   generate_ip_libs unb2b
 
 -> For compilation it might be necessary to check the .vhd file:
    $RADIOHDL_WORK/libraries/technology/technology_select_pkg.vhd
@@ -16,11 +17,12 @@ On uni-boards 26287-001..26287-005 (unb2b) the used FPGA is '10AX115U2F45E1SG'
 -> Make sure you use the modified avs2_eth_coe_hw.tcl (see attachment of this e-mail), this file is placed in RadioHDL/trunk/libraries/io/eth/src/vhdl.
 
 1. Start with the Oneclick Commands:
-    python $RADIOHDL_WORK/tools/oneclick/base/modelsim_config.py -t unb2b
-    python $RADIOHDL_WORK/tools/oneclick/base/quartus_config.py -t unb2b
+    cd ~/git/hdl
+    . init_hdl.sh
+    quartus_config
 
 # 2. Generate MMM for QSYS:
-#     run_qsys unb2b unb2b_minimal
+    run_qsys unb2b unb2b_minimal
 
 3. -> From here either continue to Modelsim (simulation) or Quartus (synthesis)
 
diff --git a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/unb2b_minimal.vhd b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/unb2b_minimal.vhd
index d4a92b9ad45754f2f2824b07c2830fea8fda883e..f35aaa30f30e30d959d0286b895bc1943364df0d 100644
--- a/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/unb2b_minimal.vhd
+++ b/boards/uniboard2b/designs/unb2b_minimal/src/vhdl/unb2b_minimal.vhd
@@ -38,7 +38,7 @@ ENTITY unb2b_minimal IS
     g_sim_node_nr       : NATURAL := 0;
     g_stamp_date        : NATURAL := 0;  -- Date (YYYYMMDD) -- set by QSF
     g_stamp_time        : NATURAL := 0;  -- Time (HHMMSS)   -- set by QSF
-    g_stamp_svn         : NATURAL := 0;  -- SVN revision    -- set by QSF
+    g_revision_id       : STRING  := "";  -- revision id     -- set by QSF
     g_factory_image     : BOOLEAN := TRUE;
     g_protect_addr_range: BOOLEAN := FALSE
   );
@@ -168,7 +168,7 @@ BEGIN
     g_design_note        => g_design_note,
     g_stamp_date         => g_stamp_date,
     g_stamp_time         => g_stamp_time, 
-    g_stamp_svn          => g_stamp_svn, 
+    g_revision_id        => g_revision_id,
     g_fw_version         => c_fw_version,
     g_mm_clk_freq        => c_mm_clk_freq,
     g_eth_clk_freq       => c_unb2b_board_eth_clk_freq_125M,
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
index e090188b68e0ca6f3641740f7f6c205fdf70625b..d268fcb494f3c4c02f8538e52a8f0f78f70a9c75 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/ctrl_unb2b_board.vhd
@@ -47,7 +47,7 @@ ENTITY ctrl_unb2b_board IS
     g_fw_version     : t_unb2b_board_fw_version := (0, 0);  -- firmware version x.y
     g_stamp_date     : NATURAL := 0;
     g_stamp_time     : NATURAL := 0;
-    g_stamp_svn      : NATURAL := 0;
+    g_revision_id    : STRING  := "";  -- revision_id, commit hash (first 9 chars) or number
     g_design_note    : STRING  := "UNUSED";
     g_base_ip        : STD_LOGIC_VECTOR(16-1 DOWNTO 0) := X"0A63"; -- Base IP address used by unb_osy: 10.99.xx.yy
     g_mm_clk_freq    : NATURAL := c_unb2b_board_mm_clk_freq_125M;
@@ -492,7 +492,7 @@ BEGIN
     g_fw_version  => g_fw_version,
     g_stamp_date  => g_stamp_date,
     g_stamp_time  => g_stamp_time,
-    g_stamp_svn   => g_stamp_svn,
+    g_revision_id => g_revision_id,
     g_design_note => g_design_note,
     g_rom_version => c_rom_version
   )
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/mms_unb2b_board_system_info.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/mms_unb2b_board_system_info.vhd
index 70bb6369912db34360db823a7853b0287e6a1dc4..2f8ae8ae6e800fe2332542f72be05cabacb5a934 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/mms_unb2b_board_system_info.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/mms_unb2b_board_system_info.vhd
@@ -34,7 +34,7 @@ ENTITY mms_unb2b_board_system_info IS
     g_fw_version  : t_unb2b_board_fw_version := c_unb2b_board_fw_version;  -- firmware version x.y
     g_stamp_date  : NATURAL := 0;
     g_stamp_time  : NATURAL := 0;
-    g_stamp_svn   : NATURAL := 0;
+    g_revision_id : STRING  := "";
     g_design_note : STRING  := "";
     g_rom_version : NATURAL := 1;
     g_aux         : t_c_unb2b_board_aux := c_unb2b_board_aux               -- aux contains the hardware version
@@ -109,7 +109,7 @@ BEGIN
     g_design_name => g_design_name,
     g_stamp_date  => g_stamp_date,
     g_stamp_time  => g_stamp_time,
-    g_stamp_svn   => g_stamp_svn,
+    g_revision_id => g_revision_id,
     g_design_note => g_design_note
   )    
   PORT MAP (       
diff --git a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_system_info_reg.vhd b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_system_info_reg.vhd
index 53069eb29e865d0d4bba87ca25619bd48301323b..22a1996fee309f389db4cf1b84da6d4d084c3916 100644
--- a/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_system_info_reg.vhd
+++ b/boards/uniboard2b/libraries/unb2b_board/src/vhdl/unb2b_board_system_info_reg.vhd
@@ -55,7 +55,7 @@ ENTITY unb2b_board_system_info_reg IS
     g_design_name : STRING;
     g_stamp_date  : NATURAL := 0;
     g_stamp_time  : NATURAL := 0;
-    g_stamp_svn   : NATURAL := 0;
+    g_revision_id : STRING;
     g_design_note : STRING
   );
   PORT (
@@ -76,11 +76,19 @@ ARCHITECTURE rtl OF unb2b_board_system_info_reg IS
 
   CONSTANT c_nof_fixed_regs       : NATURAL := 2;  -- info, use_phy
   CONSTANT c_nof_design_name_regs : NATURAL := 13; -- design_name
-  CONSTANT c_nof_stamp_regs       : NATURAL := 3;  -- date, time, svn rev
+  CONSTANT c_nof_stamp_regs       : NATURAL := 2;  -- date, time
+  CONSTANT c_nof_revision_id_regs : NATURAL := 3;  -- revision id, commit hash or id (hash: first 9 chars of the 40chars commit hash)
   CONSTANT c_nof_design_note_regs : NATURAL := 13; -- note
 
-  CONSTANT c_nof_regs             : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_design_note_regs;
+  CONSTANT c_info_reg             : NATURAL := 0;
+  CONSTANT c_use_phy_reg          : NATURAL := 1;
+  CONSTANT c_design_name_offset   : NATURAL := c_nof_fixed_regs;
+  CONSTANT c_stamp_date_offset    : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs;
+  CONSTANT c_stamp_time_offset    : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + 1;
+  CONSTANT c_revision_id_offset   : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs;
+  CONSTANT c_design_note_offset   : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_revision_id_regs;
 
+  CONSTANT c_nof_regs      : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_revision_id_regs + c_nof_design_note_regs;
   CONSTANT c_mm_reg        : t_c_mem := (latency  => 1,
                                          adr_w    => ceil_log2(c_nof_regs),
                                          dat_w    => c_word_w,       -- Use MM bus data width = c_word_w = 32 for all MM registers
@@ -91,6 +99,7 @@ ARCHITECTURE rtl OF unb2b_board_system_info_reg IS
   CONSTANT c_use_phy       : STD_LOGIC_VECTOR(c_use_phy_w-1 DOWNTO 0) := (OTHERS=> '0'); -- Unused but keep for compatibillity
 
   CONSTANT c_design_name    : t_slv_32_arr(0 TO c_nof_design_name_regs-1) := str_to_ascii_slv_32_arr(g_design_name, c_nof_design_name_regs);
+  CONSTANT c_revision_id    : t_slv_32_arr(0 TO c_nof_revision_id_regs-1) := str_to_ascii_slv_32_arr(g_revision_id, c_nof_revision_id_regs);
   CONSTANT c_design_note    : t_slv_32_arr(0 TO c_nof_design_note_regs-1) := str_to_ascii_slv_32_arr(g_design_note, c_nof_design_note_regs);
  
 BEGIN
@@ -111,27 +120,29 @@ BEGIN
         sla_out.rdval <= '1';               -- c_mm_reg.latency = 1
 
         vA := TO_UINT(sla_in.address(c_mm_reg.adr_w-1 DOWNTO 0));
-        IF vA = 0 THEN         
+        IF vA = c_info_reg THEN
           sla_out.rddata(c_word_w-1 DOWNTO 0) <= info;
           -- Use bit 11 to indicate that we're using the MM bus (not the info SLV).
           -- Using the MM bus enables user to also read use_phy, design_name etc.
           sla_out.rddata(11) <= '1';
-        ELSIF vA = 1 THEN  
+
+        ELSIF vA = c_use_phy_reg THEN
           sla_out.rddata(c_use_phy_w-1 DOWNTO 0) <= c_use_phy;
-        ELSIF vA < c_nof_fixed_regs + c_nof_design_name_regs THEN      
-          sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_name(vA-c_nof_fixed_regs);
 
-        ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs THEN      
+        ELSIF vA < c_design_name_offset + c_nof_design_name_regs THEN
+          sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_name(vA - c_design_name_offset);
+
+        ELSIF vA = c_stamp_date_offset THEN
           sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_date, c_word_w);
 
-        ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs+1 THEN      
+        ELSIF vA = c_stamp_time_offset THEN
           sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_time, c_word_w);
 
-        ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs+2 THEN      
-          sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_svn, c_word_w);
+        ELSIF vA < c_revision_id_offset + c_nof_revision_id_regs THEN                                                                                                                                                 
+          sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_revision_id(vA - c_revision_id_offset);
 
-        ELSIF vA < c_nof_fixed_regs + c_nof_design_name_regs+c_nof_stamp_regs+c_nof_design_note_regs THEN      
-          sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_note(vA-c_nof_fixed_regs-c_nof_design_name_regs-c_nof_stamp_regs);
+        ELSIF vA < c_design_note_offset + c_nof_design_note_regs THEN
+          sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_note(vA - c_design_note_offset);
 
         END IF;
 
diff --git a/libraries/base/dp/hdllib.cfg b/libraries/base/dp/hdllib.cfg
index 1689245fe97b9465097ba3446027669b5891c40a..864bb29d1acdfba549ed7fafb99a0c5a7b027f47 100644
--- a/libraries/base/dp/hdllib.cfg
+++ b/libraries/base/dp/hdllib.cfg
@@ -51,6 +51,7 @@ synth_files =
     src/vhdl/dp_fifo_fill_dc.vhd
     src/vhdl/dp_fifo_fill.vhd
     src/vhdl/dp_fifo_fill_reg.vhd
+    src/vhdl/dp_fifo_fill_eop.vhd
     src/vhdl/dp_fifo_to_mm.vhd
     src/vhdl/dp_fifo_to_mm_reg.vhd
     src/vhdl/dp_fifo_from_mm.vhd
@@ -191,6 +192,7 @@ test_bench_files =
     tb/vhdl/tb_dp_distribute.vhd
     tb/vhdl/tb_dp_example_dut.vhd
     tb/vhdl/tb_dp_fifo_fill.vhd
+    tb/vhdl/tb_dp_fifo_fill_eop.vhd
     tb/vhdl/tb_mms_dp_fifo_fill.vhd
     tb/vhdl/tb_dp_fifo_fill_sc.vhd
     tb/vhdl/tb_dp_fifo_info.vhd
diff --git a/libraries/base/dp/src/vhdl/dp_fifo_fill_eop.vhd b/libraries/base/dp/src/vhdl/dp_fifo_fill_eop.vhd
index dcebc6288bd85298d199de6da70e72779bedf1ac..c8e3d4e667ff1a49202863cf048f982bb954f2f3 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_fill_eop.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_fill_eop.vhd
@@ -122,7 +122,7 @@ ARCHITECTURE rtl OF dp_fifo_fill_eop IS
  
   SIGNAL received_eop : BOOLEAN := FALSE;
   SIGNAL nxt_received_eop : BOOLEAN := FALSE;
-  
+  SIGNAL crossed_domain_snk_in_eop : STD_LOGIC := '0';
 BEGIN
 
   -- Output monitor FIFO filling
@@ -136,6 +136,7 @@ BEGIN
   rd_fill_ctrl <= rd_fill_32b(c_fifo_size_w-1 DOWNTO 0);
 
   gen_dp_fifo_sc : IF g_use_dual_clock=FALSE GENERATE
+    crossed_domain_snk_in_eop <= snk_in.eop;
     u_dp_fifo_sc : ENTITY work.dp_fifo_sc
     GENERIC MAP (
       g_technology     => g_technology,
@@ -173,7 +174,17 @@ BEGIN
     wr_fifo_usedw <= rd_fifo_usedw;
   END GENERATE;
   
-  gen_dp_fifo_dc : IF g_use_dual_clock=TRUE GENERATE
+  gen_dp_fifo_dc : IF g_use_dual_clock=TRUE GENERATE  
+    u_common_spulse : ENTITY common_lib.common_spulse
+    PORT MAP (
+      in_rst  => wr_rst,
+      in_clk  => wr_clk,
+      in_pulse  => snk_in.eop,
+      out_rst => rd_rst,
+      out_clk => rd_clk,
+      out_pulse => crossed_domain_snk_in_eop
+    );
+
     u_dp_fifo_dc : ENTITY work.dp_fifo_dc
     GENERIC MAP (
       g_technology     => g_technology,
@@ -218,7 +229,7 @@ BEGIN
   END GENERATE;  -- no_fill
   
   gen_fill : IF g_fifo_fill>0 GENERATE
-  
+ 
     src_out <= i_src_out;
     
     p_rd_clk: PROCESS(rd_clk, rd_rst)
@@ -232,7 +243,11 @@ BEGIN
         xon_reg   <= nxt_xon_reg;
         state     <= nxt_state;
         i_src_out <= nxt_src_out;
-        received_eop <= nxt_received_eop;
+        IF crossed_domain_snk_in_eop = '1' THEN
+          received_eop <= TRUE;
+        ELSE
+          received_eop <= nxt_received_eop;
+        END IF;
       END IF;
     END PROCESS;
     
@@ -242,7 +257,7 @@ BEGIN
       p_state : PROCESS(state, rd_sosi, src_in, xon_reg, rd_fifo_usedw, rd_fill_ctrl, received_eop)
       BEGIN
         nxt_state <= state;
-        
+        nxt_received_eop <= received_eop;
         rd_siso <= src_in;  -- default acknowledge (RL=1) this input when output is ready
         
         -- The output register stage increase RL=0 to 1, so it matches RL = 1 for src_in.ready
@@ -252,12 +267,6 @@ BEGIN
         nxt_src_out.eop   <= '0';
         nxt_src_out.sync  <= '0';
 
-        IF snk_in.eop = '1' THEN
-          nxt_received_eop <= TRUE;
-        ELSE
-          nxt_received_eop <= received_eop;
-        END IF;        
-
         CASE state IS
           WHEN s_idle =>
             IF xon_reg='0' THEN
@@ -302,7 +311,7 @@ BEGIN
               nxt_state <= s_idle;
             END IF;
         END CASE;
-        
+ 
         -- Pass on frame level flow control
         rd_siso.xon <= src_in.xon;
       END PROCESS;
@@ -329,7 +338,8 @@ BEGIN
       p_state : PROCESS(state, src_in, xon_reg, pend_src_out, rd_fifo_usedw, rd_fill_ctrl, received_eop)
       BEGIN
         nxt_state <= state;
-        
+        nxt_received_eop <= received_eop;
+
         hold_src_in <= src_in;  -- default request (RL=1) new input when output is ready
         
         -- The output register stage matches RL = 1 for src_in.ready
@@ -338,12 +348,6 @@ BEGIN
         nxt_src_out.sop   <= '0';
         nxt_src_out.eop   <= '0';
         nxt_src_out.sync  <= '0';
-       
-        IF snk_in.eop = '1' THEN
-          nxt_received_eop <= TRUE;
-        ELSE
-          nxt_received_eop <= received_eop;
-        END IF;
  
         CASE state IS
           WHEN s_idle =>
@@ -389,7 +393,7 @@ BEGIN
               nxt_state <= s_idle;
             END IF;
         END CASE;
-        
+
         -- Pass on frame level flow control
         hold_src_in.xon <= src_in.xon;
       END PROCESS;