diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd index ae271ee613332fceee60cd871908b4d6690bd0a9..a4db59cf5630f2f88b8e75935bffdf75d9109243 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd @@ -32,13 +32,14 @@ USE IEEE.NUMERIC_STD.ALL; USE common_lib.common_pkg.ALL; USE common_lib.common_mem_pkg.ALL; USE technology_lib.technology_pkg.ALL; +USE technology_lib.technology_select_pkg.ALL; USE diag_lib.diag_pkg.ALL; USE dp_lib.dp_stream_pkg.ALL; USE work.sdp_pkg.ALL; ENTITY node_sdp_adc_input_and_timing IS GENERIC ( - g_technology : NATURAL := c_tech_arria10_e1sg; + g_technology : NATURAL := c_tech_select_default; g_buf_nof_data : NATURAL := c_sdp_V_si_db; g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation g_sim : BOOLEAN := FALSE @@ -162,7 +163,7 @@ BEGIN u_jesd204b: ENTITY tech_jesd204b_lib.tech_jesd204b GENERIC MAP( - g_sim => g_sim, + g_sim => g_sim, g_nof_streams => c_sdp_S_pn, g_nof_sync_n => c_sdp_S_pn/c_sdp_S_rcu, -- = 12/3 = 4 g_jesd_freq => c_sdp_jesd204b_freq diff --git a/libraries/technology/jesd204b/tech_jesd204b.vhd b/libraries/technology/jesd204b/tech_jesd204b.vhd index 5858abfe17a9bddd203425eff8b8d32aab0a6a9e..96ba775aea6096cd7a8ece8a3caf477462ebe151 100644 --- a/libraries/technology/jesd204b/tech_jesd204b.vhd +++ b/libraries/technology/jesd204b/tech_jesd204b.vhd @@ -58,7 +58,7 @@ USE work.tech_jesd204b_component_pkg.ALL; ENTITY tech_jesd204b IS GENERIC ( g_sim : BOOLEAN := FALSE; - g_technology : NATURAL := c_tech_arria10_e1sg; + g_technology : NATURAL := c_tech_select_default; g_nof_streams : NATURAL := 12; g_nof_sync_n : NATURAL := 12; g_direction : STRING := "RX_ONLY"; -- "TX_RX", "TX_ONLY", "RX_ONLY"