From b8d3348763fc64bda153f267811fc61fd42c2345 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Tue, 27 May 2014 09:29:53 +0000
Subject: [PATCH] Need to declare IP libraries to ensure default binding in
simulation. The IP library clause is ignored by synthesis.
---
libraries/technology/memory/memory_ram_cr_cw.vhd | 3 +++
libraries/technology/memory/memory_ram_crwk_crw.vhd | 3 +++
libraries/technology/memory/memory_ram_r_w.vhd | 3 +++
libraries/technology/memory/memory_rom_r.vhd | 3 +++
4 files changed, 12 insertions(+)
diff --git a/libraries/technology/memory/memory_ram_cr_cw.vhd b/libraries/technology/memory/memory_ram_cr_cw.vhd
index b66a7bb8cf..b92d90e8a4 100644
--- a/libraries/technology/memory/memory_ram_cr_cw.vhd
+++ b/libraries/technology/memory/memory_ram_cr_cw.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
ENTITY memory_ram_cr_cw IS
GENERIC (
g_technology : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_ram_crwk_crw.vhd b/libraries/technology/memory/memory_ram_crwk_crw.vhd
index af93ce80d2..1283214ced 100644
--- a/libraries/technology/memory/memory_ram_crwk_crw.vhd
+++ b/libraries/technology/memory/memory_ram_crwk_crw.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
ENTITY memory_ram_crwk_crw IS -- support different port data widths and corresponding address ranges
GENERIC (
g_technology : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_ram_r_w.vhd b/libraries/technology/memory/memory_ram_r_w.vhd
index 8c724eb971..50a755d7ea 100644
--- a/libraries/technology/memory/memory_ram_r_w.vhd
+++ b/libraries/technology/memory/memory_ram_r_w.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
ENTITY memory_ram_r_w IS
GENERIC (
g_technology : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_rom_r.vhd b/libraries/technology/memory/memory_rom_r.vhd
index c30fa5e4d3..97e24373dd 100644
--- a/libraries/technology/memory/memory_rom_r.vhd
+++ b/libraries/technology/memory/memory_rom_r.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
ENTITY memory_rom_r IS
GENERIC (
g_technology : NATURAL := c_tech_select_default;
--
GitLab