diff --git a/libraries/technology/memory/memory_ram_cr_cw.vhd b/libraries/technology/memory/memory_ram_cr_cw.vhd
index b66a7bb8cf810e294a8f1d54fb3e6b76180c15c3..b92d90e8a4f707720d912c755042f975cdf5e144 100644
--- a/libraries/technology/memory/memory_ram_cr_cw.vhd
+++ b/libraries/technology/memory/memory_ram_cr_cw.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
 USE technology_lib.technology_pkg.ALL;
 USE technology_lib.technology_select_pkg.ALL;
 
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
 ENTITY memory_ram_cr_cw IS
   GENERIC (
     g_technology : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_ram_crwk_crw.vhd b/libraries/technology/memory/memory_ram_crwk_crw.vhd
index af93ce80d28223bb57d4e264440eec2a1c63de15..1283214ced1fc01b741928e36c4f180b73759ccf 100644
--- a/libraries/technology/memory/memory_ram_crwk_crw.vhd
+++ b/libraries/technology/memory/memory_ram_crwk_crw.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
 USE technology_lib.technology_pkg.ALL;
 USE technology_lib.technology_select_pkg.ALL;
 
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
 ENTITY memory_ram_crwk_crw IS  -- support different port data widths and corresponding address ranges
   GENERIC (
     g_technology  : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_ram_r_w.vhd b/libraries/technology/memory/memory_ram_r_w.vhd
index 8c724eb97119803846c7e3d2ebf257ea54eab5f4..50a755d7ea5aad7a675717705270fd2ab76ebd9e 100644
--- a/libraries/technology/memory/memory_ram_r_w.vhd
+++ b/libraries/technology/memory/memory_ram_r_w.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
 USE technology_lib.technology_pkg.ALL;
 USE technology_lib.technology_select_pkg.ALL;
 
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
 ENTITY memory_ram_r_w IS
   GENERIC (
     g_technology : NATURAL := c_tech_select_default;
diff --git a/libraries/technology/memory/memory_rom_r.vhd b/libraries/technology/memory/memory_rom_r.vhd
index c30fa5e4d31cf5080fad03319edbe5b909fec114..97e24373dd12beb31922609222adc04a6b4997d5 100644
--- a/libraries/technology/memory/memory_rom_r.vhd
+++ b/libraries/technology/memory/memory_rom_r.vhd
@@ -25,6 +25,9 @@ USE work.memory_component_pkg.ALL;
 USE technology_lib.technology_pkg.ALL;
 USE technology_lib.technology_select_pkg.ALL;
 
+-- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis.
+LIBRARY ip_altera_mf_lib;
+
 ENTITY memory_rom_r IS
   GENERIC (
     g_technology : NATURAL := c_tech_select_default;