From b72504d676f0aba26844fcb68084df28ba6e842b Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Fri, 14 Jan 2022 09:29:07 +0100
Subject: [PATCH] -Fixed range of (nxt_)snk_in_reg_arr signals to get rid of
infferred latch reported by Quartus (L2SDP-555).
---
libraries/dsp/st/src/vhdl/st_histogram.vhd | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/libraries/dsp/st/src/vhdl/st_histogram.vhd b/libraries/dsp/st/src/vhdl/st_histogram.vhd
index 159c5f22f8..2a4db21c89 100644
--- a/libraries/dsp/st/src/vhdl/st_histogram.vhd
+++ b/libraries/dsp/st/src/vhdl/st_histogram.vhd
@@ -137,10 +137,10 @@ ARCHITECTURE rtl OF st_histogram IS
-- snk_in_reg_arr
-------------------------------------------------------------------------------
CONSTANT c_ram_rd_wr_latency : NATURAL := 3; -- RAM read,incr,write cycle latency
- CONSTANT c_shiftreg_depth : NATURAL := c_ram_rd_wr_latency;
+ CONSTANT c_shiftreg_depth : NATURAL := c_ram_rd_wr_latency+1;
- SIGNAL snk_in_reg_arr : t_dp_sosi_arr(c_shiftreg_depth DOWNTO 0);
- SIGNAL nxt_snk_in_reg_arr : t_dp_sosi_arr(c_shiftreg_depth DOWNTO 0);
+ SIGNAL snk_in_reg_arr : t_dp_sosi_arr(c_shiftreg_depth-1 DOWNTO 0);
+ SIGNAL nxt_snk_in_reg_arr : t_dp_sosi_arr(c_shiftreg_depth-1 DOWNTO 0);
SIGNAL snk_in_reg : t_dp_sosi;
-------------------------------------------------------------------------------
@@ -250,11 +250,9 @@ BEGIN
-------------------------------------------------------------------------------
p_nxt_snk_in_reg_arr: PROCESS(snk_in, snk_in_data, snk_in_reg_arr) IS
BEGIN
- nxt_snk_in_reg_arr <= snk_in_reg_arr;
- nxt_snk_in_reg_arr(3).valid <= '0';
- --FOR i IN 0 TO c_shiftreg_depth-1 LOOP
- -- nxt_snk_in_reg_arr(i) <= c_dp_sosi_rst;
- --END LOOP;
+ FOR i IN 0 TO c_shiftreg_depth-1 LOOP
+ nxt_snk_in_reg_arr(i) <= c_dp_sosi_rst;
+ END LOOP;
IF snk_in.valid='1' THEN
-- The base function is a shift register
--
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