From b6ca97cbe68b80eb036be87f93e692696d8e4e2d Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Mon, 27 Oct 2014 13:27:55 +0000 Subject: [PATCH] Added default input values to be able to use ram_r_w as a rom_r by leaving these ports not connected. --- libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd index 831f426d14..9fc699551a 100644 --- a/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd +++ b/libraries/technology/ip_arria10/ram/ip_arria10_ram_r_w.vhd @@ -96,9 +96,9 @@ ENTITY ip_arria10_ram_r_w IS ); PORT ( clk : IN STD_LOGIC := '1'; - data : IN STD_LOGIC_VECTOR(g_dat_w-1 DOWNTO 0); - rdaddress : IN STD_LOGIC_VECTOR(g_adr_w-1 DOWNTO 0); - wraddress : IN STD_LOGIC_VECTOR(g_adr_w-1 DOWNTO 0); + data : IN STD_LOGIC_VECTOR(g_dat_w-1 DOWNTO 0) := (OTHERS=>'0'); + rdaddress : IN STD_LOGIC_VECTOR(g_adr_w-1 DOWNTO 0) := (OTHERS=>'0'); + wraddress : IN STD_LOGIC_VECTOR(g_adr_w-1 DOWNTO 0) := (OTHERS=>'0'); wren : IN STD_LOGIC := '0'; q : OUT STD_LOGIC_VECTOR(g_dat_w-1 DOWNTO 0) ); -- GitLab