From b1b7d354144646849fa7b8fd18c44eba384d1dcc Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Thu, 20 May 2021 12:09:05 +0200
Subject: [PATCH] -Found and fixed off-by-one error in RAM clear adressing (I
missed address 0).
---
libraries/dsp/st/src/vhdl/st_histogram.vhd | 2 +-
libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/libraries/dsp/st/src/vhdl/st_histogram.vhd b/libraries/dsp/st/src/vhdl/st_histogram.vhd
index b7be065ed6..5c9934f8a5 100644
--- a/libraries/dsp/st/src/vhdl/st_histogram.vhd
+++ b/libraries/dsp/st/src/vhdl/st_histogram.vhd
@@ -330,7 +330,7 @@ BEGIN
nxt_ram_clearing <= '1' WHEN ram_clear='1' ELSE '0' WHEN TO_UINT(address)=c_nof_bins-1 ELSE ram_clearing;
-- Address counter: 0 to g_nof_bins-1.
- nxt_address <= INCR_UVEC(address, 1) WHEN ram_clearing='1' OR ram_clear='1' ELSE (OTHERS=>'0');
+ nxt_address <= INCR_UVEC(address, 1) WHEN ram_clearing='1' ELSE (OTHERS=>'0');
histogram_wr_mosi.wr <= ram_clearing;
histogram_wr_mosi.address(c_adr_w-1 DOWNTO 0) <= address;
diff --git a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
index 72681e58e3..f4f6299097 100644
--- a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd
@@ -212,6 +212,7 @@ BEGIN
-- Perform MM read and put result in ram_rd_word
p_verify_mm_read : PROCESS
BEGIN
+ st_histogram_ram_mosi.wr <= '0';
FOR i IN 0 TO c_nof_sync_periods-1 LOOP
proc_common_wait_until_high(dp_clk, stimuli_src_out.sync);
--
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