diff --git a/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd b/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd index b168da24241379d572e3bfe3f91b1d8e424f013f..3c23572bf9bbccea4512d4abdc1fd844e81bee92 100644 --- a/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd +++ b/boards/uniboard2/designs/unb2_minimal/src/vhdl/unb2_minimal.vhd @@ -57,8 +57,8 @@ ENTITY unb2_minimal IS -- 1GbE Control Interface ETH_clk : IN STD_LOGIC; - ETH_SGIN : IN STD_LOGIC; - ETH_SGOUT : OUT STD_LOGIC + ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0); + ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0) ); END unb2_minimal; diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd index 59e39b3085e85de2b6b77b022db9893e042c7d58..2c1c88c6447b0b1b01516ffec8e4f0e0c57544bf 100644 --- a/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd +++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd @@ -219,8 +219,8 @@ ENTITY ctrl_unb2_board IS -- 1GbE Control Interface ETH_clk : IN STD_LOGIC; - ETH_SGIN : IN STD_LOGIC; - ETH_SGOUT : OUT STD_LOGIC + ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0); + ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0) ); END ctrl_unb2_board; @@ -625,8 +625,8 @@ BEGIN ram_sla_out => eth1g_ram_miso, -- PHY interface - eth_txp => ETH_SGOUT, - eth_rxp => ETH_SGIN, + eth_txp => ETH_SGOUT(0), + eth_rxp => ETH_SGIN(0), -- LED interface tse_led => eth1g_led diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd index 9039a732ab147cf8ab0359354631a2e854086047..f6cbfcb2d33c39e7d640eb44ce733b1d061996b5 100644 --- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd +++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd @@ -51,6 +51,9 @@ PACKAGE unb2_board_pkg IS -- I2C CONSTANT c_unb2_board_reg_sens_adr_w : NATURAL := 3; -- must match ceil_log2(c_mm_nof_dat) in unb2_board_sens_reg.vhd + + -- ETH + CONSTANT c_unb2_board_nof_eth : NATURAL := 2; -- number of ETH channels per node -- CONSTANT RECORD DECLARATIONS --------------------------------------------- @@ -66,15 +69,15 @@ PACKAGE unb2_board_pkg IS -- Test IO Interface TYPE t_c_unb2_board_testio IS RECORD - tst_w : NATURAL; -- = nof tst = 4; [tst_w-1 +tst_lo : tst_lo] = [7:4], + tst_w : NATURAL; -- = nof tst = 2; [tst_w-1 +tst_lo : tst_lo] = [5:4], led_w : NATURAL; -- = nof led = 2; [led_w-1 +led_lo : led_lo] = [3:2], jmp_w : NATURAL; -- = nof jmp = 2; [jmp_w-1 +jmp_lo : jmp_lo] = [1:0], - tst_lo : NATURAL; -- = 4; + tst_lo : NATURAL; -- = 2; led_lo : NATURAL; -- = 2; jmp_lo : NATURAL; -- = 0; END RECORD; - CONSTANT c_unb2_board_testio : t_c_unb2_board_testio := (4, 2, 2, 4, 2, 0); + CONSTANT c_unb2_board_testio : t_c_unb2_board_testio := (2, 2, 2, 2, 2, 0); CONSTANT c_unb2_board_testio_led_green : NATURAL := c_unb2_board_testio.led_lo; CONSTANT c_unb2_board_testio_led_red : NATURAL := c_unb2_board_testio.led_lo+1; @@ -82,11 +85,11 @@ PACKAGE unb2_board_pkg IS version_w : NATURAL; -- = 2; id_w : NATURAL; -- = 8; -- 6+2 bits wide = total node ID for up to 64 UniBoards in a system and 4 nodes per board chip_id_w : NATURAL; -- = 2; -- board node ID for the 4 FPGA nodes on a UniBoard - testio_w : NATURAL; -- = 8; + testio_w : NATURAL; -- = 6; testio : t_c_unb2_board_testio; END RECORD; - CONSTANT c_unb2_board_aux : t_c_unb2_board_aux := (2, 8, c_unb2_board_nof_chip_w, 8, c_unb2_board_testio); + CONSTANT c_unb2_board_aux : t_c_unb2_board_aux := (2, 8, c_unb2_board_nof_chip_w, 6, c_unb2_board_testio); TYPE t_e_unb2_board_node IS (e_any);