diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_avs_eth_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_avs_eth_0.ip index 4e21d21150344b6e7ed0b700bb14822d13c23b0b..017c522feb81df3a9dd99264fab7e9f62ed359a3 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_avs_eth_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_avs_eth_0.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_avs_eth_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_avs_eth_0</spirit:library> <spirit:name>avs_eth_0</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -55,7 +55,7 @@ <spirit:parameter> <spirit:name>associatedAddressablePoint</spirit:name> <spirit:displayName>Associated addressable interface</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_unb2c_minimal_avs_eth_0.mms_reg</spirit:value> + <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_lofar2_unb2b_beamformer_avs_eth_0.mms_reg</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>associatedClock</spirit:name> @@ -2101,7 +2101,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_avs_eth_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_avs_eth_0</spirit:library> <spirit:name>avs2_eth_coe</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> @@ -2201,7 +2201,7 @@ <parameterValueMap> <entry> <key>associatedAddressablePoint</key> - <value>qsys_unb2c_minimal_avs_eth_0.mms_reg</value> + <value>qsys_lofar2_unb2b_beamformer_avs_eth_0.mms_reg</value> </entry> <entry> <key>associatedClock</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_clk_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_clk_0.ip index 1c5f2f856736d4dd45540a8c65ed3bfb8dca0ebc..6d4b3dadba9a572e053eb1302b8274148d8728b8 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_clk_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_clk_0.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>Altera Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_clk_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_clk_0</spirit:library> <spirit:name>clk_0</spirit:name> <spirit:version>18.0</spirit:version> <spirit:busInterfaces> @@ -229,7 +229,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>Altera Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_clk_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_clk_0</spirit:library> <spirit:name>clock_source</spirit:name> <spirit:version>18.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_cpu_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_cpu_0.ip index f320ab7caa8188983a1d4dba0061a7a97c3d1412..c071396f4451e2760afff8e5b1392b168dcabce1 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_cpu_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_cpu_0.ip @@ -2218,7 +2218,7 @@ <spirit:parameter> <spirit:name>dataSlaveMapParam</spirit:name> <spirit:displayName>dataSlaveMapParam</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_sdp_info.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x3500' end='0x3508' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x3508' end='0x3510' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3510' end='0x3518' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3518' end='0x3520' datawidth='32' /><slave name='reg_si.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='pio_pps.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3550' end='0x3558' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map>]]></spirit:value> + <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x3500' end='0x3510' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x3510' end='0x3520' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_si.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3550' end='0x3558' datawidth='32' /><slave name='pio_pps.mem' start='0x3558' end='0x3560' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3560' end='0x3568' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map>]]></spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name> @@ -3489,7 +3489,7 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_sdp_info.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x3500' end='0x3508' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x3508' end='0x3510' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3510' end='0x3518' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3518' end='0x3520' datawidth='32' /><slave name='reg_si.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='pio_pps.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3550' end='0x3558' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map></value> + <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x3500' end='0x3510' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x3510' end='0x3520' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_si.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3550' end='0x3558' datawidth='32' /><slave name='pio_pps.mem' start='0x3558' end='0x3560' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3560' end='0x3568' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_jtag_uart_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_jtag_uart_0.ip index 2c36bb55a9b3d00fdbd3ca724aede8dc93ba5297..084a0ac679fef81427260dd6e0ee78c416b838bc 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_jtag_uart_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_jtag_uart_0.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_jtag_uart_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_jtag_uart_0</spirit:library> <spirit:name>jtag_uart_0</spirit:name> <spirit:version>18.0</spirit:version> <spirit:busInterfaces> @@ -347,7 +347,7 @@ <spirit:parameter> <spirit:name>associatedAddressablePoint</spirit:name> <spirit:displayName>Associated addressable interface</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_unb2c_minimal_jtag_uart_0.avalon_jtag_slave</spirit:value> + <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_lofar2_unb2b_beamformer_jtag_uart_0.avalon_jtag_slave</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>associatedClock</spirit:name> @@ -549,7 +549,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_jtag_uart_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_jtag_uart_0</spirit:library> <spirit:name>altera_avalon_jtag_uart</spirit:name> <spirit:version>18.0</spirit:version> </altera:entity_info> @@ -1114,7 +1114,7 @@ <parameterValueMap> <entry> <key>associatedAddressablePoint</key> - <value>qsys_unb2c_minimal_jtag_uart_0.avalon_jtag_slave</value> + <value>qsys_lofar2_unb2b_beamformer_jtag_uart_0.avalon_jtag_slave</value> </entry> <entry> <key>associatedClock</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_onchip_memory2_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_onchip_memory2_0.ip index 09b10365fa9eb74435bc768b229a528506db5644..d81d83d0a9dbe6fea4c09786e53baf6b4daa6fba 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_onchip_memory2_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_onchip_memory2_0.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_onchip_memory2_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</spirit:library> <spirit:name>onchip_memory2_0</spirit:name> <spirit:version>18.0</spirit:version> <spirit:busInterfaces> @@ -518,7 +518,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_onchip_memory2_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</spirit:library> <spirit:name>altera_avalon_onchip_memory2</spirit:name> <spirit:version>18.0</spirit:version> </altera:entity_info> @@ -652,7 +652,7 @@ <spirit:parameter> <spirit:name>autoInitializationFileName</spirit:name> <spirit:displayName>autoInitializationFileName</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="autoInitializationFileName">qsys_unb2c_minimal_onchip_memory2_0_onchip_memory2_0</spirit:value> + <spirit:value spirit:format="string" spirit:id="autoInitializationFileName">qsys_lofar2_unb2b_beamformer_onchip_memory2_0_onchip_memory2_0</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>deviceFamily</spirit:name> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_pps.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_pps.ip index 1d2e8bf5dad59d5d29d0720764db4458522ea73e..992dc7e86ea5e9449c521bf34e3b337c483a3145 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_pps.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_pps.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_pps</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_pps</spirit:library> <spirit:name>pio_pps</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_pps</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_pps</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_system_info.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_system_info.ip index 0fc6e8f1bdfdf7cbfa8d01fc2465da3443766f24..d641eba19a7495349fad530de8bcd3affd85a648 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_system_info.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_system_info.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_system_info</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_system_info</spirit:library> <spirit:name>pio_system_info</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_system_info</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_system_info</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_wdi.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_wdi.ip index b6c98aaa6799fb7df90c035819a393fa46f0ac9c..298c22ff03a1f64f1284c89855f160f13bf90ccf 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_wdi.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_wdi.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_wdi</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_wdi</spirit:library> <spirit:name>pio_wdi</spirit:name> <spirit:version>18.0</spirit:version> <spirit:busInterfaces> @@ -498,7 +498,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_pio_wdi</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_pio_wdi</spirit:library> <spirit:name>altera_avalon_pio</spirit:name> <spirit:version>18.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_bf_scale.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_bf_scale.ip index bf8b39c95e1509e8382e8e64723d423dadfb1a01..1138dabcfa585bdfb2707aa27a7ba78c6601e066 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_bf_scale.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_bf_scale.ip @@ -129,7 +129,7 @@ <spirit:parameter> <spirit:name>addressSpan</spirit:name> <spirit:displayName>Address span</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value> + <spirit:value spirit:format="string" spirit:id="addressSpan">16</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>addressUnits</spirit:name> @@ -605,6 +605,10 @@ <spirit:name>avs_mem_address</spirit:name> <spirit:wire> <spirit:direction>in</spirit:direction> + <spirit:vector> + <spirit:left>0</spirit:left> + <spirit:right>1</spirit:right> + </spirit:vector> <spirit:wireTypeDefs> <spirit:wireTypeDef> <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> @@ -697,6 +701,10 @@ <spirit:name>coe_address_export</spirit:name> <spirit:wire> <spirit:direction>out</spirit:direction> + <spirit:vector> + <spirit:left>0</spirit:left> + <spirit:right>1</spirit:right> + </spirit:vector> <spirit:wireTypeDefs> <spirit:wireTypeDef> <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> @@ -775,7 +783,7 @@ <spirit:parameter> <spirit:name>g_adr_w</spirit:name> <spirit:displayName>g_adr_w</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value> + <spirit:value spirit:format="long" spirit:id="g_adr_w">2</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>g_dat_w</spirit:name> @@ -838,7 +846,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -902,7 +910,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -971,7 +979,7 @@ </entry> <entry> <key>addressSpan</key> - <value>8</value> + <value>16</value> </entry> <entry> <key>addressUnits</key> @@ -1366,11 +1374,11 @@ <consumedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>3</value> + <value>4</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dp_xonoff.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dp_xonoff.ip index b99435f7a33362fbc6553e403c1b01f8a0fa3f23..f5ee1ba8fa800752e0045046684860b261ee5980 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dp_xonoff.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dp_xonoff.ip @@ -129,7 +129,7 @@ <spirit:parameter> <spirit:name>addressSpan</spirit:name> <spirit:displayName>Address span</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="addressSpan">8</spirit:value> + <spirit:value spirit:format="string" spirit:id="addressSpan">16</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>addressUnits</spirit:name> @@ -605,6 +605,10 @@ <spirit:name>avs_mem_address</spirit:name> <spirit:wire> <spirit:direction>in</spirit:direction> + <spirit:vector> + <spirit:left>0</spirit:left> + <spirit:right>1</spirit:right> + </spirit:vector> <spirit:wireTypeDefs> <spirit:wireTypeDef> <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> @@ -697,6 +701,10 @@ <spirit:name>coe_address_export</spirit:name> <spirit:wire> <spirit:direction>out</spirit:direction> + <spirit:vector> + <spirit:left>0</spirit:left> + <spirit:right>1</spirit:right> + </spirit:vector> <spirit:wireTypeDefs> <spirit:wireTypeDef> <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> @@ -775,7 +783,7 @@ <spirit:parameter> <spirit:name>g_adr_w</spirit:name> <spirit:displayName>g_adr_w</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="g_adr_w">1</spirit:value> + <spirit:value spirit:format="long" spirit:id="g_adr_w">2</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>g_dat_w</spirit:name> @@ -838,7 +846,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -902,7 +910,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -971,7 +979,7 @@ </entry> <entry> <key>addressSpan</key> - <value>8</value> + <value>16</value> </entry> <entry> <key>addressUnits</key> @@ -1366,11 +1374,11 @@ <consumedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>3</value> + <value>4</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl.ip index eaa2adcc8488d8a80c26c9990d6901d193f7c749..d3b970229888045b8616fef5b48f8dfb6d4bda7f 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_dpmm_ctrl</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</spirit:library> <spirit:name>reg_dpmm_ctrl</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_dpmm_ctrl</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_data.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_data.ip index 564b626b4013fe44dee45248c8f7f743b7419c61..2a068137038ea196c239ff9f731efc2ec0d7a073 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_data.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_data.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_dpmm_data</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</spirit:library> <spirit:name>reg_dpmm_data</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_dpmm_data</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_epcs.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_epcs.ip index b07b1b402e172532483dc1ef8d9d09c7095eef71..df303e258f8dcb8f90521d1263264de0d61e5308 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_epcs.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_epcs.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_epcs</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_epcs</spirit:library> <spirit:name>reg_epcs</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_epcs</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_epcs</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens.ip index 9efe5c57caeabcbdbfb92af45d701d3dc187068f..4426feafd7261d0b4fe2f6d7260a8339fa18810d 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_fpga_temp_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</spirit:library> <spirit:name>reg_fpga_temp_sens</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_fpga_temp_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens.ip index 4d652f96ceccd7fdbd240e65b5f0ee806000a463..bf299c78ea2e26eb9200cdb007596be9b6b32e44 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_fpga_voltage_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</spirit:library> <spirit:name>reg_fpga_voltage_sens</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_fpga_voltage_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl.ip index 4fff1367f07a2f1261f8e62c4069470bd930e1f2..c0bf70f6a16b69ac9cb00ca40f7e0285f684a62d 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_mmdp_ctrl</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</spirit:library> <spirit:name>reg_mmdp_ctrl</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_mmdp_ctrl</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_data.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_data.ip index 450ee4447b7ade031675181089797226ea80e01b..ff14b29c0a6b25575a48abd281b16ea4ba002bbb 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_data.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_data.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_mmdp_data</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</spirit:library> <spirit:name>reg_mmdp_data</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_mmdp_data</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_remu.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_remu.ip index 6f360cba7bd7b3657e0d7d1d5428aa2042ceae7c..2368d03c3105357fca803601b6bfb2b8dd43aba6 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_remu.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_remu.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_remu</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_remu</spirit:library> <spirit:name>reg_remu</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_remu</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_remu</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_pmbus.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_pmbus.ip index b4758115354d88a81255e5a80f01d6eee34f0c5f..65c63b2837d5a84a3a7867aca64f35d54d55378c 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_pmbus.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_pmbus.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_unb_pmbus</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</spirit:library> <spirit:name>reg_unb_pmbus</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_unb_pmbus</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_sens.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_sens.ip index 8494572d5c37c2482118d8e7fe5f926f304d7e21..df72d9fcc06fa8af7bfc162e85aa0c15ef4b2ee5 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_sens.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_sens.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_unb_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_unb_sens</spirit:library> <spirit:name>reg_unb_sens</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_unb_sens</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_unb_sens</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_wdi.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_wdi.ip index 9d869abbb1c1d0327f606185d5986fe15b2956cd..cd99c3e1378d62d11e8f76e26c5e5a7bd381aa0c 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_wdi.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_wdi.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_wdi</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_wdi</spirit:library> <spirit:name>reg_wdi</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -766,7 +766,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_reg_wdi</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_reg_wdi</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_rom_system_info.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_rom_system_info.ip index 6a022a4ad6872eb4f018f1a1b7129ba2d000c943..4e030e7c265554a08760a7b275bdb5c589d4a673 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_rom_system_info.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_rom_system_info.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_rom_system_info</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_rom_system_info</spirit:library> <spirit:name>rom_system_info</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> @@ -774,7 +774,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>ASTRON</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_rom_system_info</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_rom_system_info</spirit:library> <spirit:name>avs_common_mm</spirit:name> <spirit:version>1.0</spirit:version> </altera:entity_info> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_timer_0.ip b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_timer_0.ip index 1b867a0f5823e0af3b30bb17b25f2de51a3e5177..692c614d6cd960a08ab7a73df2d85c613e8e41f9 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_timer_0.ip +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_timer_0.ip @@ -1,7 +1,7 @@ <?xml version="1.0" ?> <spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_timer_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_timer_0</spirit:library> <spirit:name>timer_0</spirit:name> <spirit:version>18.0</spirit:version> <spirit:busInterfaces> @@ -55,7 +55,7 @@ <spirit:parameter> <spirit:name>associatedAddressablePoint</spirit:name> <spirit:displayName>Associated addressable interface</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_unb2c_minimal_timer_0.s1</spirit:value> + <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">qsys_lofar2_unb2b_beamformer_timer_0.s1</spirit:value> </spirit:parameter> <spirit:parameter> <spirit:name>associatedClock</spirit:name> @@ -517,7 +517,7 @@ <spirit:vendorExtensions> <altera:entity_info> <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>qsys_unb2c_minimal_timer_0</spirit:library> + <spirit:library>qsys_lofar2_unb2b_beamformer_timer_0</spirit:library> <spirit:name>altera_avalon_timer</spirit:name> <spirit:version>18.0</spirit:version> </altera:entity_info> @@ -768,7 +768,7 @@ <parameterValueMap> <entry> <key>associatedAddressablePoint</key> - <value>qsys_unb2c_minimal_timer_0.s1</value> + <value>qsys_lofar2_unb2b_beamformer_timer_0.s1</value> </entry> <entry> <key>associatedClock</key> diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/qsys_lofar2_unb2b_beamformer.qsys b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/qsys_lofar2_unb2b_beamformer.qsys index d5b6539ee76458c1583ec9d89df191dd12a49200..bc239bff77875d911c7361def0ce0a1a44b24dff 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/qsys_lofar2_unb2b_beamformer.qsys +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/quartus/qsys_lofar2_unb2b_beamformer.qsys @@ -30,7 +30,7 @@ { datum baseAddress { - value = "13312"; + value = "12352"; type = "String"; } } @@ -99,7 +99,7 @@ { datum baseAddress { - value = "13648"; + value = "13664"; type = "String"; } } @@ -149,7 +149,7 @@ { datum baseAddress { - value = "13640"; + value = "13656"; type = "String"; } } @@ -394,7 +394,7 @@ { datum baseAddress { - value = "13576"; + value = "13552"; type = "String"; } } @@ -426,7 +426,7 @@ { datum baseAddress { - value = "13592"; + value = "13608"; type = "String"; } } @@ -442,7 +442,7 @@ { datum baseAddress { - value = "13536"; + value = "13568"; type = "String"; } } @@ -474,7 +474,7 @@ { datum baseAddress { - value = "13552"; + value = "13584"; type = "String"; } } @@ -490,7 +490,7 @@ { datum baseAddress { - value = "13584"; + value = "13600"; type = "String"; } } @@ -522,7 +522,7 @@ { datum baseAddress { - value = "13568"; + value = "13536"; type = "String"; } } @@ -543,7 +543,7 @@ { datum baseAddress { - value = "13632"; + value = "13648"; type = "String"; } } @@ -564,7 +564,7 @@ { datum baseAddress { - value = "13624"; + value = "13640"; type = "String"; } } @@ -659,7 +659,7 @@ { datum baseAddress { - value = "13616"; + value = "13632"; type = "String"; } } @@ -680,7 +680,7 @@ { datum baseAddress { - value = "13608"; + value = "13624"; type = "String"; } } @@ -749,7 +749,7 @@ { datum baseAddress { - value = "12352"; + value = "13312"; type = "String"; } } @@ -765,7 +765,7 @@ { datum baseAddress { - value = "13600"; + value = "13616"; type = "String"; } } @@ -3943,30 +3943,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_avs_eth_0</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_avs_eth_0</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_avs_eth_0</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_avs_eth_0</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_avs_eth_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_avs_eth_0</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_avs_eth_0.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_avs_eth_0.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -4179,30 +4179,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_clk_0</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_clk_0</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_clk_0</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_clk_0</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_clk_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_clk_0</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_clk_0.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_clk_0.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -4305,10 +4305,10 @@ <isStart>true</isStart> <ports> <port> - <name>d_readdata</name> - <role>readdata</role> - <direction>Input</direction> - <width>32</width> + <name>d_address</name> + <role>address</role> + <direction>Output</direction> + <width>20</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -4321,34 +4321,42 @@ <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> - <name>d_writedata</name> - <role>writedata</role> + <name>d_read</name> + <role>read</role> <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + <port> + <name>d_readdata</name> + <role>readdata</role> + <direction>Input</direction> <width>32</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> - <name>d_write</name> - <role>write</role> - <direction>Output</direction> + <name>d_waitrequest</name> + <role>waitrequest</role> + <direction>Input</direction> <width>1</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> </port> <port> - <name>d_read</name> - <role>read</role> + <name>d_write</name> + <role>write</role> <direction>Output</direction> <width>1</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> </port> <port> - <name>d_address</name> - <role>address</role> + <name>d_writedata</name> + <role>writedata</role> <direction>Output</direction> - <width>20</width> + <width>32</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -4360,14 +4368,6 @@ <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> </port> - <port> - <name>d_waitrequest</name> - <role>waitrequest</role> - <direction>Input</direction> - <width>1</width> - <lowerBound>0</lowerBound> - <vhdlType>STD_LOGIC</vhdlType> - </port> </ports> <assignments> <assignmentValueMap> @@ -4523,12 +4523,20 @@ <isStart>false</isStart> <ports> <port> - <name>debug_mem_slave_read</name> - <role>read</role> + <name>debug_mem_slave_address</name> + <role>address</role> <direction>Input</direction> - <width>1</width> + <width>9</width> <lowerBound>0</lowerBound> - <vhdlType>STD_LOGIC</vhdlType> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + <port> + <name>debug_mem_slave_byteenable</name> + <role>byteenable</role> + <direction>Input</direction> + <width>4</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> <name>debug_mem_slave_debugaccess</name> @@ -4539,17 +4547,9 @@ <vhdlType>STD_LOGIC</vhdlType> </port> <port> - <name>debug_mem_slave_address</name> - <role>address</role> + <name>debug_mem_slave_read</name> + <role>read</role> <direction>Input</direction> - <width>9</width> - <lowerBound>0</lowerBound> - <vhdlType>STD_LOGIC_VECTOR</vhdlType> - </port> - <port> - <name>debug_mem_slave_waitrequest</name> - <role>waitrequest</role> - <direction>Output</direction> <width>1</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> @@ -4563,12 +4563,20 @@ <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> - <name>debug_mem_slave_byteenable</name> - <role>byteenable</role> + <name>debug_mem_slave_waitrequest</name> + <role>waitrequest</role> + <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + <port> + <name>debug_mem_slave_write</name> + <role>write</role> <direction>Input</direction> - <width>4</width> + <width>1</width> <lowerBound>0</lowerBound> - <vhdlType>STD_LOGIC_VECTOR</vhdlType> + <vhdlType>STD_LOGIC</vhdlType> </port> <port> <name>debug_mem_slave_writedata</name> @@ -4578,14 +4586,6 @@ <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> - <port> - <name>debug_mem_slave_write</name> - <role>write</role> - <direction>Input</direction> - <width>1</width> - <lowerBound>0</lowerBound> - <vhdlType>STD_LOGIC</vhdlType> - </port> </ports> <assignments> <assignmentValueMap> @@ -4826,33 +4826,33 @@ <isStart>true</isStart> <ports> <port> - <name>i_readdata</name> - <role>readdata</role> - <direction>Input</direction> - <width>32</width> + <name>i_address</name> + <role>address</role> + <direction>Output</direction> + <width>18</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> - <name>i_waitrequest</name> - <role>waitrequest</role> - <direction>Input</direction> + <name>i_read</name> + <role>read</role> + <direction>Output</direction> <width>1</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> </port> <port> - <name>i_address</name> - <role>address</role> - <direction>Output</direction> - <width>18</width> + <name>i_readdata</name> + <role>readdata</role> + <direction>Input</direction> + <width>32</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> <port> - <name>i_read</name> - <role>read</role> - <direction>Output</direction> + <name>i_waitrequest</name> + <role>waitrequest</role> + <direction>Input</direction> <width>1</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC</vhdlType> @@ -5397,7 +5397,7 @@ <consumedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_sdp_info.mem' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x3500' end='0x3508' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x3508' end='0x3510' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3510' end='0x3518' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3518' end='0x3520' datawidth='32' /><slave name='reg_si.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='pio_pps.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3550' end='0x3558' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map></value> + <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_diag_data_buf_bsn.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x3200' end='0x3300' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3300' end='0x3400' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x3400' end='0x3440' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x3440' end='0x3480' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3480' end='0x34A0' datawidth='32' /><slave name='reg_epcs.mem' start='0x34A0' end='0x34C0' datawidth='32' /><slave name='reg_remu.mem' start='0x34C0' end='0x34E0' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x34E0' end='0x34F0' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x34F0' end='0x3500' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x3500' end='0x3510' datawidth='32' /><slave name='reg_diag_data_buf_jesd.mem' start='0x3510' end='0x3520' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x3520' end='0x3528' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x3528' end='0x3530' datawidth='32' /><slave name='reg_si.mem' start='0x3530' end='0x3538' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x3538' end='0x3540' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x3540' end='0x3548' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3548' end='0x3550' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3550' end='0x3558' datawidth='32' /><slave name='pio_pps.mem' start='0x3558' end='0x3560' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3560' end='0x3568' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x60000' datawidth='32' /><slave name='ram_wg.mem' start='0x60000' end='0x70000' datawidth='32' /><slave name='ram_diag_data_buf_bsn.mem' start='0x70000' end='0x80000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x80000' end='0x90000' datawidth='32' /><slave name='ram_st_sst.mem' start='0x90000' end='0xA0000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0xA0000' end='0xA8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0xA8000' end='0xB0000' datawidth='32' /><slave name='jesd204b.mem' start='0xB0000' end='0xB4000' datawidth='32' /><slave name='ram_diag_data_buf_jesd.mem' start='0xB4000' end='0xB6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xB6000' end='0xB7000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> @@ -6834,30 +6834,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_jtag_uart_0</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_jtag_uart_0</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_jtag_uart_0</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_jtag_uart_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_jtag_uart_0</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_jtag_uart_0.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_jtag_uart_0.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap> <entry> @@ -7281,30 +7281,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_onchip_memory2_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_onchip_memory2_0</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_onchip_memory2_0.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_onchip_memory2_0.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap> <entry> @@ -7994,30 +7994,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_pio_pps</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_pio_pps</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_pps</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_pps</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_pps</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_pps</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_pio_pps.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_pps.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -8610,30 +8610,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_pio_system_info</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_pio_system_info</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_system_info</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_system_info</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_system_info</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_pio_system_info.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_system_info.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -9161,30 +9161,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_pio_wdi</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_pio_wdi</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_wdi</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_wdi</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_pio_wdi</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_pio_wdi.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_pio_wdi.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap> <entry> @@ -16633,19 +16633,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_aduh_monitor</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_aduh_monitor</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_aduh_monitor</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_aduh_monitor</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -16676,7 +16676,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -16740,7 +16740,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -16809,7 +16809,7 @@ </entry> <entry> <key>addressSpan</key> - <value>8</value> + <value>16</value> </entry> <entry> <key>addressUnits</key> @@ -17215,11 +17215,11 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>3</value> + <value>4</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -17865,19 +17865,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_monitor_input</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_monitor_input</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_monitor_input</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_monitor_input</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -18481,19 +18481,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_scheduler</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_scheduler</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_scheduler</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_scheduler</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -19097,19 +19097,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_source</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_source</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_bsn_source</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_bsn_source</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -19713,19 +19713,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_bsn</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_bsn</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_bsn</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_bsn</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -20329,19 +20329,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_jesd</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_jesd</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_diag_data_buf_jesd</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_diag_data_buf_jesd</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -20945,19 +20945,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_selector</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_selector</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_selector</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_selector</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -21561,19 +21561,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_shiftram</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_shiftram</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dp_shiftram</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dp_shiftram</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -21604,7 +21604,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -21668,7 +21668,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>1</width> + <width>2</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -21737,7 +21737,7 @@ </entry> <entry> <key>addressSpan</key> - <value>8</value> + <value>16</value> </entry> <entry> <key>addressUnits</key> @@ -22143,11 +22143,11 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>3</value> + <value>4</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -22790,30 +22790,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_dpmm_ctrl.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_ctrl.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -23406,30 +23406,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_dpmm_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_dpmm_data</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_dpmm_data.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_dpmm_data.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -24022,30 +24022,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_epcs</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_epcs</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_epcs</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_epcs</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_epcs</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_epcs</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_epcs.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_epcs.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -24638,30 +24638,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_fpga_temp_sens.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_temp_sens.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -25254,30 +25254,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_fpga_voltage_sens.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_fpga_voltage_sens.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -26486,30 +26486,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_mmdp_ctrl.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_ctrl.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -27102,30 +27102,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_mmdp_data</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_mmdp_data</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_mmdp_data.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_mmdp_data.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -28942,30 +28942,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_remu</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_remu</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_remu</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_remu</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_remu</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_remu</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_remu.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_remu.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -30177,19 +30177,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_si</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_si</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_si</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_si</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_si</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -30790,30 +30790,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_pmbus</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_pmbus</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_unb_pmbus.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_pmbus.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -31406,30 +31406,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_unb_sens</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_sens</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_sens</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_unb_sens</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_unb_sens</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_unb_sens.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_unb_sens.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -32022,30 +32022,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_reg_wdi</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_wdi</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wdi</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wdi</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_reg_wdi</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wdi</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_wdi.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_reg_wdi.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -32641,19 +32641,19 @@ <hdlLibraryName>qsys_lofar2_unb2b_beamformer_reg_wg</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wg</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wg</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_reg_wg</fileSetName> + <fileSetName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetName> <fileSetFixedName>qsys_lofar2_unb2b_beamformer_reg_wg</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> @@ -33254,30 +33254,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_rom_system_info</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_rom_system_info</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_rom_system_info</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_rom_system_info</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_rom_system_info</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_rom_system_info</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_rom_system_info.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_rom_system_info.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -33925,30 +33925,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_timer_0</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_beamformer_timer_0</hdlLibraryName> <fileSets> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_timer_0</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_timer_0</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> <fileSetName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_timer_0</fileSetFixedName> + <fileSetFixedName>qsys_lofar2_unb2b_beamformer_timer_0</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_timer_0.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_beamformer/qsys_lofar2_unb2b_beamformer_timer_0.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap> <entry> @@ -34012,7 +34012,7 @@ version="18.0" start="cpu_0.data_master" end="jtag_uart_0.avalon_jtag_slave"> - <parameter name="baseAddress" value="0x3550" /> + <parameter name="baseAddress" value="0x3560" /> </connection> <connection kind="avalon" @@ -34047,7 +34047,7 @@ version="18.0" start="cpu_0.data_master" end="pio_pps.mem"> - <parameter name="baseAddress" value="0x3548" /> + <parameter name="baseAddress" value="0x3558" /> </connection> <connection kind="avalon" @@ -34075,28 +34075,28 @@ version="18.0" start="cpu_0.data_master" end="reg_dpmm_ctrl.mem"> - <parameter name="baseAddress" value="0x3540" /> + <parameter name="baseAddress" value="0x3550" /> </connection> <connection kind="avalon" version="18.0" start="cpu_0.data_master" end="reg_dpmm_data.mem"> - <parameter name="baseAddress" value="0x3538" /> + <parameter name="baseAddress" value="0x3548" /> </connection> <connection kind="avalon" version="18.0" start="cpu_0.data_master" end="reg_mmdp_ctrl.mem"> - <parameter name="baseAddress" value="0x3530" /> + <parameter name="baseAddress" value="0x3540" /> </connection> <connection kind="avalon" version="18.0" start="cpu_0.data_master" end="reg_mmdp_data.mem"> - <parameter name="baseAddress" value="0x3528" /> + <parameter name="baseAddress" value="0x3538" /> </connection> <connection kind="avalon" @@ -34131,7 +34131,7 @@ version="18.0" start="cpu_0.data_master" end="reg_si.mem"> - <parameter name="baseAddress" value="0x3520" /> + <parameter name="baseAddress" value="0x3530" /> </connection> <connection kind="avalon" @@ -34159,7 +34159,7 @@ version="18.0" start="cpu_0.data_master" end="reg_diag_data_buf_jesd.mem"> - <parameter name="baseAddress" value="0x34f0" /> + <parameter name="baseAddress" value="0x3510" /> </connection> <connection kind="avalon" @@ -34208,14 +34208,14 @@ version="18.0" start="cpu_0.data_master" end="reg_bsn_scheduler.mem"> - <parameter name="baseAddress" value="0x3518" /> + <parameter name="baseAddress" value="0x3528" /> </connection> <connection kind="avalon" version="18.0" start="cpu_0.data_master" end="reg_bsn_source.mem"> - <parameter name="baseAddress" value="0x34e0" /> + <parameter name="baseAddress" value="0x3500" /> </connection> <connection kind="avalon" @@ -34243,7 +34243,7 @@ version="18.0" start="cpu_0.data_master" end="reg_dp_selector.mem"> - <parameter name="baseAddress" value="0x3510" /> + <parameter name="baseAddress" value="0x3520" /> </connection> <connection kind="avalon" @@ -34271,7 +34271,7 @@ version="18.0" start="cpu_0.data_master" end="reg_bf_scale.mem"> - <parameter name="baseAddress" value="0x3508" /> + <parameter name="baseAddress" value="0x34f0" /> </connection> <connection kind="avalon" @@ -34285,7 +34285,7 @@ version="18.0" start="cpu_0.data_master" end="reg_dp_xonoff.mem"> - <parameter name="baseAddress" value="0x3500" /> + <parameter name="baseAddress" value="0x34e0" /> </connection> <connection kind="avalon" @@ -34299,7 +34299,7 @@ version="18.0" start="cpu_0.data_master" end="reg_sdp_info.mem"> - <parameter name="baseAddress" value="0x3040" /> + <parameter name="baseAddress" value="0x3400" /> </connection> <connection kind="avalon" @@ -34327,7 +34327,7 @@ version="18.0" start="cpu_0.data_master" end="avs_eth_0.mms_reg"> - <parameter name="baseAddress" value="0x3400" /> + <parameter name="baseAddress" value="0x3040" /> </connection> <connection kind="avalon" diff --git a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd index aedd07c293830fb48746ac0fe3b46189fb7219e5..c4dd4d7df84e06126bd7fdf1e2f29e18efdfa6aa 100644 --- a/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_beamformer/src/vhdl/qsys_lofar2_unb2b_beamformer_pkg.vhd @@ -154,7 +154,7 @@ PACKAGE qsys_lofar2_unb2b_beamformer_pkg IS reg_aduh_monitor_reset_export : out std_logic; -- export reg_aduh_monitor_write_export : out std_logic; -- export reg_aduh_monitor_writedata_export : out std_logic_vector(31 downto 0); -- export - reg_bf_scale_address_export : out std_logic_vector(0 downto 0); -- export + reg_bf_scale_address_export : out std_logic_vector(1 downto 0); -- export reg_bf_scale_clk_export : out std_logic; -- export reg_bf_scale_read_export : out std_logic; -- export reg_bf_scale_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export @@ -210,7 +210,7 @@ PACKAGE qsys_lofar2_unb2b_beamformer_pkg IS reg_dp_shiftram_reset_export : out std_logic; -- export reg_dp_shiftram_write_export : out std_logic; -- export reg_dp_shiftram_writedata_export : out std_logic_vector(31 downto 0); -- export - reg_dp_xonoff_address_export : out std_logic_vector(0 downto 0); -- export + reg_dp_xonoff_address_export : out std_logic_vector(1 downto 0); -- export reg_dp_xonoff_clk_export : out std_logic; -- export reg_dp_xonoff_read_export : out std_logic; -- export reg_dp_xonoff_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd index 860dbf0d1a08eaebce49f3bb5d5a59148f0288bf..a9e8096779daa13f7cbab46e04952dcf416f62d7 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd @@ -137,11 +137,11 @@ PACKAGE sdp_pkg is -- BF MM address widths CONSTANT c_sdp_reg_sdp_info_addr_w : NATURAL := 4; - CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); - CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets * c_sdp_N_pol * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); - CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := 1; - CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets * 1); - CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets * c_sdp_S_sub_bf*c_sdp_N_pol*(c_longword_sz/c_word_sz)); + CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); + CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pol * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); + CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1; + CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1; + CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_S_sub_bf*c_sdp_N_pol*(c_longword_sz/c_word_sz)); -- 10GbE offload CONSTANT c_sdp_nof_blocks_per_packet : NATURAL := 4; @@ -166,7 +166,7 @@ PACKAGE sdp_pkg is ( field_name_pad("ip_src_addr" ), "RW", 32, field_default(0) ), ( field_name_pad("ip_dst_addr" ), "RW", 32, field_default(x"C0A80001") ), -- C0A80001=DOP36-eth0 '192.168.0.1' ( field_name_pad("udp_src_port" ), "RW", 16, field_default(0) ), - ( field_name_pad("udp_dst_port" ), "RW", 16, field_default(0) ), + ( field_name_pad("udp_dst_port" ), "RW", 16, field_default(5000) ), ( field_name_pad("udp_total_length" ), "RW", 16, field_default(7848) ), ( field_name_pad("udp_checksum" ), "RW", 16, field_default(0) ), ( field_name_pad("sdp_marker" ), "RW", 8, field_default(x"62") ), @@ -191,7 +191,7 @@ PACKAGE sdp_pkg is ); -- 10GbE MM address widths - CONSTANT c_sdp_reg_hdr_dat_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets * field_nof_words(c_sdp_hdr_field_arr, c_word_w)); + CONSTANT c_sdp_reg_hdr_dat_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(field_nof_words(c_sdp_hdr_field_arr, c_word_w)); CONSTANT c_sdp_reg_nw_10GbE_mac_addr_w : NATURAL := 13; CONSTANT c_sdp_reg_nw_10GbE_eth10g_addr_w : NATURAL := 1;