diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
index 509125ec50daa4d37b6adc61a299461cad233b20..3c8d9c9106f3d963efd61d963344c0a20bdecf5d 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
@@ -16,7 +16,7 @@ parameters:
- { name: c_Q_fft, value: 2 }
- { name: c_P_sq, value: 1 + c_N_pn_lb // 2 } # = 1 + 16 // 2 = 9, on revision xsub_one only first X_sq cell is used
- { name: c_X_sq, value: c_S_pn * c_S_pn } # = 144
- - { name: c_N_crosslets, value: 1 }
+ - { name: c_N_crosslets, value: 7 }
- { name: c_N_taps, value: 16 }
- { name: c_W_adc_jesd, value: 16 }
- { name: c_W_adc, value: 14 }
@@ -239,6 +239,10 @@ peripherals:
mm_port_names:
- REG_CROSSLETS_INFO
+ - peripheral_name: sdp/sdp_nof_crosslets
+ mm_port_names:
+ - REG_NOF_CROSSLETS
+
- peripheral_name: common/common_variable_delay
peripheral_group: xst
mm_port_names:
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
index f0239e54ab205cd43041c62ddad0f2a0cd40dcf0..c3443fc5a6c8e32b4ef5664acba5275d01ae9837 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
@@ -208,118 +208,24 @@ number_of_columns = 13
- - - - mon_output_sync_bsn 0x00050009 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x0005000a - - - b[31:0] b[63:32] - -
- - - - block_size 0x0005000b 1 RO uint32 b[31:0] - - -
- RAM_ST_XSQ 1 9 RAM data 0x00054000 144 RW cint64_ir b[31:0] b[31:0] - 1024
- - - - - - 0x00054001 - - - b[31:0] b[63:32] - -
- REG_CROSSLETS_INFO 1 1 REG offset 0x00058000 15 RW uint32 b[31:0] - - -
- - - - - step 0x0005800f 1 RW uint32 b[31:0] - - -
- REG_STAT_ENABLE_XST 1 1 REG enable 0x0005a000 1 RW uint32 b[0:0] - - -
- REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x0005c000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0005c001 - - - b[31:0] b[63:32] - -
- - - - - block_period 0x0005c002 1 RW uint32 b[15:0] - - -
- - - - - nof_statistics_per_packet 0x0005c003 1 RW uint32 b[15:0] - - -
- - - - - nof_bytes_per_statistic 0x0005c004 1 RW uint32 b[7:0] - - -
- - - - - nof_signal_inputs 0x0005c005 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id 0x0005c006 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_xst_signal_input_b_index 0x0005c006 1 RW uint32 b[7:0] - - -
- - - - - sdp_data_id_xst_signal_input_a_index 0x0005c006 1 RW uint32 b[15:8] - - -
- - - - - sdp_data_id_xst_subband_index 0x0005c006 1 RW uint32 b[24:16] - - -
- - - - - sdp_data_id_xst_reserved 0x0005c006 1 RW uint32 b[31:25] - - -
- - - - - sdp_integration_interval 0x0005c007 1 RW uint32 b[23:0] - - -
- - - - - sdp_reserved 0x0005c008 1 RW uint32 b[7:0] - - -
- - - - - sdp_source_info_gn_index 0x0005c009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_reserved 0x0005c00a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_subband_calibrated_flag 0x0005c00b 1 RW uint32 b[8:8] - - -
- - - - - sdp_source_info_beam_repositioning_flag 0x0005c00c 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0005c00d 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0005c00e 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0005c00f 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0005c010 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x0005c011 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x0005c012 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x0005c013 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x0005c014 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x0005c015 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x0005c016 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x0005c017 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x0005c018 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x0005c019 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0005c01a 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0005c01b 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0005c01c 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0005c01d 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0005c01e 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0005c01f 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0005c020 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x0005c021 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x0005c022 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x0005c023 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x0005c024 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x0005c025 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x0005c026 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x0005c027 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0005c028 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x0005c029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0005c02a - - - b[15:0] b[47:32] - -
- - - - - word_align 0x0005c02b 1 RW uint32 b[15:0] - - -
- RAM_SS_SS_WIDE 2 6 RAM data 0x0005e000 976 RW uint32 b[9:0] - 8192 1024
- RAM_BF_WEIGHTS 2 12 RAM data 0x00064000 976 RW cint16_ir b[31:0] - 16384 1024
- REG_BF_SCALE 2 1 REG scale 0x0006c000 1 RW uint32 b[15:0] - 2 2
- - - - - unused 0x0006c001 1 RW uint32 b[31:0] - - -
- REG_HDR_DAT 2 1 REG bsn 0x0006e000 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - - 0x0006e001 - - - b[31:0] b[63:32] - -
- - - - - sdp_block_period 0x0006e002 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_beamlets_per_block 0x0006e003 1 RW uint32 b[15:0] - - -
- - - - - sdp_nof_blocks_per_packet 0x0006e004 1 RW uint32 b[7:0] - - -
- - - - - sdp_beamlet_index 0x0006e005 1 RW uint32 b[15:0] - - -
- - - - - sdp_beamlet_scale 0x0006e006 1 RW uint32 b[15:0] - - -
- - - - - sdp_reserved 0x0006e007 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0006e008 - - - b[7:0] b[39:32] - -
- - - - - sdp_source_info_gn_index 0x0006e009 1 RW uint32 b[4:0] - - -
- - - - - sdp_source_info_beamlet_width 0x0006e00a 1 RW uint32 b[7:5] - - -
- - - - - sdp_source_info_repositioning_flag 0x0006e00b 1 RW uint32 b[9:9] - - -
- - - - - sdp_source_info_payload_error 0x0006e00c 1 RW uint32 b[10:10] - - -
- - - - - sdp_source_info_fsub_type 0x0006e00d 1 RW uint32 b[11:11] - - -
- - - - - sdp_source_info_f_adc 0x0006e00e 1 RW uint32 b[12:12] - - -
- - - - - sdp_source_info_nyquist_zone_index 0x0006e00f 1 RW uint32 b[14:13] - - -
- - - - - sdp_source_info_antenna_band_index 0x0006e010 1 RW uint32 b[15:15] - - -
- - - - - sdp_station_id 0x0006e011 1 RW uint32 b[15:0] - - -
- - - - - sdp_observation_id 0x0006e012 1 RW uint32 b[31:0] - - -
- - - - - sdp_version_id 0x0006e013 1 RO uint32 b[7:0] - - -
- - - - - sdp_marker 0x0006e014 1 RO uint32 b[7:0] - - -
- - - - - udp_checksum 0x0006e015 1 RW uint32 b[15:0] - - -
- - - - - udp_length 0x0006e016 1 RW uint32 b[15:0] - - -
- - - - - udp_destination_port 0x0006e017 1 RW uint32 b[15:0] - - -
- - - - - udp_source_port 0x0006e018 1 RW uint32 b[15:0] - - -
- - - - - ip_destination_address 0x0006e019 1 RW uint32 b[31:0] - - -
- - - - - ip_source_address 0x0006e01a 1 RW uint32 b[31:0] - - -
- - - - - ip_header_checksum 0x0006e01b 1 RW uint32 b[15:0] - - -
- - - - - ip_protocol 0x0006e01c 1 RW uint32 b[7:0] - - -
- - - - - ip_time_to_live 0x0006e01d 1 RW uint32 b[7:0] - - -
- - - - - ip_fragment_offset 0x0006e01e 1 RW uint32 b[12:0] - - -
- - - - - ip_flags 0x0006e01f 1 RW uint32 b[2:0] - - -
- - - - - ip_identification 0x0006e020 1 RW uint32 b[15:0] - - -
- - - - - ip_total_length 0x0006e021 1 RW uint32 b[15:0] - - -
- - - - - ip_services 0x0006e022 1 RW uint32 b[7:0] - - -
- - - - - ip_header_length 0x0006e023 1 RW uint32 b[3:0] - - -
- - - - - ip_version 0x0006e024 1 RW uint32 b[3:0] - - -
- - - - - eth_type 0x0006e025 1 RO uint32 b[15:0] - - -
- - - - - eth_source_mac 0x0006e026 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0006e027 - - - b[15:0] b[47:32] - -
- - - - - eth_destination_mac 0x0006e028 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0006e029 - - - b[15:0] b[47:32] - -
- REG_DP_XONOFF 2 1 REG enable_stream 0x00070000 1 RW uint32 b[0:0] - 2 2
- RAM_ST_BST 2 1 RAM data 0x00072000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - - 0x00072001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_BST 2 1 REG enable 0x00074000 1 RW uint32 b[0:0] - 2 2
- REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00076000 1 RW uint64 b[31:0] b[31:0] 64 64
+ RAM_ST_XSQ 1 9 RAM data 0x00060000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
+ - - - - - 0x00060001 - - - b[31:0] b[63:32] - -
+ REG_CROSSLETS_INFO 1 1 REG offset 0x00070000 15 RW uint32 b[31:0] - - -
+ - - - - step 0x0007000f 1 RW uint32 b[31:0] - - -
+ REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00072000 1 RW uint32 b[31:0] - - -
+ - - - - unused 0x00072001 1 RW uint32 b[31:0] - - -
+ REG_STAT_ENABLE_XST 1 1 REG enable 0x00074000 1 RW uint32 b[0:0] - - -
+ REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00076000 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00076001 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00076002 1 RW uint32 b[15:0] - - -
- - - - nof_statistics_per_packet 0x00076003 1 RW uint32 b[15:0] - - -
- - - - nof_bytes_per_statistic 0x00076004 1 RW uint32 b[7:0] - - -
- - - - nof_signal_inputs 0x00076005 1 RW uint32 b[7:0] - - -
- - - - sdp_data_id 0x00076006 1 RW uint32 b[31:0] - - -
- - - - - sdp_data_id_bst_beamlet_index 0x00076006 1 RW uint32 b[15:0] - - -
- - - - - sdp_data_id_bst_reserved 0x00076006 1 RW uint32 b[31:16] - - -
+ - - - - sdp_data_id_xst_signal_input_b_index 0x00076006 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id_xst_signal_input_a_index 0x00076006 1 RW uint32 b[15:8] - - -
+ - - - - sdp_data_id_xst_subband_index 0x00076006 1 RW uint32 b[24:16] - - -
+ - - - - sdp_data_id_xst_reserved 0x00076006 1 RW uint32 b[31:25] - - -
- - - - sdp_integration_interval 0x00076007 1 RW uint32 b[23:0] - - -
- - - - sdp_reserved 0x00076008 1 RW uint32 b[7:0] - - -
- - - - sdp_source_info_gn_index 0x00076009 1 RW uint32 b[4:0] - - -
@@ -357,182 +263,278 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00076029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0007602a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0007602b 1 RW uint32 b[15:0] - - -
- REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00078000 1 RW uint32 b[0:0] - - -
- - - - - rx_transfer_status 0x00078001 1 RO uint32 b[0:0] - - -
- - - - - tx_transfer_control 0x00078002 1 RW uint32 b[0:0] - - -
- - - - - rx_padcrc_control 0x00078040 1 RW uint32 b[1:0] - - -
- - - - - rx_crccheck_control 0x00078080 1 RW uint32 b[1:0] - - -
- - - - - rx_pktovrflow_error 0x000780c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000780c1 - - - b[31:0] b[31:0] - -
- - - - - rx_pktovrflow_etherstatsdropevents 0x000780c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000780c3 - - - b[31:0] b[31:0] - -
- - - - - rx_lane_decoder_preamble_control 0x00078100 1 RW uint32 b[0:0] - - -
- - - - - rx_preamble_inserter_control 0x00078140 1 RW uint32 b[0:0] - - -
- - - - - rx_frame_control 0x00078800 1 RW uint32 b[19:0] - - -
- - - - - rx_frame_maxlength 0x00078801 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr0 0x00078802 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_addr1 0x00078803 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_0 0x00078804 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr0_1 0x00078805 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_0 0x00078806 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr1_1 0x00078807 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_0 0x00078808 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr2_1 0x00078809 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_0 0x0007880a 1 RW uint32 b[15:0] - - -
- - - - - rx_frame_spaddr3_1 0x0007880b 1 RW uint32 b[15:0] - - -
- - - - - rx_pfc_control 0x00078818 1 RW uint32 b[16:0] - - -
- - - - - rx_stats_clr 0x00078c00 1 RW uint32 b[0:0] - - -
- - - - - rx_stats_framesok 0x00078c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c03 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_frameserr 0x00078c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c05 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_framescrcerr 0x00078c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c07 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_octetsok 0x00078c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c09 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pausemacctrl_frames 0x00078c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c0b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_iferrors 0x00078c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c0d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_framesok 0x00078c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c0f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicast_frameserr 0x00078c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c11 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastframesok 0x00078c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c13 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicast_frameserr 0x00078c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c15 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastframesok 0x00078c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c17 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcast_frameserr 0x00078c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c19 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatsoctets 0x00078c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c1b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatspkts 0x00078c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c1d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_undersizepkts 0x00078c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c1f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_oversizepkts 0x00078c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c21 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts64octets 0x00078c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c23 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts65to127octets 0x00078c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c25 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts128to255octets 0x00078c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c27 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts256to511octets 0x00078c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c29 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts512to1023octets 0x00078c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c2b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstat_pkts1024to1518octets 0x00078c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c2d - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_pkts1519toxoctets 0x00078c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c2f - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_fragments 0x00078c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c31 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstats_jabbers 0x00078c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c33 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_etherstatscrcerr 0x00078c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c35 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_unicastmacctrlframes 0x00078c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c37 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_multicastmac_ctrlframes 0x00078c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c39 - - - b[31:0] b[31:0] - -
- - - - - rx_stats_broadcastmac_ctrlframes 0x00078c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c3b - - - b[31:0] b[31:0] - -
- - - - - rx_stats_pfcmacctrlframes 0x00078c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00078c3d - - - b[31:0] b[31:0] - -
- - - - - tx_transfer_status 0x00079001 1 RO uint32 b[0:0] - - -
- - - - - tx_padins_control 0x00079040 1 RW uint32 b[0:0] - - -
- - - - - tx_crcins_control 0x00079080 1 RW uint32 b[1:0] - - -
- - - - - tx_pktunderflow_error 0x000790c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x000790c1 - - - b[31:0] b[31:0] - -
- - - - - tx_preamble_control 0x00079100 1 RW uint32 b[0:0] - - -
- - - - - tx_pauseframe_control 0x00079140 1 RW uint32 b[1:0] - - -
- - - - - tx_pauseframe_quanta 0x00079141 1 RW uint32 b[15:0] - - -
- - - - - tx_pauseframe_enable 0x00079142 1 RW uint32 b[0:0] - - -
- - - - - pfc_pause_quanta_0 0x00079180 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_1 0x00079181 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_2 0x00079182 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_3 0x00079183 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_4 0x00079184 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_5 0x00079185 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_6 0x00079186 1 RW uint32 b[31:0] - - -
- - - - - pfc_pause_quanta_7 0x00079187 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_0 0x00079190 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_1 0x00079191 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_2 0x00079192 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_3 0x00079193 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_4 0x00079194 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_5 0x00079195 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_6 0x00079196 1 RW uint32 b[31:0] - - -
- - - - - pfc_holdoff_quanta_7 0x00079197 1 RW uint32 b[31:0] - - -
- - - - - tx_pfc_priority_enable 0x000791a0 1 RW uint32 b[7:0] - - -
- - - - - tx_addrins_control 0x00079200 1 RW uint32 b[0:0] - - -
- - - - - tx_addrins_macaddr0 0x00079201 1 RW uint32 b[31:0] - - -
- - - - - tx_addrins_macaddr1 0x00079202 1 RW uint32 b[15:0] - - -
- - - - - tx_frame_maxlength 0x00079801 1 RW uint32 b[15:0] - - -
- - - - - tx_stats_clr 0x00079c00 1 RW uint32 b[0:0] - - -
- - - - - tx_stats_framesok 0x00079c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c03 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_frameserr 0x00079c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c05 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_framescrcerr 0x00079c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c07 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_octetsok 0x00079c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c09 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pausemacctrl_frames 0x00079c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c0b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_iferrors 0x00079c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c0d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_framesok 0x00079c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c0f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicast_frameserr 0x00079c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c11 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastframesok 0x00079c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c13 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicast_frameserr 0x00079c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c15 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastframesok 0x00079c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c17 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcast_frameserr 0x00079c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c19 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatsoctets 0x00079c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c1b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatspkts 0x00079c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c1d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_undersizepkts 0x00079c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c1f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_oversizepkts 0x00079c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c21 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts64octets 0x00079c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c23 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts65to127octets 0x00079c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c25 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts128to255octets 0x00079c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c27 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts256to511octets 0x00079c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c29 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts512to1023octets 0x00079c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c2b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstat_pkts1024to1518octets 0x00079c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c2d - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_pkts1519toxoctets 0x00079c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c2f - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_fragments 0x00079c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c31 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstats_jabbers 0x00079c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c33 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_etherstatscrcerr 0x00079c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c35 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_unicastmacctrlframes 0x00079c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c37 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_multicastmac_ctrlframes 0x00079c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c39 - - - b[31:0] b[31:0] - -
- - - - - tx_stats_broadcastmac_ctrlframes 0x00079c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c3b - - - b[31:0] b[31:0] - -
- - - - - tx_stats_pfcmacctrlframes 0x00079c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - - 0x00079c3d - - - b[31:0] b[31:0] - -
- REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0007a000 1 RO uint32 b[0:0] - - -
- - - - - xgmii_tx_ready 0x0007a000 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x0007a000 1 RO uint32 b[3:2] - - -
\ No newline at end of file
+ RAM_SS_SS_WIDE 2 6 RAM data 0x00078000 976 RW uint32 b[9:0] - 8192 1024
+ RAM_BF_WEIGHTS 2 12 RAM data 0x0007c000 976 RW cint16_ir b[31:0] - 16384 1024
+ REG_BF_SCALE 2 1 REG scale 0x00084000 1 RW uint32 b[15:0] - 2 2
+ - - - - unused 0x00084001 1 RW uint32 b[31:0] - - -
+ REG_HDR_DAT 2 1 REG bsn 0x00086000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x00086001 - - - b[31:0] b[63:32] - -
+ - - - - sdp_block_period 0x00086002 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_beamlets_per_block 0x00086003 1 RW uint32 b[15:0] - - -
+ - - - - sdp_nof_blocks_per_packet 0x00086004 1 RW uint32 b[7:0] - - -
+ - - - - sdp_beamlet_index 0x00086005 1 RW uint32 b[15:0] - - -
+ - - - - sdp_beamlet_scale 0x00086006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_reserved 0x00086007 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00086008 - - - b[7:0] b[39:32] - -
+ - - - - sdp_source_info_gn_index 0x00086009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_beamlet_width 0x0008600a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_repositioning_flag 0x0008600b 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0008600c 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0008600d 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0008600e 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x0008600f 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x00086010 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x00086011 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x00086012 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x00086013 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x00086014 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x00086015 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x00086016 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x00086017 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x00086018 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x00086019 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0008601a 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0008601b 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0008601c 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0008601d 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0008601e 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x0008601f 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x00086020 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x00086021 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x00086022 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x00086023 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x00086024 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x00086025 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x00086026 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00086027 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x00086028 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x00086029 - - - b[15:0] b[47:32] - -
+ REG_DP_XONOFF 2 1 REG enable_stream 0x00088000 1 RW uint32 b[0:0] - 2 2
+ RAM_ST_BST 2 1 RAM data 0x0008a000 976 RW uint64 b[31:0] b[31:0] 2048 2048
+ - - - - - 0x0008a001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_BST 2 1 REG enable 0x0008c000 1 RW uint32 b[0:0] - 2 2
+ REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x0008e000 1 RW uint64 b[31:0] b[31:0] 64 64
+ - - - - - 0x0008e001 - - - b[31:0] b[63:32] - -
+ - - - - block_period 0x0008e002 1 RW uint32 b[15:0] - - -
+ - - - - nof_statistics_per_packet 0x0008e003 1 RW uint32 b[15:0] - - -
+ - - - - nof_bytes_per_statistic 0x0008e004 1 RW uint32 b[7:0] - - -
+ - - - - nof_signal_inputs 0x0008e005 1 RW uint32 b[7:0] - - -
+ - - - - sdp_data_id 0x0008e006 1 RW uint32 b[31:0] - - -
+ - - - - sdp_data_id_bst_beamlet_index 0x0008e006 1 RW uint32 b[15:0] - - -
+ - - - - sdp_data_id_bst_reserved 0x0008e006 1 RW uint32 b[31:16] - - -
+ - - - - sdp_integration_interval 0x0008e007 1 RW uint32 b[23:0] - - -
+ - - - - sdp_reserved 0x0008e008 1 RW uint32 b[7:0] - - -
+ - - - - sdp_source_info_gn_index 0x0008e009 1 RW uint32 b[4:0] - - -
+ - - - - sdp_source_info_reserved 0x0008e00a 1 RW uint32 b[7:5] - - -
+ - - - - sdp_source_info_subband_calibrated_flag 0x0008e00b 1 RW uint32 b[8:8] - - -
+ - - - - sdp_source_info_beam_repositioning_flag 0x0008e00c 1 RW uint32 b[9:9] - - -
+ - - - - sdp_source_info_payload_error 0x0008e00d 1 RW uint32 b[10:10] - - -
+ - - - - sdp_source_info_fsub_type 0x0008e00e 1 RW uint32 b[11:11] - - -
+ - - - - sdp_source_info_f_adc 0x0008e00f 1 RW uint32 b[12:12] - - -
+ - - - - sdp_source_info_nyquist_zone_index 0x0008e010 1 RW uint32 b[14:13] - - -
+ - - - - sdp_source_info_antenna_band_index 0x0008e011 1 RW uint32 b[15:15] - - -
+ - - - - sdp_station_id 0x0008e012 1 RW uint32 b[15:0] - - -
+ - - - - sdp_observation_id 0x0008e013 1 RW uint32 b[31:0] - - -
+ - - - - sdp_version_id 0x0008e014 1 RO uint32 b[7:0] - - -
+ - - - - sdp_marker 0x0008e015 1 RO uint32 b[7:0] - - -
+ - - - - udp_checksum 0x0008e016 1 RW uint32 b[15:0] - - -
+ - - - - udp_length 0x0008e017 1 RW uint32 b[15:0] - - -
+ - - - - udp_destination_port 0x0008e018 1 RW uint32 b[15:0] - - -
+ - - - - udp_source_port 0x0008e019 1 RW uint32 b[15:0] - - -
+ - - - - ip_destination_address 0x0008e01a 1 RW uint32 b[31:0] - - -
+ - - - - ip_source_address 0x0008e01b 1 RW uint32 b[31:0] - - -
+ - - - - ip_header_checksum 0x0008e01c 1 RW uint32 b[15:0] - - -
+ - - - - ip_protocol 0x0008e01d 1 RW uint32 b[7:0] - - -
+ - - - - ip_time_to_live 0x0008e01e 1 RW uint32 b[7:0] - - -
+ - - - - ip_fragment_offset 0x0008e01f 1 RW uint32 b[12:0] - - -
+ - - - - ip_flags 0x0008e020 1 RW uint32 b[2:0] - - -
+ - - - - ip_identification 0x0008e021 1 RW uint32 b[15:0] - - -
+ - - - - ip_total_length 0x0008e022 1 RW uint32 b[15:0] - - -
+ - - - - ip_services 0x0008e023 1 RW uint32 b[7:0] - - -
+ - - - - ip_header_length 0x0008e024 1 RW uint32 b[3:0] - - -
+ - - - - ip_version 0x0008e025 1 RW uint32 b[3:0] - - -
+ - - - - eth_type 0x0008e026 1 RO uint32 b[15:0] - - -
+ - - - - eth_source_mac 0x0008e027 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0008e028 - - - b[15:0] b[47:32] - -
+ - - - - eth_destination_mac 0x0008e029 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0008e02a - - - b[15:0] b[47:32] - -
+ - - - - word_align 0x0008e02b 1 RW uint32 b[15:0] - - -
+ REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00090000 1 RW uint32 b[0:0] - - -
+ - - - - rx_transfer_status 0x00090001 1 RO uint32 b[0:0] - - -
+ - - - - tx_transfer_control 0x00090002 1 RW uint32 b[0:0] - - -
+ - - - - rx_padcrc_control 0x00090040 1 RW uint32 b[1:0] - - -
+ - - - - rx_crccheck_control 0x00090080 1 RW uint32 b[1:0] - - -
+ - - - - rx_pktovrflow_error 0x000900c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000900c1 - - - b[31:0] b[31:0] - -
+ - - - - rx_pktovrflow_etherstatsdropevents 0x000900c2 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000900c3 - - - b[31:0] b[31:0] - -
+ - - - - rx_lane_decoder_preamble_control 0x00090100 1 RW uint32 b[0:0] - - -
+ - - - - rx_preamble_inserter_control 0x00090140 1 RW uint32 b[0:0] - - -
+ - - - - rx_frame_control 0x00090800 1 RW uint32 b[19:0] - - -
+ - - - - rx_frame_maxlength 0x00090801 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr0 0x00090802 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_addr1 0x00090803 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_0 0x00090804 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr0_1 0x00090805 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_0 0x00090806 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr1_1 0x00090807 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_0 0x00090808 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr2_1 0x00090809 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_0 0x0009080a 1 RW uint32 b[15:0] - - -
+ - - - - rx_frame_spaddr3_1 0x0009080b 1 RW uint32 b[15:0] - - -
+ - - - - rx_pfc_control 0x00090818 1 RW uint32 b[16:0] - - -
+ - - - - rx_stats_clr 0x00090c00 1 RW uint32 b[0:0] - - -
+ - - - - rx_stats_framesok 0x00090c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c03 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_frameserr 0x00090c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c05 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_framescrcerr 0x00090c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c07 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_octetsok 0x00090c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c09 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pausemacctrl_frames 0x00090c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c0b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_iferrors 0x00090c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c0d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_framesok 0x00090c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c0f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicast_frameserr 0x00090c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c11 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastframesok 0x00090c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c13 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicast_frameserr 0x00090c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c15 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastframesok 0x00090c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c17 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcast_frameserr 0x00090c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c19 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatsoctets 0x00090c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c1b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatspkts 0x00090c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c1d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_undersizepkts 0x00090c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c1f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_oversizepkts 0x00090c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c21 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts64octets 0x00090c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c23 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts65to127octets 0x00090c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c25 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts128to255octets 0x00090c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c27 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts256to511octets 0x00090c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c29 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts512to1023octets 0x00090c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c2b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstat_pkts1024to1518octets 0x00090c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c2d - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_pkts1519toxoctets 0x00090c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c2f - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_fragments 0x00090c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c31 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstats_jabbers 0x00090c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c33 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_etherstatscrcerr 0x00090c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c35 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_unicastmacctrlframes 0x00090c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c37 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_multicastmac_ctrlframes 0x00090c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c39 - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_broadcastmac_ctrlframes 0x00090c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c3b - - - b[31:0] b[31:0] - -
+ - - - - rx_stats_pfcmacctrlframes 0x00090c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00090c3d - - - b[31:0] b[31:0] - -
+ - - - - tx_transfer_status 0x00091001 1 RO uint32 b[0:0] - - -
+ - - - - tx_padins_control 0x00091040 1 RW uint32 b[0:0] - - -
+ - - - - tx_crcins_control 0x00091080 1 RW uint32 b[1:0] - - -
+ - - - - tx_pktunderflow_error 0x000910c0 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x000910c1 - - - b[31:0] b[31:0] - -
+ - - - - tx_preamble_control 0x00091100 1 RW uint32 b[0:0] - - -
+ - - - - tx_pauseframe_control 0x00091140 1 RW uint32 b[1:0] - - -
+ - - - - tx_pauseframe_quanta 0x00091141 1 RW uint32 b[15:0] - - -
+ - - - - tx_pauseframe_enable 0x00091142 1 RW uint32 b[0:0] - - -
+ - - - - pfc_pause_quanta_0 0x00091180 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_1 0x00091181 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_2 0x00091182 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_3 0x00091183 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_4 0x00091184 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_5 0x00091185 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_6 0x00091186 1 RW uint32 b[31:0] - - -
+ - - - - pfc_pause_quanta_7 0x00091187 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_0 0x00091190 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_1 0x00091191 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_2 0x00091192 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_3 0x00091193 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_4 0x00091194 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_5 0x00091195 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_6 0x00091196 1 RW uint32 b[31:0] - - -
+ - - - - pfc_holdoff_quanta_7 0x00091197 1 RW uint32 b[31:0] - - -
+ - - - - tx_pfc_priority_enable 0x000911a0 1 RW uint32 b[7:0] - - -
+ - - - - tx_addrins_control 0x00091200 1 RW uint32 b[0:0] - - -
+ - - - - tx_addrins_macaddr0 0x00091201 1 RW uint32 b[31:0] - - -
+ - - - - tx_addrins_macaddr1 0x00091202 1 RW uint32 b[15:0] - - -
+ - - - - tx_frame_maxlength 0x00091801 1 RW uint32 b[15:0] - - -
+ - - - - tx_stats_clr 0x00091c00 1 RW uint32 b[0:0] - - -
+ - - - - tx_stats_framesok 0x00091c02 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c03 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_frameserr 0x00091c04 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c05 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_framescrcerr 0x00091c06 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c07 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_octetsok 0x00091c08 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c09 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pausemacctrl_frames 0x00091c0a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c0b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_iferrors 0x00091c0c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c0d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_framesok 0x00091c0e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c0f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicast_frameserr 0x00091c10 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c11 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastframesok 0x00091c12 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c13 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicast_frameserr 0x00091c14 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c15 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastframesok 0x00091c16 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c17 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcast_frameserr 0x00091c18 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c19 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatsoctets 0x00091c1a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c1b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatspkts 0x00091c1c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c1d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_undersizepkts 0x00091c1e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c1f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_oversizepkts 0x00091c20 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c21 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts64octets 0x00091c22 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c23 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts65to127octets 0x00091c24 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c25 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts128to255octets 0x00091c26 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c27 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts256to511octets 0x00091c28 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c29 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts512to1023octets 0x00091c2a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c2b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstat_pkts1024to1518octets 0x00091c2c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c2d - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_pkts1519toxoctets 0x00091c2e 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c2f - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_fragments 0x00091c30 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c31 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstats_jabbers 0x00091c32 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c33 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_etherstatscrcerr 0x00091c34 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c35 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_unicastmacctrlframes 0x00091c36 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c37 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_multicastmac_ctrlframes 0x00091c38 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c39 - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_broadcastmac_ctrlframes 0x00091c3a 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c3b - - - b[31:0] b[31:0] - -
+ - - - - tx_stats_pfcmacctrlframes 0x00091c3c 1 RO uint64 b[3:0] b[35:32] - -
+ - - - - - 0x00091c3d - - - b[31:0] b[31:0] - -
+ REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00092000 1 RO uint32 b[0:0] - - -
+ - - - - xgmii_tx_ready 0x00092000 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x00092000 1 RO uint32 b[3:2] - - -
\ No newline at end of file
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
index bea7b3e1fda3b7297dc06601b7ba20ee2898fcbb..7c35bf580d03dbd550e66b4b88f626ec2a4e5913 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
@@ -36,88 +36,88 @@ number_of_columns = 13
- - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - -
- - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - -
REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - -
- REG_FPGA_TEMP_SENS 1 1 REG temp 0x0002f048 1 RO uint32 b[31:0] - - -
- REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0002f030 6 RO uint32 b[31:0] - - -
+ REG_FPGA_TEMP_SENS 1 1 REG temp 0x0003b048 1 RO uint32 b[31:0] - - -
+ REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0003b030 6 RO uint32 b[31:0] - - -
RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - -
AVS_ETH_0_REG 1 1 REG status 0x00000c10 12 RO uint32 b[31:0] - - -
AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - -
- PIO_PPS 1 1 REG capture_cnt 0x0002f06c 1 RO uint32 b[29:0] - - -
- - - - - stable 0x0002f06c 1 RO uint32 b[30:30] - - -
- - - - - toggle 0x0002f06c 1 RO uint32 b[31:31] - - -
- - - - - expected_cnt 0x0002f06d 1 RW uint32 b[27:0] - - -
- - - - - edge 0x0002f06d 1 RW uint32 b[31:31] - - -
- - - - - offset_cnt 0x0002f06e 1 RO uint32 b[27:0] - - -
- REG_EPCS 1 1 REG addr 0x0002f050 1 WO uint32 b[23:0] - - -
- - - - - rden 0x0002f051 1 WO uint32 b[0:0] - - -
- - - - - read_bit 0x0002f052 1 WO uint32 b[0:0] - - -
- - - - - write_bit 0x0002f053 1 WO uint32 b[0:0] - - -
- - - - - sector_erase 0x0002f054 1 WO uint32 b[0:0] - - -
- - - - - busy 0x0002f055 1 RO uint32 b[0:0] - - -
- - - - - unprotect 0x0002f056 1 WO uint32 b[31:0] - - -
- REG_DPMM_CTRL 1 1 REG rd_usedw 0x0002f082 1 RO uint32 b[31:0] - - -
- REG_DPMM_DATA 1 1 FIFO data 0x0002f080 1 RO uint32 b[31:0] - - -
- REG_MMDP_CTRL 1 1 REG wr_usedw 0x0002f07e 1 RO uint32 b[31:0] - - -
- - - - - wr_availw 0x0002f07f 1 RO uint32 b[31:0] - - -
- REG_MMDP_DATA 1 1 FIFO data 0x0002f07c 1 WO uint32 b[31:0] - - -
- REG_REMU 1 1 REG reconfigure 0x0002f058 1 WO uint32 b[31:0] - - -
- - - - - param 0x0002f059 1 WO uint32 b[2:0] - - -
- - - - - read_param 0x0002f05a 1 WO uint32 b[0:0] - - -
- - - - - write_param 0x0002f05b 1 WO uint32 b[0:0] - - -
- - - - - data_out 0x0002f05c 1 RO uint32 b[23:0] - - -
- - - - - data_in 0x0002f05d 1 WO uint32 b[23:0] - - -
- - - - - busy 0x0002f05e 1 RO uint32 b[0:0] - - -
- REG_SDP_INFO 1 1 REG block_period 0x0002f020 1 RO uint32 b[15:0] - - -
- - - - - n_rn 0x0002f021 1 RW uint32 b[7:0] - - -
- - - - - o_rn 0x0002f022 1 RW uint32 b[7:0] - - -
- - - - - n_si 0x0002f023 1 RW uint32 b[7:0] - - -
- - - - - o_si 0x0002f024 1 RW uint32 b[7:0] - - -
- - - - - beam_repositioning_flag 0x0002f025 1 RW uint32 b[0:0] - - -
- - - - - fsub_type 0x0002f026 1 RO uint32 b[0:0] - - -
- - - - - f_adc 0x0002f027 1 RO uint32 b[0:0] - - -
- - - - - nyquist_zone_index 0x0002f028 1 RW uint32 b[1:0] - - -
- - - - - observation_id 0x0002f029 1 RW uint32 b[31:0] - - -
- - - - - antenna_band_index 0x0002f02a 1 RO uint32 b[0:0] - - -
- - - - - station_id 0x0002f02b 1 RW uint32 b[15:0] - - -
- PIO_JESD_CTRL 1 1 REG enable 0x0002f072 1 RW uint32 b[30:0] - - -
- - - - - reset 0x0002f072 1 RW uint32 b[31:31] - - -
- JESD204B 1 12 REG rx_dll_ctrl 0x0002e014 1 RW uint32 b[16:0] - - 256
- - - - - rx_syncn_sysref_ctrl 0x0002e015 1 RW uint32 b[24:0] - - -
- - - - - rx_csr_sysref_always_on 0x0002e015 1 RW uint32 b[1:1] - - -
- - - - - rx_csr_rbd_offset 0x0002e015 1 RW uint32 b[10:3] - - -
- - - - - rx_csr_lmfc_offset 0x0002e015 1 RW uint32 b[19:12] - - -
- - - - - rx_err0 0x0002e018 1 RW uint32 b[8:0] - - -
- - - - - rx_err1 0x0002e019 1 RW uint32 b[9:0] - - -
- - - - - csr_dev_syncn 0x0002e020 1 RO uint32 b[0:0] - - -
- - - - - csr_rbd_count 0x0002e020 1 RO uint32 b[10:3] - - -
- - - - - rx_status1 0x0002e021 1 RW uint32 b[23:0] - - -
- - - - - rx_status2 0x0002e022 1 RW uint32 b[23:0] - - -
- - - - - rx_status3 0x0002e023 1 RW uint32 b[7:0] - - -
- - - - - rx_ilas_csr_l 0x0002e025 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_f 0x0002e025 1 RW uint32 b[15:8] - - -
- - - - - rx_ilas_csr_k 0x0002e025 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_m 0x0002e025 1 RW uint32 b[31:24] - - -
- - - - - rx_ilas_csr_n 0x0002e026 1 RW uint32 b[4:0] - - -
- - - - - rx_ilas_csr_cs 0x0002e026 1 RW uint32 b[7:6] - - -
- - - - - rx_ilas_csr_np 0x0002e026 1 RW uint32 b[12:8] - - -
- - - - - rx_ilas_csr_subclassv 0x0002e026 1 RW uint32 b[15:13] - - -
- - - - - rx_ilas_csr_s 0x0002e026 1 RW uint32 b[20:16] - - -
- - - - - rx_ilas_csr_jesdv 0x0002e026 1 RW uint32 b[23:21] - - -
- - - - - rx_ilas_csr_cf 0x0002e026 1 RW uint32 b[28:24] - - -
- - - - - rx_ilas_csr_hd 0x0002e026 1 RW uint32 b[31:31] - - -
- - - - - rx_status4 0x0002e03c 1 RW uint32 b[15:0] - - -
- - - - - rx_status5 0x0002e03d 1 RW uint32 b[15:0] - - -
- - - - - rx_status6 0x0002e03e 1 RW uint32 b[23:0] - - -
- - - - - rx_status7 0x0002e03f 1 RO uint32 b[31:0] - - -
+ PIO_PPS 1 1 REG capture_cnt 0x0003b06c 1 RO uint32 b[29:0] - - -
+ - - - - stable 0x0003b06c 1 RO uint32 b[30:30] - - -
+ - - - - toggle 0x0003b06c 1 RO uint32 b[31:31] - - -
+ - - - - expected_cnt 0x0003b06d 1 RW uint32 b[27:0] - - -
+ - - - - edge 0x0003b06d 1 RW uint32 b[31:31] - - -
+ - - - - offset_cnt 0x0003b06e 1 RO uint32 b[27:0] - - -
+ REG_EPCS 1 1 REG addr 0x0003b050 1 WO uint32 b[23:0] - - -
+ - - - - rden 0x0003b051 1 WO uint32 b[0:0] - - -
+ - - - - read_bit 0x0003b052 1 WO uint32 b[0:0] - - -
+ - - - - write_bit 0x0003b053 1 WO uint32 b[0:0] - - -
+ - - - - sector_erase 0x0003b054 1 WO uint32 b[0:0] - - -
+ - - - - busy 0x0003b055 1 RO uint32 b[0:0] - - -
+ - - - - unprotect 0x0003b056 1 WO uint32 b[31:0] - - -
+ REG_DPMM_CTRL 1 1 REG rd_usedw 0x0003b084 1 RO uint32 b[31:0] - - -
+ REG_DPMM_DATA 1 1 FIFO data 0x0003b082 1 RO uint32 b[31:0] - - -
+ REG_MMDP_CTRL 1 1 REG wr_usedw 0x0003b080 1 RO uint32 b[31:0] - - -
+ - - - - wr_availw 0x0003b081 1 RO uint32 b[31:0] - - -
+ REG_MMDP_DATA 1 1 FIFO data 0x0003b07e 1 WO uint32 b[31:0] - - -
+ REG_REMU 1 1 REG reconfigure 0x0003b058 1 WO uint32 b[31:0] - - -
+ - - - - param 0x0003b059 1 WO uint32 b[2:0] - - -
+ - - - - read_param 0x0003b05a 1 WO uint32 b[0:0] - - -
+ - - - - write_param 0x0003b05b 1 WO uint32 b[0:0] - - -
+ - - - - data_out 0x0003b05c 1 RO uint32 b[23:0] - - -
+ - - - - data_in 0x0003b05d 1 WO uint32 b[23:0] - - -
+ - - - - busy 0x0003b05e 1 RO uint32 b[0:0] - - -
+ REG_SDP_INFO 1 1 REG block_period 0x0003b020 1 RO uint32 b[15:0] - - -
+ - - - - n_rn 0x0003b021 1 RW uint32 b[7:0] - - -
+ - - - - o_rn 0x0003b022 1 RW uint32 b[7:0] - - -
+ - - - - n_si 0x0003b023 1 RW uint32 b[7:0] - - -
+ - - - - o_si 0x0003b024 1 RW uint32 b[7:0] - - -
+ - - - - beam_repositioning_flag 0x0003b025 1 RW uint32 b[0:0] - - -
+ - - - - fsub_type 0x0003b026 1 RO uint32 b[0:0] - - -
+ - - - - f_adc 0x0003b027 1 RO uint32 b[0:0] - - -
+ - - - - nyquist_zone_index 0x0003b028 1 RW uint32 b[1:0] - - -
+ - - - - observation_id 0x0003b029 1 RW uint32 b[31:0] - - -
+ - - - - antenna_band_index 0x0003b02a 1 RO uint32 b[0:0] - - -
+ - - - - station_id 0x0003b02b 1 RW uint32 b[15:0] - - -
+ PIO_JESD_CTRL 1 1 REG enable 0x0003b074 1 RW uint32 b[30:0] - - -
+ - - - - reset 0x0003b074 1 RW uint32 b[31:31] - - -
+ JESD204B 1 12 REG rx_dll_ctrl 0x0003a014 1 RW uint32 b[16:0] - - 256
+ - - - - rx_syncn_sysref_ctrl 0x0003a015 1 RW uint32 b[24:0] - - -
+ - - - - rx_csr_sysref_always_on 0x0003a015 1 RW uint32 b[1:1] - - -
+ - - - - rx_csr_rbd_offset 0x0003a015 1 RW uint32 b[10:3] - - -
+ - - - - rx_csr_lmfc_offset 0x0003a015 1 RW uint32 b[19:12] - - -
+ - - - - rx_err0 0x0003a018 1 RW uint32 b[8:0] - - -
+ - - - - rx_err1 0x0003a019 1 RW uint32 b[9:0] - - -
+ - - - - csr_dev_syncn 0x0003a020 1 RO uint32 b[0:0] - - -
+ - - - - csr_rbd_count 0x0003a020 1 RO uint32 b[10:3] - - -
+ - - - - rx_status1 0x0003a021 1 RW uint32 b[23:0] - - -
+ - - - - rx_status2 0x0003a022 1 RW uint32 b[23:0] - - -
+ - - - - rx_status3 0x0003a023 1 RW uint32 b[7:0] - - -
+ - - - - rx_ilas_csr_l 0x0003a025 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_f 0x0003a025 1 RW uint32 b[15:8] - - -
+ - - - - rx_ilas_csr_k 0x0003a025 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_m 0x0003a025 1 RW uint32 b[31:24] - - -
+ - - - - rx_ilas_csr_n 0x0003a026 1 RW uint32 b[4:0] - - -
+ - - - - rx_ilas_csr_cs 0x0003a026 1 RW uint32 b[7:6] - - -
+ - - - - rx_ilas_csr_np 0x0003a026 1 RW uint32 b[12:8] - - -
+ - - - - rx_ilas_csr_subclassv 0x0003a026 1 RW uint32 b[15:13] - - -
+ - - - - rx_ilas_csr_s 0x0003a026 1 RW uint32 b[20:16] - - -
+ - - - - rx_ilas_csr_jesdv 0x0003a026 1 RW uint32 b[23:21] - - -
+ - - - - rx_ilas_csr_cf 0x0003a026 1 RW uint32 b[28:24] - - -
+ - - - - rx_ilas_csr_hd 0x0003a026 1 RW uint32 b[31:31] - - -
+ - - - - rx_status4 0x0003a03c 1 RW uint32 b[15:0] - - -
+ - - - - rx_status5 0x0003a03d 1 RW uint32 b[15:0] - - -
+ - - - - rx_status6 0x0003a03e 1 RW uint32 b[23:0] - - -
+ - - - - rx_status7 0x0003a03f 1 RO uint32 b[31:0] - - -
REG_DP_SHIFTRAM 1 12 REG shift 0x00000c20 1 RW uint32 b[11:0] - - 2
- REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0002f040 1 RW uint32 b[0:0] - - -
- - - - - dp_on_pps 0x0002f040 1 RW uint32 b[1:1] - - -
- - - - - nof_clk_per_sync 0x0002f041 1 RW uint32 b[31:0] - - -
- - - - - bsn_init 0x0002f042 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f043 - - - b[31:0] b[63:32] - -
- - - - - bsn_time_offset 0x0002f044 1 RW uint32 b[9:0] - - -
- REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0002f078 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f079 - - - b[31:0] b[63:32] - -
+ REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0003b040 1 RW uint32 b[0:0] - - -
+ - - - - dp_on_pps 0x0003b040 1 RW uint32 b[1:1] - - -
+ - - - - nof_clk_per_sync 0x0003b041 1 RW uint32 b[31:0] - - -
+ - - - - bsn_init 0x0003b042 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b043 - - - b[31:0] b[63:32] - -
+ - - - - bsn_time_offset 0x0003b044 1 RW uint32 b[9:0] - - -
+ REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0003b07a 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b07b - - - b[31:0] b[63:32] - -
REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - -
@@ -134,7 +134,7 @@ number_of_columns = 13
- - - - phase 0x00000d01 1 RW uint32 b[15:0] - - -
- - - - freq 0x00000d02 1 RW uint32 b[30:0] - - -
- - - - ampl 0x00000d03 1 RW uint32 b[16:0] - - -
- RAM_WG 1 12 RAM data 0x00020000 1024 RW uint32 b[17:0] - - 1024
+ RAM_WG 1 12 RAM data 0x0002c000 1024 RW uint32 b[17:0] - - 1024
RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512
REG_ADUH_MONITOR 1 12 REG mean_sum 0x00000d40 1 RO int64 b[31:0] b[31:0] - 4
- - - - - 0x00000d41 - - - b[31:0] b[63:32] - -
@@ -143,13 +143,13 @@ number_of_columns = 13
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000020 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x00000021 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[15:0] - - 1024
- REG_SI 1 1 REG enable 0x0002f07a 1 RW uint32 b[0:0] - - -
- RAM_FIL_COEFS 1 16 RAM data 0x00024000 1024 RW uint32 b[15:0] - - 1024
- RAM_EQUALIZER_GAINS 1 6 RAM data 0x0002c000 1024 RW cint16_ir b[31:0] - - 1024
- REG_DP_SELECTOR 1 1 REG input_select 0x0002f076 1 RW uint32 b[0:0] - - -
- RAM_ST_SST 1 6 RAM data 0x00028000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - - 0x00028001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_SST 1 1 REG enable 0x0002f070 1 RW uint32 b[0:0] - - -
+ REG_SI 1 1 REG enable 0x0003b07c 1 RW uint32 b[0:0] - - -
+ RAM_FIL_COEFS 1 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - - 1024
+ RAM_EQUALIZER_GAINS 1 6 RAM data 0x00038000 1024 RW cint16_ir b[31:0] - - 1024
+ REG_DP_SELECTOR 1 1 REG input_select 0x0003b078 1 RW uint32 b[0:0] - - -
+ RAM_ST_SST 1 6 RAM data 0x00034000 1024 RW uint64 b[31:0] b[31:0] - 2048
+ - - - - - 0x00034001 - - - b[21:0] b[53:32] - -
+ REG_STAT_ENABLE_SST 1 1 REG enable 0x0003b072 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c41 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - -
@@ -196,23 +196,25 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c6a - - - b[15:0] b[47:32] - -
- - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - -
- REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0002f000 1 RW uint32 b[0:0] - - -
- - - - - ctrl_interval_size 0x0002f001 1 RW uint32 b[30:0] - - -
- - - - - ctrl_start_bsn 0x0002f002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f003 - - - b[31:0] b[63:32] - -
- - - - - mon_current_input_bsn 0x0002f004 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f005 - - - b[31:0] b[63:32] - -
- - - - - mon_input_bsn_at_sync 0x0002f006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f007 - - - b[31:0] b[63:32] - -
- - - - - mon_output_enable 0x0002f008 1 RO uint32 b[0:0] - - -
- - - - - mon_output_sync_bsn 0x0002f009 1 RO uint64 b[31:0] b[31:0] - -
- - - - - - 0x0002f00a - - - b[31:0] b[63:32] - -
- - - - - block_size 0x0002f00b 1 RO uint32 b[31:0] - - -
- RAM_ST_XSQ 1 9 RAM data 0x00018000 144 RW cint64_ir b[31:0] b[31:0] - 1024
- - - - - - 0x00018001 - - - b[31:0] b[63:32] - -
- REG_CROSSLETS_INFO 1 1 REG offset 0x0002f010 15 RW uint32 b[31:0] - - -
- - - - - step 0x0002f01f 1 RW uint32 b[31:0] - - -
- REG_STAT_ENABLE_XST 1 1 REG enable 0x00000c02 1 RW uint32 b[0:0] - - -
+ REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0003b000 1 RW uint32 b[0:0] - - -
+ - - - - ctrl_interval_size 0x0003b001 1 RW uint32 b[30:0] - - -
+ - - - - ctrl_start_bsn 0x0003b002 1 RW uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b003 - - - b[31:0] b[63:32] - -
+ - - - - mon_current_input_bsn 0x0003b004 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b005 - - - b[31:0] b[63:32] - -
+ - - - - mon_input_bsn_at_sync 0x0003b006 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b007 - - - b[31:0] b[63:32] - -
+ - - - - mon_output_enable 0x0003b008 1 RO uint32 b[0:0] - - -
+ - - - - mon_output_sync_bsn 0x0003b009 1 RO uint64 b[31:0] b[31:0] - -
+ - - - - - 0x0003b00a - - - b[31:0] b[63:32] - -
+ - - - - block_size 0x0003b00b 1 RO uint32 b[31:0] - - -
+ RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
+ - - - - - 0x00010001 - - - b[31:0] b[63:32] - -
+ REG_CROSSLETS_INFO 1 1 REG offset 0x0003b010 15 RW uint32 b[31:0] - - -
+ - - - - step 0x0003b01f 1 RW uint32 b[31:0] - - -
+ REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00000c02 1 RW uint32 b[31:0] - - -
+ - - - - unused 0x00000c03 1 RW uint32 b[31:0] - - -
+ REG_STAT_ENABLE_XST 1 1 REG enable 0x0003b070 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000041 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000042 1 RW uint32 b[15:0] - - -
@@ -261,10 +263,10 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0000006a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - -
- RAM_SS_SS_WIDE 2 6 RAM data 0x0001c000 976 RW uint32 b[9:0] - 8192 1024
- RAM_BF_WEIGHTS 2 12 RAM data 0x00010000 976 RW cint16_ir b[31:0] - 16384 1024
- REG_BF_SCALE 2 1 REG scale 0x0002f068 1 RW uint32 b[15:0] - 2 2
- - - - - unused 0x0002f069 1 RW uint32 b[31:0] - - -
+ RAM_SS_SS_WIDE 2 6 RAM data 0x00028000 976 RW uint32 b[9:0] - 8192 1024
+ RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024
+ REG_BF_SCALE 2 1 REG scale 0x0003b068 1 RW uint32 b[15:0] - 2 2
+ - - - - unused 0x0003b069 1 RW uint32 b[31:0] - - -
REG_HDR_DAT 2 1 REG bsn 0x00000c80 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - 0x00000c81 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x00000c82 1 RW uint32 b[15:0] - - -
@@ -307,10 +309,10 @@ number_of_columns = 13
- - - - - 0x00000ca7 - - - b[15:0] b[47:32] - -
- - - - eth_destination_mac 0x00000ca8 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000ca9 - - - b[15:0] b[47:32] - -
- REG_DP_XONOFF 2 1 REG enable_stream 0x0002f064 1 RW uint32 b[0:0] - 2 2
+ REG_DP_XONOFF 2 1 REG enable_stream 0x0003b064 1 RW uint32 b[0:0] - 2 2
RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - 0x00001001 - - - b[21:0] b[53:32] - -
- REG_STAT_ENABLE_BST 2 1 REG enable 0x0002f060 1 RW uint32 b[0:0] - 2 2
+ REG_STAT_ENABLE_BST 2 1 REG enable 0x0003b060 1 RW uint32 b[0:0] - 2 2
REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000080 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - 0x00000081 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000082 1 RW uint32 b[15:0] - - -
@@ -533,6 +535,6 @@ number_of_columns = 13
- - - - - 0x00007c3b - - - b[31:0] b[31:0] - -
- - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00007c3d - - - b[31:0] b[31:0] - -
- REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0002f074 1 RO uint32 b[0:0] - - -
- - - - - xgmii_tx_ready 0x0002f074 1 RO uint32 b[1:1] - - -
- - - - - xgmii_link_status 0x0002f074 1 RO uint32 b[3:2] - - -
\ No newline at end of file
+ REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0003b076 1 RO uint32 b[0:0] - - -
+ - - - - xgmii_tx_ready 0x0003b076 1 RO uint32 b[1:1] - - -
+ - - - - xgmii_link_status 0x0003b076 1 RO uint32 b[3:2] - - -
\ No newline at end of file
diff --git a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
index a0b991efb87598f013bc1b8f1e04e2bf20fa3be8..c5d2937af813507f9342cc4bb25d91604ffb6159 100644
--- a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
+++ b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
@@ -48,6 +48,17 @@ peripherals:
number_of_fields: 15
address_offset: 0x0
+ - peripheral_name: sdp_nof_crosslets # pi_sdp_nof_crosslets.py
+ peripheral_description: "SDP nof crosslets."
+ mm_ports:
+ - mm_port_name: REG_NOF_CROSSLETS
+ mm_port_type: REG
+ mm_port_span: 2 * MM_BUS_SIZE
+ mm_port_description: |
+ "The SDP nof crosslets contains the number of crosslets that are being sent out the UDP offload"
+ fields:
+ - - { field_name: nof_crosslets, access_mode: RW, address_offset: 0x0 }
+ - - { field_name: unused, access_mode: RW, address_offset: 0x4 }
- peripheral_name: sdp_subband_equalizer # pi_sdp_subband_equalizer.py
peripheral_description: "SDP Subband equalizer coefficients."
diff --git a/libraries/dsp/st/st.peripheral.yaml b/libraries/dsp/st/st.peripheral.yaml
index a663665879e5e6e7d3ec68c1938e2e46b7100a95..f09f39852539348c6d4cc9a77b20dc254529d4a3 100644
--- a/libraries/dsp/st/st.peripheral.yaml
+++ b/libraries/dsp/st/st.peripheral.yaml
@@ -139,7 +139,7 @@ peripherals:
# Parameters of pi_st_xst.py, fixed in node_sdp_correlator.vhd / sdp_pkg.vhd
- { name: g_nof_streams, value: 9 } # P_sq
# Parameters of st_xst.vhd, st_xsq_arr.vhd fixed in node_sdp_correlator.vhd / sdp_pkg.vhd
- - { name: g_nof_crosslets, value: 1 } # N_crosslets
+ - { name: g_nof_crosslets, value: 7 } # N_crosslets
- { name: g_nof_signal_inputs, value: 12 } # S_pn = 12
- { name: g_in_data_w, value: 16 } # W_crosslet = 16
- { name: g_stat_data_w, value: 64 } # W_statistic = 64