diff --git a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
index 42e5c311b2ea8cbe072575f3a0d6e631e1c713cd..a0b991efb87598f013bc1b8f1e04e2bf20fa3be8 100644
--- a/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
+++ b/applications/lofar2/libraries/sdp/sdp.peripheral.yaml
@@ -18,19 +18,18 @@ peripherals:
The other info fields apply per antenna band (low band or high band). An FPGA node only
participates in one band."
fields:
- - - { field_name: station_id, mm_width: 16, access_mode: RW, address_offset: 0x30 }
- - - { field_name: antenna_band_index, mm_width: 1, access_mode: RO, address_offset: 0x2C }
- - - { field_name: observation_id, mm_width: 32, access_mode: RW, address_offset: 0x28 }
- - - { field_name: nyquist_zone_index, mm_width: 2, access_mode: RW, address_offset: 0x24 }
- - - { field_name: f_adc, mm_width: 1, access_mode: RO, address_offset: 0x20 }
- - - { field_name: fsub_type, mm_width: 1, access_mode: RO, address_offset: 0x1C }
- - - { field_name: beam_repositioning_flag, mm_width: 1, access_mode: RW, address_offset: 0x18 }
- - - { field_name: O_si, mm_width: 8, access_mode: RW, address_offset: 0x14 }
- - - { field_name: N_si, mm_width: 8, access_mode: RW, address_offset: 0x10 }
- - - { field_name: O_rn, mm_width: 8, access_mode: RW, address_offset: 0xC }
- - - { field_name: N_rn, mm_width: 8, access_mode: RW, address_offset: 0x8 }
- - - { field_name: block_period, mm_width: 16, access_mode: RO, address_offset: 0x4 }
- - - { field_name: beamlet_scale, mm_width: 16, access_mode: RW, address_offset: 0x0 }
+ - - { field_name: station_id, mm_width: 16, access_mode: RW, address_offset: 0x2C }
+ - - { field_name: antenna_band_index, mm_width: 1, access_mode: RO, address_offset: 0x28 }
+ - - { field_name: observation_id, mm_width: 32, access_mode: RW, address_offset: 0x24 }
+ - - { field_name: nyquist_zone_index, mm_width: 2, access_mode: RW, address_offset: 0x20 }
+ - - { field_name: f_adc, mm_width: 1, access_mode: RO, address_offset: 0x1C }
+ - - { field_name: fsub_type, mm_width: 1, access_mode: RO, address_offset: 0x18 }
+ - - { field_name: beam_repositioning_flag, mm_width: 1, access_mode: RW, address_offset: 0x14 }
+ - - { field_name: O_si, mm_width: 8, access_mode: RW, address_offset: 0x10 }
+ - - { field_name: N_si, mm_width: 8, access_mode: RW, address_offset: 0xC }
+ - - { field_name: O_rn, mm_width: 8, access_mode: RW, address_offset: 0x8 }
+ - - { field_name: N_rn, mm_width: 8, access_mode: RW, address_offset: 0x4 }
+ - - { field_name: block_period, mm_width: 16, access_mode: RO, address_offset: 0x0 }
- peripheral_name: sdp_crosslets_subband_select # pi_sdp_crosslets_info.py
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
index bf0dda7f3cb4bc0c62564fd2a38d4de81bbf9b30..ff65bd028369c3506fe83e4e120ddacb57fe6b12 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_beamformer.vhd
@@ -113,6 +113,7 @@ ARCHITECTURE str OF node_sdp_beamformer IS
SIGNAL scope_local_bf_sosi_arr : t_dp_sosi_integer_arr(c_sdp_N_pol-1 DOWNTO 0);
SIGNAL scope_bf_sum_sosi_arr : t_dp_sosi_integer_arr(c_sdp_N_pol-1 DOWNTO 0);
SIGNAL scope_bf_out_sosi_arr : t_dp_sosi_integer_arr(c_sdp_N_pol-1 DOWNTO 0);
+ SIGNAL beamlet_scale : STD_LOGIC_VECTOR(c_sdp_W_beamlet_scale-1 DOWNTO 0);
BEGIN
---------------------------------------------------------------
-- Beamlet Subband Select
@@ -191,7 +192,9 @@ BEGIN
mm_rst => mm_rst,
mm_clk => mm_clk,
-
+
+ reg_gain_re => beamlet_scale,
+
reg_gain_re_mosi => reg_bf_scale_mosi,
reg_gain_re_miso => reg_bf_scale_miso
);
@@ -212,14 +215,15 @@ BEGIN
in_sosi => bf_out_sosi,
out_sosi => bf_udp_sosi,
src_in => bf_udp_siso,
-
+
+ beamlet_scale => beamlet_scale,
sdp_info => sdp_info,
gn_id => gn_id,
eth_src_mac => eth_src_mac,
ip_src_addr => ip_src_addr,
- udp_src_port => udp_src_port,
-
+ udp_src_port => udp_src_port,
+
hdr_fields_out => hdr_fields_out,
reg_hdr_dat_mosi => reg_hdr_dat_mosi,
@@ -296,8 +300,8 @@ BEGIN
reg_hdr_dat_mosi => reg_stat_hdr_dat_mosi,
reg_hdr_dat_miso => reg_stat_hdr_dat_miso,
- sdp_info => sdp_info,
- gn_index => TO_UINT(gn_id),
+ sdp_info => sdp_info,
+ gn_index => TO_UINT(gn_id),
in_sosi => bf_sum_sosi,
out_sosi => bst_udp_sosi,
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
index 025eed1369793e16dee78c209f41eb8fb9758064..9b1a265d65e5a1bd44b9afd0db077a6a355ec5bd 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_beamformer_output.vhd
@@ -60,8 +60,9 @@ ENTITY sdp_beamformer_output IS
out_sosi : OUT t_dp_sosi;
src_in : IN t_dp_siso;
- sdp_info : IN t_sdp_info;
- gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0);
+ sdp_info : IN t_sdp_info;
+ beamlet_scale : IN STD_LOGIC_VECTOR(c_sdp_W_beamlet_scale-1 DOWNTO 0);
+ gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0);
eth_src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0);
ip_src_addr : IN STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0);
@@ -215,7 +216,7 @@ BEGIN
dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_source_info_repositioning_flag" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_source_info_repositioning_flag" )) <= SLV(sdp_info.beam_repositioning_flag);
dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_source_info_gn_id" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_source_info_gn_id" )) <= gn_id;
dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_reserved" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_reserved" )) <= (OTHERS => '0');
- dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_beamlet_scale" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_beamlet_scale" )) <= sdp_info.beamlet_scale;
+ dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_beamlet_scale" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_beamlet_scale" )) <= beamlet_scale;
dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_beamlet_id" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_beamlet_id" )) <= TO_UVEC(c_beamlet_id, c_halfword_w);
dp_offload_tx_hdr_fields(field_hi(c_sdp_cep_hdr_field_arr, "sdp_block_period" ) DOWNTO field_lo(c_sdp_cep_hdr_field_arr, "sdp_block_period" )) <= sdp_info.block_period;
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
index e3497967e850d654ab0c24440e158f6a6442e680..62bd4b9c5e8e3d0e29bce6da7d67ec002bc0a1ba 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_info_reg.vhd
@@ -60,7 +60,7 @@ END sdp_info_reg;
ARCHITECTURE str OF sdp_info_reg IS
- CONSTANT c_field_arr : t_common_field_arr(12 DOWNTO 0) :=
+ CONSTANT c_field_arr : t_common_field_arr(11 DOWNTO 0) :=
( (field_name_pad("station_id"), "RW", 16, field_default(0)),
(field_name_pad("antenna_band_index"), "RO", 1, field_default(0)),
(field_name_pad("observation_id"), "RW", 32, field_default(0)),
@@ -72,8 +72,7 @@ ARCHITECTURE str OF sdp_info_reg IS
(field_name_pad("N_si"), "RW", 8, field_default(0)),
(field_name_pad("O_rn"), "RW", 8, field_default(0)),
(field_name_pad("N_rn"), "RW", 8, field_default(0)),
- (field_name_pad("block_period"), "RO", 16, field_default(0)),
- (field_name_pad("beamlet_scale"), "RW", 16, field_default(0)) );
+ (field_name_pad("block_period"), "RO", 16, field_default(0)) );
SIGNAL mm_fields_in : STD_LOGIC_VECTOR(field_slv_in_len(c_field_arr)-1 DOWNTO 0);
SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_field_arr)-1 DOWNTO 0);
@@ -134,6 +133,5 @@ BEGIN
sdp_info_wr.N_si <= mm_fields_out(field_hi(c_field_arr, "N_si") DOWNTO field_lo(c_field_arr, "N_si"));
sdp_info_wr.O_rn <= mm_fields_out(field_hi(c_field_arr, "O_rn") DOWNTO field_lo(c_field_arr, "O_rn"));
sdp_info_wr.N_rn <= mm_fields_out(field_hi(c_field_arr, "N_rn") DOWNTO field_lo(c_field_arr, "N_rn"));
- sdp_info_wr.beamlet_scale <= mm_fields_out(field_hi(c_field_arr, "beamlet_scale") DOWNTO field_lo(c_field_arr, "beamlet_scale"));
END str;
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index 25745ee6f4b2179b3b16fa5617c88c89e11cb146..235e5a8cc89744f128a594c683b8ac824aa1ab5a 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -56,14 +56,13 @@ PACKAGE sdp_pkg is
O_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
N_rn : STD_LOGIC_VECTOR(7 DOWNTO 0);
block_period : STD_LOGIC_VECTOR(15 DOWNTO 0);
- beamlet_scale : STD_LOGIC_VECTOR(15 DOWNTO 0);
END RECORD;
CONSTANT c_sdp_info_rst : t_sdp_info :=
( (OTHERS => '0'), '0', (OTHERS => '0'), (OTHERS => '0'),
'0', '0', '0',
(OTHERS => '0'), (OTHERS => '0'), (OTHERS => '0'), (OTHERS => '0'),
- (OTHERS => '0'), (OTHERS => '0') );
+ (OTHERS => '0') );
-------------------------------------------------
-- SDP specific parameters as defined in:
@@ -153,7 +152,7 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_bst_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D1"; -- TBC
CONSTANT c_sdp_xst_udp_src_port_15_8 : STD_LOGIC_VECTOR(7 DOWNTO 0) := x"D2"; -- TBC
- CONSTANT c_sdp_stat_nof_hdr_fields : NATURAL := 1+3+12+4+20+1; -- 592b; 18.5 32b words
+ CONSTANT c_sdp_stat_nof_hdr_fields : NATURAL := 1+3+12+4+20+1; -- 608b; 19 32b words
CONSTANT c_sdp_stat_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "1"&"101"&"111111111001"&"0111"&"0100"&"000000000"&"0000100"&"0"; -- 0=data path, 1=MM controlled TODO
--CONSTANT c_sdp_stat_hdr_field_sel : STD_LOGIC_VECTOR(c_sdp_stat_nof_hdr_fields-1 DOWNTO 0) := "0"&"100"&"000000010001"&"0100"&"0100"&"000000010"&"1000000"&"0"; -- 0=data path, 1=MM controlled TODO
diff --git a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
index e5dd58d4268f8d3efbd19229577b823a42c17d19..c5af514ec646acc3987dc5f197dd730d49bd29bc 100644
--- a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
+++ b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_info.vhd
@@ -52,19 +52,18 @@ ARCHITECTURE tb OF tb_sdp_info IS
CONSTANT c_cross_clock_domain_latency : NATURAL := 20;
-- used mm_adresses on mm bus
- CONSTANT c_mm_addr_beamlet_scale : NATURAL := 0;
- CONSTANT c_mm_addr_block_period : NATURAL := 1;
- CONSTANT c_mm_addr_N_rn : NATURAL := 2;
- CONSTANT c_mm_addr_O_rn : NATURAL := 3;
- CONSTANT c_mm_addr_N_si : NATURAL := 4;
- CONSTANT c_mm_addr_O_si : NATURAL := 5;
- CONSTANT c_mm_addr_beam_repositioning_flag : NATURAL := 6;
- CONSTANT c_mm_addr_fsub_type : NATURAL := 7;
- CONSTANT c_mm_addr_f_adc : NATURAL := 8;
- CONSTANT c_mm_addr_nyquist_zone_index : NATURAL := 9;
- CONSTANT c_mm_addr_observation_id : NATURAL := 10;
- CONSTANT c_mm_addr_antenna_band_index : NATURAL := 11;
- CONSTANT c_mm_addr_station_id : NATURAL := 12;
+ CONSTANT c_mm_addr_block_period : NATURAL := 0;
+ CONSTANT c_mm_addr_N_rn : NATURAL := 1;
+ CONSTANT c_mm_addr_O_rn : NATURAL := 2;
+ CONSTANT c_mm_addr_N_si : NATURAL := 3;
+ CONSTANT c_mm_addr_O_si : NATURAL := 4;
+ CONSTANT c_mm_addr_beam_repositioning_flag : NATURAL := 5;
+ CONSTANT c_mm_addr_fsub_type : NATURAL := 6;
+ CONSTANT c_mm_addr_f_adc : NATURAL := 7;
+ CONSTANT c_mm_addr_nyquist_zone_index : NATURAL := 8;
+ CONSTANT c_mm_addr_observation_id : NATURAL := 9;
+ CONSTANT c_mm_addr_antenna_band_index : NATURAL := 10;
+ CONSTANT c_mm_addr_station_id : NATURAL := 11;
SIGNAL tb_end : STD_LOGIC := '0';
SIGNAL tb_mm_reg_end : STD_LOGIC := '0';
@@ -103,7 +102,6 @@ BEGIN
proc_common_wait_some_cycles(mm_clk, 100);
-- default all register hold value 0, try to write 1 in all registers
- proc_mem_mm_bus_wr(c_mm_addr_beamlet_scale ,10 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_block_period ,11 ,mm_clk, reg_miso, reg_mosi); -- RO
proc_mem_mm_bus_wr(c_mm_addr_N_rn ,12 ,mm_clk, reg_miso, reg_mosi);
proc_mem_mm_bus_wr(c_mm_addr_O_rn ,13 ,mm_clk, reg_miso, reg_mosi);
@@ -118,10 +116,6 @@ BEGIN
proc_mem_mm_bus_wr(c_mm_addr_station_id ,17 ,mm_clk, reg_miso, reg_mosi);
proc_common_wait_some_cycles(mm_clk, c_cross_clock_domain_latency);
- proc_mem_mm_bus_rd(c_mm_addr_beamlet_scale, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
- mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT mm_natural_response = 10 REPORT "wrong beamlet_scale" SEVERITY ERROR;
-
proc_mem_mm_bus_rd(c_mm_addr_block_period, mm_clk, reg_mosi); proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, mm_clk);
mm_natural_response <= TO_UINT(reg_miso.rddata); proc_common_wait_some_cycles(mm_clk, 1);
ASSERT mm_natural_response /= 11 REPORT "wrong block_period (not read only)" SEVERITY ERROR;
@@ -223,7 +217,6 @@ BEGIN
BEGIN
proc_common_wait_until_high(mm_clk, tb_mm_reg_end); -- wait for p_mm_reg_stimuli done
- ASSERT TO_UINT(sdp_info.beamlet_scale) = 10 REPORT "wrong sdp_info.beamlet_scale value" SEVERITY ERROR;
ASSERT TO_UINT(sdp_info.block_period) = 4320 REPORT "wrong sdp_info.block_period value" SEVERITY ERROR;
ASSERT TO_UINT(sdp_info.N_rn) = 12 REPORT "wrong sdp_info.N_rn value" SEVERITY ERROR;
ASSERT TO_UINT(sdp_info.O_rn) = 13 REPORT "wrong sdp_info.O_rn value" SEVERITY ERROR;
@@ -262,4 +255,4 @@ BEGIN
sdp_info => sdp_info
);
-END tb;
\ No newline at end of file
+END tb;
diff --git a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
index 42f947700310ff1af936a0e5aa16a945c31765b9..8b439d303ccfec7cc8b2f173d2f33721c83a18b9 100644
--- a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
@@ -163,8 +163,7 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
x"02", -- N_si
x"04", -- O_rn
x"08", -- N_rn
- x"1400", -- block_period = 5120
- x"0000" -- beamlet_scale
+ x"1400" -- block_period = 5120
);
-- Signals used for starting processes.
diff --git a/libraries/base/dp/src/vhdl/mms_dp_gain.vhd b/libraries/base/dp/src/vhdl/mms_dp_gain.vhd
index 76edc92bbf7caafe0b85dd1dd31ec4b9296473b5..36c39c1a4c35a28a9321a1de2fbf048aac236c7e 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_gain.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_gain.vhd
@@ -69,6 +69,9 @@ ENTITY mms_dp_gain IS
reg_gain_im_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_gain_im_miso : OUT t_mem_miso;
+ reg_gain_re : OUT STD_LOGIC_VECTOR(g_gain_w-1 DOWNTO 0);
+ reg_gain_im : OUT STD_LOGIC_VECTOR(g_gain_w-1 DOWNTO 0);
+
-- ST
in_sosi : IN t_dp_sosi;
out_sosi : OUT t_dp_sosi
@@ -122,6 +125,8 @@ BEGIN
reg_gain_im_mosi => reg_gain_im_mosi,
reg_gain_im_miso => reg_gain_im_miso,
+ reg_gain_re => reg_gain_re,
+ reg_gain_im => reg_gain_im,
-- ST
in_sosi_arr => in_sosi_arr,
out_sosi_arr => out_sosi_arr
diff --git a/libraries/base/dp/src/vhdl/mms_dp_gain_arr.vhd b/libraries/base/dp/src/vhdl/mms_dp_gain_arr.vhd
index 90716d3e5ebfd2be33ddda74da0ad2eacdf17004..a78e4374514164982b36225ced0865b76fbaecfa 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_gain_arr.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_gain_arr.vhd
@@ -95,6 +95,9 @@ ENTITY mms_dp_gain_arr IS
reg_gain_im_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_gain_im_miso : OUT t_mem_miso;
+ reg_gain_re : OUT STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0);
+ reg_gain_im : OUT STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0);
+
-- ST
in_sosi_arr : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
out_sosi_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0)
@@ -123,14 +126,17 @@ ARCHITECTURE str OF mms_dp_gain_arr IS
CONSTANT c_mm_reg_init_re : STD_LOGIC_VECTOR(c_mem_reg_init_w-1 DOWNTO 0) := RESIZE_UVEC(c_init_re, c_mem_reg_init_w);
CONSTANT c_mm_reg_init_im : STD_LOGIC_VECTOR(c_mem_reg_init_w-1 DOWNTO 0) := RESIZE_UVEC(c_init_im, c_mem_reg_init_w);
- SIGNAL reg_gain_re : STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0) := c_init_re;
- SIGNAL reg_gain_im : STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0) := c_init_im;
+ SIGNAL i_reg_gain_re : STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0) := c_init_re;
+ SIGNAL i_reg_gain_im : STD_LOGIC_VECTOR(g_nof_streams*g_gain_w-1 DOWNTO 0) := c_init_im;
SIGNAL mult_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
SIGNAL pipelined_in_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
BEGIN
+ reg_gain_re <= i_reg_gain_re;
+ reg_gain_im <= i_reg_gain_im;
+
u_common_reg_r_w_dc_re : ENTITY common_lib.common_reg_r_w_dc
GENERIC MAP (
g_cross_clock_domain => TRUE,
@@ -152,8 +158,8 @@ BEGIN
-- MM registers in st_clk domain
reg_wr_arr => OPEN,
reg_rd_arr => OPEN,
- in_reg => reg_gain_re,
- out_reg => reg_gain_re -- readback via ST clock domain
+ in_reg => i_reg_gain_re,
+ out_reg => i_reg_gain_re -- readback via ST clock domain
);
gen_real_multiply : IF c_real_multiply=TRUE GENERATE
@@ -174,7 +180,7 @@ BEGIN
PORT MAP (
rst => dp_rst,
clk => dp_clk,
- in_a => reg_gain_re((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
+ in_a => i_reg_gain_re((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
in_b => in_sosi_arr(I).data(g_in_dat_w-1 DOWNTO 0),
in_val => in_sosi_arr(I).valid,
out_p => mult_sosi_arr(I).data(g_out_dat_w-1 DOWNTO 0),
@@ -225,11 +231,11 @@ BEGIN
-- MM registers in st_clk domain
reg_wr_arr => OPEN,
reg_rd_arr => OPEN,
- in_reg => reg_gain_im,
- out_reg => reg_gain_im -- readback via ST clock domain
+ in_reg => i_reg_gain_im,
+ out_reg => i_reg_gain_im -- readback via ST clock domain
);
END GENERATE gen_complex_gain;
- -- ELSE: if g_complex_gain=FALSE then use default reg_gain_im, which is then typically g_gain_init_im=0 for all streams.
+ -- ELSE: if g_complex_gain=FALSE then use default i_reg_gain_im, which is then typically g_gain_init_im=0 for all streams.
gen_nof_streams : FOR I IN 0 TO g_nof_streams-1 GENERATE
u_common_complex_mult : ENTITY common_mult_lib.common_complex_mult
@@ -250,8 +256,8 @@ BEGIN
PORT MAP (
rst => dp_rst,
clk => dp_clk,
- in_ar => reg_gain_re((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
- in_ai => reg_gain_im((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
+ in_ar => i_reg_gain_re((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
+ in_ai => i_reg_gain_im((I+1)*g_gain_w-1 DOWNTO I*g_gain_w),
in_br => in_sosi_arr(I).re(g_in_dat_w-1 DOWNTO 0),
in_bi => in_sosi_arr(I).im(g_in_dat_w-1 DOWNTO 0),
in_val => in_sosi_arr(I).valid, -- only propagate valid, not used internally
diff --git a/libraries/base/dp/src/vhdl/mms_dp_scale.vhd b/libraries/base/dp/src/vhdl/mms_dp_scale.vhd
index becfa24af251538337acacadb7c13dfb2c09754d..a9e3a9e4dfa3c9cc1d87e11cf0803c83758f3737 100644
--- a/libraries/base/dp/src/vhdl/mms_dp_scale.vhd
+++ b/libraries/base/dp/src/vhdl/mms_dp_scale.vhd
@@ -66,6 +66,9 @@ ENTITY mms_dp_scale IS
reg_gain_im_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_gain_im_miso : OUT t_mem_miso;
+ reg_gain_re : OUT STD_LOGIC_VECTOR(g_gain_w-1 DOWNTO 0);
+ reg_gain_im : OUT STD_LOGIC_VECTOR(g_gain_w-1 DOWNTO 0);
+
-- ST interface
in_sosi : IN t_dp_sosi;
out_sosi : OUT t_dp_sosi
@@ -105,7 +108,10 @@ BEGIN
reg_gain_re_miso => reg_gain_re_miso,
reg_gain_im_mosi => reg_gain_im_mosi,
reg_gain_im_miso => reg_gain_im_miso,
-
+
+ reg_gain_re => reg_gain_re,
+ reg_gain_im => reg_gain_im,
+
in_sosi => in_sosi,
out_sosi => dp_gain_out_sosi
);