diff --git a/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc b/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
index 2afd4c4d62b605f3e36c511a0bfbba05bef19900..930d7ddab0eae7447b3474dbb0dcc17df3f51116 100644
--- a/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
+++ b/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
@@ -39,6 +39,8 @@ set_clock_groups -asynchronous -group [get_clocks SB_CLK]
 set_clock_groups -asynchronous -group [get_clocks SA_CLK]
 set_clock_groups -asynchronous -group [get_clocks ETH_CLK]
 
+set_clock_groups -asynchronous -group [get_clocks SA_CLK~input~INSERTED_REFCLK_DIVIDER|clkout]
+
 set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[0]]
 set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[1]]
 set_clock_groups -asynchronous -group [get_clocks *u_sopc|the_altpll_0|sd1|pll7|clk[2]]
@@ -60,4 +62,6 @@ set_clock_groups -asynchronous -group [get_clocks ADC_BI_D_CLK]
 set_clock_groups -asynchronous -group [get_clocks {*|receive_pcs0|clkout}]
 # Transceivers: ALTGX generated TX clock
 set_clock_groups -asynchronous -group [get_clocks {*|transmit_pcs0|clkout}]
+# Transceivers: XAUI/10GbE generated clock
+set_clock_groups -asynchronous -group [get_clocks {*|central_clk_div0|coreclkout}]