diff --git a/libraries/base/dp/hdllib.cfg b/libraries/base/dp/hdllib.cfg index 3a75fed46cf35b5f228ddec98938bbc515bc9d3a..f385a11f5901419ab7dc7e14e23b0fc083ac87c2 100644 --- a/libraries/base/dp/hdllib.cfg +++ b/libraries/base/dp/hdllib.cfg @@ -257,6 +257,7 @@ test_bench_files = tb/vhdl/tb_tb_dp_block_gen.vhd tb/vhdl/tb_tb_dp_block_gen_valid_arr.vhd tb/vhdl/tb_tb_dp_bsn_align.vhd + tb/vhdl/tb_tb_dp_bsn_source_v2.vhd tb/vhdl/tb_tb_dp_concat.vhd tb/vhdl/tb_tb_dp_demux.vhd tb/vhdl/tb_tb2_dp_demux.vhd @@ -307,7 +308,6 @@ regression_test_vhdl = tb/vhdl/tb_dp_latency_adapter.vhd tb/vhdl/tb_dp_shiftreg.vhd tb/vhdl/tb_dp_bsn_source.vhd - tb/vhdl/tb_dp_bsn_source_v2.vhd tb/vhdl/tb_mms_dp_bsn_source.vhd tb/vhdl/tb_mms_dp_bsn_source_v2.vhd @@ -317,6 +317,7 @@ regression_test_vhdl = tb/vhdl/tb_tb_dp_block_gen.vhd tb/vhdl/tb_tb_dp_block_gen_valid_arr.vhd tb/vhdl/tb_tb_dp_bsn_align.vhd + tb/vhdl/tb_tb_dp_bsn_source_v2.vhd tb/vhdl/tb_tb_dp_concat.vhd tb/vhdl/tb_tb_dp_demux.vhd tb/vhdl/tb_tb2_dp_demux.vhd diff --git a/libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd b/libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd index 8c5e636000998a0241ab920d5b436f829f47b265..5dedb598b1c64d061f981e6c760bbda82a638598 100644 --- a/libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd +++ b/libraries/base/dp/tb/vhdl/tb_dp_bsn_source_v2.vhd @@ -35,6 +35,9 @@ USE dp_lib.dp_stream_pkg.ALL; USE dp_lib.tb_dp_pkg.ALL; ENTITY tb_dp_bsn_source_v2 IS + GENERIC ( + g_clk_per_sync: NATURAL := 240 + ); END tb_dp_bsn_source_v2; ARCHITECTURE tb OF tb_dp_bsn_source_v2 IS @@ -43,7 +46,6 @@ ARCHITECTURE tb OF tb_dp_bsn_source_v2 IS CONSTANT c_block_size : NATURAL := 32; -- 31; CONSTANT c_bsn_w : NATURAL := 31; -- 16; - CONSTANT c_clk_per_sync : NATURAL := 240; -- 200 * 10**6; CONSTANT c_sync_period : NATURAL := 8; CONSTANT c_sync_offset : NATURAL := 0; -- 3; -- must be < c_sync_period for proc_dp_verify_sync @@ -164,7 +166,7 @@ BEGIN dut : ENTITY work.dp_bsn_source_v2 GENERIC MAP ( g_block_size => c_block_size, - g_nof_clk_per_sync => c_clk_per_sync, + g_nof_clk_per_sync => g_clk_per_sync, g_bsn_w => c_bsn_w ) PORT MAP ( diff --git a/libraries/base/dp/tb/vhdl/tb_dp_pkg.vhd b/libraries/base/dp/tb/vhdl/tb_dp_pkg.vhd index e0afa14eb18a8ca0e364f20437d3446621e0dbdc..3abaf64d91b0589d26d7a6f3e9d07354b083cd57 100644 --- a/libraries/base/dp/tb/vhdl/tb_dp_pkg.vhd +++ b/libraries/base/dp/tb/vhdl/tb_dp_pkg.vhd @@ -2262,7 +2262,7 @@ PACKAGE BODY tb_dp_pkg IS IF sync='1' THEN IF v_tb_bsn_cnt=c_sync_period OR v_tb_bsn_cnt=c_sync_period-1 THEN v_valid_sync_period := TRUE; - REPORT "bsn count valid " & int_to_str(v_tb_bsn_cnt); + --REPORT "bsn count valid " & int_to_str(v_tb_bsn_cnt); ELSE v_valid_sync_period := FALSE; REPORT "bsn count not valid " & int_to_str(v_tb_bsn_cnt) SEVERITY ERROR;