From a49f6bfaeba2e2ea44b1558a71f329d992cb6b20 Mon Sep 17 00:00:00 2001 From: donker <donker@astron.nl> Date: Mon, 9 Aug 2021 10:16:51 +0200 Subject: [PATCH] L2SDP-429, new gold files for lofar2_unb2b_sdp_station.fpga.yaml --- .../lofar2_unb2b_sdp_station.mmap.gold | 6 +++--- .../lofar2_unb2b_sdp_station.mmap.qsys.gold | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold index 706281c2b0..0c222da484 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold @@ -147,7 +147,7 @@ number_of_columns = 13 RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024 REG_DP_SELECTOR 1 1 REG input_select 0x00042000 1 RW uint32 b[0:0] - - - RAM_ST_SST 1 6 RAM data 0x00044000 1024 RW uint64 b[31:0] b[31:0] - 2048 - - - - - - 0x00042001 - - - b[21:0] b[53:32] - - + - - - - - 0x00044001 - - - b[21:0] b[53:32] - - REG_STAT_ENABLE_SST 1 1 REG enable 0x00048000 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x0004a000 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x0004a001 - - - b[31:0] b[63:32] - - @@ -199,7 +199,7 @@ number_of_columns = 13 - - - - - 0x0004c001 - - - b[31:0] b[63:32] - - REG_DP_SYNC_INSERT_V2 1 1 REG nof_blk_per_sync 0x0004e000 1 RW uint32 b[31:0] - - - RAM_ST_XSQ 1 9 RAM data 0x00050000 144 RW cint64_ir b[31:0] b[31:0] - 1028 - - - - - - 0x0004e001 - - - b[31:0] b[63:32] - - + - - - - - 0x00050001 - - - b[31:0] b[63:32] - - REG_CROSSLETS_INFO 1 1 REG offset 0x00058000 15 RW uint32 b[31:0] - - - - - - - step 0x0005800f 1 RW uint32 b[31:0] - - - REG_STAT_ENABLE_XST 1 1 REG enable 0x0005a000 1 RW uint32 b[0:0] - - - @@ -299,7 +299,7 @@ number_of_columns = 13 - - - - - 0x0006e029 - - - b[15:0] b[47:32] - - REG_DP_XONOFF 2 1 REG enable_stream 0x00070000 1 RW uint32 b[0:0] - 2 2 RAM_ST_BST 2 1 RAM data 0x00072000 976 RW uint64 b[31:0] b[31:0] 2048 2048 - - - - - - 0x00070001 - - - b[21:0] b[53:32] - - + - - - - - 0x00072001 - - - b[21:0] b[53:32] - - REG_STAT_ENABLE_BST 2 1 REG enable 0x00074000 1 RW uint32 b[0:0] - 2 2 REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00076000 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - 0x00076001 - - - b[31:0] b[63:32] - - diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold index 7f49417941..bead4c02aa 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold @@ -147,7 +147,7 @@ number_of_columns = 13 RAM_EQUALIZER_GAINS 1 6 RAM data 0x00006000 1024 RW cint16_ir b[31:0] - - 1024 REG_DP_SELECTOR 1 1 REG input_select 0x0002d066 1 RW uint32 b[0:0] - - - RAM_ST_SST 1 6 RAM data 0x00028000 1024 RW uint64 b[31:0] b[31:0] - 2048 - - - - - - 0x0002d067 - - - b[21:0] b[53:32] - - + - - - - - 0x00028001 - - - b[21:0] b[53:32] - - REG_STAT_ENABLE_SST 1 1 REG enable 0x0002d060 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c41 - - - b[31:0] b[63:32] - - @@ -199,7 +199,7 @@ number_of_columns = 13 - - - - - 0x0002d05d - - - b[31:0] b[63:32] - - REG_DP_SYNC_INSERT_V2 1 1 REG nof_blk_per_sync 0x0002d05e 1 RW uint32 b[31:0] - - - RAM_ST_XSQ 1 9 RAM data 0x00018000 144 RW cint64_ir b[31:0] b[31:0] - 1028 - - - - - - 0x0002d05f - - - b[31:0] b[63:32] - - + - - - - - 0x00018001 - - - b[31:0] b[63:32] - - REG_CROSSLETS_INFO 1 1 REG offset 0x0002d000 15 RW uint32 b[31:0] - - - - - - - step 0x0002d00f 1 RW uint32 b[31:0] - - - REG_STAT_ENABLE_XST 1 1 REG enable 0x00000c02 1 RW uint32 b[0:0] - - - @@ -299,7 +299,7 @@ number_of_columns = 13 - - - - - 0x00000ca9 - - - b[15:0] b[47:32] - - REG_DP_XONOFF 2 1 REG enable_stream 0x0002d054 1 RW uint32 b[0:0] - 2 2 RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048 - - - - - - 0x0002d055 - - - b[21:0] b[53:32] - - + - - - - - 0x00001001 - - - b[21:0] b[53:32] - - REG_STAT_ENABLE_BST 2 1 REG enable 0x0002d050 1 RW uint32 b[0:0] - 2 2 REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000080 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - 0x00000081 - - - b[31:0] b[63:32] - - -- GitLab