diff --git a/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd b/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
index 7b41b30b77103c1e7b6204d7e2700e761c970bec..34ce929875ad666dc5e6535a8d008dc857d513d1 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
@@ -26,7 +26,10 @@ USE common_lib.common_pkg.ALL;
 USE dp_lib.dp_stream_pkg.ALL;
 
 -- Purpose:
+-- . Provide an array of multipliers with streaming I/O
 -- Description:
+-- . Multiplies snk_in_2arr_2[i][0] with snk_in_2arr_2[i][1] yielding 
+--   src_out_2arr[i] for i in 0..g_nof_inputs-1.
 
 ENTITY corr_multiplier IS
   GENERIC (
@@ -34,7 +37,11 @@ ENTITY corr_multiplier IS
    ); 
   PORT (
     rst            : IN  STD_LOGIC;
-    clk            : IN  STD_LOGIC
+    clk            : IN  STD_LOGIC;
+
+    snk_in_2arr_2  : IN  t_dp_sosi_2arr_2(g_nof_inputs);
+
+    src_out_2arr   : OUT t_dp_sosi_2arr_2(g_nof_inputs)
   );
 END corr_multiplier;
 
@@ -42,5 +49,33 @@ ARCHITECTURE rtl OF corr_multiplier IS
 
 BEGIN
 
+  gen_common_complex_mult : FOR i IN 0 TO g_nof_inputs-1 GENERATE
+    u_common_complex_mult : ENTITY work.common_complex_mult(rtl)
+    --u_dut : ENTITY work.common_complex_mult(rtl_dsp)
+    --u_dut : ENTITY work.common_complex_mult(altera_rtl)
+    --u_dut : ENTITY work.common_complex_mult(str)
+    --u_dut : ENTITY work.common_complex_mult(stratix4)
+    --u_dut : ENTITY work.common_complex_mult(str_stratix4)
+    GENERIC MAP (
+      g_in_a_w           => 18,
+      g_in_b_w           => 18,
+      g_out_p_w          => 36,     -- default use g_out_p_w = g_in_a_w+g_in_b_w
+      g_conjugate_b      => FALSE,
+      g_pipeline_input   => 1,
+      g_pipeline_product => 0,
+      g_pipeline_adder   => 1,
+      g_pipeline_output  => 1
+    )
+    PORT MAP (
+      clk        => clk,
+      clken      => '1',
+      in_ar      => snk_in_2arr_2(i)(0).re(17 DOWNTO 0),
+      in_ai      => snk_in_2arr_2(i)(0).im(17 DOWNTO 0),
+      in_br      => snk_in_2arr_2(i)(1).re(17 DOWNTO 0),
+      in_bi      => snk_in_2arr_2(i)(1).im(17 DOWNTO 0),
+      out_pr     => src_out_2arr(i).re(35 DOWNTO 0),
+      out_pi     => src_out_2arr(i).im(35 DOWNTO 0)
+    );     
+  END GENERATE;
 
 END rtl;