diff --git a/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd b/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
index 93503fa074181dcf3aa1a2f39d57e8dbc1646a05..30a2b58a1cd3f2906dd338ab6c9804660ee00ea2 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
@@ -125,7 +125,8 @@ ARCHITECTURE rtl OF dp_bsn_align_v2 IS
rd_pointer : INTEGER; -- use integer to detect need to wrap to natural
rd_offset : STD_LOGIC_VECTOR(c_mem_ram.adr_w-1 DOWNTO 0);
rd_copi : t_mem_copi;
- out_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); -- used to hold bsn, otherwise combinatorial
+ fill_cipo_arr : t_mem_cipo_arr(g_nof_streams-1 DOWNTO 0); -- used combinatorial to contain rd_cipo_arr from buffer or filler data
+ out_bsn : STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0); -- hold BSN for streaming output
END RECORD;
CONSTANT c_reg_rst : t_reg := (0,
@@ -138,7 +139,8 @@ ARCHITECTURE rtl OF dp_bsn_align_v2 IS
0,
(OTHERS=>'0'),
c_mem_copi_rst,
- (OTHERS=>c_dp_sosi_rst));
+ (OTHERS=>c_mem_cipo_rst),
+ (OTHERS=>'0'));
-- State registers
SIGNAL r : t_reg;
@@ -179,13 +181,15 @@ BEGIN
VARIABLE v_pointer_slv : STD_LOGIC_VECTOR(c_blk_pointer_w-1 DOWNTO 0);
VARIABLE v_product_slv : STD_LOGIC_VECTOR(c_product_w-1 DOWNTO 0);
VARIABLE v_filler_flag : STD_LOGIC;
- VARIABLE v_rd_cipo_arr : t_mem_cipo_arr(g_nof_streams-1 DOWNTO 0);
+ VARIABLE v_out_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
BEGIN
v := r;
v.mm_sosi := func_dp_stream_reset_control(r.mm_sosi);
v.wr_copi_arr := RESET_MEM_COPI_CTRL(r.wr_copi_arr);
+ ----------------------------------------------------------------------------
-- p_write_arr
+ ----------------------------------------------------------------------------
FOR I IN 0 TO g_nof_streams-1 LOOP
-- p_write
IF in_sosi_arr_p(I).valid = '1' THEN
@@ -206,7 +210,9 @@ BEGIN
END IF;
END LOOP;
+ ----------------------------------------------------------------------------
-- p_control, all at sop of local reference input 0
+ ----------------------------------------------------------------------------
v_ref_sosi := in_sosi_arr_p(0);
IF v_ref_sosi.sop = '1' THEN
-- . write sync & bsn buffer
@@ -257,25 +263,36 @@ BEGIN
END LOOP;
END IF;
+ ----------------------------------------------------------------------------
-- p_read
- -- . prepare the rd data
- v_rd_cipo_arr := rd_cipo_arr; -- default use input data
+ ----------------------------------------------------------------------------
+
+ -- Read the data from the buffer, or replace a block by filler data
+ -- . default use input data from the circular buffer
+ v.fill_cipo_arr := rd_cipo_arr;
+ -- . if necessary, replace a stream by filler data
FOR I IN 0 TO g_nof_streams-1 LOOP
IF r.use_filler_data(I) = '1' THEN
- v_rd_cipo_arr(I).rddata := TO_MEM_SDATA(g_filler_value); -- replace by filler data
+ v.fill_cipo_arr(I).rddata := TO_MEM_SDATA(g_filler_value);
END IF;
END LOOP;
IF g_use_mm_output THEN
- -- . adjust the rd address
- v.rd_copi := mm_copi; -- do output via MM interface
+ --------------------------------------------------------------------------
+ -- Do the output via the MM interface
+ --------------------------------------------------------------------------
+ -- . adjust the rd address to the current buffer output block
+ v.rd_copi := mm_copi;
v.rd_copi.address := RESIZE_MEM_ADDRESS(ADD_UVEC(r.rd_offset, mm_copi.address)); -- sum yields c_mem_ram.adr_w bits, because left operand determines width
- -- output via MM interface
- mm_cipo_arr <= v_rd_cipo_arr;
+ -- . output via MM interface
+ mm_cipo_arr <= v.fill_cipo_arr;
ELSE
+ --------------------------------------------------------------------------
+ -- Do the output via the DP streaming interface
+ --------------------------------------------------------------------------
-- . adjust the rd address
- v.rd_copi := dp_copi; -- do output via DP streaming interface
+ v.rd_copi := dp_copi;
v.rd_copi.address := RESIZE_MEM_ADDRESS(ADD_UVEC(r.rd_offset, dp_copi.address)); -- sum yields c_mem_ram.adr_w bits, because left operand determines width
-- . hold mm_sosi.sync, bsn
@@ -283,23 +300,24 @@ BEGIN
dp_sosi <= r.mm_sosi;
END IF;
- -- apply mm_sosi.sync, bsn at sop to all streams in out_sosi_arr
- v.out_sosi_arr := rd_sosi_arr;
+ -- apply mm_sosi.sync and bsn at sop to all streams in out_sosi_arr
+ v_out_sosi_arr := rd_sosi_arr; -- the input data from the buffer or filler data (= v.fill_cipo_arr in streaming format)
IF rd_sosi_arr(0).sop = '1' THEN
- v.out_sosi_arr := func_dp_stream_arr_set(v.out_sosi_arr, dp_sosi.sync, "SYNC");
- v.out_sosi_arr := func_dp_stream_arr_set(v.out_sosi_arr, dp_sosi.bsn, "BSN");
+ v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, dp_sosi.sync, "SYNC");
+ v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, dp_sosi.bsn, "BSN");
+ v.out_bsn := dp_sosi.bsn(g_bsn_w-1 DOWNTO 0); -- hold BSN until next sop, to ease view in wave window
ELSE
- -- hold sosi.bsn until next sop, to easy view in wave window
- FOR I IN 0 TO g_nof_streams-1 LOOP
- v.out_sosi_arr(I).bsn := r.out_sosi_arr(I).bsn;
- END LOOP;
+ -- hold BSN until next sop, to ease view in wave window
+ v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, r.out_bsn, "BSN");
END IF;
- -- output via DP streaming interface
- out_sosi_arr <= v.out_sosi_arr;
+ -- . output via DP streaming interface
+ out_sosi_arr <= v_out_sosi_arr;
END IF;
+ ----------------------------------------------------------------------------
-- next state
+ ----------------------------------------------------------------------------
nxt_r <= v;
END PROCESS;
@@ -328,9 +346,6 @@ BEGIN
------------------------------------------------------------------------------
-- MM to streaming DP
------------------------------------------------------------------------------
- gen_use_mm_output : IF g_use_mm_output GENERATE
-
- END GENERATE;
gen_streaming_output : IF NOT g_use_mm_output GENERATE
dp_copi <= dp_copi_arr(0);
@@ -353,12 +368,11 @@ BEGIN
start_address => 0,
mm_done => dp_done_arr(I),
mm_mosi => dp_copi_arr(I),
- mm_miso => rd_cipo_arr(I),
+ mm_miso => nxt_r.fill_cipo_arr(I),
out_sosi => rd_sosi_arr(I),
out_siso => c_dp_siso_rdy
);
END GENERATE;
-
END GENERATE;