From a2cb4855ff31186447bb3270ac3da4d52e1a85d4 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Mon, 14 Nov 2022 12:36:15 +0100
Subject: [PATCH] corrected IP revision hashes used in tcl scripts
---
.../altera_emif_1910/compile_ip.tcl | 14 ++++++++++++++
.../altera_emif_arch_nf_191/compile_ip.tcl | 16 ++++++++++++++++
.../ddr4_16g_1600_64b/copy_hex_files.tcl | 6 +++---
.../ddr4_16g_1600_72b/copy_hex_files.tcl | 6 +++---
4 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
index 490f20d9a9..030db3f5a6 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_1910/compile_ip.tcl
@@ -31,6 +31,20 @@
vmap altera_emif_arch_nf_191 ./work/
+# ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy.vhd" -work altera_emif_arch_nf_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
+
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
diff --git a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
index 2dadb95b50..2db3696947 100644
--- a/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
+++ b/libraries/technology/ip_arria10_e2sg/altera_libraries/altera_emif_arch_nf_191/compile_ip.tcl
@@ -30,6 +30,20 @@
vmap altera_emif_arch_nf_191 ./work/
+# ddr4_16g_1600_64b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_64b/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy.vhd" -work altera_emif_arch_nf_191
+
+# ddr4_16g_1600_72b
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_16g_1600_72b/sim"
+
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_top.sv" -work altera_emif_arch_nf_191
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy_io_aux.sv" -work altera_emif_arch_nf_191
+ vcom "$IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_slbjghy.vhd" -work altera_emif_arch_nf_191
+
# ddr4_8g_1600
set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2sg_ddr4_8g_1600/sim"
@@ -75,3 +89,5 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e
vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/twentynm_io_12_lane_nf5es_encrypted_abphy.sv" -work altera_emif_arch_nf_191
vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/io_12_lane_bcm__nf5es_abphy.sv" -work altera_emif_arch_nf_191
vlog -sv "$IP_DIR/../altera_emif_arch_nf_191/sim/io_12_lane__nf5es_abphy.sv" -work altera_emif_arch_nf_191
+
+
diff --git a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/copy_hex_files.tcl b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/copy_hex_files.tcl
index c091267717..7e60bb27c5 100644
--- a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_64b/copy_hex_files.tcl
@@ -27,7 +27,7 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
file copy -force $IP_DIR/../altera_avalon_onchip_memory2_1920/sim/seq_cal_soft_m20k.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_qssf3hq_seq_cal.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_qssf3hq_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_qssf3hq_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_seq_cal.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_64b_altera_emif_arch_nf_191_ppinzjy_seq_params_synth.hex ./
}
diff --git a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_72b/copy_hex_files.tcl b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_72b/copy_hex_files.tcl
index 5e8238ab45..7b32ef5337 100644
--- a/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_72b/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10_e2sg/ddr4_16g_1600/ddr4_16g_1600_72b/copy_hex_files.tcl
@@ -27,7 +27,7 @@ set IP_DIR "$env(RADIOHDL_BUILD_DIR)/$env(BUILDSET)/qsys-generate/ip_arria10_e2s
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
file copy -force $IP_DIR/../altera_avalon_onchip_memory2_1920/sim/seq_cal_soft_m20k.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_qssf3hq_seq_cal.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_qssf3hq_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_qssf3hq_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_seq_cal.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_191/sim/ip_arria10_e2sg_ddr4_16g_1600_72b_altera_emif_arch_nf_191_slbjghy_seq_params_synth.hex ./
}
--
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