diff --git a/libraries/base/diag/src/vhdl/mms_diag_rx_seq.vhd b/libraries/base/diag/src/vhdl/mms_diag_rx_seq.vhd
index 0dcf3a6c6e44736dd954556918cc2a55ade335b6..2c52ecbd942dcf8b6d6332a8da848807501a7a35 100644
--- a/libraries/base/diag/src/vhdl/mms_diag_rx_seq.vhd
+++ b/libraries/base/diag/src/vhdl/mms_diag_rx_seq.vhd
@@ -148,6 +148,7 @@ ARCHITECTURE str OF mms_diag_rx_seq IS
                                                                                      ( field_name_pad("control"),   "RW",        2, field_default(0) ));  -- [0] = control[1:0] = diag_sel & diag_en
                                   
   CONSTANT c_reg_slv_w   : NATURAL := c_mm_reg.nof_dat*c_mm_reg.dat_w;
+  CONSTANT c_reg_dat_w   : NATURAL := smallest(c_word_w, g_seq_dat_w);
   
   CONSTANT c_nof_steps_wi     : NATURAL := c_diag_seq_rx_reg_nof_steps_wi;
   
@@ -251,7 +252,7 @@ BEGIN
     diag_sel_arr(I)  <= ctrl_reg_arr(I)(1);  -- address 0, data bit [1]
     
     gen_diag_steps_2arr : FOR J IN 0 TO g_nof_steps-1 GENERATE
-      diag_steps_2arr(I)(J) <= TO_SINT(ctrl_reg_arr(I)(g_seq_dat_w-1 + (c_nof_steps_wi+J)*c_word_w DOWNTO (c_nof_steps_wi+J)*c_word_w));  -- address 4, 5, 6, 7
+      diag_steps_2arr(I)(J) <= TO_SINT(ctrl_reg_arr(I)(c_reg_dat_w-1 + (c_nof_steps_wi+J)*c_word_w DOWNTO (c_nof_steps_wi+J)*c_word_w));  -- address 4, 5, 6, 7
     END GENERATE;
     
     -- . read stat_reg_arr