From a1d7328fa2560aff760f99c1cf731653b8aa849b Mon Sep 17 00:00:00 2001 From: Pepping <pepping> Date: Fri, 31 Jul 2015 09:49:59 +0000 Subject: [PATCH] Added BSN monitor Added alternative mapping of usr_arr2 --- .../vhdl/node_apertif_unb1_cor_mesh_ref.vhd | 150 +++++++++++++----- 1 file changed, 111 insertions(+), 39 deletions(-) diff --git a/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd b/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd index 047f2bad12..2e315dcc5d 100644 --- a/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd +++ b/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd @@ -170,6 +170,44 @@ ARCHITECTURE str OF node_apertif_unb1_cor_mesh_ref IS (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0) ); + +--This is the TEST setting: +-- CONSTANT c_sel_apertif_cor: t_sel_table := +-- ( +-- --FN0 FN1 FN2 FN3 BN0 BN1 BN2 BN3 +-- ( 17, 8, 11, 14, 10, 10, 10, 10, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 0 +-- ( 8, 11, 14, 17, 13, 13, 13, 13, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 1 +-- ( 11, 14, 17, 8, 16, 16, 16, 16, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 2 +-- ( 14, 17, 8, 11, 19, 19, 19, 19, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 3 +-- ( 10, 10, 10, 10, 8, 17, 14, 11, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 4 +-- ( 13, 13, 13, 13, 11, 8, 17, 14, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 5 +-- ( 16, 16, 16, 16, 14, 11, 8, 17, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 6 +-- ( 19, 19, 19, 19, 17, 14, 11, 8, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Local processing output 7 +-- ( 1 , 1 , 1 , 1 , 0 , 0 , 0 , 0 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 0 +-- ( 2 , 0 , 6 , 4 , 1 , 3 , 5 , 7 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 1 +-- ( 9 , 12, 15, 18, 12, 15, 18, 9 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 2 +-- ( 3 , 3 , 3 , 3 , 2 , 2 , 2 , 2 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 3 +-- ( 4 , 2 , 0 , 6 , 7 , 1 , 3 , 5 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 4 +-- ( 12, 15, 18, 9 , 9 , 12, 15, 18, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 5 +-- ( 5 , 5 , 5 , 5 , 4 , 4 , 4 , 4 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 6 +-- ( 6 , 4 , 2 , 0 , 5 , 7 , 1 , 3 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 7 +-- ( 15, 18, 9 , 12, 18, 9 , 12, 15, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 8 +-- ( 7 , 7 , 7 , 7 , 6 , 6 , 6 , 6 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 9 +-- ( 0 , 6 , 4 , 2 , 3 , 5 , 7 , 1 , 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 10 +-- ( 18, 9 , 12, 15, 15, 18, 9 , 12, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), -- Mesh Transmit output 11 +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0), +-- (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0) +-- ); ----------------------------------------------------------------------------- -- Block Generator ----------------------------------------------------------------------------- @@ -198,17 +236,15 @@ ARCHITECTURE str OF node_apertif_unb1_cor_mesh_ref IS ----------------------------------------------------------------------------- -- BSN Monitor ----------------------------------------------------------------------------- - CONSTANT c_bsn_mon_nof_streams : NATURAL := 1; - CONSTANT c_bsn_sync_time_out : NATURAL := (800000*256*10)/8; - + CONSTANT c_nof_bsn_streams : NATURAL := 2; CONSTANT c_distr_nof_streams : NATURAL := c_bg_nof_streams + c_mesh_nof_streams; - + ----------------------------------------------------------------------------- -- Data Buffer ----------------------------------------------------------------------------- CONSTANT c_db_nof_streams : NATURAL := c_bg_nof_streams; - CONSTANT c_db_nof_data : NATURAL := 128; - CONSTANT c_db_data_w : NATURAL := g_usr_data_w; + CONSTANT c_db_nof_data : NATURAL := 8; + CONSTANT c_db_data_w : NATURAL := g_usr_data_w/2; CONSTANT c_db_data_type_re : t_diag_data_type_enum := e_real; CONSTANT c_db_data_type_im : t_diag_data_type_enum := e_imag; @@ -235,27 +271,30 @@ ARCHITECTURE str OF node_apertif_unb1_cor_mesh_ref IS SIGNAL fifo_snk_in_arr : t_dp_sosi_arr(c_db_nof_streams-1 DOWNTO 0); --. BSN Aligner - SIGNAL bsn_align_snk_in_arr : t_dp_sosi_arr(c_db_nof_streams-1 DOWNTO 0); - SIGNAL bsn_align_snk_out_arr : t_dp_siso_arr(c_db_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL bsn_align_src_in_arr : t_dp_siso_arr(c_db_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL bsn_align_src_out_arr : t_dp_sosi_arr(c_db_nof_streams-1 DOWNTO 0); + SIGNAL bsn_align_snk_in_arr : t_dp_sosi_arr(c_db_nof_streams-1 DOWNTO 0); + SIGNAL bsn_align_snk_out_arr : t_dp_siso_arr(c_db_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL bsn_align_src_in_arr : t_dp_siso_arr(c_db_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL bsn_align_src_out_arr : t_dp_sosi_arr(c_db_nof_streams-1 DOWNTO 0); + + --. BSN Monitor + SIGNAL bsn_sosi_arr : t_dp_sosi_arr(c_nof_bsn_streams-1 DOWNTO 0); --. Rewire - SIGNAL distr_input_sosi_arr : t_dp_sosi_arr(c_distr_nof_streams-1 DOWNTO 0); - SIGNAL distr_input_siso_arr : t_dp_siso_arr(c_distr_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - SIGNAL distr_output_sosi_arr : t_dp_sosi_arr(c_distr_nof_streams-1 DOWNTO 0); - SIGNAL distr_output_siso_arr : t_dp_siso_arr(c_distr_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL distr_input_sosi_arr : t_dp_sosi_arr(c_distr_nof_streams-1 DOWNTO 0); + SIGNAL distr_input_siso_arr : t_dp_siso_arr(c_distr_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + SIGNAL distr_output_sosi_arr : t_dp_sosi_arr(c_distr_nof_streams-1 DOWNTO 0); + SIGNAL distr_output_siso_arr : t_dp_siso_arr(c_distr_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); --. Mesh terminal - SIGNAL tx_usr_siso_2arr : t_unb1_board_mesh_siso_2arr; - SIGNAL tx_usr_sosi_2arr : t_unb1_board_mesh_sosi_2arr; - SIGNAL rx_usr_siso_2arr : t_unb1_board_mesh_siso_2arr; - SIGNAL rx_usr_sosi_2arr : t_unb1_board_mesh_sosi_2arr; + SIGNAL tx_usr_siso_2arr : t_unb1_board_mesh_siso_2arr; + SIGNAL tx_usr_sosi_2arr : t_unb1_board_mesh_sosi_2arr; + SIGNAL rx_usr_siso_2arr : t_unb1_board_mesh_siso_2arr; + SIGNAL rx_usr_sosi_2arr : t_unb1_board_mesh_sosi_2arr; --. Databuffer - SIGNAL db_snk_in_arr : t_dp_sosi_arr(c_bg_nof_streams-1 DOWNTO 0); - SIGNAL db_snk_out_arr : t_dp_siso_arr(c_bg_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); - + SIGNAL db_snk_in_arr : t_dp_sosi_arr(c_bg_nof_streams-1 DOWNTO 0); + SIGNAL db_snk_out_arr : t_dp_siso_arr(c_bg_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy); + BEGIN --------------------------------------------------------------------------------------- @@ -271,7 +310,7 @@ BEGIN g_nof_streams => c_bg_nof_streams, -- BG settings g_use_bg_buffer_ram => TRUE, - g_buf_dat_w => c_nof_complex*c_in_dat_w, + g_buf_dat_w => c_in_dat_w, g_buf_addr_w => c_bg_addr_w, g_file_name_prefix => c_file_name_prefix, -- User input multiplexer option @@ -302,8 +341,12 @@ BEGIN --------------------------------------------------------------------------------------- gen_i_rx : FOR I IN 0 TO g_nof_bus-1 GENERATE gen_j_rx : FOR J IN 0 TO g_usr_nof_streams-1 GENERATE +-- rx_mesh_sosi_arr(I*g_usr_nof_streams + J) <= rx_usr_sosi_2arr(I)(g_usr_nof_streams-1-J); +-- rx_usr_siso_2arr(I)(g_usr_nof_streams-1-J)<= rx_mesh_siso_arr(I*g_usr_nof_streams + J); + rx_mesh_sosi_arr(I*g_usr_nof_streams + J) <= rx_usr_sosi_2arr(I)(J); - rx_usr_siso_2arr(I)(J) <= rx_mesh_siso_arr(I*g_usr_nof_streams + J); + rx_usr_siso_2arr(I)(J) <= rx_mesh_siso_arr(I*g_usr_nof_streams + J); + END GENERATE; END GENERATE; @@ -312,8 +355,12 @@ BEGIN --------------------------------------------------------------------------------------- gen_i_tx : FOR I IN 0 TO g_nof_bus-1 GENERATE gen_j_tx : FOR J IN 0 TO g_usr_nof_streams-1 GENERATE - tx_usr_sosi_2arr(I)(J) <= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); +-- tx_usr_sosi_2arr(I)(g_usr_nof_streams-1-J)<= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); +-- tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(g_usr_nof_streams-1-J); + + tx_usr_sosi_2arr(I)(J) <= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(J); + END GENERATE; END GENERATE; @@ -343,8 +390,8 @@ BEGIN output_siso_arr => distr_output_siso_arr ); - fifo_snk_in_arr <= distr_output_sosi_arr(c_bg_nof_streams-1 DOWNTO 0); - tx_mesh_sosi_arr <= distr_output_sosi_arr(c_bg_nof_streams + c_mesh_nof_streams-1 DOWNTO c_bg_nof_streams); + fifo_snk_in_arr <= distr_output_sosi_arr(c_bg_nof_streams-1 DOWNTO 0); + tx_mesh_sosi_arr <= distr_output_sosi_arr(c_bg_nof_streams + c_mesh_nof_streams-1 DOWNTO c_bg_nof_streams); distr_output_siso_arr(c_bg_nof_streams-1 DOWNTO 0) <= fifo_snk_out_arr; distr_output_siso_arr(c_bg_nof_streams + c_mesh_nof_streams-1 DOWNTO c_bg_nof_streams) <= tx_mesh_siso_arr; @@ -423,13 +470,13 @@ BEGIN gen_fifos : FOR I IN 0 TO c_db_nof_streams-1 GENERATE u_fifo : ENTITY dp_lib.dp_fifo_sc GENERIC MAP ( - g_data_w => g_usr_data_w, --: NATURAL := 16; -- Should be 2 times the c_complex_w if g_use_complex = TRUE - g_bsn_w => 1, --: NATURAL := 1; - g_use_bsn => TRUE, --: BOOLEAN := FALSE; - g_use_sync => TRUE, --: BOOLEAN := FALSE; - g_use_ctrl => TRUE, --: BOOLEAN := TRUE; -- sop & eop - g_use_complex => TRUE, --: BOOLEAN := FALSE; -- TRUE feeds the concatenated complex fields (im & re) through the FIFO instead of the data field. - g_fifo_size => 512 --: NATURAL := 512; -- (16+2) * 512 = 1 M9K, g_data_w+2 for sop and eop + g_data_w => g_usr_data_w, --: NATURAL := 16; -- Should be 2 times the c_complex_w if g_use_complex = TRUE + g_bsn_w => c_dp_stream_bsn_w,--: NATURAL := 1; + g_use_bsn => TRUE, --: BOOLEAN := FALSE; + g_use_sync => TRUE, --: BOOLEAN := FALSE; + g_use_ctrl => TRUE, --: BOOLEAN := TRUE; -- sop & eop + g_use_complex => TRUE, --: BOOLEAN := FALSE; -- TRUE feeds the concatenated complex fields (im & re) through the FIFO instead of the data field. + g_fifo_size => 512 --: NATURAL := 512; -- (16+2) * 512 = 1 M9K, g_data_w+2 for sop and eop ) PORT MAP( rst => dp_rst, @@ -446,10 +493,9 @@ BEGIN src_out => bsn_align_snk_in_arr(I) ); END GENERATE; - - + ----------------------------------------------------------------------------- - -- BSN ALIGNER I for 8 streams that are processed locally + -- BSN ALIGNER for 8 streams that are processed locally ----------------------------------------------------------------------------- u_dp_bsn_align : ENTITY dp_lib.dp_bsn_align GENERIC MAP ( @@ -471,7 +517,33 @@ BEGIN src_in_arr => bsn_align_src_in_arr, src_out_arr => db_snk_in_arr ); - + + u_bsn_monitor : ENTITY dp_lib.mms_dp_bsn_monitor + GENERIC MAP ( + g_nof_streams => c_nof_bsn_streams, -- Check one input and one output stream + g_cross_clock_domain => TRUE, + g_bsn_w => c_dp_stream_bsn_w, + g_cnt_sop_w => c_word_w, + g_cnt_valid_w => c_word_w, + g_log_first_bsn => TRUE + ) + PORT MAP ( + -- Memory-mapped clock domain + mm_rst => mm_rst, + mm_clk => mm_clk, + reg_mosi => reg_bsn_monitor_mosi, + reg_miso => reg_bsn_monitor_miso, + + -- Streaming clock domain + dp_rst => dp_rst, + dp_clk => dp_clk, + in_siso_arr => (OTHERS=>c_dp_siso_rdy), + in_sosi_arr => bsn_sosi_arr + ); + + bsn_sosi_arr(0) <= bsn_align_snk_in_arr(0); + bsn_sosi_arr(1) <= db_snk_in_arr(0); + ---------------------------------------------------------------------------- -- Sink: data buffer real ---------------------------------------------------------------------------- @@ -481,7 +553,7 @@ BEGIN g_data_type => c_db_data_type_re, g_data_w => c_db_data_w, g_buf_nof_data => c_db_nof_data, - g_buf_use_sync => TRUE + g_buf_use_sync => FALSE ) PORT MAP ( -- System @@ -508,7 +580,7 @@ BEGIN g_data_type => c_db_data_type_im, g_data_w => c_db_data_w, g_buf_nof_data => c_db_nof_data, - g_buf_use_sync => TRUE + g_buf_use_sync => FALSE ) PORT MAP ( -- System -- GitLab