diff --git a/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys b/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
index bf07dfab057a49e4bf49800e915f2cc8807d9e1d..9f978137f394b7e2c4a9d61beacedc92c3748a09 100644
--- a/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
+++ b/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
@@ -117,7 +117,7 @@
{
datum baseAddress
{
- value = "1352";
+ value = "1400";
type = "String";
}
}
@@ -162,7 +162,7 @@
{
datum baseAddress
{
- value = "1344";
+ value = "1392";
type = "String";
}
}
@@ -194,7 +194,7 @@
{
datum baseAddress
{
- value = "1248";
+ value = "1312";
type = "String";
}
}
@@ -346,7 +346,7 @@
{
datum baseAddress
{
- value = "896";
+ value = "960";
type = "String";
}
}
@@ -362,7 +362,7 @@
{
datum baseAddress
{
- value = "832";
+ value = "896";
type = "String";
}
}
@@ -378,7 +378,7 @@
{
datum baseAddress
{
- value = "1056";
+ value = "1120";
type = "String";
}
}
@@ -394,7 +394,7 @@
{
datum baseAddress
{
- value = "1120";
+ value = "1184";
type = "String";
}
}
@@ -410,7 +410,7 @@
{
datum baseAddress
{
- value = "1088";
+ value = "1152";
type = "String";
}
}
@@ -490,7 +490,7 @@
{
datum baseAddress
{
- value = "1024";
+ value = "1088";
type = "String";
}
}
@@ -506,7 +506,7 @@
{
datum baseAddress
{
- value = "992";
+ value = "1056";
type = "String";
}
}
@@ -538,7 +538,7 @@
{
datum baseAddress
{
- value = "1280";
+ value = "1344";
type = "String";
}
}
@@ -554,7 +554,7 @@
{
datum baseAddress
{
- value = "1264";
+ value = "1328";
type = "String";
}
}
@@ -570,7 +570,7 @@
{
datum baseAddress
{
- value = "1336";
+ value = "1384";
type = "String";
}
}
@@ -586,7 +586,7 @@
{
datum baseAddress
{
- value = "1328";
+ value = "1376";
type = "String";
}
}
@@ -602,7 +602,7 @@
{
datum baseAddress
{
- value = "1152";
+ value = "1216";
type = "String";
}
}
@@ -618,7 +618,7 @@
{
datum baseAddress
{
- value = "1296";
+ value = "832";
type = "String";
}
}
@@ -634,7 +634,7 @@
{
datum baseAddress
{
- value = "1320";
+ value = "1368";
type = "String";
}
}
@@ -650,7 +650,7 @@
{
datum baseAddress
{
- value = "1312";
+ value = "1360";
type = "String";
}
}
@@ -666,7 +666,7 @@
{
datum baseAddress
{
- value = "1184";
+ value = "1248";
type = "String";
}
}
@@ -730,7 +730,7 @@
{
datum baseAddress
{
- value = "1216";
+ value = "1280";
type = "String";
}
}
@@ -788,7 +788,7 @@
{
datum baseAddress
{
- value = "960";
+ value = "1024";
type = "String";
}
}
@@ -2324,7 +2324,7 @@
<parameter name="dataAddrWidth" value="23" />
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
<parameter name="dataMasterHighPerformanceMapParam" value="" />
- <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='avs_eth_1.mms_reg' start='0x280' end='0x2C0' /><slave name='avs_eth_0.mms_reg' start='0x2C0' end='0x300' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x300' end='0x340' /><slave name='reg_bsn_monitor_ddr.mem' start='0x340' end='0x380' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x380' end='0x3C0' /><slave name='timer_0.s1' start='0x3C0' end='0x3E0' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x3E0' end='0x400' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x400' end='0x420' /><slave name='reg_diag_bg_10gbe.mem' start='0x420' end='0x440' /><slave name='reg_diag_bg_ddr.mem' start='0x440' end='0x460' /><slave name='reg_diag_bg_1gbe.mem' start='0x460' end='0x480' /><slave name='reg_epcs.mem' start='0x480' end='0x4A0' /><slave name='reg_remu.mem' start='0x4A0' end='0x4C0' /><slave name='reg_unb_sens.mem' start='0x4C0' end='0x4E0' /><slave name='pio_wdi.s1' start='0x4E0' end='0x4F0' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x4F0' end='0x500' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x500' end='0x510' /><slave name='reg_io_ddr.mem' start='0x510' end='0x520' /><slave name='reg_mmdp_data.mem' start='0x520' end='0x528' /><slave name='reg_mmdp_ctrl.mem' start='0x528' end='0x530' /><slave name='reg_dpmm_data.mem' start='0x530' end='0x538' /><slave name='reg_dpmm_ctrl.mem' start='0x538' end='0x540' /><slave name='pio_pps.mem' start='0x540' end='0x548' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x548' end='0x550' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='avs_eth_0.mms_tse' start='0x6000' end='0x7000' /><slave name='avs_eth_1.mms_ram' start='0x7000' end='0x8000' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' /><slave name='ram_diag_bg_ddr.mem' start='0x9000' end='0xA000' /><slave name='ram_diag_bg_1gbe.mem' start='0xA000' end='0xB000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_ss_ss_wide.mem' start='0x40000' end='0x50000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x50000' end='0x60000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0x60000' end='0x70000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /></address-map>]]></parameter>
+ <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='avs_eth_1.mms_reg' start='0x280' end='0x2C0' /><slave name='avs_eth_0.mms_reg' start='0x2C0' end='0x300' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x300' end='0x340' /><slave name='reg_io_ddr.mem' start='0x340' end='0x380' /><slave name='reg_bsn_monitor_ddr.mem' start='0x380' end='0x3C0' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x3C0' end='0x400' /><slave name='timer_0.s1' start='0x400' end='0x420' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x420' end='0x440' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x440' end='0x460' /><slave name='reg_diag_bg_10gbe.mem' start='0x460' end='0x480' /><slave name='reg_diag_bg_ddr.mem' start='0x480' end='0x4A0' /><slave name='reg_diag_bg_1gbe.mem' start='0x4A0' end='0x4C0' /><slave name='reg_epcs.mem' start='0x4C0' end='0x4E0' /><slave name='reg_remu.mem' start='0x4E0' end='0x500' /><slave name='reg_unb_sens.mem' start='0x500' end='0x520' /><slave name='pio_wdi.s1' start='0x520' end='0x530' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x530' end='0x540' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x540' end='0x550' /><slave name='reg_mmdp_data.mem' start='0x550' end='0x558' /><slave name='reg_mmdp_ctrl.mem' start='0x558' end='0x560' /><slave name='reg_dpmm_data.mem' start='0x560' end='0x568' /><slave name='reg_dpmm_ctrl.mem' start='0x568' end='0x570' /><slave name='pio_pps.mem' start='0x570' end='0x578' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x578' end='0x580' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='avs_eth_0.mms_tse' start='0x6000' end='0x7000' /><slave name='avs_eth_1.mms_ram' start='0x7000' end='0x8000' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' /><slave name='ram_diag_bg_ddr.mem' start='0x9000' end='0xA000' /><slave name='ram_diag_bg_1gbe.mem' start='0xA000' end='0xB000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_ss_ss_wide.mem' start='0x40000' end='0x50000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x50000' end='0x60000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0x60000' end='0x70000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /></address-map>]]></parameter>
<parameter name="data_master_high_performance_paddr_base" value="0" />
<parameter name="data_master_high_performance_paddr_size" value="0" />
<parameter name="data_master_paddr_base" value="0" />
@@ -2755,7 +2755,7 @@
</module>
<module name="reg_io_ddr" kind="avs_common_mm" version="1.0" enabled="1">
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
- <parameter name="g_adr_w" value="2" />
+ <parameter name="g_adr_w" value="4" />
<parameter name="g_dat_w" value="32" />
</module>
<module name="reg_mmdp_ctrl" kind="avs_common_mm" version="1.0" enabled="1">
@@ -2833,7 +2833,7 @@
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0548" />
+ <parameter name="baseAddress" value="0x0578" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2851,7 +2851,7 @@
start="cpu_0.data_master"
end="reg_unb_sens.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04c0" />
+ <parameter name="baseAddress" value="0x0500" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2878,7 +2878,7 @@
start="cpu_0.data_master"
end="pio_pps.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0540" />
+ <parameter name="baseAddress" value="0x0570" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2896,7 +2896,7 @@
start="cpu_0.data_master"
end="reg_remu.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04a0" />
+ <parameter name="baseAddress" value="0x04e0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2905,7 +2905,7 @@
start="cpu_0.data_master"
end="reg_epcs.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0480" />
+ <parameter name="baseAddress" value="0x04c0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2914,7 +2914,7 @@
start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0538" />
+ <parameter name="baseAddress" value="0x0568" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2923,7 +2923,7 @@
start="cpu_0.data_master"
end="reg_dpmm_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0530" />
+ <parameter name="baseAddress" value="0x0560" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2932,7 +2932,7 @@
start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0528" />
+ <parameter name="baseAddress" value="0x0558" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2941,7 +2941,7 @@
start="cpu_0.data_master"
end="reg_mmdp_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0520" />
+ <parameter name="baseAddress" value="0x0550" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2959,7 +2959,7 @@
start="cpu_0.data_master"
end="reg_bsn_monitor_1GbE.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0380" />
+ <parameter name="baseAddress" value="0x03c0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2986,7 +2986,7 @@
start="cpu_0.data_master"
end="reg_diag_bg_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0460" />
+ <parameter name="baseAddress" value="0x04a0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3022,7 +3022,7 @@
start="cpu_0.data_master"
end="reg_bsn_monitor_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0340" />
+ <parameter name="baseAddress" value="0x0380" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3031,7 +3031,7 @@
start="cpu_0.data_master"
end="reg_diag_bg_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0440" />
+ <parameter name="baseAddress" value="0x0480" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3076,7 +3076,7 @@
start="cpu_0.data_master"
end="reg_io_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0510" />
+ <parameter name="baseAddress" value="0x0340" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3112,7 +3112,7 @@
start="cpu_0.data_master"
end="reg_diag_bg_10gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0420" />
+ <parameter name="baseAddress" value="0x0460" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3130,7 +3130,7 @@
start="cpu_0.data_master"
end="reg_diag_tx_seq_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0500" />
+ <parameter name="baseAddress" value="0x0540" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3139,7 +3139,7 @@
start="cpu_0.data_master"
end="reg_diag_rx_seq_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0400" />
+ <parameter name="baseAddress" value="0x0440" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3166,7 +3166,7 @@
start="cpu_0.data_master"
end="reg_diag_tx_seq_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04f0" />
+ <parameter name="baseAddress" value="0x0530" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3175,7 +3175,7 @@
start="cpu_0.data_master"
end="reg_diag_rx_seq_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03e0" />
+ <parameter name="baseAddress" value="0x0420" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3247,7 +3247,7 @@
start="cpu_0.data_master"
end="pio_wdi.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04e0" />
+ <parameter name="baseAddress" value="0x0520" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -3256,7 +3256,7 @@
start="cpu_0.data_master"
end="timer_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03c0" />
+ <parameter name="baseAddress" value="0x0400" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
index 581946496bc100c50f4180828a3c5991d7c1d7c3..29a36fda9b4f0d65de6504351aed89c162102e95 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
@@ -739,7 +739,7 @@ BEGIN
ram_ss_ss_wide_writedata_export => ram_ss_ss_transp_mosi.wrdata(c_word_w-1 DOWNTO 0),
-- reg_io_ddr
- reg_io_ddr_address_export => reg_io_ddr_mosi.address(1 DOWNTO 0),
+ reg_io_ddr_address_export => reg_io_ddr_mosi.address(3 DOWNTO 0),
reg_io_ddr_clk_export => OPEN,
reg_io_ddr_read_export => reg_io_ddr_mosi.rd,
reg_io_ddr_readdata_export => reg_io_ddr_miso.rddata(c_word_w-1 DOWNTO 0),
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
index 8f595b201a74eaa90c113faee795c1b82c2d04d8..b15133df385d9bfd89268ea8a7814277a99d8768 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
@@ -28,7 +28,6 @@ PACKAGE qsys_unb2_test_pkg IS
-- this component declaration is copy-pasted from Quartus v15 QSYS builder
-----------------------------------------------------------------------------
-
component qsys_unb2_test is
port (
avs_eth_0_clk_export : out std_logic; -- export
@@ -260,7 +259,7 @@ PACKAGE qsys_unb2_test_pkg IS
reg_epcs_reset_export : out std_logic; -- export
reg_epcs_write_export : out std_logic; -- export
reg_epcs_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_io_ddr_address_export : out std_logic_vector(1 downto 0); -- export
+ reg_io_ddr_address_export : out std_logic_vector(3 downto 0); -- export
reg_io_ddr_clk_export : out std_logic; -- export
reg_io_ddr_read_export : out std_logic; -- export
reg_io_ddr_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
@@ -337,6 +336,5 @@ PACKAGE qsys_unb2_test_pkg IS
);
end component qsys_unb2_test;
-
END qsys_unb2_test_pkg;