diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/lofar2_unb2b_filterbank_full.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/lofar2_unb2b_filterbank_full.vhd
index ab8ab43fdda89d4c08bd74b2b85dcf31e5a79a32..2a036bf11822b0f99369fe3c5c21b3305b1f4f8d 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/lofar2_unb2b_filterbank_full.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/lofar2_unb2b_filterbank_full.vhd
@@ -73,10 +73,6 @@ ENTITY lofar2_unb2b_filterbank_full IS
     ETH_SGIN     : IN    STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
     ETH_SGOUT    : OUT   STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
 
-    -- front transceivers
-    QSFP_0_RX     : IN    STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
-    QSFP_0_TX     : OUT   STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0);
-
     -- LEDs
     QSFP_LED     : OUT   STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0);
 
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
index 582ed069d69311742e4a36aa452d2eef873a7c33..92aaa44f89d481b7c29973ad4376c52813516c05 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
@@ -113,17 +113,18 @@ ARCHITECTURE str OF sdp_statistics_offload IS
   CONSTANT c_beamlet_id                : NATURAL := g_beamset_id * c_sdp_S_sub_bf;
 
   TYPE t_reg IS RECORD
-    block_count    : NATURAL;
-    start_address  : NATURAL;
-    start_pulse    : STD_LOGIC;
-    dp_header_info : STD_LOGIC_VECTOR(1023 DOWNTO 0);
-    data_id        : STD_LOGIC_VECTOR(31 DOWNTO 0);
-    nof_cycles_dly : NATURAL;
-    payload_err    : STD_LOGIC;
-    interval_cnt   : NATURAL;
+    block_count          : NATURAL;
+    start_address        : NATURAL;
+    start_pulse          : STD_LOGIC;
+    dp_header_info       : STD_LOGIC_VECTOR(1023 DOWNTO 0);
+    data_id              : STD_LOGIC_VECTOR(31 DOWNTO 0);
+    nof_cycles_dly       : NATURAL;
+    payload_err          : STD_LOGIC;
+    interval_cnt         : NATURAL;
+    integration_interval : NATURAL;
   END RECORD;
 
-  CONSTANT c_reg_rst : t_reg := (0, 0, '0', (OTHERS => '0'), (OTHERS => '0'), 0, '0', 0);
+  CONSTANT c_reg_rst : t_reg := (0, 0, '0', (OTHERS => '0'), (OTHERS => '0'), 0, '0', 0, 0);
 
   SIGNAL r : t_reg;
   SIGNAL d : t_reg;
@@ -134,7 +135,6 @@ ARCHITECTURE str OF sdp_statistics_offload IS
   SIGNAL dp_block_from_mm_src_in  : t_dp_siso;
   
   SIGNAL dp_header_info           : STD_LOGIC_VECTOR(1023 DOWNTO 0):= (OTHERS => '0');
-  SIGNAL integration_interval     : NATURAL   := 0;
   SIGNAL bsn_at_sync              : STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
 
   --SIGNAL sdp_data_id : STD_LOGIC_VECTOR(31 DOWNTO 0);
@@ -163,7 +163,7 @@ BEGIN
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_source_info_reserved"                ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_source_info_reserved"                )) <= (OTHERS => '0');
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_source_info_gn_id"                   ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_source_info_gn_id"                   )) <= TO_UVEC(gn_index, 5);
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_reserved"                            ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_reserved"                            )) <= (OTHERS => '0');
-  dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_integration_interval"                ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_integration_interval"                )) <= TO_UVEC(integration_interval, 24);
+  dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_integration_interval"                ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_integration_interval"                )) <= TO_UVEC(r.integration_interval, 24);
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_data_id"                             ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_data_id"                             )) <= r.data_id;
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_nof_signal_inputs"                   ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_nof_signal_inputs"                   )) <= TO_UVEC(c_nof_signal_inputs, 8);
   dp_header_info(field_hi(c_sdp_stat_hdr_field_arr, "sdp_nof_statistics_per_packet"           ) DOWNTO field_lo(c_sdp_stat_hdr_field_arr,  "sdp_nof_statistics_per_packet"           )) <= TO_UVEC(c_nof_statistics_per_packet, 16);
@@ -187,7 +187,7 @@ BEGIN
     
     -- Count number of sop's in a sync interval and get payload errors and keep them till next sync.
     IF in_sosi.sync = '1' THEN
-      integration_interval <= r.interval_cnt;
+      d.integration_interval <= r.interval_cnt;
       d.interval_cnt <= 0;
       d.payload_err  <= '0';
     ELSE
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_subband_equalizer.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_subband_equalizer.vhd
index f4048ce943ae6316fed63f8e36c872739867ecd5..5bae5139e03426fd6fa03815c678955f694b2a39 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_subband_equalizer.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_subband_equalizer.vhd
@@ -76,7 +76,7 @@ BEGIN
   -- to be applied according the subband data order 
   -- fsub[S_pn/Q_fft]_[N_sub][Q_fft]. Therefore the counter in 
   -- sdp_subband_equalizer.vhd has to account for this difference in order.
-  p_cnt : PROCESS(dp_clk, dp_rst)
+  p_cnt : PROCESS(dp_clk, dp_rst, in_sosi_arr)
     VARIABLE v_Q_fft, v_N_sub : NATURAL;
   BEGIN
     IF dp_rst = '1' THEN
diff --git a/libraries/base/common/src/vhdl/common_variable_delay.vhd b/libraries/base/common/src/vhdl/common_variable_delay.vhd
index 8d4c8f65e3be65b5320b083d4d8b57a76b60a48f..847bb54e531d2bc300783c1f2431f25fcef1b97f 100644
--- a/libraries/base/common/src/vhdl/common_variable_delay.vhd
+++ b/libraries/base/common/src/vhdl/common_variable_delay.vhd
@@ -57,7 +57,7 @@ ARCHITECTURE rtl OF common_variable_delay IS
 BEGIN
   out_val <= i_out_val;
   
-  p_delay: PROCESS(in_val, prev_in_val, delay, delay_cnt)
+  p_delay: PROCESS(enable, in_val, prev_in_val, delay, delay_cnt)
   BEGIN
     nxt_out_val   <= '0';
     nxt_delay_cnt <= 0;